linux/drivers/misc/habanalabs/include/gaudi2/asic_reg/
<<
>>
Prefs
arc_farm_arc0_acp_eng_regs.h 16170 2022-10-02 21:09:07
arc_farm_arc0_aux_masks.h 35435 2022-10-02 21:09:07
arc_farm_arc0_aux_regs.h 17015 2022-10-02 21:09:07
arc_farm_arc0_dup_eng_axuser_regs.h 1747 2022-10-02 21:09:07
arc_farm_arc0_dup_eng_regs.h 17743 2022-10-02 21:09:07
arc_farm_kdma_ctx_axuser_masks.h 5731 2022-10-02 21:09:07
arc_farm_kdma_ctx_axuser_regs.h 1655 2022-10-02 21:09:07
arc_farm_kdma_ctx_masks.h 8892 2022-10-02 21:09:07
arc_farm_kdma_ctx_regs.h 2380 2022-10-02 21:09:07
arc_farm_kdma_kdma_cgm_regs.h 709 2022-10-02 21:09:07
arc_farm_kdma_masks.h 16583 2022-10-02 21:09:07
arc_farm_kdma_regs.h 3883 2022-10-02 21:09:07
cpu_if_regs.h 18149 2022-10-02 21:09:07
dcore0_dec0_cmd_masks.h 9763 2022-10-02 21:09:07
dcore0_dec0_cmd_regs.h 1920 2022-10-02 21:09:07
dcore0_edma0_core_ctx_axuser_regs.h 1747 2022-10-02 21:09:07
dcore0_edma0_core_ctx_regs.h 2540 2022-10-02 21:09:07
dcore0_edma0_core_masks.h 17899 2022-10-02 21:09:07
dcore0_edma0_core_regs.h 4167 2022-10-02 21:09:07
dcore0_edma0_qm_arc_aux_regs.h 18743 2022-10-02 21:09:07
dcore0_edma0_qm_axuser_nonsecured_regs.h 1862 2022-10-02 21:09:07
dcore0_edma0_qm_cgm_regs.h 688 2022-10-02 21:09:07
dcore0_edma0_qm_masks.h 51930 2022-10-02 21:09:07
dcore0_edma0_qm_regs.h 28932 2022-10-02 21:09:07
dcore0_edma1_core_ctx_axuser_regs.h 1747 2022-10-02 21:09:07
dcore0_edma1_qm_axuser_nonsecured_regs.h 1862 2022-10-02 21:09:07
dcore0_hmmu0_mmu_masks.h 13355 2022-10-02 21:09:07
dcore0_hmmu0_mmu_regs.h 6841 2022-10-02 21:09:07
dcore0_hmmu0_stlb_masks.h 15996 2022-10-02 21:09:07
dcore0_hmmu0_stlb_regs.h 4011 2022-10-02 21:09:07
dcore0_mme_acc_regs.h 1755 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_cout0_master_regs.h 1040 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_cout0_slave_regs.h 1031 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_cout1_master_regs.h 1040 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_cout1_slave_regs.h 1031 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_in0_master_regs.h 1022 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_in0_slave_regs.h 1013 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_in1_master_regs.h 1022 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_in1_slave_regs.h 1013 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_in2_master_regs.h 1022 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_in2_slave_regs.h 1013 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_in3_master_regs.h 1022 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_in3_slave_regs.h 1013 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_in4_master_regs.h 1022 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_agu_in4_slave_regs.h 1013 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_base_addr_regs.h 1130 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_non_tensor_end_regs.h 2406 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_non_tensor_start_regs.h 1098 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_tensor_a_regs.h 2125 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_tensor_b_regs.h 2125 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_arch_tensor_cout_regs.h 2203 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_masks.h 22056 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_mme_axuser_regs.h 1770 2022-10-02 21:09:07
dcore0_mme_ctrl_lo_regs.h 4447 2022-10-02 21:09:07
dcore0_mme_qm_arc_acp_eng_regs.h 17274 2022-10-02 21:09:07
dcore0_mme_qm_arc_aux_regs.h 18167 2022-10-02 21:09:07
dcore0_mme_qm_arc_dup_eng_axuser_regs.h 1839 2022-10-02 21:09:07
dcore0_mme_qm_arc_dup_eng_regs.h 18863 2022-10-02 21:09:07
dcore0_mme_qm_axuser_nonsecured_regs.h 1816 2022-10-02 21:09:07
dcore0_mme_qm_axuser_secured_regs.h 1747 2022-10-02 21:09:07
dcore0_mme_qm_cgm_regs.h 674 2022-10-02 21:09:07
dcore0_mme_qm_regs.h 27890 2022-10-02 21:09:07
dcore0_mme_sbte0_masks.h 3486 2022-10-02 21:09:07
dcore0_mme_sbte0_mstr_if_axuser_regs.h 1816 2022-10-02 21:09:07
dcore0_mme_wb0_mstr_if_axuser_regs.h 1770 2022-10-02 21:09:07
dcore0_rtr0_ctrl_regs.h 8091 2022-10-02 21:09:07
dcore0_rtr0_mstr_if_rr_prvt_hbw_regs.h 7682 2022-10-02 21:09:07
dcore0_rtr0_mstr_if_rr_prvt_lbw_regs.h 6683 2022-10-02 21:09:07
dcore0_rtr0_mstr_if_rr_shrd_hbw_regs.h 7682 2022-10-02 21:09:07
dcore0_rtr0_mstr_if_rr_shrd_lbw_regs.h 6683 2022-10-02 21:09:07
dcore0_sync_mngr_glbl_masks.h 5332 2022-10-02 21:09:07
dcore0_sync_mngr_glbl_regs.h 34068 2022-10-02 21:09:07
dcore0_sync_mngr_mstr_if_axuser_masks.h 6410 2022-10-02 21:09:07
dcore0_sync_mngr_mstr_if_axuser_regs.h 1816 2022-10-02 21:09:07
dcore0_sync_mngr_objs_masks.h 3557 2022-10-02 21:09:07
dcore0_sync_mngr_objs_regs.h 1256314 2022-10-02 21:09:07
dcore0_tpc0_cfg_axuser_regs.h 1609 2022-10-02 21:09:07
dcore0_tpc0_cfg_kernel_regs.h 3500 2022-10-02 21:09:07
dcore0_tpc0_cfg_kernel_tensor_0_regs.h 1966 2022-10-02 21:09:07
dcore0_tpc0_cfg_masks.h 22268 2022-10-02 21:09:07
dcore0_tpc0_cfg_qm_regs.h 3272 2022-10-02 21:09:07
dcore0_tpc0_cfg_qm_sync_object_regs.h 716 2022-10-02 21:09:07
dcore0_tpc0_cfg_qm_tensor_0_regs.h 1870 2022-10-02 21:09:07
dcore0_tpc0_cfg_regs.h 5995 2022-10-02 21:09:07
dcore0_tpc0_cfg_special_regs.h 5228 2022-10-02 21:09:07
dcore0_tpc0_eml_busmon_0_regs.h 4177 2022-10-02 21:09:07
dcore0_tpc0_eml_etf_regs.h 2614 2022-10-02 21:09:07
dcore0_tpc0_eml_funnel_regs.h 1852 2022-10-02 21:09:07
dcore0_tpc0_eml_spmu_regs.h 3742 2022-10-02 21:09:07
dcore0_tpc0_eml_stm_regs.h 3160 2022-10-02 21:09:07
dcore0_tpc0_qm_arc_aux_regs.h 18455 2022-10-02 21:09:07
dcore0_tpc0_qm_axuser_nonsecured_regs.h 1839 2022-10-02 21:09:07
dcore0_tpc0_qm_cgm_regs.h 681 2022-10-02 21:09:07
dcore0_tpc0_qm_regs.h 28411 2022-10-02 21:09:07
dcore0_vdec0_brdg_ctrl_axuser_dec_regs.h 1862 2022-10-02 21:09:07
dcore0_vdec0_brdg_ctrl_axuser_msix_abnrm_regs.h 2023 2022-10-02 21:09:07
dcore0_vdec0_brdg_ctrl_axuser_msix_l2c_regs.h 1977 2022-10-02 21:09:07
dcore0_vdec0_brdg_ctrl_axuser_msix_nrm_regs.h 1977 2022-10-02 21:09:07
dcore0_vdec0_brdg_ctrl_axuser_msix_vcd_regs.h 1977 2022-10-02 21:09:07
dcore0_vdec0_brdg_ctrl_masks.h 28150 2022-10-02 21:09:07
dcore0_vdec0_brdg_ctrl_regs.h 7529 2022-10-02 21:09:07
dcore0_vdec0_ctrl_special_regs.h 5398 2022-10-02 21:09:07
dcore1_mme_ctrl_lo_regs.h 4447 2022-10-02 21:09:07
dcore3_mme_ctrl_lo_regs.h 4447 2022-10-02 21:09:07
gaudi2_blocks_linux_driver.h 2456864 2022-10-02 21:09:07
gaudi2_regs.h 25014 2023-03-10 08:29:57
nic0_qm0_cgm_regs.h 639 2022-10-02 21:09:07
nic0_qm0_regs.h 25285 2022-10-02 21:09:07
nic0_qm_arc_aux0_regs.h 16727 2022-10-02 21:09:07
nic0_qpc0_regs.h 22207 2022-10-02 21:09:07
nic0_umr0_0_completion_queue_ci_1_regs.h 757 2022-10-02 21:09:07
nic0_umr0_0_unsecure_doorbell0_regs.h 893 2022-10-02 21:09:07
pcie_aux_regs.h 6788 2022-10-02 21:09:07
pcie_dbi_regs.h 11034 2022-10-02 21:09:07
pcie_dec0_cmd_masks.h 9405 2022-10-02 21:09:07
pcie_dec0_cmd_regs.h 1850 2022-10-02 21:09:07
pcie_vdec0_brdg_ctrl_axuser_dec_regs.h 1816 2022-10-02 21:09:07
pcie_vdec0_brdg_ctrl_axuser_msix_abnrm_regs.h 1977 2022-10-02 21:09:07
pcie_vdec0_brdg_ctrl_axuser_msix_l2c_regs.h 1931 2022-10-02 21:09:07
pcie_vdec0_brdg_ctrl_axuser_msix_nrm_regs.h 1931 2022-10-02 21:09:07
pcie_vdec0_brdg_ctrl_axuser_msix_vcd_regs.h 1931 2022-10-02 21:09:07
pcie_vdec0_brdg_ctrl_masks.h 27250 2022-10-02 21:09:07
pcie_vdec0_brdg_ctrl_regs.h 7299 2022-10-02 21:09:07
pcie_vdec0_ctrl_special_regs.h 5228 2022-10-02 21:09:07
pcie_wrap_regs.h 14625 2022-10-02 21:09:07
pcie_wrap_special_regs.h 4718 2023-03-10 08:29:57
pdma0_core_ctx_axuser_regs.h 1586 2022-10-02 21:09:07
pdma0_core_ctx_regs.h 2260 2022-10-02 21:09:07
pdma0_core_masks.h 15596 2022-10-02 21:09:07
pdma0_core_regs.h 3670 2022-10-02 21:09:07
pdma0_core_special_masks.h 5901 2022-10-02 21:09:07
pdma0_qm_arc_aux_regs.h 16727 2022-10-02 21:09:07
pdma0_qm_axuser_nonsecured_regs.h 1701 2022-10-02 21:09:07
pdma0_qm_axuser_secured_regs.h 1632 2022-10-02 21:09:07
pdma0_qm_cgm_regs.h 639 2022-10-02 21:09:07
pdma0_qm_masks.h 45224 2022-10-02 21:09:07
pdma0_qm_regs.h 25285 2022-10-02 21:09:07
pdma1_core_ctx_axuser_regs.h 1586 2022-10-02 21:09:07
pdma1_qm_axuser_nonsecured_regs.h 1701 2022-10-02 21:09:07
pmmu_hbw_stlb_masks.h 14948 2022-10-02 21:09:07
pmmu_hbw_stlb_regs.h 3759 2022-10-02 21:09:07
pmmu_pif_regs.h 3233 2022-10-02 21:09:07
psoc_etr_masks.h 10146 2022-10-02 21:09:07
psoc_etr_regs.h 2222 2022-10-02 21:09:07
psoc_global_conf_masks.h 65365 2022-10-02 21:09:07
psoc_global_conf_regs.h 35389 2022-10-02 21:09:07
psoc_reset_conf_masks.h 100195 2022-10-02 21:09:07
psoc_reset_conf_regs.h 27900 2022-10-02 21:09:07
psoc_timestamp_regs.h 1251 2022-10-02 21:09:07
rot0_desc_regs.h 3262 2022-10-02 21:09:07
rot0_masks.h 9894 2022-10-02 21:09:07
rot0_qm_arc_aux_regs.h 16439 2022-10-02 21:09:07
rot0_qm_axuser_nonsecured_regs.h 1678 2022-10-02 21:09:07
rot0_qm_cgm_regs.h 632 2022-10-02 21:09:07
rot0_qm_regs.h 24764 2022-10-02 21:09:07
rot0_regs.h 2180 2022-10-02 21:09:07
xbar_edge_0_regs.h 4834 2022-10-02 21:09:07
xbar_mid_0_regs.h 4742 2022-10-02 21:09:07
The original LXR software by the LXR community, this experimental version by lxr@linux.no.