linux/arch/ia64/kernel/ptrace.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Kernel support for the ptrace() and syscall tracing interfaces.
   4 *
   5 * Copyright (C) 1999-2005 Hewlett-Packard Co
   6 *      David Mosberger-Tang <davidm@hpl.hp.com>
   7 * Copyright (C) 2006 Intel Co
   8 *  2006-08-12  - IA64 Native Utrace implementation support added by
   9 *      Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
  10 *
  11 * Derived from the x86 and Alpha versions.
  12 */
  13#include <linux/kernel.h>
  14#include <linux/sched.h>
  15#include <linux/sched/task.h>
  16#include <linux/sched/task_stack.h>
  17#include <linux/mm.h>
  18#include <linux/errno.h>
  19#include <linux/ptrace.h>
  20#include <linux/user.h>
  21#include <linux/security.h>
  22#include <linux/audit.h>
  23#include <linux/signal.h>
  24#include <linux/regset.h>
  25#include <linux/elf.h>
  26#include <linux/resume_user_mode.h>
  27
  28#include <asm/processor.h>
  29#include <asm/ptrace_offsets.h>
  30#include <asm/rse.h>
  31#include <linux/uaccess.h>
  32#include <asm/unwind.h>
  33
  34#include "entry.h"
  35
  36/*
  37 * Bits in the PSR that we allow ptrace() to change:
  38 *      be, up, ac, mfl, mfh (the user mask; five bits total)
  39 *      db (debug breakpoint fault; one bit)
  40 *      id (instruction debug fault disable; one bit)
  41 *      dd (data debug fault disable; one bit)
  42 *      ri (restart instruction; two bits)
  43 *      is (instruction set; one bit)
  44 */
  45#define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS      \
  46                   | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI)
  47
  48#define MASK(nbits)     ((1UL << (nbits)) - 1)  /* mask with NBITS bits set */
  49#define PFM_MASK        MASK(38)
  50
  51#define PTRACE_DEBUG    0
  52
  53#if PTRACE_DEBUG
  54# define dprintk(format...)     printk(format)
  55# define inline
  56#else
  57# define dprintk(format...)
  58#endif
  59
  60/* Return TRUE if PT was created due to kernel-entry via a system-call.  */
  61
  62static inline int
  63in_syscall (struct pt_regs *pt)
  64{
  65        return (long) pt->cr_ifs >= 0;
  66}
  67
  68/*
  69 * Collect the NaT bits for r1-r31 from scratch_unat and return a NaT
  70 * bitset where bit i is set iff the NaT bit of register i is set.
  71 */
  72unsigned long
  73ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat)
  74{
  75#       define GET_BITS(first, last, unat)                              \
  76        ({                                                              \
  77                unsigned long bit = ia64_unat_pos(&pt->r##first);       \
  78                unsigned long nbits = (last - first + 1);               \
  79                unsigned long mask = MASK(nbits) << first;              \
  80                unsigned long dist;                                     \
  81                if (bit < first)                                        \
  82                        dist = 64 + bit - first;                        \
  83                else                                                    \
  84                        dist = bit - first;                             \
  85                ia64_rotr(unat, dist) & mask;                           \
  86        })
  87        unsigned long val;
  88
  89        /*
  90         * Registers that are stored consecutively in struct pt_regs
  91         * can be handled in parallel.  If the register order in
  92         * struct_pt_regs changes, this code MUST be updated.
  93         */
  94        val  = GET_BITS( 1,  1, scratch_unat);
  95        val |= GET_BITS( 2,  3, scratch_unat);
  96        val |= GET_BITS(12, 13, scratch_unat);
  97        val |= GET_BITS(14, 14, scratch_unat);
  98        val |= GET_BITS(15, 15, scratch_unat);
  99        val |= GET_BITS( 8, 11, scratch_unat);
 100        val |= GET_BITS(16, 31, scratch_unat);
 101        return val;
 102
 103#       undef GET_BITS
 104}
 105
 106/*
 107 * Set the NaT bits for the scratch registers according to NAT and
 108 * return the resulting unat (assuming the scratch registers are
 109 * stored in PT).
 110 */
 111unsigned long
 112ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat)
 113{
 114#       define PUT_BITS(first, last, nat)                               \
 115        ({                                                              \
 116                unsigned long bit = ia64_unat_pos(&pt->r##first);       \
 117                unsigned long nbits = (last - first + 1);               \
 118                unsigned long mask = MASK(nbits) << first;              \
 119                long dist;                                              \
 120                if (bit < first)                                        \
 121                        dist = 64 + bit - first;                        \
 122                else                                                    \
 123                        dist = bit - first;                             \
 124                ia64_rotl(nat & mask, dist);                            \
 125        })
 126        unsigned long scratch_unat;
 127
 128        /*
 129         * Registers that are stored consecutively in struct pt_regs
 130         * can be handled in parallel.  If the register order in
 131         * struct_pt_regs changes, this code MUST be updated.
 132         */
 133        scratch_unat  = PUT_BITS( 1,  1, nat);
 134        scratch_unat |= PUT_BITS( 2,  3, nat);
 135        scratch_unat |= PUT_BITS(12, 13, nat);
 136        scratch_unat |= PUT_BITS(14, 14, nat);
 137        scratch_unat |= PUT_BITS(15, 15, nat);
 138        scratch_unat |= PUT_BITS( 8, 11, nat);
 139        scratch_unat |= PUT_BITS(16, 31, nat);
 140
 141        return scratch_unat;
 142
 143#       undef PUT_BITS
 144}
 145
 146#define IA64_MLX_TEMPLATE       0x2
 147#define IA64_MOVL_OPCODE        6
 148
 149void
 150ia64_increment_ip (struct pt_regs *regs)
 151{
 152        unsigned long w0, ri = ia64_psr(regs)->ri + 1;
 153
 154        if (ri > 2) {
 155                ri = 0;
 156                regs->cr_iip += 16;
 157        } else if (ri == 2) {
 158                get_user(w0, (char __user *) regs->cr_iip + 0);
 159                if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
 160                        /*
 161                         * rfi'ing to slot 2 of an MLX bundle causes
 162                         * an illegal operation fault.  We don't want
 163                         * that to happen...
 164                         */
 165                        ri = 0;
 166                        regs->cr_iip += 16;
 167                }
 168        }
 169        ia64_psr(regs)->ri = ri;
 170}
 171
 172void
 173ia64_decrement_ip (struct pt_regs *regs)
 174{
 175        unsigned long w0, ri = ia64_psr(regs)->ri - 1;
 176
 177        if (ia64_psr(regs)->ri == 0) {
 178                regs->cr_iip -= 16;
 179                ri = 2;
 180                get_user(w0, (char __user *) regs->cr_iip + 0);
 181                if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
 182                        /*
 183                         * rfi'ing to slot 2 of an MLX bundle causes
 184                         * an illegal operation fault.  We don't want
 185                         * that to happen...
 186                         */
 187                        ri = 1;
 188                }
 189        }
 190        ia64_psr(regs)->ri = ri;
 191}
 192
 193/*
 194 * This routine is used to read an rnat bits that are stored on the
 195 * kernel backing store.  Since, in general, the alignment of the user
 196 * and kernel are different, this is not completely trivial.  In
 197 * essence, we need to construct the user RNAT based on up to two
 198 * kernel RNAT values and/or the RNAT value saved in the child's
 199 * pt_regs.
 200 *
 201 * user rbs
 202 *
 203 * +--------+ <-- lowest address
 204 * | slot62 |
 205 * +--------+
 206 * |  rnat  | 0x....1f8
 207 * +--------+
 208 * | slot00 | \
 209 * +--------+ |
 210 * | slot01 | > child_regs->ar_rnat
 211 * +--------+ |
 212 * | slot02 | /                         kernel rbs
 213 * +--------+                           +--------+
 214 *          <- child_regs->ar_bspstore  | slot61 | <-- krbs
 215 * +- - - - +                           +--------+
 216 *                                      | slot62 |
 217 * +- - - - +                           +--------+
 218 *                                      |  rnat  |
 219 * +- - - - +                           +--------+
 220 *   vrnat                              | slot00 |
 221 * +- - - - +                           +--------+
 222 *                                      =        =
 223 *                                      +--------+
 224 *                                      | slot00 | \
 225 *                                      +--------+ |
 226 *                                      | slot01 | > child_stack->ar_rnat
 227 *                                      +--------+ |
 228 *                                      | slot02 | /
 229 *                                      +--------+
 230 *                                                <--- child_stack->ar_bspstore
 231 *
 232 * The way to think of this code is as follows: bit 0 in the user rnat
 233 * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat
 234 * value.  The kernel rnat value holding this bit is stored in
 235 * variable rnat0.  rnat1 is loaded with the kernel rnat value that
 236 * form the upper bits of the user rnat value.
 237 *
 238 * Boundary cases:
 239 *
 240 * o when reading the rnat "below" the first rnat slot on the kernel
 241 *   backing store, rnat0/rnat1 are set to 0 and the low order bits are
 242 *   merged in from pt->ar_rnat.
 243 *
 244 * o when reading the rnat "above" the last rnat slot on the kernel
 245 *   backing store, rnat0/rnat1 gets its value from sw->ar_rnat.
 246 */
 247static unsigned long
 248get_rnat (struct task_struct *task, struct switch_stack *sw,
 249          unsigned long *krbs, unsigned long *urnat_addr,
 250          unsigned long *urbs_end)
 251{
 252        unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr;
 253        unsigned long umask = 0, mask, m;
 254        unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
 255        long num_regs, nbits;
 256        struct pt_regs *pt;
 257
 258        pt = task_pt_regs(task);
 259        kbsp = (unsigned long *) sw->ar_bspstore;
 260        ubspstore = (unsigned long *) pt->ar_bspstore;
 261
 262        if (urbs_end < urnat_addr)
 263                nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_end);
 264        else
 265                nbits = 63;
 266        mask = MASK(nbits);
 267        /*
 268         * First, figure out which bit number slot 0 in user-land maps
 269         * to in the kernel rnat.  Do this by figuring out how many
 270         * register slots we're beyond the user's backingstore and
 271         * then computing the equivalent address in kernel space.
 272         */
 273        num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
 274        slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
 275        shift = ia64_rse_slot_num(slot0_kaddr);
 276        rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
 277        rnat0_kaddr = rnat1_kaddr - 64;
 278
 279        if (ubspstore + 63 > urnat_addr) {
 280                /* some bits need to be merged in from pt->ar_rnat */
 281                umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
 282                urnat = (pt->ar_rnat & umask);
 283                mask &= ~umask;
 284                if (!mask)
 285                        return urnat;
 286        }
 287
 288        m = mask << shift;
 289        if (rnat0_kaddr >= kbsp)
 290                rnat0 = sw->ar_rnat;
 291        else if (rnat0_kaddr > krbs)
 292                rnat0 = *rnat0_kaddr;
 293        urnat |= (rnat0 & m) >> shift;
 294
 295        m = mask >> (63 - shift);
 296        if (rnat1_kaddr >= kbsp)
 297                rnat1 = sw->ar_rnat;
 298        else if (rnat1_kaddr > krbs)
 299                rnat1 = *rnat1_kaddr;
 300        urnat |= (rnat1 & m) << (63 - shift);
 301        return urnat;
 302}
 303
 304/*
 305 * The reverse of get_rnat.
 306 */
 307static void
 308put_rnat (struct task_struct *task, struct switch_stack *sw,
 309          unsigned long *krbs, unsigned long *urnat_addr, unsigned long urnat,
 310          unsigned long *urbs_end)
 311{
 312        unsigned long rnat0 = 0, rnat1 = 0, *slot0_kaddr, umask = 0, mask, m;
 313        unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
 314        long num_regs, nbits;
 315        struct pt_regs *pt;
 316        unsigned long cfm, *urbs_kargs;
 317
 318        pt = task_pt_regs(task);
 319        kbsp = (unsigned long *) sw->ar_bspstore;
 320        ubspstore = (unsigned long *) pt->ar_bspstore;
 321
 322        urbs_kargs = urbs_end;
 323        if (in_syscall(pt)) {
 324                /*
 325                 * If entered via syscall, don't allow user to set rnat bits
 326                 * for syscall args.
 327                 */
 328                cfm = pt->cr_ifs;
 329                urbs_kargs = ia64_rse_skip_regs(urbs_end, -(cfm & 0x7f));
 330        }
 331
 332        if (urbs_kargs >= urnat_addr)
 333                nbits = 63;
 334        else {
 335                if ((urnat_addr - 63) >= urbs_kargs)
 336                        return;
 337                nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_kargs);
 338        }
 339        mask = MASK(nbits);
 340
 341        /*
 342         * First, figure out which bit number slot 0 in user-land maps
 343         * to in the kernel rnat.  Do this by figuring out how many
 344         * register slots we're beyond the user's backingstore and
 345         * then computing the equivalent address in kernel space.
 346         */
 347        num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
 348        slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
 349        shift = ia64_rse_slot_num(slot0_kaddr);
 350        rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
 351        rnat0_kaddr = rnat1_kaddr - 64;
 352
 353        if (ubspstore + 63 > urnat_addr) {
 354                /* some bits need to be place in pt->ar_rnat: */
 355                umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
 356                pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask);
 357                mask &= ~umask;
 358                if (!mask)
 359                        return;
 360        }
 361        /*
 362         * Note: Section 11.1 of the EAS guarantees that bit 63 of an
 363         * rnat slot is ignored. so we don't have to clear it here.
 364         */
 365        rnat0 = (urnat << shift);
 366        m = mask << shift;
 367        if (rnat0_kaddr >= kbsp)
 368                sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat0 & m);
 369        else if (rnat0_kaddr > krbs)
 370                *rnat0_kaddr = ((*rnat0_kaddr & ~m) | (rnat0 & m));
 371
 372        rnat1 = (urnat >> (63 - shift));
 373        m = mask >> (63 - shift);
 374        if (rnat1_kaddr >= kbsp)
 375                sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat1 & m);
 376        else if (rnat1_kaddr > krbs)
 377                *rnat1_kaddr = ((*rnat1_kaddr & ~m) | (rnat1 & m));
 378}
 379
 380static inline int
 381on_kernel_rbs (unsigned long addr, unsigned long bspstore,
 382               unsigned long urbs_end)
 383{
 384        unsigned long *rnat_addr = ia64_rse_rnat_addr((unsigned long *)
 385                                                      urbs_end);
 386        return (addr >= bspstore && addr <= (unsigned long) rnat_addr);
 387}
 388
 389/*
 390 * Read a word from the user-level backing store of task CHILD.  ADDR
 391 * is the user-level address to read the word from, VAL a pointer to
 392 * the return value, and USER_BSP gives the end of the user-level
 393 * backing store (i.e., it's the address that would be in ar.bsp after
 394 * the user executed a "cover" instruction).
 395 *
 396 * This routine takes care of accessing the kernel register backing
 397 * store for those registers that got spilled there.  It also takes
 398 * care of calculating the appropriate RNaT collection words.
 399 */
 400long
 401ia64_peek (struct task_struct *child, struct switch_stack *child_stack,
 402           unsigned long user_rbs_end, unsigned long addr, long *val)
 403{
 404        unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end, *rnat_addr;
 405        struct pt_regs *child_regs;
 406        size_t copied;
 407        long ret;
 408
 409        urbs_end = (long *) user_rbs_end;
 410        laddr = (unsigned long *) addr;
 411        child_regs = task_pt_regs(child);
 412        bspstore = (unsigned long *) child_regs->ar_bspstore;
 413        krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
 414        if (on_kernel_rbs(addr, (unsigned long) bspstore,
 415                          (unsigned long) urbs_end))
 416        {
 417                /*
 418                 * Attempt to read the RBS in an area that's actually
 419                 * on the kernel RBS => read the corresponding bits in
 420                 * the kernel RBS.
 421                 */
 422                rnat_addr = ia64_rse_rnat_addr(laddr);
 423                ret = get_rnat(child, child_stack, krbs, rnat_addr, urbs_end);
 424
 425                if (laddr == rnat_addr) {
 426                        /* return NaT collection word itself */
 427                        *val = ret;
 428                        return 0;
 429                }
 430
 431                if (((1UL << ia64_rse_slot_num(laddr)) & ret) != 0) {
 432                        /*
 433                         * It is implementation dependent whether the
 434                         * data portion of a NaT value gets saved on a
 435                         * st8.spill or RSE spill (e.g., see EAS 2.6,
 436                         * 4.4.4.6 Register Spill and Fill).  To get
 437                         * consistent behavior across all possible
 438                         * IA-64 implementations, we return zero in
 439                         * this case.
 440                         */
 441                        *val = 0;
 442                        return 0;
 443                }
 444
 445                if (laddr < urbs_end) {
 446                        /*
 447                         * The desired word is on the kernel RBS and
 448                         * is not a NaT.
 449                         */
 450                        regnum = ia64_rse_num_regs(bspstore, laddr);
 451                        *val = *ia64_rse_skip_regs(krbs, regnum);
 452                        return 0;
 453                }
 454        }
 455        copied = access_process_vm(child, addr, &ret, sizeof(ret), FOLL_FORCE);
 456        if (copied != sizeof(ret))
 457                return -EIO;
 458        *val = ret;
 459        return 0;
 460}
 461
 462long
 463ia64_poke (struct task_struct *child, struct switch_stack *child_stack,
 464           unsigned long user_rbs_end, unsigned long addr, long val)
 465{
 466        unsigned long *bspstore, *krbs, regnum, *laddr;
 467        unsigned long *urbs_end = (long *) user_rbs_end;
 468        struct pt_regs *child_regs;
 469
 470        laddr = (unsigned long *) addr;
 471        child_regs = task_pt_regs(child);
 472        bspstore = (unsigned long *) child_regs->ar_bspstore;
 473        krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
 474        if (on_kernel_rbs(addr, (unsigned long) bspstore,
 475                          (unsigned long) urbs_end))
 476        {
 477                /*
 478                 * Attempt to write the RBS in an area that's actually
 479                 * on the kernel RBS => write the corresponding bits
 480                 * in the kernel RBS.
 481                 */
 482                if (ia64_rse_is_rnat_slot(laddr))
 483                        put_rnat(child, child_stack, krbs, laddr, val,
 484                                 urbs_end);
 485                else {
 486                        if (laddr < urbs_end) {
 487                                regnum = ia64_rse_num_regs(bspstore, laddr);
 488                                *ia64_rse_skip_regs(krbs, regnum) = val;
 489                        }
 490                }
 491        } else if (access_process_vm(child, addr, &val, sizeof(val),
 492                                FOLL_FORCE | FOLL_WRITE)
 493                   != sizeof(val))
 494                return -EIO;
 495        return 0;
 496}
 497
 498/*
 499 * Calculate the address of the end of the user-level register backing
 500 * store.  This is the address that would have been stored in ar.bsp
 501 * if the user had executed a "cover" instruction right before
 502 * entering the kernel.  If CFMP is not NULL, it is used to return the
 503 * "current frame mask" that was active at the time the kernel was
 504 * entered.
 505 */
 506unsigned long
 507ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt,
 508                       unsigned long *cfmp)
 509{
 510        unsigned long *krbs, *bspstore, cfm = pt->cr_ifs;
 511        long ndirty;
 512
 513        krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
 514        bspstore = (unsigned long *) pt->ar_bspstore;
 515        ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
 516
 517        if (in_syscall(pt))
 518                ndirty += (cfm & 0x7f);
 519        else
 520                cfm &= ~(1UL << 63);    /* clear valid bit */
 521
 522        if (cfmp)
 523                *cfmp = cfm;
 524        return (unsigned long) ia64_rse_skip_regs(bspstore, ndirty);
 525}
 526
 527/*
 528 * Synchronize (i.e, write) the RSE backing store living in kernel
 529 * space to the VM of the CHILD task.  SW and PT are the pointers to
 530 * the switch_stack and pt_regs structures, respectively.
 531 * USER_RBS_END is the user-level address at which the backing store
 532 * ends.
 533 */
 534long
 535ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw,
 536                    unsigned long user_rbs_start, unsigned long user_rbs_end)
 537{
 538        unsigned long addr, val;
 539        long ret;
 540
 541        /* now copy word for word from kernel rbs to user rbs: */
 542        for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
 543                ret = ia64_peek(child, sw, user_rbs_end, addr, &val);
 544                if (ret < 0)
 545                        return ret;
 546                if (access_process_vm(child, addr, &val, sizeof(val),
 547                                FOLL_FORCE | FOLL_WRITE)
 548                    != sizeof(val))
 549                        return -EIO;
 550        }
 551        return 0;
 552}
 553
 554static long
 555ia64_sync_kernel_rbs (struct task_struct *child, struct switch_stack *sw,
 556                unsigned long user_rbs_start, unsigned long user_rbs_end)
 557{
 558        unsigned long addr, val;
 559        long ret;
 560
 561        /* now copy word for word from user rbs to kernel rbs: */
 562        for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
 563                if (access_process_vm(child, addr, &val, sizeof(val),
 564                                FOLL_FORCE)
 565                                != sizeof(val))
 566                        return -EIO;
 567
 568                ret = ia64_poke(child, sw, user_rbs_end, addr, val);
 569                if (ret < 0)
 570                        return ret;
 571        }
 572        return 0;
 573}
 574
 575typedef long (*syncfunc_t)(struct task_struct *, struct switch_stack *,
 576                            unsigned long, unsigned long);
 577
 578static void do_sync_rbs(struct unw_frame_info *info, void *arg)
 579{
 580        struct pt_regs *pt;
 581        unsigned long urbs_end;
 582        syncfunc_t fn = arg;
 583
 584        if (unw_unwind_to_user(info) < 0)
 585                return;
 586        pt = task_pt_regs(info->task);
 587        urbs_end = ia64_get_user_rbs_end(info->task, pt, NULL);
 588
 589        fn(info->task, info->sw, pt->ar_bspstore, urbs_end);
 590}
 591
 592/*
 593 * when a thread is stopped (ptraced), debugger might change thread's user
 594 * stack (change memory directly), and we must avoid the RSE stored in kernel
 595 * to override user stack (user space's RSE is newer than kernel's in the
 596 * case). To workaround the issue, we copy kernel RSE to user RSE before the
 597 * task is stopped, so user RSE has updated data.  we then copy user RSE to
 598 * kernel after the task is resummed from traced stop and kernel will use the
 599 * newer RSE to return to user. TIF_RESTORE_RSE is the flag to indicate we need
 600 * synchronize user RSE to kernel.
 601 */
 602void ia64_ptrace_stop(void)
 603{
 604        if (test_and_set_tsk_thread_flag(current, TIF_RESTORE_RSE))
 605                return;
 606        set_notify_resume(current);
 607        unw_init_running(do_sync_rbs, ia64_sync_user_rbs);
 608}
 609
 610/*
 611 * This is called to read back the register backing store.
 612 */
 613void ia64_sync_krbs(void)
 614{
 615        clear_tsk_thread_flag(current, TIF_RESTORE_RSE);
 616
 617        unw_init_running(do_sync_rbs, ia64_sync_kernel_rbs);
 618}
 619
 620/*
 621 * Write f32-f127 back to task->thread.fph if it has been modified.
 622 */
 623inline void
 624ia64_flush_fph (struct task_struct *task)
 625{
 626        struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
 627
 628        /*
 629         * Prevent migrating this task while
 630         * we're fiddling with the FPU state
 631         */
 632        preempt_disable();
 633        if (ia64_is_local_fpu_owner(task) && psr->mfh) {
 634                psr->mfh = 0;
 635                task->thread.flags |= IA64_THREAD_FPH_VALID;
 636                ia64_save_fpu(&task->thread.fph[0]);
 637        }
 638        preempt_enable();
 639}
 640
 641/*
 642 * Sync the fph state of the task so that it can be manipulated
 643 * through thread.fph.  If necessary, f32-f127 are written back to
 644 * thread.fph or, if the fph state hasn't been used before, thread.fph
 645 * is cleared to zeroes.  Also, access to f32-f127 is disabled to
 646 * ensure that the task picks up the state from thread.fph when it
 647 * executes again.
 648 */
 649void
 650ia64_sync_fph (struct task_struct *task)
 651{
 652        struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
 653
 654        ia64_flush_fph(task);
 655        if (!(task->thread.flags & IA64_THREAD_FPH_VALID)) {
 656                task->thread.flags |= IA64_THREAD_FPH_VALID;
 657                memset(&task->thread.fph, 0, sizeof(task->thread.fph));
 658        }
 659        ia64_drop_fpu(task);
 660        psr->dfh = 1;
 661}
 662
 663/*
 664 * Change the machine-state of CHILD such that it will return via the normal
 665 * kernel exit-path, rather than the syscall-exit path.
 666 */
 667static void
 668convert_to_non_syscall (struct task_struct *child, struct pt_regs  *pt,
 669                        unsigned long cfm)
 670{
 671        struct unw_frame_info info, prev_info;
 672        unsigned long ip, sp, pr;
 673
 674        unw_init_from_blocked_task(&info, child);
 675        while (1) {
 676                prev_info = info;
 677                if (unw_unwind(&info) < 0)
 678                        return;
 679
 680                unw_get_sp(&info, &sp);
 681                if ((long)((unsigned long)child + IA64_STK_OFFSET - sp)
 682                    < IA64_PT_REGS_SIZE) {
 683                        dprintk("ptrace.%s: ran off the top of the kernel "
 684                                "stack\n", __func__);
 685                        return;
 686                }
 687                if (unw_get_pr (&prev_info, &pr) < 0) {
 688                        unw_get_rp(&prev_info, &ip);
 689                        dprintk("ptrace.%s: failed to read "
 690                                "predicate register (ip=0x%lx)\n",
 691                                __func__, ip);
 692                        return;
 693                }
 694                if (unw_is_intr_frame(&info)
 695                    && (pr & (1UL << PRED_USER_STACK)))
 696                        break;
 697        }
 698
 699        /*
 700         * Note: at the time of this call, the target task is blocked
 701         * in notify_resume_user() and by clearling PRED_LEAVE_SYSCALL
 702         * (aka, "pLvSys") we redirect execution from
 703         * .work_pending_syscall_end to .work_processed_kernel.
 704         */
 705        unw_get_pr(&prev_info, &pr);
 706        pr &= ~((1UL << PRED_SYSCALL) | (1UL << PRED_LEAVE_SYSCALL));
 707        pr |=  (1UL << PRED_NON_SYSCALL);
 708        unw_set_pr(&prev_info, pr);
 709
 710        pt->cr_ifs = (1UL << 63) | cfm;
 711        /*
 712         * Clear the memory that is NOT written on syscall-entry to
 713         * ensure we do not leak kernel-state to user when execution
 714         * resumes.
 715         */
 716        pt->r2 = 0;
 717        pt->r3 = 0;
 718        pt->r14 = 0;
 719        memset(&pt->r16, 0, 16*8);      /* clear r16-r31 */
 720        memset(&pt->f6, 0, 6*16);       /* clear f6-f11 */
 721        pt->b7 = 0;
 722        pt->ar_ccv = 0;
 723        pt->ar_csd = 0;
 724        pt->ar_ssd = 0;
 725}
 726
 727static int
 728access_nat_bits (struct task_struct *child, struct pt_regs *pt,
 729                 struct unw_frame_info *info,
 730                 unsigned long *data, int write_access)
 731{
 732        unsigned long regnum, nat_bits, scratch_unat, dummy = 0;
 733        char nat = 0;
 734
 735        if (write_access) {
 736                nat_bits = *data;
 737                scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits);
 738                if (unw_set_ar(info, UNW_AR_UNAT, scratch_unat) < 0) {
 739                        dprintk("ptrace: failed to set ar.unat\n");
 740                        return -1;
 741                }
 742                for (regnum = 4; regnum <= 7; ++regnum) {
 743                        unw_get_gr(info, regnum, &dummy, &nat);
 744                        unw_set_gr(info, regnum, dummy,
 745                                   (nat_bits >> regnum) & 1);
 746                }
 747        } else {
 748                if (unw_get_ar(info, UNW_AR_UNAT, &scratch_unat) < 0) {
 749                        dprintk("ptrace: failed to read ar.unat\n");
 750                        return -1;
 751                }
 752                nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat);
 753                for (regnum = 4; regnum <= 7; ++regnum) {
 754                        unw_get_gr(info, regnum, &dummy, &nat);
 755                        nat_bits |= (nat != 0) << regnum;
 756                }
 757                *data = nat_bits;
 758        }
 759        return 0;
 760}
 761
 762static int
 763access_elf_reg(struct task_struct *target, struct unw_frame_info *info,
 764                unsigned long addr, unsigned long *data, int write_access);
 765
 766static long
 767ptrace_getregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
 768{
 769        unsigned long psr, ec, lc, rnat, bsp, cfm, nat_bits, val;
 770        struct unw_frame_info info;
 771        struct ia64_fpreg fpval;
 772        struct switch_stack *sw;
 773        struct pt_regs *pt;
 774        long ret, retval = 0;
 775        char nat = 0;
 776        int i;
 777
 778        if (!access_ok(ppr, sizeof(struct pt_all_user_regs)))
 779                return -EIO;
 780
 781        pt = task_pt_regs(child);
 782        sw = (struct switch_stack *) (child->thread.ksp + 16);
 783        unw_init_from_blocked_task(&info, child);
 784        if (unw_unwind_to_user(&info) < 0) {
 785                return -EIO;
 786        }
 787
 788        if (((unsigned long) ppr & 0x7) != 0) {
 789                dprintk("ptrace:unaligned register address %p\n", ppr);
 790                return -EIO;
 791        }
 792
 793        if (access_elf_reg(child, &info, ELF_CR_IPSR_OFFSET, &psr, 0) < 0 ||
 794            access_elf_reg(child, &info, ELF_AR_EC_OFFSET, &ec, 0) < 0 ||
 795            access_elf_reg(child, &info, ELF_AR_LC_OFFSET, &lc, 0) < 0 ||
 796            access_elf_reg(child, &info, ELF_AR_RNAT_OFFSET, &rnat, 0) < 0 ||
 797            access_elf_reg(child, &info, ELF_AR_BSP_OFFSET, &bsp, 0) < 0 ||
 798            access_elf_reg(child, &info, ELF_CFM_OFFSET, &cfm, 0) < 0 ||
 799            access_elf_reg(child, &info, ELF_NAT_OFFSET, &nat_bits, 0) < 0)
 800                return -EIO;
 801
 802        /* control regs */
 803
 804        retval |= __put_user(pt->cr_iip, &ppr->cr_iip);
 805        retval |= __put_user(psr, &ppr->cr_ipsr);
 806
 807        /* app regs */
 808
 809        retval |= __put_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
 810        retval |= __put_user(pt->ar_rsc, &ppr->ar[PT_AUR_RSC]);
 811        retval |= __put_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
 812        retval |= __put_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
 813        retval |= __put_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
 814        retval |= __put_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
 815
 816        retval |= __put_user(ec, &ppr->ar[PT_AUR_EC]);
 817        retval |= __put_user(lc, &ppr->ar[PT_AUR_LC]);
 818        retval |= __put_user(rnat, &ppr->ar[PT_AUR_RNAT]);
 819        retval |= __put_user(bsp, &ppr->ar[PT_AUR_BSP]);
 820        retval |= __put_user(cfm, &ppr->cfm);
 821
 822        /* gr1-gr3 */
 823
 824        retval |= __copy_to_user(&ppr->gr[1], &pt->r1, sizeof(long));
 825        retval |= __copy_to_user(&ppr->gr[2], &pt->r2, sizeof(long) *2);
 826
 827        /* gr4-gr7 */
 828
 829        for (i = 4; i < 8; i++) {
 830                if (unw_access_gr(&info, i, &val, &nat, 0) < 0)
 831                        return -EIO;
 832                retval |= __put_user(val, &ppr->gr[i]);
 833        }
 834
 835        /* gr8-gr11 */
 836
 837        retval |= __copy_to_user(&ppr->gr[8], &pt->r8, sizeof(long) * 4);
 838
 839        /* gr12-gr15 */
 840
 841        retval |= __copy_to_user(&ppr->gr[12], &pt->r12, sizeof(long) * 2);
 842        retval |= __copy_to_user(&ppr->gr[14], &pt->r14, sizeof(long));
 843        retval |= __copy_to_user(&ppr->gr[15], &pt->r15, sizeof(long));
 844
 845        /* gr16-gr31 */
 846
 847        retval |= __copy_to_user(&ppr->gr[16], &pt->r16, sizeof(long) * 16);
 848
 849        /* b0 */
 850
 851        retval |= __put_user(pt->b0, &ppr->br[0]);
 852
 853        /* b1-b5 */
 854
 855        for (i = 1; i < 6; i++) {
 856                if (unw_access_br(&info, i, &val, 0) < 0)
 857                        return -EIO;
 858                __put_user(val, &ppr->br[i]);
 859        }
 860
 861        /* b6-b7 */
 862
 863        retval |= __put_user(pt->b6, &ppr->br[6]);
 864        retval |= __put_user(pt->b7, &ppr->br[7]);
 865
 866        /* fr2-fr5 */
 867
 868        for (i = 2; i < 6; i++) {
 869                if (unw_get_fr(&info, i, &fpval) < 0)
 870                        return -EIO;
 871                retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
 872        }
 873
 874        /* fr6-fr11 */
 875
 876        retval |= __copy_to_user(&ppr->fr[6], &pt->f6,
 877                                 sizeof(struct ia64_fpreg) * 6);
 878
 879        /* fp scratch regs(12-15) */
 880
 881        retval |= __copy_to_user(&ppr->fr[12], &sw->f12,
 882                                 sizeof(struct ia64_fpreg) * 4);
 883
 884        /* fr16-fr31 */
 885
 886        for (i = 16; i < 32; i++) {
 887                if (unw_get_fr(&info, i, &fpval) < 0)
 888                        return -EIO;
 889                retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
 890        }
 891
 892        /* fph */
 893
 894        ia64_flush_fph(child);
 895        retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph,
 896                                 sizeof(ppr->fr[32]) * 96);
 897
 898        /*  preds */
 899
 900        retval |= __put_user(pt->pr, &ppr->pr);
 901
 902        /* nat bits */
 903
 904        retval |= __put_user(nat_bits, &ppr->nat);
 905
 906        ret = retval ? -EIO : 0;
 907        return ret;
 908}
 909
 910static long
 911ptrace_setregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
 912{
 913        unsigned long psr, rsc, ec, lc, rnat, bsp, cfm, nat_bits, val = 0;
 914        struct unw_frame_info info;
 915        struct switch_stack *sw;
 916        struct ia64_fpreg fpval;
 917        struct pt_regs *pt;
 918        long retval = 0;
 919        int i;
 920
 921        memset(&fpval, 0, sizeof(fpval));
 922
 923        if (!access_ok(ppr, sizeof(struct pt_all_user_regs)))
 924                return -EIO;
 925
 926        pt = task_pt_regs(child);
 927        sw = (struct switch_stack *) (child->thread.ksp + 16);
 928        unw_init_from_blocked_task(&info, child);
 929        if (unw_unwind_to_user(&info) < 0) {
 930                return -EIO;
 931        }
 932
 933        if (((unsigned long) ppr & 0x7) != 0) {
 934                dprintk("ptrace:unaligned register address %p\n", ppr);
 935                return -EIO;
 936        }
 937
 938        /* control regs */
 939
 940        retval |= __get_user(pt->cr_iip, &ppr->cr_iip);
 941        retval |= __get_user(psr, &ppr->cr_ipsr);
 942
 943        /* app regs */
 944
 945        retval |= __get_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
 946        retval |= __get_user(rsc, &ppr->ar[PT_AUR_RSC]);
 947        retval |= __get_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
 948        retval |= __get_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
 949        retval |= __get_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
 950        retval |= __get_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
 951
 952        retval |= __get_user(ec, &ppr->ar[PT_AUR_EC]);
 953        retval |= __get_user(lc, &ppr->ar[PT_AUR_LC]);
 954        retval |= __get_user(rnat, &ppr->ar[PT_AUR_RNAT]);
 955        retval |= __get_user(bsp, &ppr->ar[PT_AUR_BSP]);
 956        retval |= __get_user(cfm, &ppr->cfm);
 957
 958        /* gr1-gr3 */
 959
 960        retval |= __copy_from_user(&pt->r1, &ppr->gr[1], sizeof(long));
 961        retval |= __copy_from_user(&pt->r2, &ppr->gr[2], sizeof(long) * 2);
 962
 963        /* gr4-gr7 */
 964
 965        for (i = 4; i < 8; i++) {
 966                retval |= __get_user(val, &ppr->gr[i]);
 967                /* NaT bit will be set via PT_NAT_BITS: */
 968                if (unw_set_gr(&info, i, val, 0) < 0)
 969                        return -EIO;
 970        }
 971
 972        /* gr8-gr11 */
 973
 974        retval |= __copy_from_user(&pt->r8, &ppr->gr[8], sizeof(long) * 4);
 975
 976        /* gr12-gr15 */
 977
 978        retval |= __copy_from_user(&pt->r12, &ppr->gr[12], sizeof(long) * 2);
 979        retval |= __copy_from_user(&pt->r14, &ppr->gr[14], sizeof(long));
 980        retval |= __copy_from_user(&pt->r15, &ppr->gr[15], sizeof(long));
 981
 982        /* gr16-gr31 */
 983
 984        retval |= __copy_from_user(&pt->r16, &ppr->gr[16], sizeof(long) * 16);
 985
 986        /* b0 */
 987
 988        retval |= __get_user(pt->b0, &ppr->br[0]);
 989
 990        /* b1-b5 */
 991
 992        for (i = 1; i < 6; i++) {
 993                retval |= __get_user(val, &ppr->br[i]);
 994                unw_set_br(&info, i, val);
 995        }
 996
 997        /* b6-b7 */
 998
 999        retval |= __get_user(pt->b6, &ppr->br[6]);
1000        retval |= __get_user(pt->b7, &ppr->br[7]);
1001
1002        /* fr2-fr5 */
1003
1004        for (i = 2; i < 6; i++) {
1005                retval |= __copy_from_user(&fpval, &ppr->fr[i], sizeof(fpval));
1006                if (unw_set_fr(&info, i, fpval) < 0)
1007                        return -EIO;
1008        }
1009
1010        /* fr6-fr11 */
1011
1012        retval |= __copy_from_user(&pt->f6, &ppr->fr[6],
1013                                   sizeof(ppr->fr[6]) * 6);
1014
1015        /* fp scratch regs(12-15) */
1016
1017        retval |= __copy_from_user(&sw->f12, &ppr->fr[12],
1018                                   sizeof(ppr->fr[12]) * 4);
1019
1020        /* fr16-fr31 */
1021
1022        for (i = 16; i < 32; i++) {
1023                retval |= __copy_from_user(&fpval, &ppr->fr[i],
1024                                           sizeof(fpval));
1025                if (unw_set_fr(&info, i, fpval) < 0)
1026                        return -EIO;
1027        }
1028
1029        /* fph */
1030
1031        ia64_sync_fph(child);
1032        retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32],
1033                                   sizeof(ppr->fr[32]) * 96);
1034
1035        /* preds */
1036
1037        retval |= __get_user(pt->pr, &ppr->pr);
1038
1039        /* nat bits */
1040
1041        retval |= __get_user(nat_bits, &ppr->nat);
1042
1043        retval |= access_elf_reg(child, &info, ELF_CR_IPSR_OFFSET, &psr, 1);
1044        retval |= access_elf_reg(child, &info, ELF_AR_RSC_OFFSET, &rsc, 1);
1045        retval |= access_elf_reg(child, &info, ELF_AR_EC_OFFSET, &ec, 1);
1046        retval |= access_elf_reg(child, &info, ELF_AR_LC_OFFSET, &lc, 1);
1047        retval |= access_elf_reg(child, &info, ELF_AR_RNAT_OFFSET, &rnat, 1);
1048        retval |= access_elf_reg(child, &info, ELF_AR_BSP_OFFSET, &bsp, 1);
1049        retval |= access_elf_reg(child, &info, ELF_CFM_OFFSET, &cfm, 1);
1050        retval |= access_elf_reg(child, &info, ELF_NAT_OFFSET, &nat_bits, 1);
1051
1052        return retval ? -EIO : 0;
1053}
1054
1055void
1056user_enable_single_step (struct task_struct *child)
1057{
1058        struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1059
1060        set_tsk_thread_flag(child, TIF_SINGLESTEP);
1061        child_psr->ss = 1;
1062}
1063
1064void
1065user_enable_block_step (struct task_struct *child)
1066{
1067        struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1068
1069        set_tsk_thread_flag(child, TIF_SINGLESTEP);
1070        child_psr->tb = 1;
1071}
1072
1073void
1074user_disable_single_step (struct task_struct *child)
1075{
1076        struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1077
1078        /* make sure the single step/taken-branch trap bits are not set: */
1079        clear_tsk_thread_flag(child, TIF_SINGLESTEP);
1080        child_psr->ss = 0;
1081        child_psr->tb = 0;
1082}
1083
1084/*
1085 * Called by kernel/ptrace.c when detaching..
1086 *
1087 * Make sure the single step bit is not set.
1088 */
1089void
1090ptrace_disable (struct task_struct *child)
1091{
1092        user_disable_single_step(child);
1093}
1094
1095static int
1096access_uarea (struct task_struct *child, unsigned long addr,
1097              unsigned long *data, int write_access);
1098
1099long
1100arch_ptrace (struct task_struct *child, long request,
1101             unsigned long addr, unsigned long data)
1102{
1103        switch (request) {
1104        case PTRACE_PEEKTEXT:
1105        case PTRACE_PEEKDATA:
1106                /* read word at location addr */
1107                if (ptrace_access_vm(child, addr, &data, sizeof(data),
1108                                FOLL_FORCE)
1109                    != sizeof(data))
1110                        return -EIO;
1111                /* ensure return value is not mistaken for error code */
1112                force_successful_syscall_return();
1113                return data;
1114
1115        /* PTRACE_POKETEXT and PTRACE_POKEDATA is handled
1116         * by the generic ptrace_request().
1117         */
1118
1119        case PTRACE_PEEKUSR:
1120                /* read the word at addr in the USER area */
1121                if (access_uarea(child, addr, &data, 0) < 0)
1122                        return -EIO;
1123                /* ensure return value is not mistaken for error code */
1124                force_successful_syscall_return();
1125                return data;
1126
1127        case PTRACE_POKEUSR:
1128                /* write the word at addr in the USER area */
1129                if (access_uarea(child, addr, &data, 1) < 0)
1130                        return -EIO;
1131                return 0;
1132
1133        case PTRACE_OLD_GETSIGINFO:
1134                /* for backwards-compatibility */
1135                return ptrace_request(child, PTRACE_GETSIGINFO, addr, data);
1136
1137        case PTRACE_OLD_SETSIGINFO:
1138                /* for backwards-compatibility */
1139                return ptrace_request(child, PTRACE_SETSIGINFO, addr, data);
1140
1141        case PTRACE_GETREGS:
1142                return ptrace_getregs(child,
1143                                      (struct pt_all_user_regs __user *) data);
1144
1145        case PTRACE_SETREGS:
1146                return ptrace_setregs(child,
1147                                      (struct pt_all_user_regs __user *) data);
1148
1149        default:
1150                return ptrace_request(child, request, addr, data);
1151        }
1152}
1153
1154
1155/* "asmlinkage" so the input arguments are preserved... */
1156
1157asmlinkage long
1158syscall_trace_enter (long arg0, long arg1, long arg2, long arg3,
1159                     long arg4, long arg5, long arg6, long arg7,
1160                     struct pt_regs regs)
1161{
1162        if (test_thread_flag(TIF_SYSCALL_TRACE))
1163                if (ptrace_report_syscall_entry(&regs))
1164                        return -ENOSYS;
1165
1166        /* copy user rbs to kernel rbs */
1167        if (test_thread_flag(TIF_RESTORE_RSE))
1168                ia64_sync_krbs();
1169
1170
1171        audit_syscall_entry(regs.r15, arg0, arg1, arg2, arg3);
1172
1173        return 0;
1174}
1175
1176/* "asmlinkage" so the input arguments are preserved... */
1177
1178asmlinkage void
1179syscall_trace_leave (long arg0, long arg1, long arg2, long arg3,
1180                     long arg4, long arg5, long arg6, long arg7,
1181                     struct pt_regs regs)
1182{
1183        int step;
1184
1185        audit_syscall_exit(&regs);
1186
1187        step = test_thread_flag(TIF_SINGLESTEP);
1188        if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1189                ptrace_report_syscall_exit(&regs, step);
1190
1191        /* copy user rbs to kernel rbs */
1192        if (test_thread_flag(TIF_RESTORE_RSE))
1193                ia64_sync_krbs();
1194}
1195
1196/* Utrace implementation starts here */
1197struct regset_get {
1198        void *kbuf;
1199        void __user *ubuf;
1200};
1201
1202struct regset_set {
1203        const void *kbuf;
1204        const void __user *ubuf;
1205};
1206
1207struct regset_getset {
1208        struct task_struct *target;
1209        const struct user_regset *regset;
1210        union {
1211                struct regset_get get;
1212                struct regset_set set;
1213        } u;
1214        unsigned int pos;
1215        unsigned int count;
1216        int ret;
1217};
1218
1219static const ptrdiff_t pt_offsets[32] =
1220{
1221#define R(n) offsetof(struct pt_regs, r##n)
1222        [0] = -1, R(1), R(2), R(3),
1223        [4] = -1, [5] = -1, [6] = -1, [7] = -1,
1224        R(8), R(9), R(10), R(11), R(12), R(13), R(14), R(15),
1225        R(16), R(17), R(18), R(19), R(20), R(21), R(22), R(23),
1226        R(24), R(25), R(26), R(27), R(28), R(29), R(30), R(31),
1227#undef R
1228};
1229
1230static int
1231access_elf_gpreg(struct task_struct *target, struct unw_frame_info *info,
1232                unsigned long addr, unsigned long *data, int write_access)
1233{
1234        struct pt_regs *pt = task_pt_regs(target);
1235        unsigned reg = addr / sizeof(unsigned long);
1236        ptrdiff_t d = pt_offsets[reg];
1237
1238        if (d >= 0) {
1239                unsigned long *ptr = (void *)pt + d;
1240                if (write_access)
1241                        *ptr = *data;
1242                else
1243                        *data = *ptr;
1244                return 0;
1245        } else {
1246                char nat = 0;
1247                if (write_access) {
1248                        /* read NaT bit first: */
1249                        unsigned long dummy;
1250                        int ret = unw_get_gr(info, reg, &dummy, &nat);
1251                        if (ret < 0)
1252                                return ret;
1253                }
1254                return unw_access_gr(info, reg, data, &nat, write_access);
1255        }
1256}
1257
1258static int
1259access_elf_breg(struct task_struct *target, struct unw_frame_info *info,
1260                unsigned long addr, unsigned long *data, int write_access)
1261{
1262        struct pt_regs *pt;
1263        unsigned long *ptr = NULL;
1264
1265        pt = task_pt_regs(target);
1266        switch (addr) {
1267        case ELF_BR_OFFSET(0):
1268                ptr = &pt->b0;
1269                break;
1270        case ELF_BR_OFFSET(1) ... ELF_BR_OFFSET(5):
1271                return unw_access_br(info, (addr - ELF_BR_OFFSET(0))/8,
1272                                     data, write_access);
1273        case ELF_BR_OFFSET(6):
1274                ptr = &pt->b6;
1275                break;
1276        case ELF_BR_OFFSET(7):
1277                ptr = &pt->b7;
1278        }
1279        if (write_access)
1280                *ptr = *data;
1281        else
1282                *data = *ptr;
1283        return 0;
1284}
1285
1286static int
1287access_elf_areg(struct task_struct *target, struct unw_frame_info *info,
1288                unsigned long addr, unsigned long *data, int write_access)
1289{
1290        struct pt_regs *pt;
1291        unsigned long cfm, urbs_end;
1292        unsigned long *ptr = NULL;
1293
1294        pt = task_pt_regs(target);
1295        if (addr >= ELF_AR_RSC_OFFSET && addr <= ELF_AR_SSD_OFFSET) {
1296                switch (addr) {
1297                case ELF_AR_RSC_OFFSET:
1298                        /* force PL3 */
1299                        if (write_access)
1300                                pt->ar_rsc = *data | (3 << 2);
1301                        else
1302                                *data = pt->ar_rsc;
1303                        return 0;
1304                case ELF_AR_BSP_OFFSET:
1305                        /*
1306                         * By convention, we use PT_AR_BSP to refer to
1307                         * the end of the user-level backing store.
1308                         * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof)
1309                         * to get the real value of ar.bsp at the time
1310                         * the kernel was entered.
1311                         *
1312                         * Furthermore, when changing the contents of
1313                         * PT_AR_BSP (or PT_CFM) while the task is
1314                         * blocked in a system call, convert the state
1315                         * so that the non-system-call exit
1316                         * path is used.  This ensures that the proper
1317                         * state will be picked up when resuming
1318                         * execution.  However, it *also* means that
1319                         * once we write PT_AR_BSP/PT_CFM, it won't be
1320                         * possible to modify the syscall arguments of
1321                         * the pending system call any longer.  This
1322                         * shouldn't be an issue because modifying
1323                         * PT_AR_BSP/PT_CFM generally implies that
1324                         * we're either abandoning the pending system
1325                         * call or that we defer it's re-execution
1326                         * (e.g., due to GDB doing an inferior
1327                         * function call).
1328                         */
1329                        urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
1330                        if (write_access) {
1331                                if (*data != urbs_end) {
1332                                        if (in_syscall(pt))
1333                                                convert_to_non_syscall(target,
1334                                                                       pt,
1335                                                                       cfm);
1336                                        /*
1337                                         * Simulate user-level write
1338                                         * of ar.bsp:
1339                                         */
1340                                        pt->loadrs = 0;
1341                                        pt->ar_bspstore = *data;
1342                                }
1343                        } else
1344                                *data = urbs_end;
1345                        return 0;
1346                case ELF_AR_BSPSTORE_OFFSET:
1347                        ptr = &pt->ar_bspstore;
1348                        break;
1349                case ELF_AR_RNAT_OFFSET:
1350                        ptr = &pt->ar_rnat;
1351                        break;
1352                case ELF_AR_CCV_OFFSET:
1353                        ptr = &pt->ar_ccv;
1354                        break;
1355                case ELF_AR_UNAT_OFFSET:
1356                        ptr = &pt->ar_unat;
1357                        break;
1358                case ELF_AR_FPSR_OFFSET:
1359                        ptr = &pt->ar_fpsr;
1360                        break;
1361                case ELF_AR_PFS_OFFSET:
1362                        ptr = &pt->ar_pfs;
1363                        break;
1364                case ELF_AR_LC_OFFSET:
1365                        return unw_access_ar(info, UNW_AR_LC, data,
1366                                             write_access);
1367                case ELF_AR_EC_OFFSET:
1368                        return unw_access_ar(info, UNW_AR_EC, data,
1369                                             write_access);
1370                case ELF_AR_CSD_OFFSET:
1371                        ptr = &pt->ar_csd;
1372                        break;
1373                case ELF_AR_SSD_OFFSET:
1374                        ptr = &pt->ar_ssd;
1375                }
1376        } else if (addr >= ELF_CR_IIP_OFFSET && addr <= ELF_CR_IPSR_OFFSET) {
1377                switch (addr) {
1378                case ELF_CR_IIP_OFFSET:
1379                        ptr = &pt->cr_iip;
1380                        break;
1381                case ELF_CFM_OFFSET:
1382                        urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
1383                        if (write_access) {
1384                                if (((cfm ^ *data) & PFM_MASK) != 0) {
1385                                        if (in_syscall(pt))
1386                                                convert_to_non_syscall(target,
1387                                                                       pt,
1388                                                                       cfm);
1389                                        pt->cr_ifs = ((pt->cr_ifs & ~PFM_MASK)
1390                                                      | (*data & PFM_MASK));
1391                                }
1392                        } else
1393                                *data = cfm;
1394                        return 0;
1395                case ELF_CR_IPSR_OFFSET:
1396                        if (write_access) {
1397                                unsigned long tmp = *data;
1398                                /* psr.ri==3 is a reserved value: SDM 2:25 */
1399                                if ((tmp & IA64_PSR_RI) == IA64_PSR_RI)
1400                                        tmp &= ~IA64_PSR_RI;
1401                                pt->cr_ipsr = ((tmp & IPSR_MASK)
1402                                               | (pt->cr_ipsr & ~IPSR_MASK));
1403                        } else
1404                                *data = (pt->cr_ipsr & IPSR_MASK);
1405                        return 0;
1406                }
1407        } else if (addr == ELF_NAT_OFFSET)
1408                return access_nat_bits(target, pt, info,
1409                                       data, write_access);
1410        else if (addr == ELF_PR_OFFSET)
1411                ptr = &pt->pr;
1412        else
1413                return -1;
1414
1415        if (write_access)
1416                *ptr = *data;
1417        else
1418                *data = *ptr;
1419
1420        return 0;
1421}
1422
1423static int
1424access_elf_reg(struct task_struct *target, struct unw_frame_info *info,
1425                unsigned long addr, unsigned long *data, int write_access)
1426{
1427        if (addr >= ELF_GR_OFFSET(1) && addr <= ELF_GR_OFFSET(31))
1428                return access_elf_gpreg(target, info, addr, data, write_access);
1429        else if (addr >= ELF_BR_OFFSET(0) && addr <= ELF_BR_OFFSET(7))
1430                return access_elf_breg(target, info, addr, data, write_access);
1431        else
1432                return access_elf_areg(target, info, addr, data, write_access);
1433}
1434
1435struct regset_membuf {
1436        struct membuf to;
1437        int ret;
1438};
1439
1440static void do_gpregs_get(struct unw_frame_info *info, void *arg)
1441{
1442        struct regset_membuf *dst = arg;
1443        struct membuf to = dst->to;
1444        unsigned int n;
1445        elf_greg_t reg;
1446
1447        if (unw_unwind_to_user(info) < 0)
1448                return;
1449
1450        /*
1451         * coredump format:
1452         *      r0-r31
1453         *      NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
1454         *      predicate registers (p0-p63)
1455         *      b0-b7
1456         *      ip cfm user-mask
1457         *      ar.rsc ar.bsp ar.bspstore ar.rnat
1458         *      ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
1459         */
1460
1461
1462        /* Skip r0 */
1463        membuf_zero(&to, 8);
1464        for (n = 8; to.left && n < ELF_AR_END_OFFSET; n += 8) {
1465                if (access_elf_reg(info->task, info, n, &reg, 0) < 0) {
1466                        dst->ret = -EIO;
1467                        return;
1468                }
1469                membuf_store(&to, reg);
1470        }
1471}
1472
1473static void do_gpregs_set(struct unw_frame_info *info, void *arg)
1474{
1475        struct regset_getset *dst = arg;
1476
1477        if (unw_unwind_to_user(info) < 0)
1478                return;
1479
1480        if (!dst->count)
1481                return;
1482        /* Skip r0 */
1483        if (dst->pos < ELF_GR_OFFSET(1)) {
1484                dst->ret = user_regset_copyin_ignore(&dst->pos, &dst->count,
1485                                                       &dst->u.set.kbuf,
1486                                                       &dst->u.set.ubuf,
1487                                                       0, ELF_GR_OFFSET(1));
1488                if (dst->ret)
1489                        return;
1490        }
1491
1492        while (dst->count && dst->pos < ELF_AR_END_OFFSET) {
1493                unsigned int n, from, to;
1494                elf_greg_t tmp[16];
1495
1496                from = dst->pos;
1497                to = from + sizeof(tmp);
1498                if (to > ELF_AR_END_OFFSET)
1499                        to = ELF_AR_END_OFFSET;
1500                /* get up to 16 values */
1501                dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1502                                &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1503                                from, to);
1504                if (dst->ret)
1505                        return;
1506                /* now copy them into registers */
1507                for (n = 0; from < dst->pos; from += sizeof(elf_greg_t), n++)
1508                        if (access_elf_reg(dst->target, info, from,
1509                                                &tmp[n], 1) < 0) {
1510                                dst->ret = -EIO;
1511                                return;
1512                        }
1513        }
1514}
1515
1516#define ELF_FP_OFFSET(i)        (i * sizeof(elf_fpreg_t))
1517
1518static void do_fpregs_get(struct unw_frame_info *info, void *arg)
1519{
1520        struct task_struct *task = info->task;
1521        struct regset_membuf *dst = arg;
1522        struct membuf to = dst->to;
1523        elf_fpreg_t reg;
1524        unsigned int n;
1525
1526        if (unw_unwind_to_user(info) < 0)
1527                return;
1528
1529        /* Skip pos 0 and 1 */
1530        membuf_zero(&to, 2 * sizeof(elf_fpreg_t));
1531
1532        /* fr2-fr31 */
1533        for (n = 2; to.left && n < 32; n++) {
1534                if (unw_get_fr(info, n, &reg)) {
1535                        dst->ret = -EIO;
1536                        return;
1537                }
1538                membuf_write(&to, &reg, sizeof(reg));
1539        }
1540
1541        /* fph */
1542        if (!to.left)
1543                return;
1544
1545        ia64_flush_fph(task);
1546        if (task->thread.flags & IA64_THREAD_FPH_VALID)
1547                membuf_write(&to, &task->thread.fph, 96 * sizeof(reg));
1548        else
1549                membuf_zero(&to, 96 * sizeof(reg));
1550}
1551
1552static void do_fpregs_set(struct unw_frame_info *info, void *arg)
1553{
1554        struct regset_getset *dst = arg;
1555        elf_fpreg_t fpreg, tmp[30];
1556        int index, start, end;
1557
1558        if (unw_unwind_to_user(info) < 0)
1559                return;
1560
1561        /* Skip pos 0 and 1 */
1562        if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(2)) {
1563                dst->ret = user_regset_copyin_ignore(&dst->pos, &dst->count,
1564                                                       &dst->u.set.kbuf,
1565                                                       &dst->u.set.ubuf,
1566                                                       0, ELF_FP_OFFSET(2));
1567                if (dst->count == 0 || dst->ret)
1568                        return;
1569        }
1570
1571        /* fr2-fr31 */
1572        if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(32)) {
1573                start = dst->pos;
1574                end = min(((unsigned int)ELF_FP_OFFSET(32)),
1575                         dst->pos + dst->count);
1576                dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1577                                &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1578                                ELF_FP_OFFSET(2), ELF_FP_OFFSET(32));
1579                if (dst->ret)
1580                        return;
1581
1582                if (start & 0xF) { /* only write high part */
1583                        if (unw_get_fr(info, start / sizeof(elf_fpreg_t),
1584                                         &fpreg)) {
1585                                dst->ret = -EIO;
1586                                return;
1587                        }
1588                        tmp[start / sizeof(elf_fpreg_t) - 2].u.bits[0]
1589                                = fpreg.u.bits[0];
1590                        start &= ~0xFUL;
1591                }
1592                if (end & 0xF) { /* only write low part */
1593                        if (unw_get_fr(info, end / sizeof(elf_fpreg_t),
1594                                        &fpreg)) {
1595                                dst->ret = -EIO;
1596                                return;
1597                        }
1598                        tmp[end / sizeof(elf_fpreg_t) - 2].u.bits[1]
1599                                = fpreg.u.bits[1];
1600                        end = (end + 0xF) & ~0xFUL;
1601                }
1602
1603                for ( ; start < end ; start += sizeof(elf_fpreg_t)) {
1604                        index = start / sizeof(elf_fpreg_t);
1605                        if (unw_set_fr(info, index, tmp[index - 2])) {
1606                                dst->ret = -EIO;
1607                                return;
1608                        }
1609                }
1610                if (dst->ret || dst->count == 0)
1611                        return;
1612        }
1613
1614        /* fph */
1615        if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(128)) {
1616                ia64_sync_fph(dst->target);
1617                dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1618                                                &dst->u.set.kbuf,
1619                                                &dst->u.set.ubuf,
1620                                                &dst->target->thread.fph,
1621                                                ELF_FP_OFFSET(32), -1);
1622        }
1623}
1624
1625static void
1626unwind_and_call(void (*call)(struct unw_frame_info *, void *),
1627               struct task_struct *target, void *data)
1628{
1629        if (target == current)
1630                unw_init_running(call, data);
1631        else {
1632                struct unw_frame_info info;
1633                memset(&info, 0, sizeof(info));
1634                unw_init_from_blocked_task(&info, target);
1635                (*call)(&info, data);
1636        }
1637}
1638
1639static int
1640do_regset_call(void (*call)(struct unw_frame_info *, void *),
1641               struct task_struct *target,
1642               const struct user_regset *regset,
1643               unsigned int pos, unsigned int count,
1644               const void *kbuf, const void __user *ubuf)
1645{
1646        struct regset_getset info = { .target = target, .regset = regset,
1647                                 .pos = pos, .count = count,
1648                                 .u.set = { .kbuf = kbuf, .ubuf = ubuf },
1649                                 .ret = 0 };
1650        unwind_and_call(call, target, &info);
1651        return info.ret;
1652}
1653
1654static int
1655gpregs_get(struct task_struct *target,
1656           const struct user_regset *regset,
1657           struct membuf to)
1658{
1659        struct regset_membuf info = {.to = to};
1660        unwind_and_call(do_gpregs_get, target, &info);
1661        return info.ret;
1662}
1663
1664static int gpregs_set(struct task_struct *target,
1665                const struct user_regset *regset,
1666                unsigned int pos, unsigned int count,
1667                const void *kbuf, const void __user *ubuf)
1668{
1669        return do_regset_call(do_gpregs_set, target, regset, pos, count,
1670                kbuf, ubuf);
1671}
1672
1673static void do_gpregs_writeback(struct unw_frame_info *info, void *arg)
1674{
1675        do_sync_rbs(info, ia64_sync_user_rbs);
1676}
1677
1678/*
1679 * This is called to write back the register backing store.
1680 * ptrace does this before it stops, so that a tracer reading the user
1681 * memory after the thread stops will get the current register data.
1682 */
1683static int
1684gpregs_writeback(struct task_struct *target,
1685                 const struct user_regset *regset,
1686                 int now)
1687{
1688        if (test_and_set_tsk_thread_flag(target, TIF_RESTORE_RSE))
1689                return 0;
1690        set_notify_resume(target);
1691        return do_regset_call(do_gpregs_writeback, target, regset, 0, 0,
1692                NULL, NULL);
1693}
1694
1695static int
1696fpregs_active(struct task_struct *target, const struct user_regset *regset)
1697{
1698        return (target->thread.flags & IA64_THREAD_FPH_VALID) ? 128 : 32;
1699}
1700
1701static int fpregs_get(struct task_struct *target,
1702                const struct user_regset *regset,
1703                struct membuf to)
1704{
1705        struct regset_membuf info = {.to = to};
1706        unwind_and_call(do_fpregs_get, target, &info);
1707        return info.ret;
1708}
1709
1710static int fpregs_set(struct task_struct *target,
1711                const struct user_regset *regset,
1712                unsigned int pos, unsigned int count,
1713                const void *kbuf, const void __user *ubuf)
1714{
1715        return do_regset_call(do_fpregs_set, target, regset, pos, count,
1716                kbuf, ubuf);
1717}
1718
1719static int
1720access_uarea(struct task_struct *child, unsigned long addr,
1721              unsigned long *data, int write_access)
1722{
1723        unsigned int pos = -1; /* an invalid value */
1724        unsigned long *ptr, regnum;
1725
1726        if ((addr & 0x7) != 0) {
1727                dprintk("ptrace: unaligned register address 0x%lx\n", addr);
1728                return -1;
1729        }
1730        if ((addr >= PT_NAT_BITS + 8 && addr < PT_F2) ||
1731                (addr >= PT_R7 + 8 && addr < PT_B1) ||
1732                (addr >= PT_AR_LC + 8 && addr < PT_CR_IPSR) ||
1733                (addr >= PT_AR_SSD + 8 && addr < PT_DBR)) {
1734                dprintk("ptrace: rejecting access to register "
1735                                        "address 0x%lx\n", addr);
1736                return -1;
1737        }
1738
1739        switch (addr) {
1740        case PT_F32 ... (PT_F127 + 15):
1741                pos = addr - PT_F32 + ELF_FP_OFFSET(32);
1742                break;
1743        case PT_F2 ... (PT_F5 + 15):
1744                pos = addr - PT_F2 + ELF_FP_OFFSET(2);
1745                break;
1746        case PT_F10 ... (PT_F31 + 15):
1747                pos = addr - PT_F10 + ELF_FP_OFFSET(10);
1748                break;
1749        case PT_F6 ... (PT_F9 + 15):
1750                pos = addr - PT_F6 + ELF_FP_OFFSET(6);
1751                break;
1752        }
1753
1754        if (pos != -1) {
1755                unsigned reg = pos / sizeof(elf_fpreg_t);
1756                int which_half = (pos / sizeof(unsigned long)) & 1;
1757
1758                if (reg < 32) { /* fr2-fr31 */
1759                        struct unw_frame_info info;
1760                        elf_fpreg_t fpreg;
1761
1762                        memset(&info, 0, sizeof(info));
1763                        unw_init_from_blocked_task(&info, child);
1764                        if (unw_unwind_to_user(&info) < 0)
1765                                return 0;
1766
1767                        if (unw_get_fr(&info, reg, &fpreg))
1768                                return -1;
1769                        if (write_access) {
1770                                fpreg.u.bits[which_half] = *data;
1771                                if (unw_set_fr(&info, reg, fpreg))
1772                                        return -1;
1773                        } else {
1774                                *data = fpreg.u.bits[which_half];
1775                        }
1776                } else { /* fph */
1777                        elf_fpreg_t *p = &child->thread.fph[reg - 32];
1778                        unsigned long *bits = &p->u.bits[which_half];
1779
1780                        ia64_sync_fph(child);
1781                        if (write_access)
1782                                *bits = *data;
1783                        else if (child->thread.flags & IA64_THREAD_FPH_VALID)
1784                                *data = *bits;
1785                        else
1786                                *data = 0;
1787                }
1788                return 0;
1789        }
1790
1791        switch (addr) {
1792        case PT_NAT_BITS:
1793                pos = ELF_NAT_OFFSET;
1794                break;
1795        case PT_R4 ... PT_R7:
1796                pos = addr - PT_R4 + ELF_GR_OFFSET(4);
1797                break;
1798        case PT_B1 ... PT_B5:
1799                pos = addr - PT_B1 + ELF_BR_OFFSET(1);
1800                break;
1801        case PT_AR_EC:
1802                pos = ELF_AR_EC_OFFSET;
1803                break;
1804        case PT_AR_LC:
1805                pos = ELF_AR_LC_OFFSET;
1806                break;
1807        case PT_CR_IPSR:
1808                pos = ELF_CR_IPSR_OFFSET;
1809                break;
1810        case PT_CR_IIP:
1811                pos = ELF_CR_IIP_OFFSET;
1812                break;
1813        case PT_CFM:
1814                pos = ELF_CFM_OFFSET;
1815                break;
1816        case PT_AR_UNAT:
1817                pos = ELF_AR_UNAT_OFFSET;
1818                break;
1819        case PT_AR_PFS:
1820                pos = ELF_AR_PFS_OFFSET;
1821                break;
1822        case PT_AR_RSC:
1823                pos = ELF_AR_RSC_OFFSET;
1824                break;
1825        case PT_AR_RNAT:
1826                pos = ELF_AR_RNAT_OFFSET;
1827                break;
1828        case PT_AR_BSPSTORE:
1829                pos = ELF_AR_BSPSTORE_OFFSET;
1830                break;
1831        case PT_PR:
1832                pos = ELF_PR_OFFSET;
1833                break;
1834        case PT_B6:
1835                pos = ELF_BR_OFFSET(6);
1836                break;
1837        case PT_AR_BSP:
1838                pos = ELF_AR_BSP_OFFSET;
1839                break;
1840        case PT_R1 ... PT_R3:
1841                pos = addr - PT_R1 + ELF_GR_OFFSET(1);
1842                break;
1843        case PT_R12 ... PT_R15:
1844                pos = addr - PT_R12 + ELF_GR_OFFSET(12);
1845                break;
1846        case PT_R8 ... PT_R11:
1847                pos = addr - PT_R8 + ELF_GR_OFFSET(8);
1848                break;
1849        case PT_R16 ... PT_R31:
1850                pos = addr - PT_R16 + ELF_GR_OFFSET(16);
1851                break;
1852        case PT_AR_CCV:
1853                pos = ELF_AR_CCV_OFFSET;
1854                break;
1855        case PT_AR_FPSR:
1856                pos = ELF_AR_FPSR_OFFSET;
1857                break;
1858        case PT_B0:
1859                pos = ELF_BR_OFFSET(0);
1860                break;
1861        case PT_B7:
1862                pos = ELF_BR_OFFSET(7);
1863                break;
1864        case PT_AR_CSD:
1865                pos = ELF_AR_CSD_OFFSET;
1866                break;
1867        case PT_AR_SSD:
1868                pos = ELF_AR_SSD_OFFSET;
1869                break;
1870        }
1871
1872        if (pos != -1) {
1873                struct unw_frame_info info;
1874
1875                memset(&info, 0, sizeof(info));
1876                unw_init_from_blocked_task(&info, child);
1877                if (unw_unwind_to_user(&info) < 0)
1878                        return 0;
1879
1880                return access_elf_reg(child, &info, pos, data, write_access);
1881        }
1882
1883        /* access debug registers */
1884        if (addr >= PT_IBR) {
1885                regnum = (addr - PT_IBR) >> 3;
1886                ptr = &child->thread.ibr[0];
1887        } else {
1888                regnum = (addr - PT_DBR) >> 3;
1889                ptr = &child->thread.dbr[0];
1890        }
1891
1892        if (regnum >= 8) {
1893                dprintk("ptrace: rejecting access to register "
1894                                "address 0x%lx\n", addr);
1895                return -1;
1896        }
1897
1898        if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) {
1899                child->thread.flags |= IA64_THREAD_DBG_VALID;
1900                memset(child->thread.dbr, 0,
1901                                sizeof(child->thread.dbr));
1902                memset(child->thread.ibr, 0,
1903                                sizeof(child->thread.ibr));
1904        }
1905
1906        ptr += regnum;
1907
1908        if ((regnum & 1) && write_access) {
1909                /* don't let the user set kernel-level breakpoints: */
1910                *ptr = *data & ~(7UL << 56);
1911                return 0;
1912        }
1913        if (write_access)
1914                *ptr = *data;
1915        else
1916                *data = *ptr;
1917        return 0;
1918}
1919
1920static const struct user_regset native_regsets[] = {
1921        {
1922                .core_note_type = NT_PRSTATUS,
1923                .n = ELF_NGREG,
1924                .size = sizeof(elf_greg_t), .align = sizeof(elf_greg_t),
1925                .regset_get = gpregs_get, .set = gpregs_set,
1926                .writeback = gpregs_writeback
1927        },
1928        {
1929                .core_note_type = NT_PRFPREG,
1930                .n = ELF_NFPREG,
1931                .size = sizeof(elf_fpreg_t), .align = sizeof(elf_fpreg_t),
1932                .regset_get = fpregs_get, .set = fpregs_set, .active = fpregs_active
1933        },
1934};
1935
1936static const struct user_regset_view user_ia64_view = {
1937        .name = "ia64",
1938        .e_machine = EM_IA_64,
1939        .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
1940};
1941
1942const struct user_regset_view *task_user_regset_view(struct task_struct *tsk)
1943{
1944        return &user_ia64_view;
1945}
1946
1947struct syscall_get_args {
1948        unsigned int i;
1949        unsigned int n;
1950        unsigned long *args;
1951        struct pt_regs *regs;
1952};
1953
1954static void syscall_get_args_cb(struct unw_frame_info *info, void *data)
1955{
1956        struct syscall_get_args *args = data;
1957        struct pt_regs *pt = args->regs;
1958        unsigned long *krbs, cfm, ndirty, nlocals, nouts;
1959        int i, count;
1960
1961        if (unw_unwind_to_user(info) < 0)
1962                return;
1963
1964        /*
1965         * We get here via a few paths:
1966         * - break instruction: cfm is shared with caller.
1967         *   syscall args are in out= regs, locals are non-empty.
1968         * - epsinstruction: cfm is set by br.call
1969         *   locals don't exist.
1970         *
1971         * For both cases arguments are reachable in cfm.sof - cfm.sol.
1972         * CFM: [ ... | sor: 17..14 | sol : 13..7 | sof : 6..0 ]
1973         */
1974        cfm = pt->cr_ifs;
1975        nlocals = (cfm >> 7) & 0x7f; /* aka sol */
1976        nouts = (cfm & 0x7f) - nlocals; /* aka sof - sol */
1977        krbs = (unsigned long *)info->task + IA64_RBS_OFFSET/8;
1978        ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
1979
1980        count = 0;
1981        if (in_syscall(pt))
1982                count = min_t(int, args->n, nouts);
1983
1984        /* Iterate over outs. */
1985        for (i = 0; i < count; i++) {
1986                int j = ndirty + nlocals + i + args->i;
1987                args->args[i] = *ia64_rse_skip_regs(krbs, j);
1988        }
1989
1990        while (i < args->n) {
1991                args->args[i] = 0;
1992                i++;
1993        }
1994}
1995
1996void syscall_get_arguments(struct task_struct *task,
1997        struct pt_regs *regs, unsigned long *args)
1998{
1999        struct syscall_get_args data = {
2000                .i = 0,
2001                .n = 6,
2002                .args = args,
2003                .regs = regs,
2004        };
2005
2006        if (task == current)
2007                unw_init_running(syscall_get_args_cb, &data);
2008        else {
2009                struct unw_frame_info ufi;
2010                memset(&ufi, 0, sizeof(ufi));
2011                unw_init_from_blocked_task(&ufi, task);
2012                syscall_get_args_cb(&ufi, &data);
2013        }
2014}
2015