linux/sound/soc/codecs/rt5659.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * rt5659.c  --  RT5659/RT5658 ALSA SoC audio codec driver
   4 *
   5 * Copyright 2015 Realtek Semiconductor Corp.
   6 * Author: Bard Liao <bardliao@realtek.com>
   7 */
   8
   9#include <linux/clk.h>
  10#include <linux/module.h>
  11#include <linux/moduleparam.h>
  12#include <linux/init.h>
  13#include <linux/delay.h>
  14#include <linux/pm.h>
  15#include <linux/i2c.h>
  16#include <linux/platform_device.h>
  17#include <linux/spi/spi.h>
  18#include <linux/acpi.h>
  19#include <linux/gpio.h>
  20#include <linux/gpio/consumer.h>
  21#include <sound/core.h>
  22#include <sound/pcm.h>
  23#include <sound/pcm_params.h>
  24#include <sound/jack.h>
  25#include <sound/soc.h>
  26#include <sound/soc-dapm.h>
  27#include <sound/initval.h>
  28#include <sound/tlv.h>
  29#include <sound/rt5659.h>
  30
  31#include "rl6231.h"
  32#include "rt5659.h"
  33
  34static const struct reg_default rt5659_reg[] = {
  35        { 0x0000, 0x0000 },
  36        { 0x0001, 0x4848 },
  37        { 0x0002, 0x8080 },
  38        { 0x0003, 0xc8c8 },
  39        { 0x0004, 0xc80a },
  40        { 0x0005, 0x0000 },
  41        { 0x0006, 0x0000 },
  42        { 0x0007, 0x0103 },
  43        { 0x0008, 0x0080 },
  44        { 0x0009, 0x0000 },
  45        { 0x000a, 0x0000 },
  46        { 0x000c, 0x0000 },
  47        { 0x000d, 0x0000 },
  48        { 0x000f, 0x0808 },
  49        { 0x0010, 0x3080 },
  50        { 0x0011, 0x4a00 },
  51        { 0x0012, 0x4e00 },
  52        { 0x0015, 0x42c1 },
  53        { 0x0016, 0x0000 },
  54        { 0x0018, 0x000b },
  55        { 0x0019, 0xafaf },
  56        { 0x001a, 0xafaf },
  57        { 0x001b, 0x0011 },
  58        { 0x001c, 0x2f2f },
  59        { 0x001d, 0x2f2f },
  60        { 0x001e, 0x2f2f },
  61        { 0x001f, 0x0000 },
  62        { 0x0020, 0x0000 },
  63        { 0x0021, 0x0000 },
  64        { 0x0022, 0x5757 },
  65        { 0x0023, 0x0039 },
  66        { 0x0026, 0xc060 },
  67        { 0x0027, 0xd8d8 },
  68        { 0x0029, 0x8080 },
  69        { 0x002a, 0xaaaa },
  70        { 0x002b, 0xaaaa },
  71        { 0x002c, 0x00af },
  72        { 0x002d, 0x0000 },
  73        { 0x002f, 0x1002 },
  74        { 0x0031, 0x5000 },
  75        { 0x0032, 0x0000 },
  76        { 0x0033, 0x0000 },
  77        { 0x0034, 0x0000 },
  78        { 0x0035, 0x0000 },
  79        { 0x0036, 0x0000 },
  80        { 0x003a, 0x0000 },
  81        { 0x003b, 0x0000 },
  82        { 0x003c, 0x007f },
  83        { 0x003d, 0x0000 },
  84        { 0x003e, 0x007f },
  85        { 0x0040, 0x0808 },
  86        { 0x0046, 0x001f },
  87        { 0x0047, 0x001f },
  88        { 0x0048, 0x0003 },
  89        { 0x0049, 0xe061 },
  90        { 0x004a, 0x0000 },
  91        { 0x004b, 0x031f },
  92        { 0x004d, 0x0000 },
  93        { 0x004e, 0x001f },
  94        { 0x004f, 0x0000 },
  95        { 0x0050, 0x001f },
  96        { 0x0052, 0xf000 },
  97        { 0x0053, 0x0111 },
  98        { 0x0054, 0x0064 },
  99        { 0x0055, 0x0080 },
 100        { 0x0056, 0xef0e },
 101        { 0x0057, 0xf0f0 },
 102        { 0x0058, 0xef0e },
 103        { 0x0059, 0xf0f0 },
 104        { 0x005a, 0xef0e },
 105        { 0x005b, 0xf0f0 },
 106        { 0x005c, 0xf000 },
 107        { 0x005d, 0x0000 },
 108        { 0x005e, 0x1f2c },
 109        { 0x005f, 0x1f2c },
 110        { 0x0060, 0x2717 },
 111        { 0x0061, 0x0000 },
 112        { 0x0062, 0x0000 },
 113        { 0x0063, 0x003e },
 114        { 0x0064, 0x0000 },
 115        { 0x0065, 0x0000 },
 116        { 0x0066, 0x0000 },
 117        { 0x0067, 0x0000 },
 118        { 0x006a, 0x0000 },
 119        { 0x006b, 0x0000 },
 120        { 0x006c, 0x0000 },
 121        { 0x006e, 0x0000 },
 122        { 0x006f, 0x0000 },
 123        { 0x0070, 0x8000 },
 124        { 0x0071, 0x8000 },
 125        { 0x0072, 0x8000 },
 126        { 0x0073, 0x1110 },
 127        { 0x0074, 0xfe00 },
 128        { 0x0075, 0x2409 },
 129        { 0x0076, 0x000a },
 130        { 0x0077, 0x00f0 },
 131        { 0x0078, 0x0000 },
 132        { 0x0079, 0x0000 },
 133        { 0x007a, 0x0123 },
 134        { 0x007b, 0x8003 },
 135        { 0x0080, 0x0000 },
 136        { 0x0081, 0x0000 },
 137        { 0x0082, 0x0000 },
 138        { 0x0083, 0x0000 },
 139        { 0x0084, 0x0000 },
 140        { 0x0085, 0x0000 },
 141        { 0x0086, 0x0008 },
 142        { 0x0087, 0x0000 },
 143        { 0x0088, 0x0000 },
 144        { 0x0089, 0x0000 },
 145        { 0x008a, 0x0000 },
 146        { 0x008b, 0x0000 },
 147        { 0x008c, 0x0003 },
 148        { 0x008e, 0x0000 },
 149        { 0x008f, 0x1000 },
 150        { 0x0090, 0x0646 },
 151        { 0x0091, 0x0c16 },
 152        { 0x0092, 0x0073 },
 153        { 0x0093, 0x0000 },
 154        { 0x0094, 0x0080 },
 155        { 0x0097, 0x0000 },
 156        { 0x0098, 0x0000 },
 157        { 0x0099, 0x0000 },
 158        { 0x009a, 0x0000 },
 159        { 0x009b, 0x0000 },
 160        { 0x009c, 0x007f },
 161        { 0x009d, 0x0000 },
 162        { 0x009e, 0x007f },
 163        { 0x009f, 0x0000 },
 164        { 0x00a0, 0x0060 },
 165        { 0x00a1, 0x90a1 },
 166        { 0x00ae, 0x2000 },
 167        { 0x00af, 0x0000 },
 168        { 0x00b0, 0x2000 },
 169        { 0x00b1, 0x0000 },
 170        { 0x00b2, 0x0000 },
 171        { 0x00b6, 0x0000 },
 172        { 0x00b7, 0x0000 },
 173        { 0x00b8, 0x0000 },
 174        { 0x00b9, 0x0000 },
 175        { 0x00ba, 0x0000 },
 176        { 0x00bb, 0x0000 },
 177        { 0x00be, 0x0000 },
 178        { 0x00bf, 0x0000 },
 179        { 0x00c0, 0x0000 },
 180        { 0x00c1, 0x0000 },
 181        { 0x00c2, 0x0000 },
 182        { 0x00c3, 0x0000 },
 183        { 0x00c4, 0x0003 },
 184        { 0x00c5, 0x0000 },
 185        { 0x00cb, 0xa02f },
 186        { 0x00cc, 0x0000 },
 187        { 0x00cd, 0x0e02 },
 188        { 0x00d6, 0x0000 },
 189        { 0x00d7, 0x2244 },
 190        { 0x00d9, 0x0809 },
 191        { 0x00da, 0x0000 },
 192        { 0x00db, 0x0008 },
 193        { 0x00dc, 0x00c0 },
 194        { 0x00dd, 0x6724 },
 195        { 0x00de, 0x3131 },
 196        { 0x00df, 0x0008 },
 197        { 0x00e0, 0x4000 },
 198        { 0x00e1, 0x3131 },
 199        { 0x00e4, 0x400c },
 200        { 0x00e5, 0x8031 },
 201        { 0x00ea, 0xb320 },
 202        { 0x00eb, 0x0000 },
 203        { 0x00ec, 0xb300 },
 204        { 0x00ed, 0x0000 },
 205        { 0x00f0, 0x0000 },
 206        { 0x00f1, 0x0202 },
 207        { 0x00f2, 0x0ddd },
 208        { 0x00f3, 0x0ddd },
 209        { 0x00f4, 0x0ddd },
 210        { 0x00f6, 0x0000 },
 211        { 0x00f7, 0x0000 },
 212        { 0x00f8, 0x0000 },
 213        { 0x00f9, 0x0000 },
 214        { 0x00fa, 0x8000 },
 215        { 0x00fb, 0x0000 },
 216        { 0x00fc, 0x0000 },
 217        { 0x00fd, 0x0001 },
 218        { 0x00fe, 0x10ec },
 219        { 0x00ff, 0x6311 },
 220        { 0x0100, 0xaaaa },
 221        { 0x010a, 0xaaaa },
 222        { 0x010b, 0x00a0 },
 223        { 0x010c, 0xaeae },
 224        { 0x010d, 0xaaaa },
 225        { 0x010e, 0xaaa8 },
 226        { 0x010f, 0xa0aa },
 227        { 0x0110, 0xe02a },
 228        { 0x0111, 0xa702 },
 229        { 0x0112, 0xaaaa },
 230        { 0x0113, 0x2800 },
 231        { 0x0116, 0x0000 },
 232        { 0x0117, 0x0f00 },
 233        { 0x011a, 0x0020 },
 234        { 0x011b, 0x0011 },
 235        { 0x011c, 0x0150 },
 236        { 0x011d, 0x0000 },
 237        { 0x011e, 0x0000 },
 238        { 0x011f, 0x0000 },
 239        { 0x0120, 0x0000 },
 240        { 0x0121, 0x009b },
 241        { 0x0122, 0x5014 },
 242        { 0x0123, 0x0421 },
 243        { 0x0124, 0x7cea },
 244        { 0x0125, 0x0420 },
 245        { 0x0126, 0x5550 },
 246        { 0x0132, 0x0000 },
 247        { 0x0133, 0x0000 },
 248        { 0x0137, 0x5055 },
 249        { 0x0138, 0x3700 },
 250        { 0x0139, 0x79a1 },
 251        { 0x013a, 0x2020 },
 252        { 0x013b, 0x2020 },
 253        { 0x013c, 0x2005 },
 254        { 0x013e, 0x1f00 },
 255        { 0x013f, 0x0000 },
 256        { 0x0145, 0x0002 },
 257        { 0x0146, 0x0000 },
 258        { 0x0147, 0x0000 },
 259        { 0x0148, 0x0000 },
 260        { 0x0150, 0x1813 },
 261        { 0x0151, 0x0690 },
 262        { 0x0152, 0x1c17 },
 263        { 0x0153, 0x6883 },
 264        { 0x0154, 0xd3ce },
 265        { 0x0155, 0x352d },
 266        { 0x0156, 0x00eb },
 267        { 0x0157, 0x3717 },
 268        { 0x0158, 0x4c6a },
 269        { 0x0159, 0xe41b },
 270        { 0x015a, 0x2a13 },
 271        { 0x015b, 0xb600 },
 272        { 0x015c, 0xc730 },
 273        { 0x015d, 0x35d4 },
 274        { 0x015e, 0x00bf },
 275        { 0x0160, 0x0ec0 },
 276        { 0x0161, 0x0020 },
 277        { 0x0162, 0x0080 },
 278        { 0x0163, 0x0800 },
 279        { 0x0164, 0x0000 },
 280        { 0x0165, 0x0000 },
 281        { 0x0166, 0x0000 },
 282        { 0x0167, 0x001f },
 283        { 0x0170, 0x4e80 },
 284        { 0x0171, 0x0020 },
 285        { 0x0172, 0x0080 },
 286        { 0x0173, 0x0800 },
 287        { 0x0174, 0x000c },
 288        { 0x0175, 0x0000 },
 289        { 0x0190, 0x3300 },
 290        { 0x0191, 0x2200 },
 291        { 0x0192, 0x0000 },
 292        { 0x01b0, 0x4b38 },
 293        { 0x01b1, 0x0000 },
 294        { 0x01b2, 0x0000 },
 295        { 0x01b3, 0x0000 },
 296        { 0x01c0, 0x0045 },
 297        { 0x01c1, 0x0540 },
 298        { 0x01c2, 0x0000 },
 299        { 0x01c3, 0x0030 },
 300        { 0x01c7, 0x0000 },
 301        { 0x01c8, 0x5757 },
 302        { 0x01c9, 0x5757 },
 303        { 0x01ca, 0x5757 },
 304        { 0x01cb, 0x5757 },
 305        { 0x01cc, 0x5757 },
 306        { 0x01cd, 0x5757 },
 307        { 0x01ce, 0x006f },
 308        { 0x01da, 0x0000 },
 309        { 0x01db, 0x0000 },
 310        { 0x01de, 0x7d00 },
 311        { 0x01df, 0x10c0 },
 312        { 0x01e0, 0x06a1 },
 313        { 0x01e1, 0x0000 },
 314        { 0x01e2, 0x0000 },
 315        { 0x01e3, 0x0000 },
 316        { 0x01e4, 0x0001 },
 317        { 0x01e6, 0x0000 },
 318        { 0x01e7, 0x0000 },
 319        { 0x01e8, 0x0000 },
 320        { 0x01ea, 0x0000 },
 321        { 0x01eb, 0x0000 },
 322        { 0x01ec, 0x0000 },
 323        { 0x01ed, 0x0000 },
 324        { 0x01ee, 0x0000 },
 325        { 0x01ef, 0x0000 },
 326        { 0x01f0, 0x0000 },
 327        { 0x01f1, 0x0000 },
 328        { 0x01f2, 0x0000 },
 329        { 0x01f6, 0x1e04 },
 330        { 0x01f7, 0x01a1 },
 331        { 0x01f8, 0x0000 },
 332        { 0x01f9, 0x0000 },
 333        { 0x01fa, 0x0002 },
 334        { 0x01fb, 0x0000 },
 335        { 0x01fc, 0x0000 },
 336        { 0x01fd, 0x0000 },
 337        { 0x01fe, 0x0000 },
 338        { 0x0200, 0x066c },
 339        { 0x0201, 0x7fff },
 340        { 0x0202, 0x7fff },
 341        { 0x0203, 0x0000 },
 342        { 0x0204, 0x0000 },
 343        { 0x0205, 0x0000 },
 344        { 0x0206, 0x0000 },
 345        { 0x0207, 0x0000 },
 346        { 0x0208, 0x0000 },
 347        { 0x0256, 0x0000 },
 348        { 0x0257, 0x0000 },
 349        { 0x0258, 0x0000 },
 350        { 0x0259, 0x0000 },
 351        { 0x025a, 0x0000 },
 352        { 0x025b, 0x3333 },
 353        { 0x025c, 0x3333 },
 354        { 0x025d, 0x3333 },
 355        { 0x025e, 0x0000 },
 356        { 0x025f, 0x0000 },
 357        { 0x0260, 0x0000 },
 358        { 0x0261, 0x0022 },
 359        { 0x0262, 0x0300 },
 360        { 0x0265, 0x1e80 },
 361        { 0x0266, 0x0131 },
 362        { 0x0267, 0x0003 },
 363        { 0x0268, 0x0000 },
 364        { 0x0269, 0x0000 },
 365        { 0x026a, 0x0000 },
 366        { 0x026b, 0x0000 },
 367        { 0x026c, 0x0000 },
 368        { 0x026d, 0x0000 },
 369        { 0x026e, 0x0000 },
 370        { 0x026f, 0x0000 },
 371        { 0x0270, 0x0000 },
 372        { 0x0271, 0x0000 },
 373        { 0x0272, 0x0000 },
 374        { 0x0273, 0x0000 },
 375        { 0x0280, 0x0000 },
 376        { 0x0281, 0x0000 },
 377        { 0x0282, 0x0418 },
 378        { 0x0283, 0x7fff },
 379        { 0x0284, 0x7000 },
 380        { 0x0290, 0x01d0 },
 381        { 0x0291, 0x0100 },
 382        { 0x02fa, 0x0000 },
 383        { 0x02fb, 0x0000 },
 384        { 0x02fc, 0x0000 },
 385        { 0x0300, 0x001f },
 386        { 0x0301, 0x032c },
 387        { 0x0302, 0x5f21 },
 388        { 0x0303, 0x4000 },
 389        { 0x0304, 0x4000 },
 390        { 0x0305, 0x0600 },
 391        { 0x0306, 0x8000 },
 392        { 0x0307, 0x0700 },
 393        { 0x0308, 0x001f },
 394        { 0x0309, 0x032c },
 395        { 0x030a, 0x5f21 },
 396        { 0x030b, 0x4000 },
 397        { 0x030c, 0x4000 },
 398        { 0x030d, 0x0600 },
 399        { 0x030e, 0x8000 },
 400        { 0x030f, 0x0700 },
 401        { 0x0310, 0x4560 },
 402        { 0x0311, 0xa4a8 },
 403        { 0x0312, 0x7418 },
 404        { 0x0313, 0x0000 },
 405        { 0x0314, 0x0006 },
 406        { 0x0315, 0x00ff },
 407        { 0x0316, 0xc400 },
 408        { 0x0317, 0x4560 },
 409        { 0x0318, 0xa4a8 },
 410        { 0x0319, 0x7418 },
 411        { 0x031a, 0x0000 },
 412        { 0x031b, 0x0006 },
 413        { 0x031c, 0x00ff },
 414        { 0x031d, 0xc400 },
 415        { 0x0320, 0x0f20 },
 416        { 0x0321, 0x8700 },
 417        { 0x0322, 0x7dc2 },
 418        { 0x0323, 0xa178 },
 419        { 0x0324, 0x5383 },
 420        { 0x0325, 0x7dc2 },
 421        { 0x0326, 0xa178 },
 422        { 0x0327, 0x5383 },
 423        { 0x0328, 0x003e },
 424        { 0x0329, 0x02c1 },
 425        { 0x032a, 0xd37d },
 426        { 0x0330, 0x00a6 },
 427        { 0x0331, 0x04c3 },
 428        { 0x0332, 0x27c8 },
 429        { 0x0333, 0xbf50 },
 430        { 0x0334, 0x0045 },
 431        { 0x0335, 0x2007 },
 432        { 0x0336, 0x7418 },
 433        { 0x0337, 0x0501 },
 434        { 0x0338, 0x0000 },
 435        { 0x0339, 0x0010 },
 436        { 0x033a, 0x1010 },
 437        { 0x0340, 0x0800 },
 438        { 0x0341, 0x0800 },
 439        { 0x0342, 0x0800 },
 440        { 0x0343, 0x0800 },
 441        { 0x0344, 0x0000 },
 442        { 0x0345, 0x0000 },
 443        { 0x0346, 0x0000 },
 444        { 0x0347, 0x0000 },
 445        { 0x0348, 0x0000 },
 446        { 0x0349, 0x0000 },
 447        { 0x034a, 0x0000 },
 448        { 0x034b, 0x0000 },
 449        { 0x034c, 0x0000 },
 450        { 0x034d, 0x0000 },
 451        { 0x034e, 0x0000 },
 452        { 0x034f, 0x0000 },
 453        { 0x0350, 0x0000 },
 454        { 0x0351, 0x0000 },
 455        { 0x0352, 0x0000 },
 456        { 0x0353, 0x0000 },
 457        { 0x0354, 0x0000 },
 458        { 0x0355, 0x0000 },
 459        { 0x0356, 0x0000 },
 460        { 0x0357, 0x0000 },
 461        { 0x0358, 0x0000 },
 462        { 0x0359, 0x0000 },
 463        { 0x035a, 0x0000 },
 464        { 0x035b, 0x0000 },
 465        { 0x035c, 0x0000 },
 466        { 0x035d, 0x0000 },
 467        { 0x035e, 0x2000 },
 468        { 0x035f, 0x0000 },
 469        { 0x0360, 0x2000 },
 470        { 0x0361, 0x2000 },
 471        { 0x0362, 0x0000 },
 472        { 0x0363, 0x2000 },
 473        { 0x0364, 0x0200 },
 474        { 0x0365, 0x0000 },
 475        { 0x0366, 0x0000 },
 476        { 0x0367, 0x0000 },
 477        { 0x0368, 0x0000 },
 478        { 0x0369, 0x0000 },
 479        { 0x036a, 0x0000 },
 480        { 0x036b, 0x0000 },
 481        { 0x036c, 0x0000 },
 482        { 0x036d, 0x0000 },
 483        { 0x036e, 0x0200 },
 484        { 0x036f, 0x0000 },
 485        { 0x0370, 0x0000 },
 486        { 0x0371, 0x0000 },
 487        { 0x0372, 0x0000 },
 488        { 0x0373, 0x0000 },
 489        { 0x0374, 0x0000 },
 490        { 0x0375, 0x0000 },
 491        { 0x0376, 0x0000 },
 492        { 0x0377, 0x0000 },
 493        { 0x03d0, 0x0000 },
 494        { 0x03d1, 0x0000 },
 495        { 0x03d2, 0x0000 },
 496        { 0x03d3, 0x0000 },
 497        { 0x03d4, 0x2000 },
 498        { 0x03d5, 0x2000 },
 499        { 0x03d6, 0x0000 },
 500        { 0x03d7, 0x0000 },
 501        { 0x03d8, 0x2000 },
 502        { 0x03d9, 0x2000 },
 503        { 0x03da, 0x2000 },
 504        { 0x03db, 0x2000 },
 505        { 0x03dc, 0x0000 },
 506        { 0x03dd, 0x0000 },
 507        { 0x03de, 0x0000 },
 508        { 0x03df, 0x2000 },
 509        { 0x03e0, 0x0000 },
 510        { 0x03e1, 0x0000 },
 511        { 0x03e2, 0x0000 },
 512        { 0x03e3, 0x0000 },
 513        { 0x03e4, 0x0000 },
 514        { 0x03e5, 0x0000 },
 515        { 0x03e6, 0x0000 },
 516        { 0x03e7, 0x0000 },
 517        { 0x03e8, 0x0000 },
 518        { 0x03e9, 0x0000 },
 519        { 0x03ea, 0x0000 },
 520        { 0x03eb, 0x0000 },
 521        { 0x03ec, 0x0000 },
 522        { 0x03ed, 0x0000 },
 523        { 0x03ee, 0x0000 },
 524        { 0x03ef, 0x0000 },
 525        { 0x03f0, 0x0800 },
 526        { 0x03f1, 0x0800 },
 527        { 0x03f2, 0x0800 },
 528        { 0x03f3, 0x0800 },
 529};
 530
 531static bool rt5659_volatile_register(struct device *dev, unsigned int reg)
 532{
 533        switch (reg) {
 534        case RT5659_RESET:
 535        case RT5659_EJD_CTRL_2:
 536        case RT5659_SILENCE_CTRL:
 537        case RT5659_DAC2_DIG_VOL:
 538        case RT5659_HP_IMP_GAIN_2:
 539        case RT5659_PDM_OUT_CTRL:
 540        case RT5659_PDM_DATA_CTRL_1:
 541        case RT5659_PDM_DATA_CTRL_4:
 542        case RT5659_HAPTIC_GEN_CTRL_1:
 543        case RT5659_HAPTIC_GEN_CTRL_3:
 544        case RT5659_HAPTIC_LPF_CTRL_3:
 545        case RT5659_CLK_DET:
 546        case RT5659_MICBIAS_1:
 547        case RT5659_ASRC_11:
 548        case RT5659_ADC_EQ_CTRL_1:
 549        case RT5659_DAC_EQ_CTRL_1:
 550        case RT5659_INT_ST_1:
 551        case RT5659_INT_ST_2:
 552        case RT5659_GPIO_STA:
 553        case RT5659_SINE_GEN_CTRL_1:
 554        case RT5659_IL_CMD_1:
 555        case RT5659_4BTN_IL_CMD_1:
 556        case RT5659_PSV_IL_CMD_1:
 557        case RT5659_AJD1_CTRL:
 558        case RT5659_AJD2_AJD3_CTRL:
 559        case RT5659_JD_CTRL_3:
 560        case RT5659_VENDOR_ID:
 561        case RT5659_VENDOR_ID_1:
 562        case RT5659_DEVICE_ID:
 563        case RT5659_MEMORY_TEST:
 564        case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
 565        case RT5659_VOL_TEST:
 566        case RT5659_STO_NG2_CTRL_1:
 567        case RT5659_STO_NG2_CTRL_5:
 568        case RT5659_STO_NG2_CTRL_6:
 569        case RT5659_STO_NG2_CTRL_7:
 570        case RT5659_MONO_NG2_CTRL_1:
 571        case RT5659_MONO_NG2_CTRL_5:
 572        case RT5659_MONO_NG2_CTRL_6:
 573        case RT5659_HP_IMP_SENS_CTRL_1:
 574        case RT5659_HP_IMP_SENS_CTRL_3:
 575        case RT5659_HP_IMP_SENS_CTRL_4:
 576        case RT5659_HP_CALIB_CTRL_1:
 577        case RT5659_HP_CALIB_CTRL_9:
 578        case RT5659_HP_CALIB_STA_1:
 579        case RT5659_HP_CALIB_STA_2:
 580        case RT5659_HP_CALIB_STA_3:
 581        case RT5659_HP_CALIB_STA_4:
 582        case RT5659_HP_CALIB_STA_5:
 583        case RT5659_HP_CALIB_STA_6:
 584        case RT5659_HP_CALIB_STA_7:
 585        case RT5659_HP_CALIB_STA_8:
 586        case RT5659_HP_CALIB_STA_9:
 587        case RT5659_MONO_AMP_CALIB_CTRL_1:
 588        case RT5659_MONO_AMP_CALIB_CTRL_3:
 589        case RT5659_MONO_AMP_CALIB_STA_1:
 590        case RT5659_MONO_AMP_CALIB_STA_2:
 591        case RT5659_MONO_AMP_CALIB_STA_3:
 592        case RT5659_MONO_AMP_CALIB_STA_4:
 593        case RT5659_SPK_PWR_LMT_STA_1:
 594        case RT5659_SPK_PWR_LMT_STA_2:
 595        case RT5659_SPK_PWR_LMT_STA_3:
 596        case RT5659_SPK_PWR_LMT_STA_4:
 597        case RT5659_SPK_PWR_LMT_STA_5:
 598        case RT5659_SPK_PWR_LMT_STA_6:
 599        case RT5659_SPK_DC_CAILB_CTRL_1:
 600        case RT5659_SPK_DC_CAILB_STA_1:
 601        case RT5659_SPK_DC_CAILB_STA_2:
 602        case RT5659_SPK_DC_CAILB_STA_3:
 603        case RT5659_SPK_DC_CAILB_STA_4:
 604        case RT5659_SPK_DC_CAILB_STA_5:
 605        case RT5659_SPK_DC_CAILB_STA_6:
 606        case RT5659_SPK_DC_CAILB_STA_7:
 607        case RT5659_SPK_DC_CAILB_STA_8:
 608        case RT5659_SPK_DC_CAILB_STA_9:
 609        case RT5659_SPK_DC_CAILB_STA_10:
 610        case RT5659_SPK_VDD_STA_1:
 611        case RT5659_SPK_VDD_STA_2:
 612        case RT5659_SPK_DC_DET_CTRL_1:
 613        case RT5659_PURE_DC_DET_CTRL_1:
 614        case RT5659_PURE_DC_DET_CTRL_2:
 615        case RT5659_DRC1_PRIV_1:
 616        case RT5659_DRC1_PRIV_4:
 617        case RT5659_DRC1_PRIV_5:
 618        case RT5659_DRC1_PRIV_6:
 619        case RT5659_DRC1_PRIV_7:
 620        case RT5659_DRC2_PRIV_1:
 621        case RT5659_DRC2_PRIV_4:
 622        case RT5659_DRC2_PRIV_5:
 623        case RT5659_DRC2_PRIV_6:
 624        case RT5659_DRC2_PRIV_7:
 625        case RT5659_ALC_PGA_STA_1:
 626        case RT5659_ALC_PGA_STA_2:
 627        case RT5659_ALC_PGA_STA_3:
 628                return true;
 629        default:
 630                return false;
 631        }
 632}
 633
 634static bool rt5659_readable_register(struct device *dev, unsigned int reg)
 635{
 636        switch (reg) {
 637        case RT5659_RESET:
 638        case RT5659_SPO_VOL:
 639        case RT5659_HP_VOL:
 640        case RT5659_LOUT:
 641        case RT5659_MONO_OUT:
 642        case RT5659_HPL_GAIN:
 643        case RT5659_HPR_GAIN:
 644        case RT5659_MONO_GAIN:
 645        case RT5659_SPDIF_CTRL_1:
 646        case RT5659_SPDIF_CTRL_2:
 647        case RT5659_CAL_BST_CTRL:
 648        case RT5659_IN1_IN2:
 649        case RT5659_IN3_IN4:
 650        case RT5659_INL1_INR1_VOL:
 651        case RT5659_EJD_CTRL_1:
 652        case RT5659_EJD_CTRL_2:
 653        case RT5659_EJD_CTRL_3:
 654        case RT5659_SILENCE_CTRL:
 655        case RT5659_PSV_CTRL:
 656        case RT5659_SIDETONE_CTRL:
 657        case RT5659_DAC1_DIG_VOL:
 658        case RT5659_DAC2_DIG_VOL:
 659        case RT5659_DAC_CTRL:
 660        case RT5659_STO1_ADC_DIG_VOL:
 661        case RT5659_MONO_ADC_DIG_VOL:
 662        case RT5659_STO2_ADC_DIG_VOL:
 663        case RT5659_STO1_BOOST:
 664        case RT5659_MONO_BOOST:
 665        case RT5659_STO2_BOOST:
 666        case RT5659_HP_IMP_GAIN_1:
 667        case RT5659_HP_IMP_GAIN_2:
 668        case RT5659_STO1_ADC_MIXER:
 669        case RT5659_MONO_ADC_MIXER:
 670        case RT5659_AD_DA_MIXER:
 671        case RT5659_STO_DAC_MIXER:
 672        case RT5659_MONO_DAC_MIXER:
 673        case RT5659_DIG_MIXER:
 674        case RT5659_A_DAC_MUX:
 675        case RT5659_DIG_INF23_DATA:
 676        case RT5659_PDM_OUT_CTRL:
 677        case RT5659_PDM_DATA_CTRL_1:
 678        case RT5659_PDM_DATA_CTRL_2:
 679        case RT5659_PDM_DATA_CTRL_3:
 680        case RT5659_PDM_DATA_CTRL_4:
 681        case RT5659_SPDIF_CTRL:
 682        case RT5659_REC1_GAIN:
 683        case RT5659_REC1_L1_MIXER:
 684        case RT5659_REC1_L2_MIXER:
 685        case RT5659_REC1_R1_MIXER:
 686        case RT5659_REC1_R2_MIXER:
 687        case RT5659_CAL_REC:
 688        case RT5659_REC2_L1_MIXER:
 689        case RT5659_REC2_L2_MIXER:
 690        case RT5659_REC2_R1_MIXER:
 691        case RT5659_REC2_R2_MIXER:
 692        case RT5659_SPK_L_MIXER:
 693        case RT5659_SPK_R_MIXER:
 694        case RT5659_SPO_AMP_GAIN:
 695        case RT5659_ALC_BACK_GAIN:
 696        case RT5659_MONOMIX_GAIN:
 697        case RT5659_MONOMIX_IN_GAIN:
 698        case RT5659_OUT_L_GAIN:
 699        case RT5659_OUT_L_MIXER:
 700        case RT5659_OUT_R_GAIN:
 701        case RT5659_OUT_R_MIXER:
 702        case RT5659_LOUT_MIXER:
 703        case RT5659_HAPTIC_GEN_CTRL_1:
 704        case RT5659_HAPTIC_GEN_CTRL_2:
 705        case RT5659_HAPTIC_GEN_CTRL_3:
 706        case RT5659_HAPTIC_GEN_CTRL_4:
 707        case RT5659_HAPTIC_GEN_CTRL_5:
 708        case RT5659_HAPTIC_GEN_CTRL_6:
 709        case RT5659_HAPTIC_GEN_CTRL_7:
 710        case RT5659_HAPTIC_GEN_CTRL_8:
 711        case RT5659_HAPTIC_GEN_CTRL_9:
 712        case RT5659_HAPTIC_GEN_CTRL_10:
 713        case RT5659_HAPTIC_GEN_CTRL_11:
 714        case RT5659_HAPTIC_LPF_CTRL_1:
 715        case RT5659_HAPTIC_LPF_CTRL_2:
 716        case RT5659_HAPTIC_LPF_CTRL_3:
 717        case RT5659_PWR_DIG_1:
 718        case RT5659_PWR_DIG_2:
 719        case RT5659_PWR_ANLG_1:
 720        case RT5659_PWR_ANLG_2:
 721        case RT5659_PWR_ANLG_3:
 722        case RT5659_PWR_MIXER:
 723        case RT5659_PWR_VOL:
 724        case RT5659_PRIV_INDEX:
 725        case RT5659_CLK_DET:
 726        case RT5659_PRIV_DATA:
 727        case RT5659_PRE_DIV_1:
 728        case RT5659_PRE_DIV_2:
 729        case RT5659_I2S1_SDP:
 730        case RT5659_I2S2_SDP:
 731        case RT5659_I2S3_SDP:
 732        case RT5659_ADDA_CLK_1:
 733        case RT5659_ADDA_CLK_2:
 734        case RT5659_DMIC_CTRL_1:
 735        case RT5659_DMIC_CTRL_2:
 736        case RT5659_TDM_CTRL_1:
 737        case RT5659_TDM_CTRL_2:
 738        case RT5659_TDM_CTRL_3:
 739        case RT5659_TDM_CTRL_4:
 740        case RT5659_TDM_CTRL_5:
 741        case RT5659_GLB_CLK:
 742        case RT5659_PLL_CTRL_1:
 743        case RT5659_PLL_CTRL_2:
 744        case RT5659_ASRC_1:
 745        case RT5659_ASRC_2:
 746        case RT5659_ASRC_3:
 747        case RT5659_ASRC_4:
 748        case RT5659_ASRC_5:
 749        case RT5659_ASRC_6:
 750        case RT5659_ASRC_7:
 751        case RT5659_ASRC_8:
 752        case RT5659_ASRC_9:
 753        case RT5659_ASRC_10:
 754        case RT5659_DEPOP_1:
 755        case RT5659_DEPOP_2:
 756        case RT5659_DEPOP_3:
 757        case RT5659_HP_CHARGE_PUMP_1:
 758        case RT5659_HP_CHARGE_PUMP_2:
 759        case RT5659_MICBIAS_1:
 760        case RT5659_MICBIAS_2:
 761        case RT5659_ASRC_11:
 762        case RT5659_ASRC_12:
 763        case RT5659_ASRC_13:
 764        case RT5659_REC_M1_M2_GAIN_CTRL:
 765        case RT5659_RC_CLK_CTRL:
 766        case RT5659_CLASSD_CTRL_1:
 767        case RT5659_CLASSD_CTRL_2:
 768        case RT5659_ADC_EQ_CTRL_1:
 769        case RT5659_ADC_EQ_CTRL_2:
 770        case RT5659_DAC_EQ_CTRL_1:
 771        case RT5659_DAC_EQ_CTRL_2:
 772        case RT5659_DAC_EQ_CTRL_3:
 773        case RT5659_IRQ_CTRL_1:
 774        case RT5659_IRQ_CTRL_2:
 775        case RT5659_IRQ_CTRL_3:
 776        case RT5659_IRQ_CTRL_4:
 777        case RT5659_IRQ_CTRL_5:
 778        case RT5659_IRQ_CTRL_6:
 779        case RT5659_INT_ST_1:
 780        case RT5659_INT_ST_2:
 781        case RT5659_GPIO_CTRL_1:
 782        case RT5659_GPIO_CTRL_2:
 783        case RT5659_GPIO_CTRL_3:
 784        case RT5659_GPIO_CTRL_4:
 785        case RT5659_GPIO_CTRL_5:
 786        case RT5659_GPIO_STA:
 787        case RT5659_SINE_GEN_CTRL_1:
 788        case RT5659_SINE_GEN_CTRL_2:
 789        case RT5659_SINE_GEN_CTRL_3:
 790        case RT5659_HP_AMP_DET_CTRL_1:
 791        case RT5659_HP_AMP_DET_CTRL_2:
 792        case RT5659_SV_ZCD_1:
 793        case RT5659_SV_ZCD_2:
 794        case RT5659_IL_CMD_1:
 795        case RT5659_IL_CMD_2:
 796        case RT5659_IL_CMD_3:
 797        case RT5659_IL_CMD_4:
 798        case RT5659_4BTN_IL_CMD_1:
 799        case RT5659_4BTN_IL_CMD_2:
 800        case RT5659_4BTN_IL_CMD_3:
 801        case RT5659_PSV_IL_CMD_1:
 802        case RT5659_PSV_IL_CMD_2:
 803        case RT5659_ADC_STO1_HP_CTRL_1:
 804        case RT5659_ADC_STO1_HP_CTRL_2:
 805        case RT5659_ADC_MONO_HP_CTRL_1:
 806        case RT5659_ADC_MONO_HP_CTRL_2:
 807        case RT5659_AJD1_CTRL:
 808        case RT5659_AJD2_AJD3_CTRL:
 809        case RT5659_JD1_THD:
 810        case RT5659_JD2_THD:
 811        case RT5659_JD3_THD:
 812        case RT5659_JD_CTRL_1:
 813        case RT5659_JD_CTRL_2:
 814        case RT5659_JD_CTRL_3:
 815        case RT5659_JD_CTRL_4:
 816        case RT5659_DIG_MISC:
 817        case RT5659_DUMMY_2:
 818        case RT5659_DUMMY_3:
 819        case RT5659_VENDOR_ID:
 820        case RT5659_VENDOR_ID_1:
 821        case RT5659_DEVICE_ID:
 822        case RT5659_DAC_ADC_DIG_VOL:
 823        case RT5659_BIAS_CUR_CTRL_1:
 824        case RT5659_BIAS_CUR_CTRL_2:
 825        case RT5659_BIAS_CUR_CTRL_3:
 826        case RT5659_BIAS_CUR_CTRL_4:
 827        case RT5659_BIAS_CUR_CTRL_5:
 828        case RT5659_BIAS_CUR_CTRL_6:
 829        case RT5659_BIAS_CUR_CTRL_7:
 830        case RT5659_BIAS_CUR_CTRL_8:
 831        case RT5659_BIAS_CUR_CTRL_9:
 832        case RT5659_BIAS_CUR_CTRL_10:
 833        case RT5659_MEMORY_TEST:
 834        case RT5659_VREF_REC_OP_FB_CAP_CTRL:
 835        case RT5659_CLASSD_0:
 836        case RT5659_CLASSD_1:
 837        case RT5659_CLASSD_2:
 838        case RT5659_CLASSD_3:
 839        case RT5659_CLASSD_4:
 840        case RT5659_CLASSD_5:
 841        case RT5659_CLASSD_6:
 842        case RT5659_CLASSD_7:
 843        case RT5659_CLASSD_8:
 844        case RT5659_CLASSD_9:
 845        case RT5659_CLASSD_10:
 846        case RT5659_CHARGE_PUMP_1:
 847        case RT5659_CHARGE_PUMP_2:
 848        case RT5659_DIG_IN_CTRL_1:
 849        case RT5659_DIG_IN_CTRL_2:
 850        case RT5659_PAD_DRIVING_CTRL:
 851        case RT5659_SOFT_RAMP_DEPOP:
 852        case RT5659_PLL:
 853        case RT5659_CHOP_DAC:
 854        case RT5659_CHOP_ADC:
 855        case RT5659_CALIB_ADC_CTRL:
 856        case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
 857        case RT5659_VOL_TEST:
 858        case RT5659_TEST_MODE_CTRL_1:
 859        case RT5659_TEST_MODE_CTRL_2:
 860        case RT5659_TEST_MODE_CTRL_3:
 861        case RT5659_TEST_MODE_CTRL_4:
 862        case RT5659_BASSBACK_CTRL:
 863        case RT5659_MP3_PLUS_CTRL_1:
 864        case RT5659_MP3_PLUS_CTRL_2:
 865        case RT5659_MP3_HPF_A1:
 866        case RT5659_MP3_HPF_A2:
 867        case RT5659_MP3_HPF_H0:
 868        case RT5659_MP3_LPF_H0:
 869        case RT5659_3D_SPK_CTRL:
 870        case RT5659_3D_SPK_COEF_1:
 871        case RT5659_3D_SPK_COEF_2:
 872        case RT5659_3D_SPK_COEF_3:
 873        case RT5659_3D_SPK_COEF_4:
 874        case RT5659_3D_SPK_COEF_5:
 875        case RT5659_3D_SPK_COEF_6:
 876        case RT5659_3D_SPK_COEF_7:
 877        case RT5659_STO_NG2_CTRL_1:
 878        case RT5659_STO_NG2_CTRL_2:
 879        case RT5659_STO_NG2_CTRL_3:
 880        case RT5659_STO_NG2_CTRL_4:
 881        case RT5659_STO_NG2_CTRL_5:
 882        case RT5659_STO_NG2_CTRL_6:
 883        case RT5659_STO_NG2_CTRL_7:
 884        case RT5659_STO_NG2_CTRL_8:
 885        case RT5659_MONO_NG2_CTRL_1:
 886        case RT5659_MONO_NG2_CTRL_2:
 887        case RT5659_MONO_NG2_CTRL_3:
 888        case RT5659_MONO_NG2_CTRL_4:
 889        case RT5659_MONO_NG2_CTRL_5:
 890        case RT5659_MONO_NG2_CTRL_6:
 891        case RT5659_MID_HP_AMP_DET:
 892        case RT5659_LOW_HP_AMP_DET:
 893        case RT5659_LDO_CTRL:
 894        case RT5659_HP_DECROSS_CTRL_1:
 895        case RT5659_HP_DECROSS_CTRL_2:
 896        case RT5659_HP_DECROSS_CTRL_3:
 897        case RT5659_HP_DECROSS_CTRL_4:
 898        case RT5659_HP_IMP_SENS_CTRL_1:
 899        case RT5659_HP_IMP_SENS_CTRL_2:
 900        case RT5659_HP_IMP_SENS_CTRL_3:
 901        case RT5659_HP_IMP_SENS_CTRL_4:
 902        case RT5659_HP_IMP_SENS_MAP_1:
 903        case RT5659_HP_IMP_SENS_MAP_2:
 904        case RT5659_HP_IMP_SENS_MAP_3:
 905        case RT5659_HP_IMP_SENS_MAP_4:
 906        case RT5659_HP_IMP_SENS_MAP_5:
 907        case RT5659_HP_IMP_SENS_MAP_6:
 908        case RT5659_HP_IMP_SENS_MAP_7:
 909        case RT5659_HP_IMP_SENS_MAP_8:
 910        case RT5659_HP_LOGIC_CTRL_1:
 911        case RT5659_HP_LOGIC_CTRL_2:
 912        case RT5659_HP_CALIB_CTRL_1:
 913        case RT5659_HP_CALIB_CTRL_2:
 914        case RT5659_HP_CALIB_CTRL_3:
 915        case RT5659_HP_CALIB_CTRL_4:
 916        case RT5659_HP_CALIB_CTRL_5:
 917        case RT5659_HP_CALIB_CTRL_6:
 918        case RT5659_HP_CALIB_CTRL_7:
 919        case RT5659_HP_CALIB_CTRL_9:
 920        case RT5659_HP_CALIB_CTRL_10:
 921        case RT5659_HP_CALIB_CTRL_11:
 922        case RT5659_HP_CALIB_STA_1:
 923        case RT5659_HP_CALIB_STA_2:
 924        case RT5659_HP_CALIB_STA_3:
 925        case RT5659_HP_CALIB_STA_4:
 926        case RT5659_HP_CALIB_STA_5:
 927        case RT5659_HP_CALIB_STA_6:
 928        case RT5659_HP_CALIB_STA_7:
 929        case RT5659_HP_CALIB_STA_8:
 930        case RT5659_HP_CALIB_STA_9:
 931        case RT5659_MONO_AMP_CALIB_CTRL_1:
 932        case RT5659_MONO_AMP_CALIB_CTRL_2:
 933        case RT5659_MONO_AMP_CALIB_CTRL_3:
 934        case RT5659_MONO_AMP_CALIB_CTRL_4:
 935        case RT5659_MONO_AMP_CALIB_CTRL_5:
 936        case RT5659_MONO_AMP_CALIB_STA_1:
 937        case RT5659_MONO_AMP_CALIB_STA_2:
 938        case RT5659_MONO_AMP_CALIB_STA_3:
 939        case RT5659_MONO_AMP_CALIB_STA_4:
 940        case RT5659_SPK_PWR_LMT_CTRL_1:
 941        case RT5659_SPK_PWR_LMT_CTRL_2:
 942        case RT5659_SPK_PWR_LMT_CTRL_3:
 943        case RT5659_SPK_PWR_LMT_STA_1:
 944        case RT5659_SPK_PWR_LMT_STA_2:
 945        case RT5659_SPK_PWR_LMT_STA_3:
 946        case RT5659_SPK_PWR_LMT_STA_4:
 947        case RT5659_SPK_PWR_LMT_STA_5:
 948        case RT5659_SPK_PWR_LMT_STA_6:
 949        case RT5659_FLEX_SPK_BST_CTRL_1:
 950        case RT5659_FLEX_SPK_BST_CTRL_2:
 951        case RT5659_FLEX_SPK_BST_CTRL_3:
 952        case RT5659_FLEX_SPK_BST_CTRL_4:
 953        case RT5659_SPK_EX_LMT_CTRL_1:
 954        case RT5659_SPK_EX_LMT_CTRL_2:
 955        case RT5659_SPK_EX_LMT_CTRL_3:
 956        case RT5659_SPK_EX_LMT_CTRL_4:
 957        case RT5659_SPK_EX_LMT_CTRL_5:
 958        case RT5659_SPK_EX_LMT_CTRL_6:
 959        case RT5659_SPK_EX_LMT_CTRL_7:
 960        case RT5659_ADJ_HPF_CTRL_1:
 961        case RT5659_ADJ_HPF_CTRL_2:
 962        case RT5659_SPK_DC_CAILB_CTRL_1:
 963        case RT5659_SPK_DC_CAILB_CTRL_2:
 964        case RT5659_SPK_DC_CAILB_CTRL_3:
 965        case RT5659_SPK_DC_CAILB_CTRL_4:
 966        case RT5659_SPK_DC_CAILB_CTRL_5:
 967        case RT5659_SPK_DC_CAILB_STA_1:
 968        case RT5659_SPK_DC_CAILB_STA_2:
 969        case RT5659_SPK_DC_CAILB_STA_3:
 970        case RT5659_SPK_DC_CAILB_STA_4:
 971        case RT5659_SPK_DC_CAILB_STA_5:
 972        case RT5659_SPK_DC_CAILB_STA_6:
 973        case RT5659_SPK_DC_CAILB_STA_7:
 974        case RT5659_SPK_DC_CAILB_STA_8:
 975        case RT5659_SPK_DC_CAILB_STA_9:
 976        case RT5659_SPK_DC_CAILB_STA_10:
 977        case RT5659_SPK_VDD_STA_1:
 978        case RT5659_SPK_VDD_STA_2:
 979        case RT5659_SPK_DC_DET_CTRL_1:
 980        case RT5659_SPK_DC_DET_CTRL_2:
 981        case RT5659_SPK_DC_DET_CTRL_3:
 982        case RT5659_PURE_DC_DET_CTRL_1:
 983        case RT5659_PURE_DC_DET_CTRL_2:
 984        case RT5659_DUMMY_4:
 985        case RT5659_DUMMY_5:
 986        case RT5659_DUMMY_6:
 987        case RT5659_DRC1_CTRL_1:
 988        case RT5659_DRC1_CTRL_2:
 989        case RT5659_DRC1_CTRL_3:
 990        case RT5659_DRC1_CTRL_4:
 991        case RT5659_DRC1_CTRL_5:
 992        case RT5659_DRC1_CTRL_6:
 993        case RT5659_DRC1_HARD_LMT_CTRL_1:
 994        case RT5659_DRC1_HARD_LMT_CTRL_2:
 995        case RT5659_DRC2_CTRL_1:
 996        case RT5659_DRC2_CTRL_2:
 997        case RT5659_DRC2_CTRL_3:
 998        case RT5659_DRC2_CTRL_4:
 999        case RT5659_DRC2_CTRL_5:
1000        case RT5659_DRC2_CTRL_6:
1001        case RT5659_DRC2_HARD_LMT_CTRL_1:
1002        case RT5659_DRC2_HARD_LMT_CTRL_2:
1003        case RT5659_DRC1_PRIV_1:
1004        case RT5659_DRC1_PRIV_2:
1005        case RT5659_DRC1_PRIV_3:
1006        case RT5659_DRC1_PRIV_4:
1007        case RT5659_DRC1_PRIV_5:
1008        case RT5659_DRC1_PRIV_6:
1009        case RT5659_DRC1_PRIV_7:
1010        case RT5659_DRC2_PRIV_1:
1011        case RT5659_DRC2_PRIV_2:
1012        case RT5659_DRC2_PRIV_3:
1013        case RT5659_DRC2_PRIV_4:
1014        case RT5659_DRC2_PRIV_5:
1015        case RT5659_DRC2_PRIV_6:
1016        case RT5659_DRC2_PRIV_7:
1017        case RT5659_MULTI_DRC_CTRL:
1018        case RT5659_CROSS_OVER_1:
1019        case RT5659_CROSS_OVER_2:
1020        case RT5659_CROSS_OVER_3:
1021        case RT5659_CROSS_OVER_4:
1022        case RT5659_CROSS_OVER_5:
1023        case RT5659_CROSS_OVER_6:
1024        case RT5659_CROSS_OVER_7:
1025        case RT5659_CROSS_OVER_8:
1026        case RT5659_CROSS_OVER_9:
1027        case RT5659_CROSS_OVER_10:
1028        case RT5659_ALC_PGA_CTRL_1:
1029        case RT5659_ALC_PGA_CTRL_2:
1030        case RT5659_ALC_PGA_CTRL_3:
1031        case RT5659_ALC_PGA_CTRL_4:
1032        case RT5659_ALC_PGA_CTRL_5:
1033        case RT5659_ALC_PGA_CTRL_6:
1034        case RT5659_ALC_PGA_CTRL_7:
1035        case RT5659_ALC_PGA_CTRL_8:
1036        case RT5659_ALC_PGA_STA_1:
1037        case RT5659_ALC_PGA_STA_2:
1038        case RT5659_ALC_PGA_STA_3:
1039        case RT5659_DAC_L_EQ_PRE_VOL:
1040        case RT5659_DAC_R_EQ_PRE_VOL:
1041        case RT5659_DAC_L_EQ_POST_VOL:
1042        case RT5659_DAC_R_EQ_POST_VOL:
1043        case RT5659_DAC_L_EQ_LPF1_A1:
1044        case RT5659_DAC_L_EQ_LPF1_H0:
1045        case RT5659_DAC_R_EQ_LPF1_A1:
1046        case RT5659_DAC_R_EQ_LPF1_H0:
1047        case RT5659_DAC_L_EQ_BPF2_A1:
1048        case RT5659_DAC_L_EQ_BPF2_A2:
1049        case RT5659_DAC_L_EQ_BPF2_H0:
1050        case RT5659_DAC_R_EQ_BPF2_A1:
1051        case RT5659_DAC_R_EQ_BPF2_A2:
1052        case RT5659_DAC_R_EQ_BPF2_H0:
1053        case RT5659_DAC_L_EQ_BPF3_A1:
1054        case RT5659_DAC_L_EQ_BPF3_A2:
1055        case RT5659_DAC_L_EQ_BPF3_H0:
1056        case RT5659_DAC_R_EQ_BPF3_A1:
1057        case RT5659_DAC_R_EQ_BPF3_A2:
1058        case RT5659_DAC_R_EQ_BPF3_H0:
1059        case RT5659_DAC_L_EQ_BPF4_A1:
1060        case RT5659_DAC_L_EQ_BPF4_A2:
1061        case RT5659_DAC_L_EQ_BPF4_H0:
1062        case RT5659_DAC_R_EQ_BPF4_A1:
1063        case RT5659_DAC_R_EQ_BPF4_A2:
1064        case RT5659_DAC_R_EQ_BPF4_H0:
1065        case RT5659_DAC_L_EQ_HPF1_A1:
1066        case RT5659_DAC_L_EQ_HPF1_H0:
1067        case RT5659_DAC_R_EQ_HPF1_A1:
1068        case RT5659_DAC_R_EQ_HPF1_H0:
1069        case RT5659_DAC_L_EQ_HPF2_A1:
1070        case RT5659_DAC_L_EQ_HPF2_A2:
1071        case RT5659_DAC_L_EQ_HPF2_H0:
1072        case RT5659_DAC_R_EQ_HPF2_A1:
1073        case RT5659_DAC_R_EQ_HPF2_A2:
1074        case RT5659_DAC_R_EQ_HPF2_H0:
1075        case RT5659_DAC_L_BI_EQ_BPF1_H0_1:
1076        case RT5659_DAC_L_BI_EQ_BPF1_H0_2:
1077        case RT5659_DAC_L_BI_EQ_BPF1_B1_1:
1078        case RT5659_DAC_L_BI_EQ_BPF1_B1_2:
1079        case RT5659_DAC_L_BI_EQ_BPF1_B2_1:
1080        case RT5659_DAC_L_BI_EQ_BPF1_B2_2:
1081        case RT5659_DAC_L_BI_EQ_BPF1_A1_1:
1082        case RT5659_DAC_L_BI_EQ_BPF1_A1_2:
1083        case RT5659_DAC_L_BI_EQ_BPF1_A2_1:
1084        case RT5659_DAC_L_BI_EQ_BPF1_A2_2:
1085        case RT5659_DAC_R_BI_EQ_BPF1_H0_1:
1086        case RT5659_DAC_R_BI_EQ_BPF1_H0_2:
1087        case RT5659_DAC_R_BI_EQ_BPF1_B1_1:
1088        case RT5659_DAC_R_BI_EQ_BPF1_B1_2:
1089        case RT5659_DAC_R_BI_EQ_BPF1_B2_1:
1090        case RT5659_DAC_R_BI_EQ_BPF1_B2_2:
1091        case RT5659_DAC_R_BI_EQ_BPF1_A1_1:
1092        case RT5659_DAC_R_BI_EQ_BPF1_A1_2:
1093        case RT5659_DAC_R_BI_EQ_BPF1_A2_1:
1094        case RT5659_DAC_R_BI_EQ_BPF1_A2_2:
1095        case RT5659_ADC_L_EQ_LPF1_A1:
1096        case RT5659_ADC_R_EQ_LPF1_A1:
1097        case RT5659_ADC_L_EQ_LPF1_H0:
1098        case RT5659_ADC_R_EQ_LPF1_H0:
1099        case RT5659_ADC_L_EQ_BPF1_A1:
1100        case RT5659_ADC_R_EQ_BPF1_A1:
1101        case RT5659_ADC_L_EQ_BPF1_A2:
1102        case RT5659_ADC_R_EQ_BPF1_A2:
1103        case RT5659_ADC_L_EQ_BPF1_H0:
1104        case RT5659_ADC_R_EQ_BPF1_H0:
1105        case RT5659_ADC_L_EQ_BPF2_A1:
1106        case RT5659_ADC_R_EQ_BPF2_A1:
1107        case RT5659_ADC_L_EQ_BPF2_A2:
1108        case RT5659_ADC_R_EQ_BPF2_A2:
1109        case RT5659_ADC_L_EQ_BPF2_H0:
1110        case RT5659_ADC_R_EQ_BPF2_H0:
1111        case RT5659_ADC_L_EQ_BPF3_A1:
1112        case RT5659_ADC_R_EQ_BPF3_A1:
1113        case RT5659_ADC_L_EQ_BPF3_A2:
1114        case RT5659_ADC_R_EQ_BPF3_A2:
1115        case RT5659_ADC_L_EQ_BPF3_H0:
1116        case RT5659_ADC_R_EQ_BPF3_H0:
1117        case RT5659_ADC_L_EQ_BPF4_A1:
1118        case RT5659_ADC_R_EQ_BPF4_A1:
1119        case RT5659_ADC_L_EQ_BPF4_A2:
1120        case RT5659_ADC_R_EQ_BPF4_A2:
1121        case RT5659_ADC_L_EQ_BPF4_H0:
1122        case RT5659_ADC_R_EQ_BPF4_H0:
1123        case RT5659_ADC_L_EQ_HPF1_A1:
1124        case RT5659_ADC_R_EQ_HPF1_A1:
1125        case RT5659_ADC_L_EQ_HPF1_H0:
1126        case RT5659_ADC_R_EQ_HPF1_H0:
1127        case RT5659_ADC_L_EQ_PRE_VOL:
1128        case RT5659_ADC_R_EQ_PRE_VOL:
1129        case RT5659_ADC_L_EQ_POST_VOL:
1130        case RT5659_ADC_R_EQ_POST_VOL:
1131                return true;
1132        default:
1133                return false;
1134        }
1135}
1136
1137static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2325, 75, 0);
1138static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
1139static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
1140static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
1141static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
1142static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
1143static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
1144
1145/* Interface data select */
1146static const char * const rt5659_data_select[] = {
1147        "L/R", "R/L", "L/L", "R/R"
1148};
1149
1150static SOC_ENUM_SINGLE_DECL(rt5659_if1_01_adc_enum,
1151        RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT01_SFT, rt5659_data_select);
1152
1153static SOC_ENUM_SINGLE_DECL(rt5659_if1_23_adc_enum,
1154        RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT23_SFT, rt5659_data_select);
1155
1156static SOC_ENUM_SINGLE_DECL(rt5659_if1_45_adc_enum,
1157        RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT45_SFT, rt5659_data_select);
1158
1159static SOC_ENUM_SINGLE_DECL(rt5659_if1_67_adc_enum,
1160        RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT67_SFT, rt5659_data_select);
1161
1162static SOC_ENUM_SINGLE_DECL(rt5659_if2_dac_enum,
1163        RT5659_DIG_INF23_DATA, RT5659_IF2_DAC_SEL_SFT, rt5659_data_select);
1164
1165static SOC_ENUM_SINGLE_DECL(rt5659_if2_adc_enum,
1166        RT5659_DIG_INF23_DATA, RT5659_IF2_ADC_SEL_SFT, rt5659_data_select);
1167
1168static SOC_ENUM_SINGLE_DECL(rt5659_if3_dac_enum,
1169        RT5659_DIG_INF23_DATA, RT5659_IF3_DAC_SEL_SFT, rt5659_data_select);
1170
1171static SOC_ENUM_SINGLE_DECL(rt5659_if3_adc_enum,
1172        RT5659_DIG_INF23_DATA, RT5659_IF3_ADC_SEL_SFT, rt5659_data_select);
1173
1174static const struct snd_kcontrol_new rt5659_if1_01_adc_swap_mux =
1175        SOC_DAPM_ENUM("IF1 01 ADC Swap Source", rt5659_if1_01_adc_enum);
1176
1177static const struct snd_kcontrol_new rt5659_if1_23_adc_swap_mux =
1178        SOC_DAPM_ENUM("IF1 23 ADC1 Swap Source", rt5659_if1_23_adc_enum);
1179
1180static const struct snd_kcontrol_new rt5659_if1_45_adc_swap_mux =
1181        SOC_DAPM_ENUM("IF1 45 ADC1 Swap Source", rt5659_if1_45_adc_enum);
1182
1183static const struct snd_kcontrol_new rt5659_if1_67_adc_swap_mux =
1184        SOC_DAPM_ENUM("IF1 67 ADC1 Swap Source", rt5659_if1_67_adc_enum);
1185
1186static const struct snd_kcontrol_new rt5659_if2_dac_swap_mux =
1187        SOC_DAPM_ENUM("IF2 DAC Swap Source", rt5659_if2_dac_enum);
1188
1189static const struct snd_kcontrol_new rt5659_if2_adc_swap_mux =
1190        SOC_DAPM_ENUM("IF2 ADC Swap Source", rt5659_if2_adc_enum);
1191
1192static const struct snd_kcontrol_new rt5659_if3_dac_swap_mux =
1193        SOC_DAPM_ENUM("IF3 DAC Swap Source", rt5659_if3_dac_enum);
1194
1195static const struct snd_kcontrol_new rt5659_if3_adc_swap_mux =
1196        SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5659_if3_adc_enum);
1197
1198static int rt5659_hp_vol_put(struct snd_kcontrol *kcontrol,
1199                struct snd_ctl_elem_value *ucontrol)
1200{
1201        struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1202        int ret = snd_soc_put_volsw(kcontrol, ucontrol);
1203
1204        if (snd_soc_component_read(component, RT5659_STO_NG2_CTRL_1) & RT5659_NG2_EN) {
1205                snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1206                        RT5659_NG2_EN_MASK, RT5659_NG2_DIS);
1207                snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1208                        RT5659_NG2_EN_MASK, RT5659_NG2_EN);
1209        }
1210
1211        return ret;
1212}
1213
1214static void rt5659_enable_push_button_irq(struct snd_soc_component *component,
1215        bool enable)
1216{
1217        struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1218
1219        if (enable) {
1220                snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, 0x000b);
1221
1222                /* MICBIAS1 and Mic Det Power for button detect*/
1223                snd_soc_dapm_force_enable_pin(dapm, "MICBIAS1");
1224                snd_soc_dapm_force_enable_pin(dapm,
1225                        "Mic Det Power");
1226                snd_soc_dapm_sync(dapm);
1227
1228                snd_soc_component_update_bits(component, RT5659_PWR_ANLG_2,
1229                        RT5659_PWR_MB1, RT5659_PWR_MB1);
1230                snd_soc_component_update_bits(component, RT5659_PWR_VOL,
1231                        RT5659_PWR_MIC_DET, RT5659_PWR_MIC_DET);
1232
1233                snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1234                                RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
1235                snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1236                                RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
1237        } else {
1238                snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1239                                RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_DIS);
1240                snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1241                                RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_DIS);
1242                /* MICBIAS1 and Mic Det Power for button detect*/
1243                snd_soc_dapm_disable_pin(dapm, "MICBIAS1");
1244                snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1245                snd_soc_dapm_sync(dapm);
1246        }
1247}
1248
1249/**
1250 * rt5659_headset_detect - Detect headset.
1251 * @component: SoC audio component device.
1252 * @jack_insert: Jack insert or not.
1253 *
1254 * Detect whether is headset or not when jack inserted.
1255 *
1256 * Returns detect status.
1257 */
1258
1259static int rt5659_headset_detect(struct snd_soc_component *component, int jack_insert)
1260{
1261        struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1262        int val, i = 0, sleep_time[5] = {300, 150, 100, 50, 30};
1263        int reg_63;
1264
1265        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1266
1267        if (jack_insert) {
1268                snd_soc_dapm_force_enable_pin(dapm,
1269                        "Mic Det Power");
1270                snd_soc_dapm_sync(dapm);
1271                reg_63 = snd_soc_component_read(component, RT5659_PWR_ANLG_1);
1272
1273                snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1274                        RT5659_PWR_VREF2 | RT5659_PWR_MB,
1275                        RT5659_PWR_VREF2 | RT5659_PWR_MB);
1276                msleep(20);
1277                snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1278                        RT5659_PWR_FV2, RT5659_PWR_FV2);
1279
1280                snd_soc_component_write(component, RT5659_EJD_CTRL_2, 0x4160);
1281                snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1282                        0x20, 0x0);
1283                msleep(20);
1284                snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1285                        0x20, 0x20);
1286
1287                while (i < 5) {
1288                        msleep(sleep_time[i]);
1289                        val = snd_soc_component_read(component, RT5659_EJD_CTRL_2) & 0x0003;
1290                        i++;
1291                        if (val == 0x1 || val == 0x2 || val == 0x3)
1292                                break;
1293                }
1294
1295                switch (val) {
1296                case 1:
1297                        rt5659->jack_type = SND_JACK_HEADSET;
1298                        rt5659_enable_push_button_irq(component, true);
1299                        break;
1300                default:
1301                        snd_soc_component_write(component, RT5659_PWR_ANLG_1, reg_63);
1302                        rt5659->jack_type = SND_JACK_HEADPHONE;
1303                        snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1304                        snd_soc_dapm_sync(dapm);
1305                        break;
1306                }
1307        } else {
1308                snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1309                snd_soc_dapm_sync(dapm);
1310                if (rt5659->jack_type == SND_JACK_HEADSET)
1311                        rt5659_enable_push_button_irq(component, false);
1312                rt5659->jack_type = 0;
1313        }
1314
1315        dev_dbg(component->dev, "jack_type = %d\n", rt5659->jack_type);
1316        return rt5659->jack_type;
1317}
1318
1319static int rt5659_button_detect(struct snd_soc_component *component)
1320{
1321        int btn_type, val;
1322
1323        val = snd_soc_component_read(component, RT5659_4BTN_IL_CMD_1);
1324        btn_type = val & 0xfff0;
1325        snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, val);
1326
1327        return btn_type;
1328}
1329
1330static irqreturn_t rt5659_irq(int irq, void *data)
1331{
1332        struct rt5659_priv *rt5659 = data;
1333
1334        queue_delayed_work(system_power_efficient_wq,
1335                           &rt5659->jack_detect_work, msecs_to_jiffies(250));
1336
1337        return IRQ_HANDLED;
1338}
1339
1340int rt5659_set_jack_detect(struct snd_soc_component *component,
1341        struct snd_soc_jack *hs_jack)
1342{
1343        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1344
1345        rt5659->hs_jack = hs_jack;
1346
1347        rt5659_irq(0, rt5659);
1348
1349        return 0;
1350}
1351EXPORT_SYMBOL_GPL(rt5659_set_jack_detect);
1352
1353static void rt5659_jack_detect_work(struct work_struct *work)
1354{
1355        struct rt5659_priv *rt5659 =
1356                container_of(work, struct rt5659_priv, jack_detect_work.work);
1357        int val, btn_type, report = 0;
1358
1359        if (!rt5659->component)
1360                return;
1361
1362        val = snd_soc_component_read(rt5659->component, RT5659_INT_ST_1) & 0x0080;
1363        if (!val) {
1364                /* jack in */
1365                if (rt5659->jack_type == 0) {
1366                        /* jack was out, report jack type */
1367                        report = rt5659_headset_detect(rt5659->component, 1);
1368                } else {
1369                        /* jack is already in, report button event */
1370                        report = SND_JACK_HEADSET;
1371                        btn_type = rt5659_button_detect(rt5659->component);
1372                        /**
1373                         * rt5659 can report three kinds of button behavior,
1374                         * one click, double click and hold. However,
1375                         * currently we will report button pressed/released
1376                         * event. So all the three button behaviors are
1377                         * treated as button pressed.
1378                         */
1379                        switch (btn_type) {
1380                        case 0x8000:
1381                        case 0x4000:
1382                        case 0x2000:
1383                                report |= SND_JACK_BTN_0;
1384                                break;
1385                        case 0x1000:
1386                        case 0x0800:
1387                        case 0x0400:
1388                                report |= SND_JACK_BTN_1;
1389                                break;
1390                        case 0x0200:
1391                        case 0x0100:
1392                        case 0x0080:
1393                                report |= SND_JACK_BTN_2;
1394                                break;
1395                        case 0x0040:
1396                        case 0x0020:
1397                        case 0x0010:
1398                                report |= SND_JACK_BTN_3;
1399                                break;
1400                        case 0x0000: /* unpressed */
1401                                break;
1402                        default:
1403                                btn_type = 0;
1404                                dev_err(rt5659->component->dev,
1405                                        "Unexpected button code 0x%04x\n",
1406                                        btn_type);
1407                                break;
1408                        }
1409
1410                        /* button release or spurious interrput*/
1411                        if (btn_type == 0)
1412                                report =  rt5659->jack_type;
1413                }
1414        } else {
1415                /* jack out */
1416                report = rt5659_headset_detect(rt5659->component, 0);
1417        }
1418
1419        snd_soc_jack_report(rt5659->hs_jack, report, SND_JACK_HEADSET |
1420                            SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1421                            SND_JACK_BTN_2 | SND_JACK_BTN_3);
1422}
1423
1424static void rt5659_jack_detect_intel_hd_header(struct work_struct *work)
1425{
1426        struct rt5659_priv *rt5659 =
1427                container_of(work, struct rt5659_priv, jack_detect_work.work);
1428        unsigned int value;
1429        bool hp_flag, mic_flag;
1430
1431        if (!rt5659->hs_jack)
1432                return;
1433
1434        /* headphone jack */
1435        regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
1436        hp_flag = (!(value & 0x8)) ? true : false;
1437
1438        if (hp_flag != rt5659->hda_hp_plugged) {
1439                rt5659->hda_hp_plugged = hp_flag;
1440
1441                if (hp_flag) {
1442                        regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1443                                0x10, 0x0);
1444                        rt5659->jack_type |= SND_JACK_HEADPHONE;
1445                } else {
1446                        regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1447                                0x10, 0x10);
1448                        rt5659->jack_type = rt5659->jack_type &
1449                                (~SND_JACK_HEADPHONE);
1450                }
1451
1452                snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1453                        SND_JACK_HEADPHONE);
1454        }
1455
1456        /* mic jack */
1457        regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
1458        regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
1459        mic_flag = (value & 0x2000) ? true : false;
1460
1461        if (mic_flag != rt5659->hda_mic_plugged) {
1462                rt5659->hda_mic_plugged = mic_flag;
1463                if (mic_flag) {
1464                        regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1465                                0x2, 0x2);
1466                        rt5659->jack_type |= SND_JACK_MICROPHONE;
1467                } else {
1468                        regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1469                                0x2, 0x0);
1470                        rt5659->jack_type = rt5659->jack_type
1471                                & (~SND_JACK_MICROPHONE);
1472                }
1473
1474                snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1475                        SND_JACK_MICROPHONE);
1476        }
1477}
1478
1479static const struct snd_kcontrol_new rt5659_snd_controls[] = {
1480        /* Speaker Output Volume */
1481        SOC_DOUBLE_TLV("Speaker Playback Volume", RT5659_SPO_VOL,
1482                RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1483
1484        /* Headphone Output Volume */
1485        SOC_DOUBLE_R_EXT_TLV("Headphone Playback Volume", RT5659_HPL_GAIN,
1486                RT5659_HPR_GAIN, RT5659_G_HP_SFT, 31, 1, snd_soc_get_volsw,
1487                rt5659_hp_vol_put, hp_vol_tlv),
1488
1489        /* Mono Output Volume */
1490        SOC_SINGLE_TLV("Mono Playback Volume", RT5659_MONO_OUT,
1491                RT5659_L_VOL_SFT, 39, 1, out_vol_tlv),
1492
1493        /* Output Volume */
1494        SOC_DOUBLE_TLV("OUT Playback Volume", RT5659_LOUT,
1495                RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1496
1497        /* DAC Digital Volume */
1498        SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5659_DAC1_DIG_VOL,
1499                RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1500        SOC_DOUBLE("DAC1 Playback Switch", RT5659_AD_DA_MIXER,
1501                RT5659_M_DAC1_L_SFT, RT5659_M_DAC1_R_SFT, 1, 1),
1502
1503        SOC_DOUBLE_TLV("DAC2 Playback Volume", RT5659_DAC2_DIG_VOL,
1504                RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1505        SOC_DOUBLE("DAC2 Playback Switch", RT5659_DAC_CTRL,
1506                RT5659_M_DAC2_L_VOL_SFT, RT5659_M_DAC2_R_VOL_SFT, 1, 1),
1507
1508        /* IN1/IN2/IN3/IN4 Volume */
1509        SOC_SINGLE_TLV("IN1 Boost Volume", RT5659_IN1_IN2,
1510                RT5659_BST1_SFT, 69, 0, in_bst_tlv),
1511        SOC_SINGLE_TLV("IN2 Boost Volume", RT5659_IN1_IN2,
1512                RT5659_BST2_SFT, 69, 0, in_bst_tlv),
1513        SOC_SINGLE_TLV("IN3 Boost Volume", RT5659_IN3_IN4,
1514                RT5659_BST3_SFT, 69, 0, in_bst_tlv),
1515        SOC_SINGLE_TLV("IN4 Boost Volume", RT5659_IN3_IN4,
1516                RT5659_BST4_SFT, 69, 0, in_bst_tlv),
1517
1518        /* INL/INR Volume Control */
1519        SOC_DOUBLE_TLV("IN Capture Volume", RT5659_INL1_INR1_VOL,
1520                RT5659_INL_VOL_SFT, RT5659_INR_VOL_SFT, 31, 1, in_vol_tlv),
1521
1522        /* ADC Digital Volume Control */
1523        SOC_DOUBLE("STO1 ADC Capture Switch", RT5659_STO1_ADC_DIG_VOL,
1524                RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1525        SOC_DOUBLE_TLV("STO1 ADC Capture Volume", RT5659_STO1_ADC_DIG_VOL,
1526                RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1527        SOC_DOUBLE("Mono ADC Capture Switch", RT5659_MONO_ADC_DIG_VOL,
1528                RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1529        SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5659_MONO_ADC_DIG_VOL,
1530                RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1531        SOC_DOUBLE("STO2 ADC Capture Switch", RT5659_STO2_ADC_DIG_VOL,
1532                RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1533        SOC_DOUBLE_TLV("STO2 ADC Capture Volume", RT5659_STO2_ADC_DIG_VOL,
1534                RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1535
1536        /* ADC Boost Volume Control */
1537        SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5659_STO1_BOOST,
1538                RT5659_STO1_ADC_L_BST_SFT, RT5659_STO1_ADC_R_BST_SFT,
1539                3, 0, adc_bst_tlv),
1540
1541        SOC_DOUBLE_TLV("Mono ADC Boost Gain Volume", RT5659_MONO_BOOST,
1542                RT5659_MONO_ADC_L_BST_SFT, RT5659_MONO_ADC_R_BST_SFT,
1543                3, 0, adc_bst_tlv),
1544
1545        SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5659_STO2_BOOST,
1546                RT5659_STO2_ADC_L_BST_SFT, RT5659_STO2_ADC_R_BST_SFT,
1547                3, 0, adc_bst_tlv),
1548
1549        SOC_SINGLE("DAC IF1 DAC1 L Data Switch", RT5659_TDM_CTRL_4, 12, 7, 0),
1550        SOC_SINGLE("DAC IF1 DAC1 R Data Switch", RT5659_TDM_CTRL_4, 8, 7, 0),
1551        SOC_SINGLE("DAC IF1 DAC2 L Data Switch", RT5659_TDM_CTRL_4, 4, 7, 0),
1552        SOC_SINGLE("DAC IF1 DAC2 R Data Switch", RT5659_TDM_CTRL_4, 0, 7, 0),
1553};
1554
1555/**
1556 * set_dmic_clk - Set parameter of dmic.
1557 *
1558 * @w: DAPM widget.
1559 * @kcontrol: The kcontrol of this widget.
1560 * @event: Event id.
1561 *
1562 * Choose dmic clock between 1MHz and 3MHz.
1563 * It is better for clock to approximate 3MHz.
1564 */
1565static int set_dmic_clk(struct snd_soc_dapm_widget *w,
1566        struct snd_kcontrol *kcontrol, int event)
1567{
1568        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1569        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1570        int pd, idx;
1571
1572        pd = rl6231_get_pre_div(rt5659->regmap,
1573                RT5659_ADDA_CLK_1, RT5659_I2S_PD1_SFT);
1574        idx = rl6231_calc_dmic_clk(rt5659->sysclk / pd);
1575
1576        if (idx < 0)
1577                dev_err(component->dev, "Failed to set DMIC clock\n");
1578        else {
1579                snd_soc_component_update_bits(component, RT5659_DMIC_CTRL_1,
1580                        RT5659_DMIC_CLK_MASK, idx << RT5659_DMIC_CLK_SFT);
1581        }
1582        return idx;
1583}
1584
1585static int set_adc1_clk(struct snd_soc_dapm_widget *w,
1586        struct snd_kcontrol *kcontrol, int event)
1587{
1588        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1589
1590        switch (event) {
1591        case SND_SOC_DAPM_POST_PMU:
1592                snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1593                        RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK,
1594                        RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK);
1595                break;
1596
1597        case SND_SOC_DAPM_PRE_PMD:
1598                snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1599                        RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, 0);
1600                break;
1601
1602        default:
1603                return 0;
1604        }
1605
1606        return 0;
1607
1608}
1609
1610static int set_adc2_clk(struct snd_soc_dapm_widget *w,
1611        struct snd_kcontrol *kcontrol, int event)
1612{
1613        struct snd_soc_component *component =
1614                snd_soc_dapm_to_component(w->dapm);
1615
1616        switch (event) {
1617        case SND_SOC_DAPM_POST_PMU:
1618                snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1619                        RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK,
1620                        RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK);
1621                break;
1622
1623        case SND_SOC_DAPM_PRE_PMD:
1624                snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1625                        RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, 0);
1626                break;
1627
1628        default:
1629                return 0;
1630        }
1631
1632        return 0;
1633
1634}
1635
1636static int rt5659_charge_pump_event(struct snd_soc_dapm_widget *w,
1637        struct snd_kcontrol *kcontrol, int event)
1638{
1639        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1640
1641        switch (event) {
1642        case SND_SOC_DAPM_PRE_PMU:
1643                /* Depop */
1644                snd_soc_component_write(component, RT5659_DEPOP_1, 0x0009);
1645                break;
1646        case SND_SOC_DAPM_POST_PMD:
1647                snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
1648                break;
1649        default:
1650                return 0;
1651        }
1652
1653        return 0;
1654}
1655
1656static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *w,
1657                         struct snd_soc_dapm_widget *sink)
1658{
1659        unsigned int val;
1660        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1661
1662        val = snd_soc_component_read(component, RT5659_GLB_CLK);
1663        val &= RT5659_SCLK_SRC_MASK;
1664        if (val == RT5659_SCLK_SRC_PLL1)
1665                return 1;
1666        else
1667                return 0;
1668}
1669
1670static int is_using_asrc(struct snd_soc_dapm_widget *w,
1671                         struct snd_soc_dapm_widget *sink)
1672{
1673        unsigned int reg, shift, val;
1674        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1675
1676        switch (w->shift) {
1677        case RT5659_ADC_MONO_R_ASRC_SFT:
1678                reg = RT5659_ASRC_3;
1679                shift = RT5659_AD_MONO_R_T_SFT;
1680                break;
1681        case RT5659_ADC_MONO_L_ASRC_SFT:
1682                reg = RT5659_ASRC_3;
1683                shift = RT5659_AD_MONO_L_T_SFT;
1684                break;
1685        case RT5659_ADC_STO1_ASRC_SFT:
1686                reg = RT5659_ASRC_2;
1687                shift = RT5659_AD_STO1_T_SFT;
1688                break;
1689        case RT5659_DAC_MONO_R_ASRC_SFT:
1690                reg = RT5659_ASRC_2;
1691                shift = RT5659_DA_MONO_R_T_SFT;
1692                break;
1693        case RT5659_DAC_MONO_L_ASRC_SFT:
1694                reg = RT5659_ASRC_2;
1695                shift = RT5659_DA_MONO_L_T_SFT;
1696                break;
1697        case RT5659_DAC_STO_ASRC_SFT:
1698                reg = RT5659_ASRC_2;
1699                shift = RT5659_DA_STO_T_SFT;
1700                break;
1701        default:
1702                return 0;
1703        }
1704
1705        val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
1706        switch (val) {
1707        case 1:
1708        case 2:
1709        case 3:
1710                /* I2S_Pre_Div1 should be 1 in asrc mode */
1711                snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
1712                        RT5659_I2S_PD1_MASK, RT5659_I2S_PD1_2);
1713                return 1;
1714        default:
1715                return 0;
1716        }
1717
1718}
1719
1720/* Digital Mixer */
1721static const struct snd_kcontrol_new rt5659_sto1_adc_l_mix[] = {
1722        SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1723                        RT5659_M_STO1_ADC_L1_SFT, 1, 1),
1724        SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1725                        RT5659_M_STO1_ADC_L2_SFT, 1, 1),
1726};
1727
1728static const struct snd_kcontrol_new rt5659_sto1_adc_r_mix[] = {
1729        SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1730                        RT5659_M_STO1_ADC_R1_SFT, 1, 1),
1731        SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1732                        RT5659_M_STO1_ADC_R2_SFT, 1, 1),
1733};
1734
1735static const struct snd_kcontrol_new rt5659_mono_adc_l_mix[] = {
1736        SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1737                        RT5659_M_MONO_ADC_L1_SFT, 1, 1),
1738        SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1739                        RT5659_M_MONO_ADC_L2_SFT, 1, 1),
1740};
1741
1742static const struct snd_kcontrol_new rt5659_mono_adc_r_mix[] = {
1743        SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1744                        RT5659_M_MONO_ADC_R1_SFT, 1, 1),
1745        SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1746                        RT5659_M_MONO_ADC_R2_SFT, 1, 1),
1747};
1748
1749static const struct snd_kcontrol_new rt5659_dac_l_mix[] = {
1750        SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1751                        RT5659_M_ADCMIX_L_SFT, 1, 1),
1752        SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1753                        RT5659_M_DAC1_L_SFT, 1, 1),
1754};
1755
1756static const struct snd_kcontrol_new rt5659_dac_r_mix[] = {
1757        SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1758                        RT5659_M_ADCMIX_R_SFT, 1, 1),
1759        SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1760                        RT5659_M_DAC1_R_SFT, 1, 1),
1761};
1762
1763static const struct snd_kcontrol_new rt5659_sto_dac_l_mix[] = {
1764        SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1765                        RT5659_M_DAC_L1_STO_L_SFT, 1, 1),
1766        SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1767                        RT5659_M_DAC_R1_STO_L_SFT, 1, 1),
1768        SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1769                        RT5659_M_DAC_L2_STO_L_SFT, 1, 1),
1770        SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1771                        RT5659_M_DAC_R2_STO_L_SFT, 1, 1),
1772};
1773
1774static const struct snd_kcontrol_new rt5659_sto_dac_r_mix[] = {
1775        SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1776                        RT5659_M_DAC_L1_STO_R_SFT, 1, 1),
1777        SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1778                        RT5659_M_DAC_R1_STO_R_SFT, 1, 1),
1779        SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1780                        RT5659_M_DAC_L2_STO_R_SFT, 1, 1),
1781        SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1782                        RT5659_M_DAC_R2_STO_R_SFT, 1, 1),
1783};
1784
1785static const struct snd_kcontrol_new rt5659_mono_dac_l_mix[] = {
1786        SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1787                        RT5659_M_DAC_L1_MONO_L_SFT, 1, 1),
1788        SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1789                        RT5659_M_DAC_R1_MONO_L_SFT, 1, 1),
1790        SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1791                        RT5659_M_DAC_L2_MONO_L_SFT, 1, 1),
1792        SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1793                        RT5659_M_DAC_R2_MONO_L_SFT, 1, 1),
1794};
1795
1796static const struct snd_kcontrol_new rt5659_mono_dac_r_mix[] = {
1797        SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1798                        RT5659_M_DAC_L1_MONO_R_SFT, 1, 1),
1799        SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1800                        RT5659_M_DAC_R1_MONO_R_SFT, 1, 1),
1801        SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1802                        RT5659_M_DAC_L2_MONO_R_SFT, 1, 1),
1803        SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1804                        RT5659_M_DAC_R2_MONO_R_SFT, 1, 1),
1805};
1806
1807/* Analog Input Mixer */
1808static const struct snd_kcontrol_new rt5659_rec1_l_mix[] = {
1809        SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC1_L2_MIXER,
1810                        RT5659_M_SPKVOLL_RM1_L_SFT, 1, 1),
1811        SOC_DAPM_SINGLE("INL Switch", RT5659_REC1_L2_MIXER,
1812                        RT5659_M_INL_RM1_L_SFT, 1, 1),
1813        SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_L2_MIXER,
1814                        RT5659_M_BST4_RM1_L_SFT, 1, 1),
1815        SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_L2_MIXER,
1816                        RT5659_M_BST3_RM1_L_SFT, 1, 1),
1817        SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_L2_MIXER,
1818                        RT5659_M_BST2_RM1_L_SFT, 1, 1),
1819        SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_L2_MIXER,
1820                        RT5659_M_BST1_RM1_L_SFT, 1, 1),
1821};
1822
1823static const struct snd_kcontrol_new rt5659_rec1_r_mix[] = {
1824        SOC_DAPM_SINGLE("HPOVOLR Switch", RT5659_REC1_L2_MIXER,
1825                        RT5659_M_HPOVOLR_RM1_R_SFT, 1, 1),
1826        SOC_DAPM_SINGLE("INR Switch", RT5659_REC1_R2_MIXER,
1827                        RT5659_M_INR_RM1_R_SFT, 1, 1),
1828        SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_R2_MIXER,
1829                        RT5659_M_BST4_RM1_R_SFT, 1, 1),
1830        SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_R2_MIXER,
1831                        RT5659_M_BST3_RM1_R_SFT, 1, 1),
1832        SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_R2_MIXER,
1833                        RT5659_M_BST2_RM1_R_SFT, 1, 1),
1834        SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_R2_MIXER,
1835                        RT5659_M_BST1_RM1_R_SFT, 1, 1),
1836};
1837
1838static const struct snd_kcontrol_new rt5659_rec2_l_mix[] = {
1839        SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC2_L2_MIXER,
1840                        RT5659_M_SPKVOL_RM2_L_SFT, 1, 1),
1841        SOC_DAPM_SINGLE("OUTVOLL Switch", RT5659_REC2_L2_MIXER,
1842                        RT5659_M_OUTVOLL_RM2_L_SFT, 1, 1),
1843        SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_L2_MIXER,
1844                        RT5659_M_BST4_RM2_L_SFT, 1, 1),
1845        SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_L2_MIXER,
1846                        RT5659_M_BST3_RM2_L_SFT, 1, 1),
1847        SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_L2_MIXER,
1848                        RT5659_M_BST2_RM2_L_SFT, 1, 1),
1849        SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_L2_MIXER,
1850                        RT5659_M_BST1_RM2_L_SFT, 1, 1),
1851};
1852
1853static const struct snd_kcontrol_new rt5659_rec2_r_mix[] = {
1854        SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_REC2_R2_MIXER,
1855                        RT5659_M_MONOVOL_RM2_R_SFT, 1, 1),
1856        SOC_DAPM_SINGLE("OUTVOLR Switch", RT5659_REC2_R2_MIXER,
1857                        RT5659_M_OUTVOLR_RM2_R_SFT, 1, 1),
1858        SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_R2_MIXER,
1859                        RT5659_M_BST4_RM2_R_SFT, 1, 1),
1860        SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_R2_MIXER,
1861                        RT5659_M_BST3_RM2_R_SFT, 1, 1),
1862        SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_R2_MIXER,
1863                        RT5659_M_BST2_RM2_R_SFT, 1, 1),
1864        SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_R2_MIXER,
1865                        RT5659_M_BST1_RM2_R_SFT, 1, 1),
1866};
1867
1868static const struct snd_kcontrol_new rt5659_spk_l_mix[] = {
1869        SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPK_L_MIXER,
1870                        RT5659_M_DAC_L2_SM_L_SFT, 1, 1),
1871        SOC_DAPM_SINGLE("BST1 Switch", RT5659_SPK_L_MIXER,
1872                        RT5659_M_BST1_SM_L_SFT, 1, 1),
1873        SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_L_MIXER,
1874                        RT5659_M_IN_L_SM_L_SFT, 1, 1),
1875        SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_L_MIXER,
1876                        RT5659_M_IN_R_SM_L_SFT, 1, 1),
1877        SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_L_MIXER,
1878                        RT5659_M_BST3_SM_L_SFT, 1, 1),
1879};
1880
1881static const struct snd_kcontrol_new rt5659_spk_r_mix[] = {
1882        SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPK_R_MIXER,
1883                        RT5659_M_DAC_R2_SM_R_SFT, 1, 1),
1884        SOC_DAPM_SINGLE("BST4 Switch", RT5659_SPK_R_MIXER,
1885                        RT5659_M_BST4_SM_R_SFT, 1, 1),
1886        SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_R_MIXER,
1887                        RT5659_M_IN_L_SM_R_SFT, 1, 1),
1888        SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_R_MIXER,
1889                        RT5659_M_IN_R_SM_R_SFT, 1, 1),
1890        SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_R_MIXER,
1891                        RT5659_M_BST3_SM_R_SFT, 1, 1),
1892};
1893
1894static const struct snd_kcontrol_new rt5659_monovol_mix[] = {
1895        SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1896                        RT5659_M_DAC_L2_MM_SFT, 1, 1),
1897        SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONOMIX_IN_GAIN,
1898                        RT5659_M_DAC_R2_MM_SFT, 1, 1),
1899        SOC_DAPM_SINGLE("BST1 Switch", RT5659_MONOMIX_IN_GAIN,
1900                        RT5659_M_BST1_MM_SFT, 1, 1),
1901        SOC_DAPM_SINGLE("BST2 Switch", RT5659_MONOMIX_IN_GAIN,
1902                        RT5659_M_BST2_MM_SFT, 1, 1),
1903        SOC_DAPM_SINGLE("BST3 Switch", RT5659_MONOMIX_IN_GAIN,
1904                        RT5659_M_BST3_MM_SFT, 1, 1),
1905};
1906
1907static const struct snd_kcontrol_new rt5659_out_l_mix[] = {
1908        SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_OUT_L_MIXER,
1909                        RT5659_M_DAC_L2_OM_L_SFT, 1, 1),
1910        SOC_DAPM_SINGLE("INL Switch", RT5659_OUT_L_MIXER,
1911                        RT5659_M_IN_L_OM_L_SFT, 1, 1),
1912        SOC_DAPM_SINGLE("BST1 Switch", RT5659_OUT_L_MIXER,
1913                        RT5659_M_BST1_OM_L_SFT, 1, 1),
1914        SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_L_MIXER,
1915                        RT5659_M_BST2_OM_L_SFT, 1, 1),
1916        SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_L_MIXER,
1917                        RT5659_M_BST3_OM_L_SFT, 1, 1),
1918};
1919
1920static const struct snd_kcontrol_new rt5659_out_r_mix[] = {
1921        SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_OUT_R_MIXER,
1922                        RT5659_M_DAC_R2_OM_R_SFT, 1, 1),
1923        SOC_DAPM_SINGLE("INR Switch", RT5659_OUT_R_MIXER,
1924                        RT5659_M_IN_R_OM_R_SFT, 1, 1),
1925        SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_R_MIXER,
1926                        RT5659_M_BST2_OM_R_SFT, 1, 1),
1927        SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_R_MIXER,
1928                        RT5659_M_BST3_OM_R_SFT, 1, 1),
1929        SOC_DAPM_SINGLE("BST4 Switch", RT5659_OUT_R_MIXER,
1930                        RT5659_M_BST4_OM_R_SFT, 1, 1),
1931};
1932
1933static const struct snd_kcontrol_new rt5659_spo_l_mix[] = {
1934        SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPO_AMP_GAIN,
1935                        RT5659_M_DAC_L2_SPKOMIX_SFT, 1, 0),
1936        SOC_DAPM_SINGLE("SPKVOL L Switch", RT5659_SPO_AMP_GAIN,
1937                        RT5659_M_SPKVOLL_SPKOMIX_SFT, 1, 0),
1938};
1939
1940static const struct snd_kcontrol_new rt5659_spo_r_mix[] = {
1941        SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPO_AMP_GAIN,
1942                        RT5659_M_DAC_R2_SPKOMIX_SFT, 1, 0),
1943        SOC_DAPM_SINGLE("SPKVOL R Switch", RT5659_SPO_AMP_GAIN,
1944                        RT5659_M_SPKVOLR_SPKOMIX_SFT, 1, 0),
1945};
1946
1947static const struct snd_kcontrol_new rt5659_mono_mix[] = {
1948        SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1949                        RT5659_M_DAC_L2_MA_SFT, 1, 1),
1950        SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_MONOMIX_IN_GAIN,
1951                        RT5659_M_MONOVOL_MA_SFT, 1, 1),
1952};
1953
1954static const struct snd_kcontrol_new rt5659_lout_l_mix[] = {
1955        SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_LOUT_MIXER,
1956                        RT5659_M_DAC_L2_LM_SFT, 1, 1),
1957        SOC_DAPM_SINGLE("OUTVOL L Switch", RT5659_LOUT_MIXER,
1958                        RT5659_M_OV_L_LM_SFT, 1, 1),
1959};
1960
1961static const struct snd_kcontrol_new rt5659_lout_r_mix[] = {
1962        SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_LOUT_MIXER,
1963                        RT5659_M_DAC_R2_LM_SFT, 1, 1),
1964        SOC_DAPM_SINGLE("OUTVOL R Switch", RT5659_LOUT_MIXER,
1965                        RT5659_M_OV_R_LM_SFT, 1, 1),
1966};
1967
1968/*DAC L2, DAC R2*/
1969/*MX-1B [6:4], MX-1B [2:0]*/
1970static const char * const rt5659_dac2_src[] = {
1971        "IF1 DAC2", "IF2 DAC", "IF3 DAC", "Mono ADC MIX"
1972};
1973
1974static SOC_ENUM_SINGLE_DECL(
1975        rt5659_dac_l2_enum, RT5659_DAC_CTRL,
1976        RT5659_DAC_L2_SEL_SFT, rt5659_dac2_src);
1977
1978static const struct snd_kcontrol_new rt5659_dac_l2_mux =
1979        SOC_DAPM_ENUM("DAC L2 Source", rt5659_dac_l2_enum);
1980
1981static SOC_ENUM_SINGLE_DECL(
1982        rt5659_dac_r2_enum, RT5659_DAC_CTRL,
1983        RT5659_DAC_R2_SEL_SFT, rt5659_dac2_src);
1984
1985static const struct snd_kcontrol_new rt5659_dac_r2_mux =
1986        SOC_DAPM_ENUM("DAC R2 Source", rt5659_dac_r2_enum);
1987
1988
1989/* STO1 ADC1 Source */
1990/* MX-26 [13] */
1991static const char * const rt5659_sto1_adc1_src[] = {
1992        "DAC MIX", "ADC"
1993};
1994
1995static SOC_ENUM_SINGLE_DECL(
1996        rt5659_sto1_adc1_enum, RT5659_STO1_ADC_MIXER,
1997        RT5659_STO1_ADC1_SRC_SFT, rt5659_sto1_adc1_src);
1998
1999static const struct snd_kcontrol_new rt5659_sto1_adc1_mux =
2000        SOC_DAPM_ENUM("Stereo1 ADC1 Source", rt5659_sto1_adc1_enum);
2001
2002/* STO1 ADC Source */
2003/* MX-26 [12] */
2004static const char * const rt5659_sto1_adc_src[] = {
2005        "ADC1", "ADC2"
2006};
2007
2008static SOC_ENUM_SINGLE_DECL(
2009        rt5659_sto1_adc_enum, RT5659_STO1_ADC_MIXER,
2010        RT5659_STO1_ADC_SRC_SFT, rt5659_sto1_adc_src);
2011
2012static const struct snd_kcontrol_new rt5659_sto1_adc_mux =
2013        SOC_DAPM_ENUM("Stereo1 ADC Source", rt5659_sto1_adc_enum);
2014
2015/* STO1 ADC2 Source */
2016/* MX-26 [11] */
2017static const char * const rt5659_sto1_adc2_src[] = {
2018        "DAC MIX", "DMIC"
2019};
2020
2021static SOC_ENUM_SINGLE_DECL(
2022        rt5659_sto1_adc2_enum, RT5659_STO1_ADC_MIXER,
2023        RT5659_STO1_ADC2_SRC_SFT, rt5659_sto1_adc2_src);
2024
2025static const struct snd_kcontrol_new rt5659_sto1_adc2_mux =
2026        SOC_DAPM_ENUM("Stereo1 ADC2 Source", rt5659_sto1_adc2_enum);
2027
2028/* STO1 DMIC Source */
2029/* MX-26 [8] */
2030static const char * const rt5659_sto1_dmic_src[] = {
2031        "DMIC1", "DMIC2"
2032};
2033
2034static SOC_ENUM_SINGLE_DECL(
2035        rt5659_sto1_dmic_enum, RT5659_STO1_ADC_MIXER,
2036        RT5659_STO1_DMIC_SRC_SFT, rt5659_sto1_dmic_src);
2037
2038static const struct snd_kcontrol_new rt5659_sto1_dmic_mux =
2039        SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5659_sto1_dmic_enum);
2040
2041
2042/* MONO ADC L2 Source */
2043/* MX-27 [12] */
2044static const char * const rt5659_mono_adc_l2_src[] = {
2045        "Mono DAC MIXL", "DMIC"
2046};
2047
2048static SOC_ENUM_SINGLE_DECL(
2049        rt5659_mono_adc_l2_enum, RT5659_MONO_ADC_MIXER,
2050        RT5659_MONO_ADC_L2_SRC_SFT, rt5659_mono_adc_l2_src);
2051
2052static const struct snd_kcontrol_new rt5659_mono_adc_l2_mux =
2053        SOC_DAPM_ENUM("Mono ADC L2 Source", rt5659_mono_adc_l2_enum);
2054
2055
2056/* MONO ADC L1 Source */
2057/* MX-27 [11] */
2058static const char * const rt5659_mono_adc_l1_src[] = {
2059        "Mono DAC MIXL", "ADC"
2060};
2061
2062static SOC_ENUM_SINGLE_DECL(
2063        rt5659_mono_adc_l1_enum, RT5659_MONO_ADC_MIXER,
2064        RT5659_MONO_ADC_L1_SRC_SFT, rt5659_mono_adc_l1_src);
2065
2066static const struct snd_kcontrol_new rt5659_mono_adc_l1_mux =
2067        SOC_DAPM_ENUM("Mono ADC L1 Source", rt5659_mono_adc_l1_enum);
2068
2069/* MONO ADC L Source, MONO ADC R Source*/
2070/* MX-27 [10:9], MX-27 [2:1] */
2071static const char * const rt5659_mono_adc_src[] = {
2072        "ADC1 L", "ADC1 R", "ADC2 L", "ADC2 R"
2073};
2074
2075static SOC_ENUM_SINGLE_DECL(
2076        rt5659_mono_adc_l_enum, RT5659_MONO_ADC_MIXER,
2077        RT5659_MONO_ADC_L_SRC_SFT, rt5659_mono_adc_src);
2078
2079static const struct snd_kcontrol_new rt5659_mono_adc_l_mux =
2080        SOC_DAPM_ENUM("Mono ADC L Source", rt5659_mono_adc_l_enum);
2081
2082static SOC_ENUM_SINGLE_DECL(
2083        rt5659_mono_adcr_enum, RT5659_MONO_ADC_MIXER,
2084        RT5659_MONO_ADC_R_SRC_SFT, rt5659_mono_adc_src);
2085
2086static const struct snd_kcontrol_new rt5659_mono_adc_r_mux =
2087        SOC_DAPM_ENUM("Mono ADC R Source", rt5659_mono_adcr_enum);
2088
2089/* MONO DMIC L Source */
2090/* MX-27 [8] */
2091static const char * const rt5659_mono_dmic_l_src[] = {
2092        "DMIC1 L", "DMIC2 L"
2093};
2094
2095static SOC_ENUM_SINGLE_DECL(
2096        rt5659_mono_dmic_l_enum, RT5659_MONO_ADC_MIXER,
2097        RT5659_MONO_DMIC_L_SRC_SFT, rt5659_mono_dmic_l_src);
2098
2099static const struct snd_kcontrol_new rt5659_mono_dmic_l_mux =
2100        SOC_DAPM_ENUM("Mono DMIC L Source", rt5659_mono_dmic_l_enum);
2101
2102/* MONO ADC R2 Source */
2103/* MX-27 [4] */
2104static const char * const rt5659_mono_adc_r2_src[] = {
2105        "Mono DAC MIXR", "DMIC"
2106};
2107
2108static SOC_ENUM_SINGLE_DECL(
2109        rt5659_mono_adc_r2_enum, RT5659_MONO_ADC_MIXER,
2110        RT5659_MONO_ADC_R2_SRC_SFT, rt5659_mono_adc_r2_src);
2111
2112static const struct snd_kcontrol_new rt5659_mono_adc_r2_mux =
2113        SOC_DAPM_ENUM("Mono ADC R2 Source", rt5659_mono_adc_r2_enum);
2114
2115/* MONO ADC R1 Source */
2116/* MX-27 [3] */
2117static const char * const rt5659_mono_adc_r1_src[] = {
2118        "Mono DAC MIXR", "ADC"
2119};
2120
2121static SOC_ENUM_SINGLE_DECL(
2122        rt5659_mono_adc_r1_enum, RT5659_MONO_ADC_MIXER,
2123        RT5659_MONO_ADC_R1_SRC_SFT, rt5659_mono_adc_r1_src);
2124
2125static const struct snd_kcontrol_new rt5659_mono_adc_r1_mux =
2126        SOC_DAPM_ENUM("Mono ADC R1 Source", rt5659_mono_adc_r1_enum);
2127
2128/* MONO DMIC R Source */
2129/* MX-27 [0] */
2130static const char * const rt5659_mono_dmic_r_src[] = {
2131        "DMIC1 R", "DMIC2 R"
2132};
2133
2134static SOC_ENUM_SINGLE_DECL(
2135        rt5659_mono_dmic_r_enum, RT5659_MONO_ADC_MIXER,
2136        RT5659_MONO_DMIC_R_SRC_SFT, rt5659_mono_dmic_r_src);
2137
2138static const struct snd_kcontrol_new rt5659_mono_dmic_r_mux =
2139        SOC_DAPM_ENUM("Mono DMIC R Source", rt5659_mono_dmic_r_enum);
2140
2141
2142/* DAC R1 Source, DAC L1 Source*/
2143/* MX-29 [11:10], MX-29 [9:8]*/
2144static const char * const rt5659_dac1_src[] = {
2145        "IF1 DAC1", "IF2 DAC", "IF3 DAC"
2146};
2147
2148static SOC_ENUM_SINGLE_DECL(
2149        rt5659_dac_r1_enum, RT5659_AD_DA_MIXER,
2150        RT5659_DAC1_R_SEL_SFT, rt5659_dac1_src);
2151
2152static const struct snd_kcontrol_new rt5659_dac_r1_mux =
2153        SOC_DAPM_ENUM("DAC R1 Source", rt5659_dac_r1_enum);
2154
2155static SOC_ENUM_SINGLE_DECL(
2156        rt5659_dac_l1_enum, RT5659_AD_DA_MIXER,
2157        RT5659_DAC1_L_SEL_SFT, rt5659_dac1_src);
2158
2159static const struct snd_kcontrol_new rt5659_dac_l1_mux =
2160        SOC_DAPM_ENUM("DAC L1 Source", rt5659_dac_l1_enum);
2161
2162/* DAC Digital Mixer L Source, DAC Digital Mixer R Source*/
2163/* MX-2C [6], MX-2C [4]*/
2164static const char * const rt5659_dig_dac_mix_src[] = {
2165        "Stereo DAC Mixer", "Mono DAC Mixer"
2166};
2167
2168static SOC_ENUM_SINGLE_DECL(
2169        rt5659_dig_dac_mixl_enum, RT5659_DIG_MIXER,
2170        RT5659_DAC_MIX_L_SFT, rt5659_dig_dac_mix_src);
2171
2172static const struct snd_kcontrol_new rt5659_dig_dac_mixl_mux =
2173        SOC_DAPM_ENUM("DAC Digital Mixer L Source", rt5659_dig_dac_mixl_enum);
2174
2175static SOC_ENUM_SINGLE_DECL(
2176        rt5659_dig_dac_mixr_enum, RT5659_DIG_MIXER,
2177        RT5659_DAC_MIX_R_SFT, rt5659_dig_dac_mix_src);
2178
2179static const struct snd_kcontrol_new rt5659_dig_dac_mixr_mux =
2180        SOC_DAPM_ENUM("DAC Digital Mixer R Source", rt5659_dig_dac_mixr_enum);
2181
2182/* Analog DAC L1 Source, Analog DAC R1 Source*/
2183/* MX-2D [3], MX-2D [2]*/
2184static const char * const rt5659_alg_dac1_src[] = {
2185        "DAC", "Stereo DAC Mixer"
2186};
2187
2188static SOC_ENUM_SINGLE_DECL(
2189        rt5659_alg_dac_l1_enum, RT5659_A_DAC_MUX,
2190        RT5659_A_DACL1_SFT, rt5659_alg_dac1_src);
2191
2192static const struct snd_kcontrol_new rt5659_alg_dac_l1_mux =
2193        SOC_DAPM_ENUM("Analog DACL1 Source", rt5659_alg_dac_l1_enum);
2194
2195static SOC_ENUM_SINGLE_DECL(
2196        rt5659_alg_dac_r1_enum, RT5659_A_DAC_MUX,
2197        RT5659_A_DACR1_SFT, rt5659_alg_dac1_src);
2198
2199static const struct snd_kcontrol_new rt5659_alg_dac_r1_mux =
2200        SOC_DAPM_ENUM("Analog DACR1 Source", rt5659_alg_dac_r1_enum);
2201
2202/* Analog DAC LR Source, Analog DAC R2 Source*/
2203/* MX-2D [1], MX-2D [0]*/
2204static const char * const rt5659_alg_dac2_src[] = {
2205        "Stereo DAC Mixer", "Mono DAC Mixer"
2206};
2207
2208static SOC_ENUM_SINGLE_DECL(
2209        rt5659_alg_dac_l2_enum, RT5659_A_DAC_MUX,
2210        RT5659_A_DACL2_SFT, rt5659_alg_dac2_src);
2211
2212static const struct snd_kcontrol_new rt5659_alg_dac_l2_mux =
2213        SOC_DAPM_ENUM("Analog DAC L2 Source", rt5659_alg_dac_l2_enum);
2214
2215static SOC_ENUM_SINGLE_DECL(
2216        rt5659_alg_dac_r2_enum, RT5659_A_DAC_MUX,
2217        RT5659_A_DACR2_SFT, rt5659_alg_dac2_src);
2218
2219static const struct snd_kcontrol_new rt5659_alg_dac_r2_mux =
2220        SOC_DAPM_ENUM("Analog DAC R2 Source", rt5659_alg_dac_r2_enum);
2221
2222/* Interface2 ADC Data Input*/
2223/* MX-2F [13:12] */
2224static const char * const rt5659_if2_adc_in_src[] = {
2225        "IF_ADC1", "IF_ADC2", "DAC_REF", "IF_ADC3"
2226};
2227
2228static SOC_ENUM_SINGLE_DECL(
2229        rt5659_if2_adc_in_enum, RT5659_DIG_INF23_DATA,
2230        RT5659_IF2_ADC_IN_SFT, rt5659_if2_adc_in_src);
2231
2232static const struct snd_kcontrol_new rt5659_if2_adc_in_mux =
2233        SOC_DAPM_ENUM("IF2 ADC IN Source", rt5659_if2_adc_in_enum);
2234
2235/* Interface3 ADC Data Input*/
2236/* MX-2F [1:0] */
2237static const char * const rt5659_if3_adc_in_src[] = {
2238        "IF_ADC1", "IF_ADC2", "DAC_REF", "Stereo2_ADC_L/R"
2239};
2240
2241static SOC_ENUM_SINGLE_DECL(
2242        rt5659_if3_adc_in_enum, RT5659_DIG_INF23_DATA,
2243        RT5659_IF3_ADC_IN_SFT, rt5659_if3_adc_in_src);
2244
2245static const struct snd_kcontrol_new rt5659_if3_adc_in_mux =
2246        SOC_DAPM_ENUM("IF3 ADC IN Source", rt5659_if3_adc_in_enum);
2247
2248/* PDM 1 L/R*/
2249/* MX-31 [15] [13] */
2250static const char * const rt5659_pdm_src[] = {
2251        "Mono DAC", "Stereo DAC"
2252};
2253
2254static SOC_ENUM_SINGLE_DECL(
2255        rt5659_pdm_l_enum, RT5659_PDM_OUT_CTRL,
2256        RT5659_PDM1_L_SFT, rt5659_pdm_src);
2257
2258static const struct snd_kcontrol_new rt5659_pdm_l_mux =
2259        SOC_DAPM_ENUM("PDM L Source", rt5659_pdm_l_enum);
2260
2261static SOC_ENUM_SINGLE_DECL(
2262        rt5659_pdm_r_enum, RT5659_PDM_OUT_CTRL,
2263        RT5659_PDM1_R_SFT, rt5659_pdm_src);
2264
2265static const struct snd_kcontrol_new rt5659_pdm_r_mux =
2266        SOC_DAPM_ENUM("PDM R Source", rt5659_pdm_r_enum);
2267
2268/* SPDIF Output source*/
2269/* MX-36 [1:0] */
2270static const char * const rt5659_spdif_src[] = {
2271        "IF1_DAC1", "IF1_DAC2", "IF2_DAC", "IF3_DAC"
2272};
2273
2274static SOC_ENUM_SINGLE_DECL(
2275        rt5659_spdif_enum, RT5659_SPDIF_CTRL,
2276        RT5659_SPDIF_SEL_SFT, rt5659_spdif_src);
2277
2278static const struct snd_kcontrol_new rt5659_spdif_mux =
2279        SOC_DAPM_ENUM("SPDIF Source", rt5659_spdif_enum);
2280
2281/* I2S1 TDM ADCDAT Source */
2282/* MX-78[4:0] */
2283static const char * const rt5659_rx_adc_data_src[] = {
2284        "AD1:AD2:DAC:NUL", "AD1:AD2:NUL:DAC", "AD1:DAC:AD2:NUL",
2285        "AD1:DAC:NUL:AD2", "AD1:NUL:DAC:AD2", "AD1:NUL:AD2:DAC",
2286        "AD2:AD1:DAC:NUL", "AD2:AD1:NUL:DAC", "AD2:DAC:AD1:NUL",
2287        "AD2:DAC:NUL:AD1", "AD2:NUL:DAC:AD1", "AD1:NUL:AD1:DAC",
2288        "DAC:AD1:AD2:NUL", "DAC:AD1:NUL:AD2", "DAC:AD2:AD1:NUL",
2289        "DAC:AD2:NUL:AD1", "DAC:NUL:DAC:AD2", "DAC:NUL:AD2:DAC",
2290        "NUL:AD1:AD2:DAC", "NUL:AD1:DAC:AD2", "NUL:AD2:AD1:DAC",
2291        "NUL:AD2:DAC:AD1", "NUL:DAC:DAC:AD2", "NUL:DAC:AD2:DAC"
2292};
2293
2294static SOC_ENUM_SINGLE_DECL(
2295        rt5659_rx_adc_data_enum, RT5659_TDM_CTRL_2,
2296        RT5659_ADCDAT_SRC_SFT, rt5659_rx_adc_data_src);
2297
2298static const struct snd_kcontrol_new rt5659_rx_adc_dac_mux =
2299        SOC_DAPM_ENUM("TDM ADCDAT Source", rt5659_rx_adc_data_enum);
2300
2301/* Out Volume Switch */
2302static const struct snd_kcontrol_new spkvol_l_switch =
2303        SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_L_SFT, 1, 1);
2304
2305static const struct snd_kcontrol_new spkvol_r_switch =
2306        SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_R_SFT, 1, 1);
2307
2308static const struct snd_kcontrol_new monovol_switch =
2309        SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_VOL_L_SFT, 1, 1);
2310
2311static const struct snd_kcontrol_new outvol_l_switch =
2312        SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_L_SFT, 1, 1);
2313
2314static const struct snd_kcontrol_new outvol_r_switch =
2315        SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_R_SFT, 1, 1);
2316
2317/* Out Switch */
2318static const struct snd_kcontrol_new spo_switch =
2319        SOC_DAPM_SINGLE("Switch", RT5659_CLASSD_2, RT5659_M_RF_DIG_SFT, 1, 1);
2320
2321static const struct snd_kcontrol_new mono_switch =
2322        SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_L_MUTE_SFT, 1, 1);
2323
2324static const struct snd_kcontrol_new hpo_l_switch =
2325        SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_L_MUTE_SFT, 1, 1);
2326
2327static const struct snd_kcontrol_new hpo_r_switch =
2328        SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_R_MUTE_SFT, 1, 1);
2329
2330static const struct snd_kcontrol_new lout_l_switch =
2331        SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_L_MUTE_SFT, 1, 1);
2332
2333static const struct snd_kcontrol_new lout_r_switch =
2334        SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_R_MUTE_SFT, 1, 1);
2335
2336static const struct snd_kcontrol_new pdm_l_switch =
2337        SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_L_SFT, 1,
2338                1);
2339
2340static const struct snd_kcontrol_new pdm_r_switch =
2341        SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_R_SFT, 1,
2342                1);
2343
2344static int rt5659_spk_event(struct snd_soc_dapm_widget *w,
2345        struct snd_kcontrol *kcontrol, int event)
2346{
2347        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2348
2349        switch (event) {
2350        case SND_SOC_DAPM_PRE_PMU:
2351                snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2352                        RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_EN);
2353                snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2354                        RT5659_M_RI_DIG, RT5659_M_RI_DIG);
2355                snd_soc_component_write(component, RT5659_CLASSD_1, 0x0803);
2356                snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
2357                break;
2358
2359        case SND_SOC_DAPM_POST_PMD:
2360                snd_soc_component_write(component, RT5659_CLASSD_1, 0x0011);
2361                snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2362                        RT5659_M_RI_DIG, 0x0);
2363                snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
2364                snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2365                        RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_DIS);
2366                break;
2367
2368        default:
2369                return 0;
2370        }
2371
2372        return 0;
2373
2374}
2375
2376static int rt5659_mono_event(struct snd_soc_dapm_widget *w,
2377        struct snd_kcontrol *kcontrol, int event)
2378{
2379        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2380
2381        switch (event) {
2382        case SND_SOC_DAPM_PRE_PMU:
2383                snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
2384                break;
2385
2386        case SND_SOC_DAPM_POST_PMD:
2387                snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
2388                break;
2389
2390        default:
2391                return 0;
2392        }
2393
2394        return 0;
2395
2396}
2397
2398static int rt5659_hp_event(struct snd_soc_dapm_widget *w,
2399        struct snd_kcontrol *kcontrol, int event)
2400{
2401        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2402
2403        switch (event) {
2404        case SND_SOC_DAPM_POST_PMU:
2405                snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0e1e);
2406                snd_soc_component_update_bits(component, RT5659_DEPOP_1, 0x0010, 0x0010);
2407                break;
2408
2409        case SND_SOC_DAPM_PRE_PMD:
2410                snd_soc_component_write(component, RT5659_DEPOP_1, 0x0000);
2411                break;
2412
2413        default:
2414                return 0;
2415        }
2416
2417        return 0;
2418}
2419
2420static int set_dmic_power(struct snd_soc_dapm_widget *w,
2421        struct snd_kcontrol *kcontrol, int event)
2422{
2423        switch (event) {
2424        case SND_SOC_DAPM_POST_PMU:
2425                /*Add delay to avoid pop noise*/
2426                msleep(450);
2427                break;
2428
2429        default:
2430                return 0;
2431        }
2432
2433        return 0;
2434}
2435
2436static const struct snd_soc_dapm_widget rt5659_particular_dapm_widgets[] = {
2437        SND_SOC_DAPM_SUPPLY("LDO2", RT5659_PWR_ANLG_3, RT5659_PWR_LDO2_BIT, 0,
2438                NULL, 0),
2439        SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5659_PWR_ANLG_2, RT5659_PWR_MB1_BIT,
2440                0, NULL, 0),
2441        SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5659_PWR_VOL,
2442                RT5659_PWR_MIC_DET_BIT, 0, NULL, 0),
2443};
2444
2445static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = {
2446        SND_SOC_DAPM_SUPPLY("PLL", RT5659_PWR_ANLG_3, RT5659_PWR_PLL_BIT, 0,
2447                NULL, 0),
2448        SND_SOC_DAPM_SUPPLY("Mono Vref", RT5659_PWR_ANLG_1,
2449                RT5659_PWR_VREF3_BIT, 0, NULL, 0),
2450
2451        /* ASRC */
2452        SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5659_ASRC_1,
2453                RT5659_I2S1_ASRC_SFT, 0, NULL, 0),
2454        SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5659_ASRC_1,
2455                RT5659_I2S2_ASRC_SFT, 0, NULL, 0),
2456        SND_SOC_DAPM_SUPPLY_S("I2S3 ASRC", 1, RT5659_ASRC_1,
2457                RT5659_I2S3_ASRC_SFT, 0, NULL, 0),
2458        SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5659_ASRC_1,
2459                RT5659_DAC_STO_ASRC_SFT, 0, NULL, 0),
2460        SND_SOC_DAPM_SUPPLY_S("DAC Mono L ASRC", 1, RT5659_ASRC_1,
2461                RT5659_DAC_MONO_L_ASRC_SFT, 0, NULL, 0),
2462        SND_SOC_DAPM_SUPPLY_S("DAC Mono R ASRC", 1, RT5659_ASRC_1,
2463                RT5659_DAC_MONO_R_ASRC_SFT, 0, NULL, 0),
2464        SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5659_ASRC_1,
2465                RT5659_ADC_STO1_ASRC_SFT, 0, NULL, 0),
2466        SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5659_ASRC_1,
2467                RT5659_ADC_MONO_L_ASRC_SFT, 0, NULL, 0),
2468        SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5659_ASRC_1,
2469                RT5659_ADC_MONO_R_ASRC_SFT, 0, NULL, 0),
2470
2471        /* Input Side */
2472        SND_SOC_DAPM_SUPPLY("MICBIAS2", RT5659_PWR_ANLG_2, RT5659_PWR_MB2_BIT,
2473                0, NULL, 0),
2474        SND_SOC_DAPM_SUPPLY("MICBIAS3", RT5659_PWR_ANLG_2, RT5659_PWR_MB3_BIT,
2475                0, NULL, 0),
2476
2477        /* Input Lines */
2478        SND_SOC_DAPM_INPUT("DMIC L1"),
2479        SND_SOC_DAPM_INPUT("DMIC R1"),
2480        SND_SOC_DAPM_INPUT("DMIC L2"),
2481        SND_SOC_DAPM_INPUT("DMIC R2"),
2482
2483        SND_SOC_DAPM_INPUT("IN1P"),
2484        SND_SOC_DAPM_INPUT("IN1N"),
2485        SND_SOC_DAPM_INPUT("IN2P"),
2486        SND_SOC_DAPM_INPUT("IN2N"),
2487        SND_SOC_DAPM_INPUT("IN3P"),
2488        SND_SOC_DAPM_INPUT("IN3N"),
2489        SND_SOC_DAPM_INPUT("IN4P"),
2490        SND_SOC_DAPM_INPUT("IN4N"),
2491
2492        SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2493        SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2494
2495        SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2496                set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2497        SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5659_DMIC_CTRL_1,
2498                RT5659_DMIC_1_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2499        SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5659_DMIC_CTRL_1,
2500                RT5659_DMIC_2_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2501
2502        /* Boost */
2503        SND_SOC_DAPM_PGA("BST1", RT5659_PWR_ANLG_2,
2504                RT5659_PWR_BST1_P_BIT, 0, NULL, 0),
2505        SND_SOC_DAPM_PGA("BST2", RT5659_PWR_ANLG_2,
2506                RT5659_PWR_BST2_P_BIT, 0, NULL, 0),
2507        SND_SOC_DAPM_PGA("BST3", RT5659_PWR_ANLG_2,
2508                RT5659_PWR_BST3_P_BIT, 0, NULL, 0),
2509        SND_SOC_DAPM_PGA("BST4", RT5659_PWR_ANLG_2,
2510                RT5659_PWR_BST4_P_BIT, 0, NULL, 0),
2511        SND_SOC_DAPM_SUPPLY("BST1 Power", RT5659_PWR_ANLG_2,
2512                RT5659_PWR_BST1_BIT, 0, NULL, 0),
2513        SND_SOC_DAPM_SUPPLY("BST2 Power", RT5659_PWR_ANLG_2,
2514                RT5659_PWR_BST2_BIT, 0, NULL, 0),
2515        SND_SOC_DAPM_SUPPLY("BST3 Power", RT5659_PWR_ANLG_2,
2516                RT5659_PWR_BST3_BIT, 0, NULL, 0),
2517        SND_SOC_DAPM_SUPPLY("BST4 Power", RT5659_PWR_ANLG_2,
2518                RT5659_PWR_BST4_BIT, 0, NULL, 0),
2519
2520
2521        /* Input Volume */
2522        SND_SOC_DAPM_PGA("INL VOL", RT5659_PWR_VOL, RT5659_PWR_IN_L_BIT,
2523                0, NULL, 0),
2524        SND_SOC_DAPM_PGA("INR VOL", RT5659_PWR_VOL, RT5659_PWR_IN_R_BIT,
2525                0, NULL, 0),
2526
2527        /* REC Mixer */
2528        SND_SOC_DAPM_MIXER("RECMIX1L", RT5659_PWR_MIXER, RT5659_PWR_RM1_L_BIT,
2529                0, rt5659_rec1_l_mix, ARRAY_SIZE(rt5659_rec1_l_mix)),
2530        SND_SOC_DAPM_MIXER("RECMIX1R", RT5659_PWR_MIXER, RT5659_PWR_RM1_R_BIT,
2531                0, rt5659_rec1_r_mix, ARRAY_SIZE(rt5659_rec1_r_mix)),
2532        SND_SOC_DAPM_MIXER("RECMIX2L", RT5659_PWR_MIXER, RT5659_PWR_RM2_L_BIT,
2533                0, rt5659_rec2_l_mix, ARRAY_SIZE(rt5659_rec2_l_mix)),
2534        SND_SOC_DAPM_MIXER("RECMIX2R", RT5659_PWR_MIXER, RT5659_PWR_RM2_R_BIT,
2535                0, rt5659_rec2_r_mix, ARRAY_SIZE(rt5659_rec2_r_mix)),
2536
2537        /* ADCs */
2538        SND_SOC_DAPM_ADC("ADC1 L", NULL, SND_SOC_NOPM, 0, 0),
2539        SND_SOC_DAPM_ADC("ADC1 R", NULL, SND_SOC_NOPM, 0, 0),
2540        SND_SOC_DAPM_ADC("ADC2 L", NULL, SND_SOC_NOPM, 0, 0),
2541        SND_SOC_DAPM_ADC("ADC2 R", NULL, SND_SOC_NOPM, 0, 0),
2542
2543        SND_SOC_DAPM_SUPPLY("ADC1 L Power", RT5659_PWR_DIG_1,
2544                RT5659_PWR_ADC_L1_BIT, 0, NULL, 0),
2545        SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1,
2546                RT5659_PWR_ADC_R1_BIT, 0, NULL, 0),
2547        SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1,
2548                RT5659_PWR_ADC_L2_BIT, 0, NULL, 0),
2549        SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1,
2550                RT5659_PWR_ADC_R2_BIT, 0, NULL, 0),
2551        SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc1_clk,
2552                SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2553        SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc2_clk,
2554                SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2555
2556        /* ADC Mux */
2557        SND_SOC_DAPM_MUX("Stereo1 DMIC L Mux", SND_SOC_NOPM, 0, 0,
2558                &rt5659_sto1_dmic_mux),
2559        SND_SOC_DAPM_MUX("Stereo1 DMIC R Mux", SND_SOC_NOPM, 0, 0,
2560                &rt5659_sto1_dmic_mux),
2561        SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2562                &rt5659_sto1_adc1_mux),
2563        SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2564                &rt5659_sto1_adc1_mux),
2565        SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2566                &rt5659_sto1_adc2_mux),
2567        SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2568                &rt5659_sto1_adc2_mux),
2569        SND_SOC_DAPM_MUX("Stereo1 ADC L Mux", SND_SOC_NOPM, 0, 0,
2570                &rt5659_sto1_adc_mux),
2571        SND_SOC_DAPM_MUX("Stereo1 ADC R Mux", SND_SOC_NOPM, 0, 0,
2572                &rt5659_sto1_adc_mux),
2573        SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2574                &rt5659_mono_adc_l2_mux),
2575        SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2576                &rt5659_mono_adc_r2_mux),
2577        SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2578                &rt5659_mono_adc_l1_mux),
2579        SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2580                &rt5659_mono_adc_r1_mux),
2581        SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2582                &rt5659_mono_dmic_l_mux),
2583        SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2584                &rt5659_mono_dmic_r_mux),
2585        SND_SOC_DAPM_MUX("Mono ADC L Mux", SND_SOC_NOPM, 0, 0,
2586                &rt5659_mono_adc_l_mux),
2587        SND_SOC_DAPM_MUX("Mono ADC R Mux", SND_SOC_NOPM, 0, 0,
2588                &rt5659_mono_adc_r_mux),
2589        /* ADC Mixer */
2590        SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5659_PWR_DIG_2,
2591                RT5659_PWR_ADC_S1F_BIT, 0, NULL, 0),
2592        SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5659_PWR_DIG_2,
2593                RT5659_PWR_ADC_S2F_BIT, 0, NULL, 0),
2594        SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM,
2595                0, 0, rt5659_sto1_adc_l_mix,
2596                ARRAY_SIZE(rt5659_sto1_adc_l_mix)),
2597        SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM,
2598                0, 0, rt5659_sto1_adc_r_mix,
2599                ARRAY_SIZE(rt5659_sto1_adc_r_mix)),
2600        SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5659_PWR_DIG_2,
2601                RT5659_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2602        SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5659_MONO_ADC_DIG_VOL,
2603                RT5659_L_MUTE_SFT, 1, rt5659_mono_adc_l_mix,
2604                ARRAY_SIZE(rt5659_mono_adc_l_mix)),
2605        SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5659_PWR_DIG_2,
2606                RT5659_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2607        SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5659_MONO_ADC_DIG_VOL,
2608                RT5659_R_MUTE_SFT, 1, rt5659_mono_adc_r_mix,
2609                ARRAY_SIZE(rt5659_mono_adc_r_mix)),
2610
2611        /* ADC PGA */
2612        SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2613        SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2614        SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2615        SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2616        SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2617        SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2618        SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2619        SND_SOC_DAPM_PGA("Stereo2 ADC LR", SND_SOC_NOPM, 0, 0, NULL, 0),
2620
2621        SND_SOC_DAPM_PGA("Stereo1 ADC Volume L", RT5659_STO1_ADC_DIG_VOL,
2622                RT5659_L_MUTE_SFT, 1, NULL, 0),
2623        SND_SOC_DAPM_PGA("Stereo1 ADC Volume R", RT5659_STO1_ADC_DIG_VOL,
2624                RT5659_R_MUTE_SFT, 1, NULL, 0),
2625
2626        /* Digital Interface */
2627        SND_SOC_DAPM_SUPPLY("I2S1", RT5659_PWR_DIG_1, RT5659_PWR_I2S1_BIT,
2628                0, NULL, 0),
2629        SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2630        SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2631        SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2632        SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2633        SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2634        SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2635        SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2636        SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2637        SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2638        SND_SOC_DAPM_SUPPLY("I2S2", RT5659_PWR_DIG_1, RT5659_PWR_I2S2_BIT, 0,
2639                NULL, 0),
2640        SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2641        SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2642        SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2643        SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2644        SND_SOC_DAPM_PGA("IF2 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2645        SND_SOC_DAPM_PGA("IF2 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2646        SND_SOC_DAPM_SUPPLY("I2S3", RT5659_PWR_DIG_1, RT5659_PWR_I2S3_BIT, 0,
2647                NULL, 0),
2648        SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2649        SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2650        SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2651        SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2652        SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2653        SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2654
2655        /* Digital Interface Select */
2656        SND_SOC_DAPM_PGA("TDM AD1:AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2657        SND_SOC_DAPM_PGA("TDM AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2658        SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
2659                &rt5659_rx_adc_dac_mux),
2660        SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
2661                &rt5659_if2_adc_in_mux),
2662        SND_SOC_DAPM_MUX("IF3 ADC Mux", SND_SOC_NOPM, 0, 0,
2663                &rt5659_if3_adc_in_mux),
2664        SND_SOC_DAPM_MUX("IF1 01 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2665                        &rt5659_if1_01_adc_swap_mux),
2666        SND_SOC_DAPM_MUX("IF1 23 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2667                        &rt5659_if1_23_adc_swap_mux),
2668        SND_SOC_DAPM_MUX("IF1 45 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2669                        &rt5659_if1_45_adc_swap_mux),
2670        SND_SOC_DAPM_MUX("IF1 67 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2671                        &rt5659_if1_67_adc_swap_mux),
2672        SND_SOC_DAPM_MUX("IF2 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2673                        &rt5659_if2_dac_swap_mux),
2674        SND_SOC_DAPM_MUX("IF2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2675                        &rt5659_if2_adc_swap_mux),
2676        SND_SOC_DAPM_MUX("IF3 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2677                        &rt5659_if3_dac_swap_mux),
2678        SND_SOC_DAPM_MUX("IF3 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2679                        &rt5659_if3_adc_swap_mux),
2680
2681        /* Audio Interface */
2682        SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2683        SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2684        SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2685        SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2686        SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
2687        SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
2688
2689        /* Output Side */
2690        /* DAC mixer before sound effect  */
2691        SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2692                rt5659_dac_l_mix, ARRAY_SIZE(rt5659_dac_l_mix)),
2693        SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2694                rt5659_dac_r_mix, ARRAY_SIZE(rt5659_dac_r_mix)),
2695
2696        /* DAC channel Mux */
2697        SND_SOC_DAPM_MUX("DAC L1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l1_mux),
2698        SND_SOC_DAPM_MUX("DAC R1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r1_mux),
2699        SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l2_mux),
2700        SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r2_mux),
2701
2702        SND_SOC_DAPM_MUX("DAC L1 Source", SND_SOC_NOPM, 0, 0,
2703                &rt5659_alg_dac_l1_mux),
2704        SND_SOC_DAPM_MUX("DAC R1 Source", SND_SOC_NOPM, 0, 0,
2705                &rt5659_alg_dac_r1_mux),
2706        SND_SOC_DAPM_MUX("DAC L2 Source", SND_SOC_NOPM, 0, 0,
2707                &rt5659_alg_dac_l2_mux),
2708        SND_SOC_DAPM_MUX("DAC R2 Source", SND_SOC_NOPM, 0, 0,
2709                &rt5659_alg_dac_r2_mux),
2710
2711        /* DAC Mixer */
2712        SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5659_PWR_DIG_2,
2713                RT5659_PWR_DAC_S1F_BIT, 0, NULL, 0),
2714        SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5659_PWR_DIG_2,
2715                RT5659_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2716        SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5659_PWR_DIG_2,
2717                RT5659_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2718        SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2719                rt5659_sto_dac_l_mix, ARRAY_SIZE(rt5659_sto_dac_l_mix)),
2720        SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2721                rt5659_sto_dac_r_mix, ARRAY_SIZE(rt5659_sto_dac_r_mix)),
2722        SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2723                rt5659_mono_dac_l_mix, ARRAY_SIZE(rt5659_mono_dac_l_mix)),
2724        SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2725                rt5659_mono_dac_r_mix, ARRAY_SIZE(rt5659_mono_dac_r_mix)),
2726        SND_SOC_DAPM_MUX("DAC MIXL", SND_SOC_NOPM, 0, 0,
2727                &rt5659_dig_dac_mixl_mux),
2728        SND_SOC_DAPM_MUX("DAC MIXR", SND_SOC_NOPM, 0, 0,
2729                &rt5659_dig_dac_mixr_mux),
2730
2731        /* DACs */
2732        SND_SOC_DAPM_SUPPLY_S("DAC L1 Power", 1, RT5659_PWR_DIG_1,
2733                RT5659_PWR_DAC_L1_BIT, 0, NULL, 0),
2734        SND_SOC_DAPM_SUPPLY_S("DAC R1 Power", 1, RT5659_PWR_DIG_1,
2735                RT5659_PWR_DAC_R1_BIT, 0, NULL, 0),
2736        SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
2737        SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
2738
2739        SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5659_PWR_DIG_1,
2740                RT5659_PWR_DAC_L2_BIT, 0, NULL, 0),
2741        SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5659_PWR_DIG_1,
2742                RT5659_PWR_DAC_R2_BIT, 0, NULL, 0),
2743        SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0, 0),
2744        SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0, 0),
2745        SND_SOC_DAPM_PGA("DAC_REF", SND_SOC_NOPM, 0, 0, NULL, 0),
2746
2747        /* OUT Mixer */
2748        SND_SOC_DAPM_MIXER("SPK MIXL", RT5659_PWR_MIXER, RT5659_PWR_SM_L_BIT,
2749                0, rt5659_spk_l_mix, ARRAY_SIZE(rt5659_spk_l_mix)),
2750        SND_SOC_DAPM_MIXER("SPK MIXR", RT5659_PWR_MIXER, RT5659_PWR_SM_R_BIT,
2751                0, rt5659_spk_r_mix, ARRAY_SIZE(rt5659_spk_r_mix)),
2752        SND_SOC_DAPM_MIXER("MONOVOL MIX", RT5659_PWR_MIXER, RT5659_PWR_MM_BIT,
2753                0, rt5659_monovol_mix, ARRAY_SIZE(rt5659_monovol_mix)),
2754        SND_SOC_DAPM_MIXER("OUT MIXL", RT5659_PWR_MIXER, RT5659_PWR_OM_L_BIT,
2755                0, rt5659_out_l_mix, ARRAY_SIZE(rt5659_out_l_mix)),
2756        SND_SOC_DAPM_MIXER("OUT MIXR", RT5659_PWR_MIXER, RT5659_PWR_OM_R_BIT,
2757                0, rt5659_out_r_mix, ARRAY_SIZE(rt5659_out_r_mix)),
2758
2759        /* Output Volume */
2760        SND_SOC_DAPM_SWITCH("SPKVOL L", RT5659_PWR_VOL, RT5659_PWR_SV_L_BIT, 0,
2761                &spkvol_l_switch),
2762        SND_SOC_DAPM_SWITCH("SPKVOL R", RT5659_PWR_VOL, RT5659_PWR_SV_R_BIT, 0,
2763                &spkvol_r_switch),
2764        SND_SOC_DAPM_SWITCH("MONOVOL", RT5659_PWR_VOL, RT5659_PWR_MV_BIT, 0,
2765                &monovol_switch),
2766        SND_SOC_DAPM_SWITCH("OUTVOL L", RT5659_PWR_VOL, RT5659_PWR_OV_L_BIT, 0,
2767                &outvol_l_switch),
2768        SND_SOC_DAPM_SWITCH("OUTVOL R", RT5659_PWR_VOL, RT5659_PWR_OV_R_BIT, 0,
2769                &outvol_r_switch),
2770
2771        /* SPO/MONO/HPO/LOUT */
2772        SND_SOC_DAPM_MIXER("SPO L MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_l_mix,
2773                ARRAY_SIZE(rt5659_spo_l_mix)),
2774        SND_SOC_DAPM_MIXER("SPO R MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_r_mix,
2775                ARRAY_SIZE(rt5659_spo_r_mix)),
2776        SND_SOC_DAPM_MIXER("Mono MIX", SND_SOC_NOPM, 0, 0, rt5659_mono_mix,
2777                ARRAY_SIZE(rt5659_mono_mix)),
2778        SND_SOC_DAPM_MIXER("LOUT L MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_l_mix,
2779                ARRAY_SIZE(rt5659_lout_l_mix)),
2780        SND_SOC_DAPM_MIXER("LOUT R MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_r_mix,
2781                ARRAY_SIZE(rt5659_lout_r_mix)),
2782
2783        SND_SOC_DAPM_PGA_S("SPK Amp", 1, RT5659_PWR_DIG_1, RT5659_PWR_CLS_D_BIT,
2784                0, rt5659_spk_event, SND_SOC_DAPM_POST_PMD |
2785                SND_SOC_DAPM_PRE_PMU),
2786        SND_SOC_DAPM_PGA_S("Mono Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_MA_BIT,
2787                0, rt5659_mono_event, SND_SOC_DAPM_POST_PMD |
2788                SND_SOC_DAPM_PRE_PMU),
2789        SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5659_hp_event,
2790                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2791        SND_SOC_DAPM_PGA_S("LOUT Amp", 1,  RT5659_PWR_ANLG_1, RT5659_PWR_LM_BIT,
2792                0,  NULL, 0),
2793
2794        SND_SOC_DAPM_SUPPLY("Charge Pump", SND_SOC_NOPM, 0, 0,
2795                rt5659_charge_pump_event, SND_SOC_DAPM_PRE_PMU |
2796                SND_SOC_DAPM_POST_PMD),
2797
2798        SND_SOC_DAPM_SWITCH("SPO Playback", SND_SOC_NOPM, 0, 0, &spo_switch),
2799        SND_SOC_DAPM_SWITCH("Mono Playback", SND_SOC_NOPM, 0, 0,
2800                &mono_switch),
2801        SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
2802                &hpo_l_switch),
2803        SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
2804                &hpo_r_switch),
2805        SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
2806                &lout_l_switch),
2807        SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
2808                &lout_r_switch),
2809        SND_SOC_DAPM_SWITCH("PDM L Playback", SND_SOC_NOPM, 0, 0,
2810                &pdm_l_switch),
2811        SND_SOC_DAPM_SWITCH("PDM R Playback", SND_SOC_NOPM, 0, 0,
2812                &pdm_r_switch),
2813
2814        /* PDM */
2815        SND_SOC_DAPM_SUPPLY("PDM Power", RT5659_PWR_DIG_2,
2816                RT5659_PWR_PDM1_BIT, 0, NULL, 0),
2817        SND_SOC_DAPM_MUX("PDM L Mux", RT5659_PDM_OUT_CTRL,
2818                RT5659_M_PDM1_L_SFT, 1, &rt5659_pdm_l_mux),
2819        SND_SOC_DAPM_MUX("PDM R Mux", RT5659_PDM_OUT_CTRL,
2820                RT5659_M_PDM1_R_SFT, 1, &rt5659_pdm_r_mux),
2821
2822        /* SPDIF */
2823        SND_SOC_DAPM_MUX("SPDIF Mux", SND_SOC_NOPM, 0, 0, &rt5659_spdif_mux),
2824
2825        SND_SOC_DAPM_SUPPLY("SYS CLK DET", RT5659_CLK_DET, 3, 0, NULL, 0),
2826        SND_SOC_DAPM_SUPPLY("CLKDET", RT5659_CLK_DET, 0, 0, NULL, 0),
2827
2828        /* Output Lines */
2829        SND_SOC_DAPM_OUTPUT("HPOL"),
2830        SND_SOC_DAPM_OUTPUT("HPOR"),
2831        SND_SOC_DAPM_OUTPUT("SPOL"),
2832        SND_SOC_DAPM_OUTPUT("SPOR"),
2833        SND_SOC_DAPM_OUTPUT("LOUTL"),
2834        SND_SOC_DAPM_OUTPUT("LOUTR"),
2835        SND_SOC_DAPM_OUTPUT("MONOOUT"),
2836        SND_SOC_DAPM_OUTPUT("PDML"),
2837        SND_SOC_DAPM_OUTPUT("PDMR"),
2838        SND_SOC_DAPM_OUTPUT("SPDIF"),
2839};
2840
2841static const struct snd_soc_dapm_route rt5659_dapm_routes[] = {
2842        /*PLL*/
2843        { "ADC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2844        { "ADC Stereo2 Filter", NULL, "PLL", is_sys_clk_from_pll },
2845        { "ADC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2846        { "ADC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2847        { "DAC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2848        { "DAC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2849        { "DAC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2850
2851        /*ASRC*/
2852        { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2853        { "ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc },
2854        { "ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc },
2855        { "DAC Mono Left Filter", NULL, "DAC Mono L ASRC", is_using_asrc },
2856        { "DAC Mono Right Filter", NULL, "DAC Mono R ASRC", is_using_asrc },
2857        { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
2858
2859        { "SYS CLK DET", NULL, "CLKDET" },
2860
2861        { "I2S1", NULL, "I2S1 ASRC" },
2862        { "I2S2", NULL, "I2S2 ASRC" },
2863        { "I2S3", NULL, "I2S3 ASRC" },
2864
2865        { "DMIC1", NULL, "DMIC L1" },
2866        { "DMIC1", NULL, "DMIC R1" },
2867        { "DMIC2", NULL, "DMIC L2" },
2868        { "DMIC2", NULL, "DMIC R2" },
2869
2870        { "BST1", NULL, "IN1P" },
2871        { "BST1", NULL, "IN1N" },
2872        { "BST1", NULL, "BST1 Power" },
2873        { "BST2", NULL, "IN2P" },
2874        { "BST2", NULL, "IN2N" },
2875        { "BST2", NULL, "BST2 Power" },
2876        { "BST3", NULL, "IN3P" },
2877        { "BST3", NULL, "IN3N" },
2878        { "BST3", NULL, "BST3 Power" },
2879        { "BST4", NULL, "IN4P" },
2880        { "BST4", NULL, "IN4N" },
2881        { "BST4", NULL, "BST4 Power" },
2882
2883        { "INL VOL", NULL, "IN2P" },
2884        { "INR VOL", NULL, "IN2N" },
2885
2886        { "RECMIX1L", "SPKVOLL Switch", "SPKVOL L" },
2887        { "RECMIX1L", "INL Switch", "INL VOL" },
2888        { "RECMIX1L", "BST4 Switch", "BST4" },
2889        { "RECMIX1L", "BST3 Switch", "BST3" },
2890        { "RECMIX1L", "BST2 Switch", "BST2" },
2891        { "RECMIX1L", "BST1 Switch", "BST1" },
2892
2893        { "RECMIX1R", "HPOVOLR Switch", "HPO R Playback" },
2894        { "RECMIX1R", "INR Switch", "INR VOL" },
2895        { "RECMIX1R", "BST4 Switch", "BST4" },
2896        { "RECMIX1R", "BST3 Switch", "BST3" },
2897        { "RECMIX1R", "BST2 Switch", "BST2" },
2898        { "RECMIX1R", "BST1 Switch", "BST1" },
2899
2900        { "RECMIX2L", "SPKVOLL Switch", "SPKVOL L" },
2901        { "RECMIX2L", "OUTVOLL Switch", "OUTVOL L" },
2902        { "RECMIX2L", "BST4 Switch", "BST4" },
2903        { "RECMIX2L", "BST3 Switch", "BST3" },
2904        { "RECMIX2L", "BST2 Switch", "BST2" },
2905        { "RECMIX2L", "BST1 Switch", "BST1" },
2906
2907        { "RECMIX2R", "MONOVOL Switch", "MONOVOL" },
2908        { "RECMIX2R", "OUTVOLR Switch", "OUTVOL R" },
2909        { "RECMIX2R", "BST4 Switch", "BST4" },
2910        { "RECMIX2R", "BST3 Switch", "BST3" },
2911        { "RECMIX2R", "BST2 Switch", "BST2" },
2912        { "RECMIX2R", "BST1 Switch", "BST1" },
2913
2914        { "ADC1 L", NULL, "RECMIX1L" },
2915        { "ADC1 L", NULL, "ADC1 L Power" },
2916        { "ADC1 L", NULL, "ADC1 clock" },
2917        { "ADC1 R", NULL, "RECMIX1R" },
2918        { "ADC1 R", NULL, "ADC1 R Power" },
2919        { "ADC1 R", NULL, "ADC1 clock" },
2920
2921        { "ADC2 L", NULL, "RECMIX2L" },
2922        { "ADC2 L", NULL, "ADC2 L Power" },
2923        { "ADC2 L", NULL, "ADC2 clock" },
2924        { "ADC2 R", NULL, "RECMIX2R" },
2925        { "ADC2 R", NULL, "ADC2 R Power" },
2926        { "ADC2 R", NULL, "ADC2 clock" },
2927
2928        { "DMIC L1", NULL, "DMIC CLK" },
2929        { "DMIC L1", NULL, "DMIC1 Power" },
2930        { "DMIC R1", NULL, "DMIC CLK" },
2931        { "DMIC R1", NULL, "DMIC1 Power" },
2932        { "DMIC L2", NULL, "DMIC CLK" },
2933        { "DMIC L2", NULL, "DMIC2 Power" },
2934        { "DMIC R2", NULL, "DMIC CLK" },
2935        { "DMIC R2", NULL, "DMIC2 Power" },
2936
2937        { "Stereo1 DMIC L Mux", "DMIC1", "DMIC L1" },
2938        { "Stereo1 DMIC L Mux", "DMIC2", "DMIC L2" },
2939
2940        { "Stereo1 DMIC R Mux", "DMIC1", "DMIC R1" },
2941        { "Stereo1 DMIC R Mux", "DMIC2", "DMIC R2" },
2942
2943        { "Mono DMIC L Mux", "DMIC1 L", "DMIC L1" },
2944        { "Mono DMIC L Mux", "DMIC2 L", "DMIC L2" },
2945
2946        { "Mono DMIC R Mux", "DMIC1 R", "DMIC R1" },
2947        { "Mono DMIC R Mux", "DMIC2 R", "DMIC R2" },
2948
2949        { "Stereo1 ADC L Mux", "ADC1", "ADC1 L" },
2950        { "Stereo1 ADC L Mux", "ADC2", "ADC2 L" },
2951        { "Stereo1 ADC R Mux", "ADC1", "ADC1 R" },
2952        { "Stereo1 ADC R Mux", "ADC2", "ADC2 R" },
2953
2954        { "Stereo1 ADC L1 Mux", "ADC", "Stereo1 ADC L Mux" },
2955        { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2956        { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC L Mux" },
2957        { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2958
2959        { "Stereo1 ADC R1 Mux", "ADC", "Stereo1 ADC R Mux" },
2960        { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2961        { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC R Mux" },
2962        { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2963
2964        { "Mono ADC L Mux", "ADC1 L", "ADC1 L" },
2965        { "Mono ADC L Mux", "ADC1 R", "ADC1 R" },
2966        { "Mono ADC L Mux", "ADC2 L", "ADC2 L" },
2967        { "Mono ADC L Mux", "ADC2 R", "ADC2 R" },
2968
2969        { "Mono ADC R Mux", "ADC1 L", "ADC1 L" },
2970        { "Mono ADC R Mux", "ADC1 R", "ADC1 R" },
2971        { "Mono ADC R Mux", "ADC2 L", "ADC2 L" },
2972        { "Mono ADC R Mux", "ADC2 R", "ADC2 R" },
2973
2974        { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2975        { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2976        { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2977        { "Mono ADC L1 Mux", "ADC",  "Mono ADC L Mux" },
2978
2979        { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2980        { "Mono ADC R1 Mux", "ADC", "Mono ADC R Mux" },
2981        { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2982        { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2983
2984        { "Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2985        { "Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2986        { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
2987
2988        { "Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2989        { "Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2990        { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
2991
2992        { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2993        { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2994        { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
2995
2996        { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2997        { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2998        { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
2999
3000        { "Stereo1 ADC Volume L", NULL, "Stereo1 ADC MIXL" },
3001        { "Stereo1 ADC Volume R", NULL, "Stereo1 ADC MIXR" },
3002
3003        { "IF_ADC1", NULL, "Stereo1 ADC Volume L" },
3004        { "IF_ADC1", NULL, "Stereo1 ADC Volume R" },
3005        { "IF_ADC2", NULL, "Mono ADC MIXL" },
3006        { "IF_ADC2", NULL, "Mono ADC MIXR" },
3007
3008        { "TDM AD1:AD2:DAC", NULL, "IF_ADC1" },
3009        { "TDM AD1:AD2:DAC", NULL, "IF_ADC2" },
3010        { "TDM AD1:AD2:DAC", NULL, "DAC_REF" },
3011        { "TDM AD2:DAC", NULL, "IF_ADC2" },
3012        { "TDM AD2:DAC", NULL, "DAC_REF" },
3013        { "TDM Data Mux", "AD1:AD2:DAC:NUL", "TDM AD1:AD2:DAC" },
3014        { "TDM Data Mux", "AD1:AD2:NUL:DAC", "TDM AD1:AD2:DAC" },
3015        { "TDM Data Mux", "AD1:DAC:AD2:NUL", "TDM AD1:AD2:DAC" },
3016        { "TDM Data Mux", "AD1:DAC:NUL:AD2", "TDM AD1:AD2:DAC" },
3017        { "TDM Data Mux", "AD1:NUL:DAC:AD2", "TDM AD1:AD2:DAC" },
3018        { "TDM Data Mux", "AD1:NUL:AD2:DAC", "TDM AD1:AD2:DAC" },
3019        { "TDM Data Mux", "AD2:AD1:DAC:NUL", "TDM AD1:AD2:DAC" },
3020        { "TDM Data Mux", "AD2:AD1:NUL:DAC", "TDM AD1:AD2:DAC" },
3021        { "TDM Data Mux", "AD2:DAC:AD1:NUL", "TDM AD1:AD2:DAC" },
3022        { "TDM Data Mux", "AD2:DAC:NUL:AD1", "TDM AD1:AD2:DAC" },
3023        { "TDM Data Mux", "AD2:NUL:DAC:AD1", "TDM AD1:AD2:DAC" },
3024        { "TDM Data Mux", "AD1:NUL:AD1:DAC", "TDM AD1:AD2:DAC" },
3025        { "TDM Data Mux", "DAC:AD1:AD2:NUL", "TDM AD1:AD2:DAC" },
3026        { "TDM Data Mux", "DAC:AD1:NUL:AD2", "TDM AD1:AD2:DAC" },
3027        { "TDM Data Mux", "DAC:AD2:AD1:NUL", "TDM AD1:AD2:DAC" },
3028        { "TDM Data Mux", "DAC:AD2:NUL:AD1", "TDM AD1:AD2:DAC" },
3029        { "TDM Data Mux", "DAC:NUL:DAC:AD2", "TDM AD2:DAC" },
3030        { "TDM Data Mux", "DAC:NUL:AD2:DAC", "TDM AD2:DAC" },
3031        { "TDM Data Mux", "NUL:AD1:AD2:DAC", "TDM AD1:AD2:DAC" },
3032        { "TDM Data Mux", "NUL:AD1:DAC:AD2", "TDM AD1:AD2:DAC" },
3033        { "TDM Data Mux", "NUL:AD2:AD1:DAC", "TDM AD1:AD2:DAC" },
3034        { "TDM Data Mux", "NUL:AD2:DAC:AD1", "TDM AD1:AD2:DAC" },
3035        { "TDM Data Mux", "NUL:DAC:DAC:AD2", "TDM AD2:DAC" },
3036        { "TDM Data Mux", "NUL:DAC:AD2:DAC", "TDM AD2:DAC" },
3037        { "IF1 01 ADC Swap Mux", "L/R", "TDM Data Mux" },
3038        { "IF1 01 ADC Swap Mux", "R/L", "TDM Data Mux" },
3039        { "IF1 01 ADC Swap Mux", "L/L", "TDM Data Mux" },
3040        { "IF1 01 ADC Swap Mux", "R/R", "TDM Data Mux" },
3041        { "IF1 23 ADC Swap Mux", "L/R", "TDM Data Mux" },
3042        { "IF1 23 ADC Swap Mux", "R/L", "TDM Data Mux" },
3043        { "IF1 23 ADC Swap Mux", "L/L", "TDM Data Mux" },
3044        { "IF1 23 ADC Swap Mux", "R/R", "TDM Data Mux" },
3045        { "IF1 45 ADC Swap Mux", "L/R", "TDM Data Mux" },
3046        { "IF1 45 ADC Swap Mux", "R/L", "TDM Data Mux" },
3047        { "IF1 45 ADC Swap Mux", "L/L", "TDM Data Mux" },
3048        { "IF1 45 ADC Swap Mux", "R/R", "TDM Data Mux" },
3049        { "IF1 67 ADC Swap Mux", "L/R", "TDM Data Mux" },
3050        { "IF1 67 ADC Swap Mux", "R/L", "TDM Data Mux" },
3051        { "IF1 67 ADC Swap Mux", "L/L", "TDM Data Mux" },
3052        { "IF1 67 ADC Swap Mux", "R/R", "TDM Data Mux" },
3053        { "IF1 ADC", NULL, "IF1 01 ADC Swap Mux" },
3054        { "IF1 ADC", NULL, "IF1 23 ADC Swap Mux" },
3055        { "IF1 ADC", NULL, "IF1 45 ADC Swap Mux" },
3056        { "IF1 ADC", NULL, "IF1 67 ADC Swap Mux" },
3057        { "IF1 ADC", NULL, "I2S1" },
3058
3059        { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
3060        { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
3061        { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
3062        { "IF2 ADC Mux", "DAC_REF", "DAC_REF" },
3063        { "IF2 ADC", NULL, "IF2 ADC Mux"},
3064        { "IF2 ADC", NULL, "I2S2" },
3065
3066        { "IF3 ADC Mux", "IF_ADC1", "IF_ADC1" },
3067        { "IF3 ADC Mux", "IF_ADC2", "IF_ADC2" },
3068        { "IF3 ADC Mux", "Stereo2_ADC_L/R", "Stereo2 ADC LR" },
3069        { "IF3 ADC Mux", "DAC_REF", "DAC_REF" },
3070        { "IF3 ADC", NULL, "IF3 ADC Mux"},
3071        { "IF3 ADC", NULL, "I2S3" },
3072
3073        { "AIF1TX", NULL, "IF1 ADC" },
3074        { "IF2 ADC Swap Mux", "L/R", "IF2 ADC" },
3075        { "IF2 ADC Swap Mux", "R/L", "IF2 ADC" },
3076        { "IF2 ADC Swap Mux", "L/L", "IF2 ADC" },
3077        { "IF2 ADC Swap Mux", "R/R", "IF2 ADC" },
3078        { "AIF2TX", NULL, "IF2 ADC Swap Mux" },
3079        { "IF3 ADC Swap Mux", "L/R", "IF3 ADC" },
3080        { "IF3 ADC Swap Mux", "R/L", "IF3 ADC" },
3081        { "IF3 ADC Swap Mux", "L/L", "IF3 ADC" },
3082        { "IF3 ADC Swap Mux", "R/R", "IF3 ADC" },
3083        { "AIF3TX", NULL, "IF3 ADC Swap Mux" },
3084
3085        { "IF1 DAC1", NULL, "AIF1RX" },
3086        { "IF1 DAC2", NULL, "AIF1RX" },
3087        { "IF2 DAC Swap Mux", "L/R", "AIF2RX" },
3088        { "IF2 DAC Swap Mux", "R/L", "AIF2RX" },
3089        { "IF2 DAC Swap Mux", "L/L", "AIF2RX" },
3090        { "IF2 DAC Swap Mux", "R/R", "AIF2RX" },
3091        { "IF2 DAC", NULL, "IF2 DAC Swap Mux" },
3092        { "IF3 DAC Swap Mux", "L/R", "AIF3RX" },
3093        { "IF3 DAC Swap Mux", "R/L", "AIF3RX" },
3094        { "IF3 DAC Swap Mux", "L/L", "AIF3RX" },
3095        { "IF3 DAC Swap Mux", "R/R", "AIF3RX" },
3096        { "IF3 DAC", NULL, "IF3 DAC Swap Mux" },
3097
3098        { "IF1 DAC1", NULL, "I2S1" },
3099        { "IF1 DAC2", NULL, "I2S1" },
3100        { "IF2 DAC", NULL, "I2S2" },
3101        { "IF3 DAC", NULL, "I2S3" },
3102
3103        { "IF1 DAC2 L", NULL, "IF1 DAC2" },
3104        { "IF1 DAC2 R", NULL, "IF1 DAC2" },
3105        { "IF1 DAC1 L", NULL, "IF1 DAC1" },
3106        { "IF1 DAC1 R", NULL, "IF1 DAC1" },
3107        { "IF2 DAC L", NULL, "IF2 DAC" },
3108        { "IF2 DAC R", NULL, "IF2 DAC" },
3109        { "IF3 DAC L", NULL, "IF3 DAC" },
3110        { "IF3 DAC R", NULL, "IF3 DAC" },
3111
3112        { "DAC L1 Mux", "IF1 DAC1", "IF1 DAC1 L" },
3113        { "DAC L1 Mux", "IF2 DAC", "IF2 DAC L" },
3114        { "DAC L1 Mux", "IF3 DAC", "IF3 DAC L" },
3115        { "DAC L1 Mux", NULL, "DAC Stereo1 Filter" },
3116
3117        { "DAC R1 Mux", "IF1 DAC1", "IF1 DAC1 R" },
3118        { "DAC R1 Mux", "IF2 DAC", "IF2 DAC R" },
3119        { "DAC R1 Mux", "IF3 DAC", "IF3 DAC R" },
3120        { "DAC R1 Mux", NULL, "DAC Stereo1 Filter" },
3121
3122        { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC Volume L" },
3123        { "DAC1 MIXL", "DAC1 Switch", "DAC L1 Mux" },
3124        { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC Volume R" },
3125        { "DAC1 MIXR", "DAC1 Switch", "DAC R1 Mux" },
3126
3127        { "DAC_REF", NULL, "DAC1 MIXL" },
3128        { "DAC_REF", NULL, "DAC1 MIXR" },
3129
3130        { "DAC L2 Mux", "IF1 DAC2", "IF1 DAC2 L" },
3131        { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
3132        { "DAC L2 Mux", "IF3 DAC", "IF3 DAC L" },
3133        { "DAC L2 Mux", "Mono ADC MIX", "Mono ADC MIXL" },
3134        { "DAC L2 Mux", NULL, "DAC Mono Left Filter" },
3135
3136        { "DAC R2 Mux", "IF1 DAC2", "IF1 DAC2 R" },
3137        { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
3138        { "DAC R2 Mux", "IF3 DAC", "IF3 DAC R" },
3139        { "DAC R2 Mux", "Mono ADC MIX", "Mono ADC MIXR" },
3140        { "DAC R2 Mux", NULL, "DAC Mono Right Filter" },
3141
3142        { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3143        { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3144        { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3145        { "Stereo DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3146
3147        { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3148        { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3149        { "Stereo DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3150        { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3151
3152        { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3153        { "Mono DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3154        { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3155        { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3156        { "Mono DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3157        { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3158        { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3159        { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3160
3161        { "DAC MIXL", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3162        { "DAC MIXL", "Mono DAC Mixer", "Mono DAC MIXL" },
3163        { "DAC MIXR", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3164        { "DAC MIXR", "Mono DAC Mixer", "Mono DAC MIXR" },
3165
3166        { "DAC L1 Source", NULL, "DAC L1 Power" },
3167        { "DAC L1 Source", "DAC", "DAC1 MIXL" },
3168        { "DAC L1 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3169        { "DAC R1 Source", NULL, "DAC R1 Power" },
3170        { "DAC R1 Source", "DAC", "DAC1 MIXR" },
3171        { "DAC R1 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3172        { "DAC L2 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3173        { "DAC L2 Source", "Mono DAC Mixer", "Mono DAC MIXL" },
3174        { "DAC L2 Source", NULL, "DAC L2 Power" },
3175        { "DAC R2 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3176        { "DAC R2 Source", "Mono DAC Mixer", "Mono DAC MIXR" },
3177        { "DAC R2 Source", NULL, "DAC R2 Power" },
3178
3179        { "DAC L1", NULL, "DAC L1 Source" },
3180        { "DAC R1", NULL, "DAC R1 Source" },
3181        { "DAC L2", NULL, "DAC L2 Source" },
3182        { "DAC R2", NULL, "DAC R2 Source" },
3183
3184        { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
3185        { "SPK MIXL", "BST1 Switch", "BST1" },
3186        { "SPK MIXL", "INL Switch", "INL VOL" },
3187        { "SPK MIXL", "INR Switch", "INR VOL" },
3188        { "SPK MIXL", "BST3 Switch", "BST3" },
3189        { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
3190        { "SPK MIXR", "BST4 Switch", "BST4" },
3191        { "SPK MIXR", "INL Switch", "INL VOL" },
3192        { "SPK MIXR", "INR Switch", "INR VOL" },
3193        { "SPK MIXR", "BST3 Switch", "BST3" },
3194
3195        { "MONOVOL MIX", "DAC L2 Switch", "DAC L2" },
3196        { "MONOVOL MIX", "DAC R2 Switch", "DAC R2" },
3197        { "MONOVOL MIX", "BST1 Switch", "BST1" },
3198        { "MONOVOL MIX", "BST2 Switch", "BST2" },
3199        { "MONOVOL MIX", "BST3 Switch", "BST3" },
3200
3201        { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
3202        { "OUT MIXL", "INL Switch", "INL VOL" },
3203        { "OUT MIXL", "BST1 Switch", "BST1" },
3204        { "OUT MIXL", "BST2 Switch", "BST2" },
3205        { "OUT MIXL", "BST3 Switch", "BST3" },
3206        { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
3207        { "OUT MIXR", "INR Switch", "INR VOL" },
3208        { "OUT MIXR", "BST2 Switch", "BST2" },
3209        { "OUT MIXR", "BST3 Switch", "BST3" },
3210        { "OUT MIXR", "BST4 Switch", "BST4" },
3211
3212        { "SPKVOL L", "Switch", "SPK MIXL" },
3213        { "SPKVOL R", "Switch", "SPK MIXR" },
3214        { "SPO L MIX", "DAC L2 Switch", "DAC L2" },
3215        { "SPO L MIX", "SPKVOL L Switch", "SPKVOL L" },
3216        { "SPO R MIX", "DAC R2 Switch", "DAC R2" },
3217        { "SPO R MIX", "SPKVOL R Switch", "SPKVOL R" },
3218        { "SPK Amp", NULL, "SPO L MIX" },
3219        { "SPK Amp", NULL, "SPO R MIX" },
3220        { "SPK Amp", NULL, "SYS CLK DET" },
3221        { "SPO Playback", "Switch", "SPK Amp" },
3222        { "SPOL", NULL, "SPO Playback" },
3223        { "SPOR", NULL, "SPO Playback" },
3224
3225        { "MONOVOL", "Switch", "MONOVOL MIX" },
3226        { "Mono MIX", "DAC L2 Switch", "DAC L2" },
3227        { "Mono MIX", "MONOVOL Switch", "MONOVOL" },
3228        { "Mono Amp", NULL, "Mono MIX" },
3229        { "Mono Amp", NULL, "Mono Vref" },
3230        { "Mono Amp", NULL, "SYS CLK DET" },
3231        { "Mono Playback", "Switch", "Mono Amp" },
3232        { "MONOOUT", NULL, "Mono Playback" },
3233
3234        { "HP Amp", NULL, "DAC L1" },
3235        { "HP Amp", NULL, "DAC R1" },
3236        { "HP Amp", NULL, "Charge Pump" },
3237        { "HP Amp", NULL, "SYS CLK DET" },
3238        { "HPO L Playback", "Switch", "HP Amp"},
3239        { "HPO R Playback", "Switch", "HP Amp"},
3240        { "HPOL", NULL, "HPO L Playback" },
3241        { "HPOR", NULL, "HPO R Playback" },
3242
3243        { "OUTVOL L", "Switch", "OUT MIXL" },
3244        { "OUTVOL R", "Switch", "OUT MIXR" },
3245        { "LOUT L MIX", "DAC L2 Switch", "DAC L2" },
3246        { "LOUT L MIX", "OUTVOL L Switch", "OUTVOL L" },
3247        { "LOUT R MIX", "DAC R2 Switch", "DAC R2" },
3248        { "LOUT R MIX", "OUTVOL R Switch", "OUTVOL R" },
3249        { "LOUT Amp", NULL, "LOUT L MIX" },
3250        { "LOUT Amp", NULL, "LOUT R MIX" },
3251        { "LOUT Amp", NULL, "Charge Pump" },
3252        { "LOUT Amp", NULL, "SYS CLK DET" },
3253        { "LOUT L Playback", "Switch", "LOUT Amp" },
3254        { "LOUT R Playback", "Switch", "LOUT Amp" },
3255        { "LOUTL", NULL, "LOUT L Playback" },
3256        { "LOUTR", NULL, "LOUT R Playback" },
3257
3258        { "PDM L Mux", "Mono DAC", "Mono DAC MIXL" },
3259        { "PDM L Mux", "Stereo DAC", "Stereo DAC MIXL" },
3260        { "PDM L Mux", NULL, "PDM Power" },
3261        { "PDM R Mux", "Mono DAC", "Mono DAC MIXR" },
3262        { "PDM R Mux", "Stereo DAC", "Stereo DAC MIXR" },
3263        { "PDM R Mux", NULL, "PDM Power" },
3264        { "PDM L Playback", "Switch", "PDM L Mux" },
3265        { "PDM R Playback", "Switch", "PDM R Mux" },
3266        { "PDML", NULL, "PDM L Playback" },
3267        { "PDMR", NULL, "PDM R Playback" },
3268
3269        { "SPDIF Mux", "IF3_DAC", "IF3 DAC" },
3270        { "SPDIF Mux", "IF2_DAC", "IF2 DAC" },
3271        { "SPDIF Mux", "IF1_DAC2", "IF1 DAC2" },
3272        { "SPDIF Mux", "IF1_DAC1", "IF1 DAC1" },
3273        { "SPDIF", NULL, "SPDIF Mux" },
3274};
3275
3276static int rt5659_hw_params(struct snd_pcm_substream *substream,
3277        struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
3278{
3279        struct snd_soc_component *component = dai->component;
3280        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3281        unsigned int val_len = 0, val_clk, mask_clk;
3282        int pre_div, frame_size;
3283
3284        rt5659->lrck[dai->id] = params_rate(params);
3285        pre_div = rl6231_get_clk_info(rt5659->sysclk, rt5659->lrck[dai->id]);
3286        if (pre_div < 0) {
3287                dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
3288                        rt5659->lrck[dai->id], dai->id);
3289                return -EINVAL;
3290        }
3291        frame_size = snd_soc_params_to_frame_size(params);
3292        if (frame_size < 0) {
3293                dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
3294                return -EINVAL;
3295        }
3296
3297        dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
3298                                rt5659->lrck[dai->id], pre_div, dai->id);
3299
3300        switch (params_width(params)) {
3301        case 16:
3302                break;
3303        case 20:
3304                val_len |= RT5659_I2S_DL_20;
3305                break;
3306        case 24:
3307                val_len |= RT5659_I2S_DL_24;
3308                break;
3309        case 8:
3310                val_len |= RT5659_I2S_DL_8;
3311                break;
3312        default:
3313                return -EINVAL;
3314        }
3315
3316        switch (dai->id) {
3317        case RT5659_AIF1:
3318                mask_clk = RT5659_I2S_PD1_MASK;
3319                val_clk = pre_div << RT5659_I2S_PD1_SFT;
3320                snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3321                        RT5659_I2S_DL_MASK, val_len);
3322                break;
3323        case RT5659_AIF2:
3324                mask_clk = RT5659_I2S_PD2_MASK;
3325                val_clk = pre_div << RT5659_I2S_PD2_SFT;
3326                snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3327                        RT5659_I2S_DL_MASK, val_len);
3328                break;
3329        case RT5659_AIF3:
3330                mask_clk = RT5659_I2S_PD3_MASK;
3331                val_clk = pre_div << RT5659_I2S_PD3_SFT;
3332                snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3333                        RT5659_I2S_DL_MASK, val_len);
3334                break;
3335        default:
3336                dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3337                return -EINVAL;
3338        }
3339
3340        snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1, mask_clk, val_clk);
3341
3342        switch (rt5659->lrck[dai->id]) {
3343        case 192000:
3344                snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3345                        RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_32);
3346                break;
3347        case 96000:
3348                snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3349                        RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_64);
3350                break;
3351        default:
3352                snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3353                        RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_128);
3354                break;
3355        }
3356
3357        return 0;
3358}
3359
3360static int rt5659_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3361{
3362        struct snd_soc_component *component = dai->component;
3363        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3364        unsigned int reg_val = 0;
3365
3366        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3367        case SND_SOC_DAIFMT_CBM_CFM:
3368                rt5659->master[dai->id] = 1;
3369                break;
3370        case SND_SOC_DAIFMT_CBS_CFS:
3371                reg_val |= RT5659_I2S_MS_S;
3372                rt5659->master[dai->id] = 0;
3373                break;
3374        default:
3375                return -EINVAL;
3376        }
3377
3378        switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
3379        case SND_SOC_DAIFMT_NB_NF:
3380                break;
3381        case SND_SOC_DAIFMT_IB_NF:
3382                reg_val |= RT5659_I2S_BP_INV;
3383                break;
3384        default:
3385                return -EINVAL;
3386        }
3387
3388        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
3389        case SND_SOC_DAIFMT_I2S:
3390                break;
3391        case SND_SOC_DAIFMT_LEFT_J:
3392                reg_val |= RT5659_I2S_DF_LEFT;
3393                break;
3394        case SND_SOC_DAIFMT_DSP_A:
3395                reg_val |= RT5659_I2S_DF_PCM_A;
3396                break;
3397        case SND_SOC_DAIFMT_DSP_B:
3398                reg_val |= RT5659_I2S_DF_PCM_B;
3399                break;
3400        default:
3401                return -EINVAL;
3402        }
3403
3404        switch (dai->id) {
3405        case RT5659_AIF1:
3406                snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3407                        RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3408                        RT5659_I2S_DF_MASK, reg_val);
3409                break;
3410        case RT5659_AIF2:
3411                snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3412                        RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3413                        RT5659_I2S_DF_MASK, reg_val);
3414                break;
3415        case RT5659_AIF3:
3416                snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3417                        RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3418                        RT5659_I2S_DF_MASK, reg_val);
3419                break;
3420        default:
3421                dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3422                return -EINVAL;
3423        }
3424        return 0;
3425}
3426
3427static int rt5659_set_component_sysclk(struct snd_soc_component *component, int clk_id,
3428                                   int source, unsigned int freq, int dir)
3429{
3430        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3431        unsigned int reg_val = 0;
3432        int ret;
3433
3434        if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src)
3435                return 0;
3436
3437        switch (clk_id) {
3438        case RT5659_SCLK_S_MCLK:
3439                ret = clk_set_rate(rt5659->mclk, freq);
3440                if (ret)
3441                        return ret;
3442
3443                reg_val |= RT5659_SCLK_SRC_MCLK;
3444                break;
3445        case RT5659_SCLK_S_PLL1:
3446                reg_val |= RT5659_SCLK_SRC_PLL1;
3447                break;
3448        case RT5659_SCLK_S_RCCLK:
3449                reg_val |= RT5659_SCLK_SRC_RCCLK;
3450                break;
3451        default:
3452                dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
3453                return -EINVAL;
3454        }
3455        snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3456                RT5659_SCLK_SRC_MASK, reg_val);
3457        rt5659->sysclk = freq;
3458        rt5659->sysclk_src = clk_id;
3459
3460        dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
3461                freq, clk_id);
3462
3463        return 0;
3464}
3465
3466static int rt5659_set_component_pll(struct snd_soc_component *component, int pll_id,
3467                                int source, unsigned int freq_in,
3468                                unsigned int freq_out)
3469{
3470        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3471        struct rl6231_pll_code pll_code;
3472        int ret;
3473
3474        if (source == rt5659->pll_src && freq_in == rt5659->pll_in &&
3475            freq_out == rt5659->pll_out)
3476                return 0;
3477
3478        if (!freq_in || !freq_out) {
3479                dev_dbg(component->dev, "PLL disabled\n");
3480
3481                rt5659->pll_in = 0;
3482                rt5659->pll_out = 0;
3483                snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3484                        RT5659_SCLK_SRC_MASK, RT5659_SCLK_SRC_MCLK);
3485                return 0;
3486        }
3487
3488        switch (source) {
3489        case RT5659_PLL1_S_MCLK:
3490                snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3491                        RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_MCLK);
3492                break;
3493        case RT5659_PLL1_S_BCLK1:
3494                snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3495                                RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK1);
3496                break;
3497        case RT5659_PLL1_S_BCLK2:
3498                snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3499                                RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK2);
3500                break;
3501        case RT5659_PLL1_S_BCLK3:
3502                snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3503                                RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK3);
3504                break;
3505        default:
3506                dev_err(component->dev, "Unknown PLL source %d\n", source);
3507                return -EINVAL;
3508        }
3509
3510        ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
3511        if (ret < 0) {
3512                dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
3513                return ret;
3514        }
3515
3516        dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
3517                pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
3518                pll_code.n_code, pll_code.k_code);
3519
3520        snd_soc_component_write(component, RT5659_PLL_CTRL_1,
3521                pll_code.n_code << RT5659_PLL_N_SFT | pll_code.k_code);
3522        snd_soc_component_write(component, RT5659_PLL_CTRL_2,
3523                ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5659_PLL_M_SFT) |
3524                (pll_code.m_bp << RT5659_PLL_M_BP_SFT));
3525
3526        rt5659->pll_in = freq_in;
3527        rt5659->pll_out = freq_out;
3528        rt5659->pll_src = source;
3529
3530        return 0;
3531}
3532
3533static int rt5659_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
3534                        unsigned int rx_mask, int slots, int slot_width)
3535{
3536        struct snd_soc_component *component = dai->component;
3537        unsigned int val = 0;
3538
3539        if (rx_mask || tx_mask)
3540                val |= (1 << 15);
3541
3542        switch (slots) {
3543        case 4:
3544                val |= (1 << 10);
3545                val |= (1 << 8);
3546                break;
3547        case 6:
3548                val |= (2 << 10);
3549                val |= (2 << 8);
3550                break;
3551        case 8:
3552                val |= (3 << 10);
3553                val |= (3 << 8);
3554                break;
3555        case 2:
3556                break;
3557        default:
3558                return -EINVAL;
3559        }
3560
3561        switch (slot_width) {
3562        case 20:
3563                val |= (1 << 6);
3564                val |= (1 << 4);
3565                break;
3566        case 24:
3567                val |= (2 << 6);
3568                val |= (2 << 4);
3569                break;
3570        case 32:
3571                val |= (3 << 6);
3572                val |= (3 << 4);
3573                break;
3574        case 16:
3575                break;
3576        default:
3577                return -EINVAL;
3578        }
3579
3580        snd_soc_component_update_bits(component, RT5659_TDM_CTRL_1, 0x8ff0, val);
3581
3582        return 0;
3583}
3584
3585static int rt5659_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
3586{
3587        struct snd_soc_component *component = dai->component;
3588        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3589
3590        dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
3591
3592        rt5659->bclk[dai->id] = ratio;
3593
3594        if (ratio == 64) {
3595                switch (dai->id) {
3596                case RT5659_AIF2:
3597                        snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3598                                RT5659_I2S_BCLK_MS2_MASK,
3599                                RT5659_I2S_BCLK_MS2_64);
3600                        break;
3601                case RT5659_AIF3:
3602                        snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3603                                RT5659_I2S_BCLK_MS3_MASK,
3604                                RT5659_I2S_BCLK_MS3_64);
3605                        break;
3606                }
3607        }
3608
3609        return 0;
3610}
3611
3612static int rt5659_set_bias_level(struct snd_soc_component *component,
3613                        enum snd_soc_bias_level level)
3614{
3615        struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3616        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3617        int ret;
3618
3619        switch (level) {
3620        case SND_SOC_BIAS_PREPARE:
3621                regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3622                        RT5659_DIG_GATE_CTRL, RT5659_DIG_GATE_CTRL);
3623                regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3624                        RT5659_PWR_LDO, RT5659_PWR_LDO);
3625                regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3626                        RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2,
3627                        RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2);
3628                msleep(20);
3629                regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3630                        RT5659_PWR_FV1 | RT5659_PWR_FV2,
3631                        RT5659_PWR_FV1 | RT5659_PWR_FV2);
3632                break;
3633
3634        case SND_SOC_BIAS_STANDBY:
3635                if (dapm->bias_level == SND_SOC_BIAS_OFF) {
3636                        ret = clk_prepare_enable(rt5659->mclk);
3637                        if (ret) {
3638                                dev_err(component->dev,
3639                                        "failed to enable MCLK: %d\n", ret);
3640                                return ret;
3641                        }
3642                }
3643                break;
3644
3645        case SND_SOC_BIAS_OFF:
3646                regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3647                        RT5659_PWR_LDO, 0);
3648                regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3649                        RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2
3650                        | RT5659_PWR_FV1 | RT5659_PWR_FV2,
3651                        RT5659_PWR_MB | RT5659_PWR_VREF2);
3652                regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3653                        RT5659_DIG_GATE_CTRL, 0);
3654                clk_disable_unprepare(rt5659->mclk);
3655                break;
3656
3657        default:
3658                break;
3659        }
3660
3661        return 0;
3662}
3663
3664static int rt5659_probe(struct snd_soc_component *component)
3665{
3666        struct snd_soc_dapm_context *dapm =
3667                snd_soc_component_get_dapm(component);
3668        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3669
3670        rt5659->component = component;
3671
3672        switch (rt5659->pdata.jd_src) {
3673        case RT5659_JD_HDA_HEADER:
3674                break;
3675
3676        default:
3677                snd_soc_dapm_new_controls(dapm,
3678                        rt5659_particular_dapm_widgets,
3679                        ARRAY_SIZE(rt5659_particular_dapm_widgets));
3680                break;
3681        }
3682
3683        return 0;
3684}
3685
3686static void rt5659_remove(struct snd_soc_component *component)
3687{
3688        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3689
3690        regmap_write(rt5659->regmap, RT5659_RESET, 0);
3691}
3692
3693#ifdef CONFIG_PM
3694static int rt5659_suspend(struct snd_soc_component *component)
3695{
3696        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3697
3698        regcache_cache_only(rt5659->regmap, true);
3699        regcache_mark_dirty(rt5659->regmap);
3700        return 0;
3701}
3702
3703static int rt5659_resume(struct snd_soc_component *component)
3704{
3705        struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3706
3707        regcache_cache_only(rt5659->regmap, false);
3708        regcache_sync(rt5659->regmap);
3709
3710        return 0;
3711}
3712#else
3713#define rt5659_suspend NULL
3714#define rt5659_resume NULL
3715#endif
3716
3717#define RT5659_STEREO_RATES SNDRV_PCM_RATE_8000_192000
3718#define RT5659_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3719                SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3720
3721static const struct snd_soc_dai_ops rt5659_aif_dai_ops = {
3722        .hw_params = rt5659_hw_params,
3723        .set_fmt = rt5659_set_dai_fmt,
3724        .set_tdm_slot = rt5659_set_tdm_slot,
3725        .set_bclk_ratio = rt5659_set_bclk_ratio,
3726};
3727
3728static struct snd_soc_dai_driver rt5659_dai[] = {
3729        {
3730                .name = "rt5659-aif1",
3731                .id = RT5659_AIF1,
3732                .playback = {
3733                        .stream_name = "AIF1 Playback",
3734                        .channels_min = 1,
3735                        .channels_max = 2,
3736                        .rates = RT5659_STEREO_RATES,
3737                        .formats = RT5659_FORMATS,
3738                },
3739                .capture = {
3740                        .stream_name = "AIF1 Capture",
3741                        .channels_min = 1,
3742                        .channels_max = 2,
3743                        .rates = RT5659_STEREO_RATES,
3744                        .formats = RT5659_FORMATS,
3745                },
3746                .ops = &rt5659_aif_dai_ops,
3747        },
3748        {
3749                .name = "rt5659-aif2",
3750                .id = RT5659_AIF2,
3751                .playback = {
3752                        .stream_name = "AIF2 Playback",
3753                        .channels_min = 1,
3754                        .channels_max = 2,
3755                        .rates = RT5659_STEREO_RATES,
3756                        .formats = RT5659_FORMATS,
3757                },
3758                .capture = {
3759                        .stream_name = "AIF2 Capture",
3760                        .channels_min = 1,
3761                        .channels_max = 2,
3762                        .rates = RT5659_STEREO_RATES,
3763                        .formats = RT5659_FORMATS,
3764                },
3765                .ops = &rt5659_aif_dai_ops,
3766        },
3767        {
3768                .name = "rt5659-aif3",
3769                .id = RT5659_AIF3,
3770                .playback = {
3771                        .stream_name = "AIF3 Playback",
3772                        .channels_min = 1,
3773                        .channels_max = 2,
3774                        .rates = RT5659_STEREO_RATES,
3775                        .formats = RT5659_FORMATS,
3776                },
3777                .capture = {
3778                        .stream_name = "AIF3 Capture",
3779                        .channels_min = 1,
3780                        .channels_max = 2,
3781                        .rates = RT5659_STEREO_RATES,
3782                        .formats = RT5659_FORMATS,
3783                },
3784                .ops = &rt5659_aif_dai_ops,
3785        },
3786};
3787
3788static const struct snd_soc_component_driver soc_component_dev_rt5659 = {
3789        .probe                  = rt5659_probe,
3790        .remove                 = rt5659_remove,
3791        .suspend                = rt5659_suspend,
3792        .resume                 = rt5659_resume,
3793        .set_bias_level         = rt5659_set_bias_level,
3794        .controls               = rt5659_snd_controls,
3795        .num_controls           = ARRAY_SIZE(rt5659_snd_controls),
3796        .dapm_widgets           = rt5659_dapm_widgets,
3797        .num_dapm_widgets       = ARRAY_SIZE(rt5659_dapm_widgets),
3798        .dapm_routes            = rt5659_dapm_routes,
3799        .num_dapm_routes        = ARRAY_SIZE(rt5659_dapm_routes),
3800        .set_sysclk             = rt5659_set_component_sysclk,
3801        .set_pll                = rt5659_set_component_pll,
3802        .use_pmdown_time        = 1,
3803        .endianness             = 1,
3804        .non_legacy_dai_naming  = 1,
3805};
3806
3807
3808static const struct regmap_config rt5659_regmap = {
3809        .reg_bits = 16,
3810        .val_bits = 16,
3811        .max_register = 0x0400,
3812        .volatile_reg = rt5659_volatile_register,
3813        .readable_reg = rt5659_readable_register,
3814        .cache_type = REGCACHE_RBTREE,
3815        .reg_defaults = rt5659_reg,
3816        .num_reg_defaults = ARRAY_SIZE(rt5659_reg),
3817};
3818
3819static const struct i2c_device_id rt5659_i2c_id[] = {
3820        { "rt5658", 0 },
3821        { "rt5659", 0 },
3822        { }
3823};
3824MODULE_DEVICE_TABLE(i2c, rt5659_i2c_id);
3825
3826static int rt5659_parse_dt(struct rt5659_priv *rt5659, struct device *dev)
3827{
3828        rt5659->pdata.in1_diff = device_property_read_bool(dev,
3829                                        "realtek,in1-differential");
3830        rt5659->pdata.in3_diff = device_property_read_bool(dev,
3831                                        "realtek,in3-differential");
3832        rt5659->pdata.in4_diff = device_property_read_bool(dev,
3833                                        "realtek,in4-differential");
3834
3835
3836        device_property_read_u32(dev, "realtek,dmic1-data-pin",
3837                &rt5659->pdata.dmic1_data_pin);
3838        device_property_read_u32(dev, "realtek,dmic2-data-pin",
3839                &rt5659->pdata.dmic2_data_pin);
3840        device_property_read_u32(dev, "realtek,jd-src",
3841                &rt5659->pdata.jd_src);
3842
3843        return 0;
3844}
3845
3846static void rt5659_calibrate(struct rt5659_priv *rt5659)
3847{
3848        int value, count;
3849
3850        /* Calibrate HPO Start */
3851        /* Fine tune HP Performance */
3852        regmap_write(rt5659->regmap, RT5659_BIAS_CUR_CTRL_8, 0xa502);
3853        regmap_write(rt5659->regmap, RT5659_CHOP_DAC, 0x3030);
3854
3855        regmap_write(rt5659->regmap, RT5659_PRE_DIV_1, 0xef00);
3856        regmap_write(rt5659->regmap, RT5659_PRE_DIV_2, 0xeffc);
3857        regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0280);
3858        regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0001);
3859        regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x8000);
3860
3861        regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xaa7e);
3862        msleep(60);
3863        regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe7e);
3864        msleep(50);
3865        regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0004);
3866        regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0400);
3867        msleep(50);
3868        regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0080);
3869        usleep_range(10000, 10005);
3870        regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0009);
3871        msleep(50);
3872        regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0f80);
3873        msleep(50);
3874        regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0e16);
3875        msleep(50);
3876
3877        /* Enalbe K ADC Power And Clock */
3878        regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0505);
3879        msleep(50);
3880        regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0184);
3881        regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x3c05);
3882        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c1);
3883
3884        /* K Headphone */
3885        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3886        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x5100);
3887        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0014);
3888        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0xd100);
3889        msleep(60);
3890
3891        /* Manual K ADC Offset */
3892        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3893        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4900);
3894        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0016);
3895        regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3896                0x8000, 0x8000);
3897
3898        count = 0;
3899        while (true) {
3900                regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3901                if (value & 0x8000)
3902                        usleep_range(10000, 10005);
3903                else
3904                        break;
3905
3906                if (count > 30) {
3907                        dev_err(rt5659->component->dev,
3908                                "HP Calibration 1 Failure\n");
3909                        return;
3910                }
3911
3912                count++;
3913        }
3914
3915        /* Manual K Internal Path Offset */
3916        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3917        regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x0000);
3918        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4500);
3919        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x001f);
3920        regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3921                0x8000, 0x8000);
3922
3923        count = 0;
3924        while (true) {
3925                regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3926                if (value & 0x8000)
3927                        usleep_range(10000, 10005);
3928                else
3929                        break;
3930
3931                if (count > 85) {
3932                        dev_err(rt5659->component->dev,
3933                                "HP Calibration 2 Failure\n");
3934                        return;
3935                }
3936
3937                count++;
3938        }
3939
3940        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0000);
3941        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
3942        /* Calibrate HPO End */
3943
3944        /* Calibrate SPO Start */
3945        regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
3946        regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0260);
3947        regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x3000);
3948        regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0xc000);
3949        regmap_write(rt5659->regmap, RT5659_A_DAC_MUX, 0x000c);
3950        regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x8000);
3951        regmap_write(rt5659->regmap, RT5659_SPO_VOL, 0x0808);
3952        regmap_write(rt5659->regmap, RT5659_SPK_L_MIXER, 0x001e);
3953        regmap_write(rt5659->regmap, RT5659_SPK_R_MIXER, 0x001e);
3954        regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0803);
3955        regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0554);
3956        regmap_write(rt5659->regmap, RT5659_SPO_AMP_GAIN, 0x1103);
3957
3958        /* Enalbe K ADC Power And Clock */
3959        regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0909);
3960        regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x0001,
3961                0x0001);
3962
3963        /* Start Calibration */
3964        regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
3965        regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x0021);
3966        regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1, 0x3e80);
3967        regmap_update_bits(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1,
3968                0x8000, 0x8000);
3969
3970        count = 0;
3971        while (true) {
3972                regmap_read(rt5659->regmap,
3973                                RT5659_SPK_DC_CAILB_CTRL_1, &value);
3974                if (value & 0x8000)
3975                        usleep_range(10000, 10005);
3976                else
3977                        break;
3978
3979                if (count > 10) {
3980                        dev_err(rt5659->component->dev,
3981                                "SPK Calibration Failure\n");
3982                        return;
3983                }
3984
3985                count++;
3986        }
3987        /* Calibrate SPO End */
3988
3989        /* Calibrate MONO Start */
3990        regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0000);
3991        regmap_write(rt5659->regmap, RT5659_MONOMIX_IN_GAIN, 0x021f);
3992        regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0x480a);
3993        /* MONO NG2 GAIN 5dB */
3994        regmap_write(rt5659->regmap, RT5659_MONO_GAIN, 0x0003);
3995        regmap_write(rt5659->regmap, RT5659_MONO_NG2_CTRL_5, 0x0009);
3996
3997        /* Start Calibration */
3998        regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x000f);
3999        regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
4000        regmap_update_bits(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4001                0x8000, 0x8000);
4002
4003        count = 0;
4004        while (true) {
4005                regmap_read(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4006                        &value);
4007                if (value & 0x8000)
4008                        usleep_range(10000, 10005);
4009                else
4010                        break;
4011
4012                if (count > 35) {
4013                        dev_err(rt5659->component->dev,
4014                                "Mono Calibration Failure\n");
4015                        return;
4016                }
4017
4018                count++;
4019        }
4020
4021        regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
4022        /* Calibrate MONO End */
4023
4024        /* Power Off */
4025        regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0808);
4026        regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0000);
4027        regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x2005);
4028        regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
4029        regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0000);
4030        regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0011);
4031        regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0150);
4032        regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe3e);
4033        regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0xc80a);
4034        regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
4035        regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x0000);
4036        regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0x0000);
4037        regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0000);
4038        regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0000);
4039        regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0x003e);
4040        regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0060);
4041        regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
4042        regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x0000);
4043        regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0080);
4044        regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x8080);
4045        regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
4046}
4047
4048static void rt5659_intel_hd_header_probe_setup(struct rt5659_priv *rt5659)
4049{
4050        int value;
4051
4052        regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
4053        if (!(value & 0x8)) {
4054                rt5659->hda_hp_plugged = true;
4055                regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4056                        0x10, 0x0);
4057        } else {
4058                regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4059                        0x10, 0x10);
4060        }
4061
4062        regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4063                RT5659_PWR_VREF2 | RT5659_PWR_MB,
4064                RT5659_PWR_VREF2 | RT5659_PWR_MB);
4065        msleep(20);
4066        regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4067                RT5659_PWR_FV2, RT5659_PWR_FV2);
4068
4069        regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_3, RT5659_PWR_LDO2,
4070                RT5659_PWR_LDO2);
4071        regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_2, RT5659_PWR_MB1,
4072                RT5659_PWR_MB1);
4073        regmap_update_bits(rt5659->regmap, RT5659_PWR_VOL, RT5659_PWR_MIC_DET,
4074                RT5659_PWR_MIC_DET);
4075        msleep(20);
4076
4077        regmap_update_bits(rt5659->regmap, RT5659_4BTN_IL_CMD_2,
4078                RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
4079        regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4080        regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
4081        regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4082
4083        if (value & 0x2000) {
4084                rt5659->hda_mic_plugged = true;
4085                regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4086                        0x2, 0x2);
4087        } else {
4088                regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4089                        0x2, 0x0);
4090        }
4091
4092        regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4093                RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
4094}
4095
4096static int rt5659_i2c_probe(struct i2c_client *i2c,
4097                    const struct i2c_device_id *id)
4098{
4099        struct rt5659_platform_data *pdata = dev_get_platdata(&i2c->dev);
4100        struct rt5659_priv *rt5659;
4101        int ret;
4102        unsigned int val;
4103
4104        rt5659 = devm_kzalloc(&i2c->dev, sizeof(struct rt5659_priv),
4105                GFP_KERNEL);
4106
4107        if (rt5659 == NULL)
4108                return -ENOMEM;
4109
4110        i2c_set_clientdata(i2c, rt5659);
4111
4112        if (pdata)
4113                rt5659->pdata = *pdata;
4114        else
4115                rt5659_parse_dt(rt5659, &i2c->dev);
4116
4117        rt5659->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev, "ldo1-en",
4118                                                        GPIOD_OUT_HIGH);
4119        if (IS_ERR(rt5659->gpiod_ldo1_en))
4120                dev_warn(&i2c->dev, "Request ldo1-en GPIO failed\n");
4121
4122        rt5659->gpiod_reset = devm_gpiod_get_optional(&i2c->dev, "reset",
4123                                                        GPIOD_OUT_HIGH);
4124
4125        /* Sleep for 300 ms miniumum */
4126        msleep(300);
4127
4128        rt5659->regmap = devm_regmap_init_i2c(i2c, &rt5659_regmap);
4129        if (IS_ERR(rt5659->regmap)) {
4130                ret = PTR_ERR(rt5659->regmap);
4131                dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
4132                        ret);
4133                return ret;
4134        }
4135
4136        regmap_read(rt5659->regmap, RT5659_DEVICE_ID, &val);
4137        if (val != DEVICE_ID) {
4138                dev_err(&i2c->dev,
4139                        "Device with ID register %x is not rt5659\n", val);
4140                return -ENODEV;
4141        }
4142
4143        regmap_write(rt5659->regmap, RT5659_RESET, 0);
4144
4145        /* Check if MCLK provided */
4146        rt5659->mclk = devm_clk_get(&i2c->dev, "mclk");
4147        if (IS_ERR(rt5659->mclk)) {
4148                if (PTR_ERR(rt5659->mclk) != -ENOENT)
4149                        return PTR_ERR(rt5659->mclk);
4150                /* Otherwise mark the mclk pointer to NULL */
4151                rt5659->mclk = NULL;
4152        }
4153
4154        rt5659_calibrate(rt5659);
4155
4156        /* line in diff mode*/
4157        if (rt5659->pdata.in1_diff)
4158                regmap_update_bits(rt5659->regmap, RT5659_IN1_IN2,
4159                        RT5659_IN1_DF_MASK, RT5659_IN1_DF_MASK);
4160        if (rt5659->pdata.in3_diff)
4161                regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4162                        RT5659_IN3_DF_MASK, RT5659_IN3_DF_MASK);
4163        if (rt5659->pdata.in4_diff)
4164                regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4165                        RT5659_IN4_DF_MASK, RT5659_IN4_DF_MASK);
4166
4167        /* DMIC pin*/
4168        if (rt5659->pdata.dmic1_data_pin != RT5659_DMIC1_NULL ||
4169                rt5659->pdata.dmic2_data_pin != RT5659_DMIC2_NULL) {
4170                regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4171                        RT5659_GP2_PIN_MASK, RT5659_GP2_PIN_DMIC1_SCL);
4172
4173                switch (rt5659->pdata.dmic1_data_pin) {
4174                case RT5659_DMIC1_DATA_IN2N:
4175                        regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4176                                RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_IN2N);
4177                        break;
4178
4179                case RT5659_DMIC1_DATA_GPIO5:
4180                        regmap_update_bits(rt5659->regmap,
4181                                RT5659_GPIO_CTRL_3,
4182                                RT5659_I2S2_PIN_MASK,
4183                                RT5659_I2S2_PIN_GPIO);
4184                        regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4185                                RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO5);
4186                        regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4187                                RT5659_GP5_PIN_MASK, RT5659_GP5_PIN_DMIC1_SDA);
4188                        break;
4189
4190                case RT5659_DMIC1_DATA_GPIO9:
4191                        regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4192                                RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO9);
4193                        regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4194                                RT5659_GP9_PIN_MASK, RT5659_GP9_PIN_DMIC1_SDA);
4195                        break;
4196
4197                case RT5659_DMIC1_DATA_GPIO11:
4198                        regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4199                                RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO11);
4200                        regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4201                                RT5659_GP11_PIN_MASK,
4202                                RT5659_GP11_PIN_DMIC1_SDA);
4203                        break;
4204
4205                default:
4206                        dev_dbg(&i2c->dev, "no DMIC1\n");
4207                        break;
4208                }
4209
4210                switch (rt5659->pdata.dmic2_data_pin) {
4211                case RT5659_DMIC2_DATA_IN2P:
4212                        regmap_update_bits(rt5659->regmap,
4213                                RT5659_DMIC_CTRL_1,
4214                                RT5659_DMIC_2_DP_MASK,
4215                                RT5659_DMIC_2_DP_IN2P);
4216                        break;
4217
4218                case RT5659_DMIC2_DATA_GPIO6:
4219                        regmap_update_bits(rt5659->regmap,
4220                                RT5659_DMIC_CTRL_1,
4221                                RT5659_DMIC_2_DP_MASK,
4222                                RT5659_DMIC_2_DP_GPIO6);
4223                        regmap_update_bits(rt5659->regmap,
4224                                RT5659_GPIO_CTRL_1,
4225                                RT5659_GP6_PIN_MASK,
4226                                RT5659_GP6_PIN_DMIC2_SDA);
4227                        break;
4228
4229                case RT5659_DMIC2_DATA_GPIO10:
4230                        regmap_update_bits(rt5659->regmap,
4231                                RT5659_DMIC_CTRL_1,
4232                                RT5659_DMIC_2_DP_MASK,
4233                                RT5659_DMIC_2_DP_GPIO10);
4234                        regmap_update_bits(rt5659->regmap,
4235                                RT5659_GPIO_CTRL_1,
4236                                RT5659_GP10_PIN_MASK,
4237                                RT5659_GP10_PIN_DMIC2_SDA);
4238                        break;
4239
4240                case RT5659_DMIC2_DATA_GPIO12:
4241                        regmap_update_bits(rt5659->regmap,
4242                                RT5659_DMIC_CTRL_1,
4243                                RT5659_DMIC_2_DP_MASK,
4244                                RT5659_DMIC_2_DP_GPIO12);
4245                        regmap_update_bits(rt5659->regmap,
4246                                RT5659_GPIO_CTRL_1,
4247                                RT5659_GP12_PIN_MASK,
4248                                RT5659_GP12_PIN_DMIC2_SDA);
4249                        break;
4250
4251                default:
4252                        dev_dbg(&i2c->dev, "no DMIC2\n");
4253                        break;
4254
4255                }
4256        } else {
4257                regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4258                        RT5659_GP2_PIN_MASK | RT5659_GP5_PIN_MASK |
4259                        RT5659_GP9_PIN_MASK | RT5659_GP11_PIN_MASK |
4260                        RT5659_GP6_PIN_MASK | RT5659_GP10_PIN_MASK |
4261                        RT5659_GP12_PIN_MASK,
4262                        RT5659_GP2_PIN_GPIO2 | RT5659_GP5_PIN_GPIO5 |
4263                        RT5659_GP9_PIN_GPIO9 | RT5659_GP11_PIN_GPIO11 |
4264                        RT5659_GP6_PIN_GPIO6 | RT5659_GP10_PIN_GPIO10 |
4265                        RT5659_GP12_PIN_GPIO12);
4266                regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4267                        RT5659_DMIC_1_DP_MASK | RT5659_DMIC_2_DP_MASK,
4268                        RT5659_DMIC_1_DP_IN2N | RT5659_DMIC_2_DP_IN2P);
4269        }
4270
4271        switch (rt5659->pdata.jd_src) {
4272        case RT5659_JD3:
4273                regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0xa880);
4274                regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x9000);
4275                regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_1, 0xc800);
4276                regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4277                                RT5659_PWR_MB, RT5659_PWR_MB);
4278                regmap_write(rt5659->regmap, RT5659_PWR_ANLG_2, 0x0001);
4279                regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_2, 0x0040);
4280                INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4281                        rt5659_jack_detect_work);
4282                break;
4283        case RT5659_JD_HDA_HEADER:
4284                regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_3, 0x8000);
4285                regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x0900);
4286                regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1,  0x70c0);
4287                regmap_write(rt5659->regmap, RT5659_JD_CTRL_1,   0x2000);
4288                regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_1,  0x0040);
4289                INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4290                        rt5659_jack_detect_intel_hd_header);
4291                rt5659_intel_hd_header_probe_setup(rt5659);
4292                break;
4293        default:
4294                break;
4295        }
4296
4297        if (i2c->irq) {
4298                ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
4299                        rt5659_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4300                        | IRQF_ONESHOT, "rt5659", rt5659);
4301                if (ret)
4302                        dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4303
4304                /* Enable IRQ output for GPIO1 pin any way */
4305                regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4306                                   RT5659_GP1_PIN_MASK, RT5659_GP1_PIN_IRQ);
4307        }
4308
4309        return devm_snd_soc_register_component(&i2c->dev,
4310                        &soc_component_dev_rt5659,
4311                        rt5659_dai, ARRAY_SIZE(rt5659_dai));
4312}
4313
4314static void rt5659_i2c_shutdown(struct i2c_client *client)
4315{
4316        struct rt5659_priv *rt5659 = i2c_get_clientdata(client);
4317
4318        regmap_write(rt5659->regmap, RT5659_RESET, 0);
4319}
4320
4321#ifdef CONFIG_OF
4322static const struct of_device_id rt5659_of_match[] = {
4323        { .compatible = "realtek,rt5658", },
4324        { .compatible = "realtek,rt5659", },
4325        { },
4326};
4327MODULE_DEVICE_TABLE(of, rt5659_of_match);
4328#endif
4329
4330#ifdef CONFIG_ACPI
4331static const struct acpi_device_id rt5659_acpi_match[] = {
4332        { "10EC5658", 0, },
4333        { "10EC5659", 0, },
4334        { },
4335};
4336MODULE_DEVICE_TABLE(acpi, rt5659_acpi_match);
4337#endif
4338
4339static struct i2c_driver rt5659_i2c_driver = {
4340        .driver = {
4341                .name = "rt5659",
4342                .of_match_table = of_match_ptr(rt5659_of_match),
4343                .acpi_match_table = ACPI_PTR(rt5659_acpi_match),
4344        },
4345        .probe = rt5659_i2c_probe,
4346        .shutdown = rt5659_i2c_shutdown,
4347        .id_table = rt5659_i2c_id,
4348};
4349module_i2c_driver(rt5659_i2c_driver);
4350
4351MODULE_DESCRIPTION("ASoC RT5659 driver");
4352MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4353MODULE_LICENSE("GPL v2");
4354