linux/sound/soc/codecs/cs47l15.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2//
   3// ALSA SoC Audio driver for CS47L15 codec
   4//
   5// Copyright (C) 2016-2019 Cirrus Logic, Inc. and
   6//                         Cirrus Logic International Semiconductor Ltd.
   7//
   8
   9#include <linux/module.h>
  10#include <linux/moduleparam.h>
  11#include <linux/device.h>
  12#include <linux/delay.h>
  13#include <linux/init.h>
  14#include <linux/pm.h>
  15#include <linux/pm_runtime.h>
  16#include <linux/regmap.h>
  17#include <sound/core.h>
  18#include <sound/pcm.h>
  19#include <sound/pcm_params.h>
  20#include <sound/soc.h>
  21#include <sound/tlv.h>
  22
  23#include <linux/irqchip/irq-madera.h>
  24#include <linux/mfd/madera/core.h>
  25#include <linux/mfd/madera/registers.h>
  26
  27#include "madera.h"
  28#include "wm_adsp.h"
  29
  30#define CS47L15_NUM_ADSP 1
  31#define CS47L15_MONO_OUTPUTS 1
  32
  33/* Mid-mode registers */
  34#define CS47L15_ADC_INT_BIAS_MASK       0x3800
  35#define CS47L15_ADC_INT_BIAS_SHIFT      11
  36#define CS47L15_PGA_BIAS_SEL_MASK       0x03
  37#define CS47L15_PGA_BIAS_SEL_SHIFT      0
  38
  39#define DRV_NAME "cs47l15-codec"
  40
  41struct cs47l15 {
  42        struct madera_priv core;
  43        struct madera_fll fll[2];
  44
  45        bool in1_lp_mode;
  46};
  47
  48static const struct wm_adsp_region cs47l15_dsp1_regions[] = {
  49        { .type = WMFW_ADSP2_PM, .base = 0x080000 },
  50        { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 },
  51        { .type = WMFW_ADSP2_XM, .base = 0x0a0000 },
  52        { .type = WMFW_ADSP2_YM, .base = 0x0c0000 },
  53};
  54
  55static const char * const cs47l15_outdemux_texts[] = {
  56        "HPOUT",
  57        "EPOUT",
  58};
  59
  60static SOC_ENUM_SINGLE_DECL(cs47l15_outdemux_enum, SND_SOC_NOPM, 0,
  61                            cs47l15_outdemux_texts);
  62
  63static const struct snd_kcontrol_new cs47l15_outdemux =
  64        SOC_DAPM_ENUM_EXT("HPOUT1 Demux", cs47l15_outdemux_enum,
  65                          madera_out1_demux_get, madera_out1_demux_put);
  66
  67static int cs47l15_adsp_power_ev(struct snd_soc_dapm_widget *w,
  68                                 struct snd_kcontrol *kcontrol,
  69                                 int event)
  70{
  71        struct snd_soc_component *component =
  72                snd_soc_dapm_to_component(w->dapm);
  73        struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
  74        struct madera_priv *priv = &cs47l15->core;
  75        struct madera *madera = priv->madera;
  76        unsigned int freq;
  77        int ret;
  78
  79        ret = regmap_read(madera->regmap, MADERA_DSP_CLOCK_2, &freq);
  80        if (ret != 0) {
  81                dev_err(madera->dev,
  82                        "Failed to read MADERA_DSP_CLOCK_2: %d\n", ret);
  83                return ret;
  84        }
  85
  86        switch (event) {
  87        case SND_SOC_DAPM_PRE_PMU:
  88                ret = madera_set_adsp_clk(&cs47l15->core, w->shift, freq);
  89                if (ret)
  90                        return ret;
  91                break;
  92        default:
  93                break;
  94        }
  95
  96        return wm_adsp_early_event(w, kcontrol, event);
  97}
  98
  99#define CS47L15_NG_SRC(name, base) \
 100        SOC_SINGLE(name " NG HPOUT1L Switch",  base,  0, 1, 0), \
 101        SOC_SINGLE(name " NG HPOUT1R Switch",  base,  1, 1, 0), \
 102        SOC_SINGLE(name " NG SPKOUTL Switch",  base,  6, 1, 0), \
 103        SOC_SINGLE(name " NG SPKDAT1L Switch", base,  8, 1, 0), \
 104        SOC_SINGLE(name " NG SPKDAT1R Switch", base,  9, 1, 0)
 105
 106static int cs47l15_in1_adc_get(struct snd_kcontrol *kcontrol,
 107                               struct snd_ctl_elem_value *ucontrol)
 108{
 109        struct snd_soc_component *component =
 110                snd_soc_kcontrol_component(kcontrol);
 111        struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
 112
 113        ucontrol->value.integer.value[0] = !!cs47l15->in1_lp_mode;
 114
 115        return 0;
 116}
 117
 118static int cs47l15_in1_adc_put(struct snd_kcontrol *kcontrol,
 119                               struct snd_ctl_elem_value *ucontrol)
 120{
 121        struct snd_soc_component *component =
 122                snd_soc_kcontrol_component(kcontrol);
 123        struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
 124
 125        switch (ucontrol->value.integer.value[0]) {
 126        case 0:
 127                /* Set IN1 to normal mode */
 128                snd_soc_component_update_bits(component, MADERA_DMIC1L_CONTROL,
 129                                              MADERA_IN1_OSR_MASK,
 130                                              5 << MADERA_IN1_OSR_SHIFT);
 131                snd_soc_component_update_bits(component, CS47L15_ADC_INT_BIAS,
 132                                              CS47L15_ADC_INT_BIAS_MASK,
 133                                              4 << CS47L15_ADC_INT_BIAS_SHIFT);
 134                snd_soc_component_update_bits(component, CS47L15_PGA_BIAS_SEL,
 135                                              CS47L15_PGA_BIAS_SEL_MASK, 0);
 136                cs47l15->in1_lp_mode = false;
 137                break;
 138        default:
 139                /* Set IN1 to LP mode */
 140                snd_soc_component_update_bits(component, MADERA_DMIC1L_CONTROL,
 141                                              MADERA_IN1_OSR_MASK,
 142                                              4 << MADERA_IN1_OSR_SHIFT);
 143                snd_soc_component_update_bits(component, CS47L15_ADC_INT_BIAS,
 144                                              CS47L15_ADC_INT_BIAS_MASK,
 145                                              1 << CS47L15_ADC_INT_BIAS_SHIFT);
 146                snd_soc_component_update_bits(component, CS47L15_PGA_BIAS_SEL,
 147                                              CS47L15_PGA_BIAS_SEL_MASK,
 148                                              3 << CS47L15_PGA_BIAS_SEL_SHIFT);
 149                cs47l15->in1_lp_mode = true;
 150                break;
 151        }
 152
 153        return 0;
 154}
 155
 156static const struct snd_kcontrol_new cs47l15_snd_controls[] = {
 157SOC_ENUM("IN1 OSR", madera_in_dmic_osr[0]),
 158SOC_ENUM("IN2 OSR", madera_in_dmic_osr[1]),
 159
 160SOC_SINGLE_RANGE_TLV("IN1L Volume", MADERA_IN1L_CONTROL,
 161                     MADERA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),
 162SOC_SINGLE_RANGE_TLV("IN1R Volume", MADERA_IN1R_CONTROL,
 163                     MADERA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),
 164
 165SOC_ENUM("IN HPF Cutoff Frequency", madera_in_hpf_cut_enum),
 166
 167SOC_SINGLE("IN1L HPF Switch", MADERA_IN1L_CONTROL, MADERA_IN1L_HPF_SHIFT, 1, 0),
 168SOC_SINGLE("IN1R HPF Switch", MADERA_IN1R_CONTROL, MADERA_IN1R_HPF_SHIFT, 1, 0),
 169SOC_SINGLE("IN2L HPF Switch", MADERA_IN2L_CONTROL, MADERA_IN2L_HPF_SHIFT, 1, 0),
 170SOC_SINGLE("IN2R HPF Switch", MADERA_IN2R_CONTROL, MADERA_IN2R_HPF_SHIFT, 1, 0),
 171
 172SOC_SINGLE_TLV("IN1L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1L,
 173               MADERA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
 174SOC_SINGLE_TLV("IN1R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1R,
 175               MADERA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
 176SOC_SINGLE_TLV("IN2L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2L,
 177               MADERA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
 178SOC_SINGLE_TLV("IN2R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2R,
 179               MADERA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
 180
 181SOC_ENUM("Input Ramp Up", madera_in_vi_ramp),
 182SOC_ENUM("Input Ramp Down", madera_in_vd_ramp),
 183
 184MADERA_MIXER_CONTROLS("EQ1", MADERA_EQ1MIX_INPUT_1_SOURCE),
 185MADERA_MIXER_CONTROLS("EQ2", MADERA_EQ2MIX_INPUT_1_SOURCE),
 186MADERA_MIXER_CONTROLS("EQ3", MADERA_EQ3MIX_INPUT_1_SOURCE),
 187MADERA_MIXER_CONTROLS("EQ4", MADERA_EQ4MIX_INPUT_1_SOURCE),
 188
 189MADERA_EQ_CONTROL("EQ1 Coefficients", MADERA_EQ1_2),
 190SOC_SINGLE_TLV("EQ1 B1 Volume", MADERA_EQ1_1, MADERA_EQ1_B1_GAIN_SHIFT,
 191               24, 0, madera_eq_tlv),
 192SOC_SINGLE_TLV("EQ1 B2 Volume", MADERA_EQ1_1, MADERA_EQ1_B2_GAIN_SHIFT,
 193               24, 0, madera_eq_tlv),
 194SOC_SINGLE_TLV("EQ1 B3 Volume", MADERA_EQ1_1, MADERA_EQ1_B3_GAIN_SHIFT,
 195               24, 0, madera_eq_tlv),
 196SOC_SINGLE_TLV("EQ1 B4 Volume", MADERA_EQ1_2, MADERA_EQ1_B4_GAIN_SHIFT,
 197               24, 0, madera_eq_tlv),
 198SOC_SINGLE_TLV("EQ1 B5 Volume", MADERA_EQ1_2, MADERA_EQ1_B5_GAIN_SHIFT,
 199               24, 0, madera_eq_tlv),
 200
 201MADERA_EQ_CONTROL("EQ2 Coefficients", MADERA_EQ2_2),
 202SOC_SINGLE_TLV("EQ2 B1 Volume", MADERA_EQ2_1, MADERA_EQ2_B1_GAIN_SHIFT,
 203               24, 0, madera_eq_tlv),
 204SOC_SINGLE_TLV("EQ2 B2 Volume", MADERA_EQ2_1, MADERA_EQ2_B2_GAIN_SHIFT,
 205               24, 0, madera_eq_tlv),
 206SOC_SINGLE_TLV("EQ2 B3 Volume", MADERA_EQ2_1, MADERA_EQ2_B3_GAIN_SHIFT,
 207               24, 0, madera_eq_tlv),
 208SOC_SINGLE_TLV("EQ2 B4 Volume", MADERA_EQ2_2, MADERA_EQ2_B4_GAIN_SHIFT,
 209               24, 0, madera_eq_tlv),
 210SOC_SINGLE_TLV("EQ2 B5 Volume", MADERA_EQ2_2, MADERA_EQ2_B5_GAIN_SHIFT,
 211               24, 0, madera_eq_tlv),
 212
 213MADERA_EQ_CONTROL("EQ3 Coefficients", MADERA_EQ3_2),
 214SOC_SINGLE_TLV("EQ3 B1 Volume", MADERA_EQ3_1, MADERA_EQ3_B1_GAIN_SHIFT,
 215               24, 0, madera_eq_tlv),
 216SOC_SINGLE_TLV("EQ3 B2 Volume", MADERA_EQ3_1, MADERA_EQ3_B2_GAIN_SHIFT,
 217               24, 0, madera_eq_tlv),
 218SOC_SINGLE_TLV("EQ3 B3 Volume", MADERA_EQ3_1, MADERA_EQ3_B3_GAIN_SHIFT,
 219               24, 0, madera_eq_tlv),
 220SOC_SINGLE_TLV("EQ3 B4 Volume", MADERA_EQ3_2, MADERA_EQ3_B4_GAIN_SHIFT,
 221               24, 0, madera_eq_tlv),
 222SOC_SINGLE_TLV("EQ3 B5 Volume", MADERA_EQ3_2, MADERA_EQ3_B5_GAIN_SHIFT,
 223               24, 0, madera_eq_tlv),
 224
 225MADERA_EQ_CONTROL("EQ4 Coefficients", MADERA_EQ4_2),
 226SOC_SINGLE_TLV("EQ4 B1 Volume", MADERA_EQ4_1, MADERA_EQ4_B1_GAIN_SHIFT,
 227               24, 0, madera_eq_tlv),
 228SOC_SINGLE_TLV("EQ4 B2 Volume", MADERA_EQ4_1, MADERA_EQ4_B2_GAIN_SHIFT,
 229               24, 0, madera_eq_tlv),
 230SOC_SINGLE_TLV("EQ4 B3 Volume", MADERA_EQ4_1, MADERA_EQ4_B3_GAIN_SHIFT,
 231               24, 0, madera_eq_tlv),
 232SOC_SINGLE_TLV("EQ4 B4 Volume", MADERA_EQ4_2, MADERA_EQ4_B4_GAIN_SHIFT,
 233               24, 0, madera_eq_tlv),
 234SOC_SINGLE_TLV("EQ4 B5 Volume", MADERA_EQ4_2, MADERA_EQ4_B5_GAIN_SHIFT,
 235               24, 0, madera_eq_tlv),
 236
 237MADERA_MIXER_CONTROLS("DRC1L", MADERA_DRC1LMIX_INPUT_1_SOURCE),
 238MADERA_MIXER_CONTROLS("DRC1R", MADERA_DRC1RMIX_INPUT_1_SOURCE),
 239MADERA_MIXER_CONTROLS("DRC2L", MADERA_DRC2LMIX_INPUT_1_SOURCE),
 240MADERA_MIXER_CONTROLS("DRC2R", MADERA_DRC2RMIX_INPUT_1_SOURCE),
 241
 242SND_SOC_BYTES_MASK("DRC1", MADERA_DRC1_CTRL1, 5,
 243                   MADERA_DRC1R_ENA | MADERA_DRC1L_ENA),
 244SND_SOC_BYTES_MASK("DRC2", MADERA_DRC2_CTRL1, 5,
 245                   MADERA_DRC2R_ENA | MADERA_DRC2L_ENA),
 246
 247MADERA_MIXER_CONTROLS("LHPF1", MADERA_HPLP1MIX_INPUT_1_SOURCE),
 248MADERA_MIXER_CONTROLS("LHPF2", MADERA_HPLP2MIX_INPUT_1_SOURCE),
 249MADERA_MIXER_CONTROLS("LHPF3", MADERA_HPLP3MIX_INPUT_1_SOURCE),
 250MADERA_MIXER_CONTROLS("LHPF4", MADERA_HPLP4MIX_INPUT_1_SOURCE),
 251
 252MADERA_LHPF_CONTROL("LHPF1 Coefficients", MADERA_HPLPF1_2),
 253MADERA_LHPF_CONTROL("LHPF2 Coefficients", MADERA_HPLPF2_2),
 254MADERA_LHPF_CONTROL("LHPF3 Coefficients", MADERA_HPLPF3_2),
 255MADERA_LHPF_CONTROL("LHPF4 Coefficients", MADERA_HPLPF4_2),
 256
 257SOC_ENUM("LHPF1 Mode", madera_lhpf1_mode),
 258SOC_ENUM("LHPF2 Mode", madera_lhpf2_mode),
 259SOC_ENUM("LHPF3 Mode", madera_lhpf3_mode),
 260SOC_ENUM("LHPF4 Mode", madera_lhpf4_mode),
 261
 262MADERA_RATE_ENUM("ISRC1 FSL", madera_isrc_fsl[0]),
 263MADERA_RATE_ENUM("ISRC2 FSL", madera_isrc_fsl[1]),
 264MADERA_RATE_ENUM("ISRC1 FSH", madera_isrc_fsh[0]),
 265MADERA_RATE_ENUM("ISRC2 FSH", madera_isrc_fsh[1]),
 266
 267WM_ADSP2_PRELOAD_SWITCH("DSP1", 1),
 268
 269MADERA_MIXER_CONTROLS("DSP1L", MADERA_DSP1LMIX_INPUT_1_SOURCE),
 270MADERA_MIXER_CONTROLS("DSP1R", MADERA_DSP1RMIX_INPUT_1_SOURCE),
 271
 272SOC_SINGLE_TLV("Noise Generator Volume", MADERA_COMFORT_NOISE_GENERATOR,
 273               MADERA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, madera_noise_tlv),
 274
 275MADERA_MIXER_CONTROLS("HPOUT1L", MADERA_OUT1LMIX_INPUT_1_SOURCE),
 276MADERA_MIXER_CONTROLS("HPOUT1R", MADERA_OUT1RMIX_INPUT_1_SOURCE),
 277MADERA_MIXER_CONTROLS("SPKOUTL", MADERA_OUT4LMIX_INPUT_1_SOURCE),
 278MADERA_MIXER_CONTROLS("SPKDAT1L", MADERA_OUT5LMIX_INPUT_1_SOURCE),
 279MADERA_MIXER_CONTROLS("SPKDAT1R", MADERA_OUT5RMIX_INPUT_1_SOURCE),
 280
 281SOC_SINGLE("HPOUT1 SC Protect Switch", MADERA_HP1_SHORT_CIRCUIT_CTRL,
 282           MADERA_HP1_SC_ENA_SHIFT, 1, 0),
 283
 284SOC_SINGLE("SPKDAT1 High Performance Switch", MADERA_OUTPUT_PATH_CONFIG_5L,
 285           MADERA_OUT5_OSR_SHIFT, 1, 0),
 286
 287SOC_DOUBLE_R("HPOUT1 Digital Switch", MADERA_DAC_DIGITAL_VOLUME_1L,
 288             MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_MUTE_SHIFT, 1, 1),
 289SOC_SINGLE("Speaker Digital Switch", MADERA_DAC_DIGITAL_VOLUME_4L,
 290           MADERA_OUT4L_MUTE_SHIFT, 1, 1),
 291SOC_DOUBLE_R("SPKDAT1 Digital Switch", MADERA_DAC_DIGITAL_VOLUME_5L,
 292             MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_MUTE_SHIFT, 1, 1),
 293
 294SOC_DOUBLE_R_TLV("HPOUT1 Digital Volume", MADERA_DAC_DIGITAL_VOLUME_1L,
 295                 MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_VOL_SHIFT,
 296                 0xbf, 0, madera_digital_tlv),
 297SOC_SINGLE_TLV("Speaker Digital Volume", MADERA_DAC_DIGITAL_VOLUME_4L,
 298               MADERA_OUT4L_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
 299SOC_DOUBLE_R_TLV("SPKDAT1 Digital Volume", MADERA_DAC_DIGITAL_VOLUME_5L,
 300                 MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_VOL_SHIFT,
 301                 0xbf, 0, madera_digital_tlv),
 302
 303SOC_DOUBLE("SPKDAT1 Switch", MADERA_PDM_SPK1_CTRL_1, MADERA_SPK1L_MUTE_SHIFT,
 304           MADERA_SPK1R_MUTE_SHIFT, 1, 1),
 305
 306SOC_ENUM("Output Ramp Up", madera_out_vi_ramp),
 307SOC_ENUM("Output Ramp Down", madera_out_vd_ramp),
 308
 309SOC_SINGLE("Noise Gate Switch", MADERA_NOISE_GATE_CONTROL,
 310           MADERA_NGATE_ENA_SHIFT, 1, 0),
 311SOC_SINGLE_TLV("Noise Gate Threshold Volume", MADERA_NOISE_GATE_CONTROL,
 312               MADERA_NGATE_THR_SHIFT, 7, 1, madera_ng_tlv),
 313SOC_ENUM("Noise Gate Hold", madera_ng_hold),
 314
 315SOC_SINGLE_BOOL_EXT("IN1 LP Mode Switch", 0,
 316                    cs47l15_in1_adc_get, cs47l15_in1_adc_put),
 317
 318CS47L15_NG_SRC("HPOUT1L", MADERA_NOISE_GATE_SELECT_1L),
 319CS47L15_NG_SRC("HPOUT1R", MADERA_NOISE_GATE_SELECT_1R),
 320CS47L15_NG_SRC("SPKOUTL", MADERA_NOISE_GATE_SELECT_4L),
 321CS47L15_NG_SRC("SPKDAT1L", MADERA_NOISE_GATE_SELECT_5L),
 322CS47L15_NG_SRC("SPKDAT1R", MADERA_NOISE_GATE_SELECT_5R),
 323
 324MADERA_MIXER_CONTROLS("AIF1TX1", MADERA_AIF1TX1MIX_INPUT_1_SOURCE),
 325MADERA_MIXER_CONTROLS("AIF1TX2", MADERA_AIF1TX2MIX_INPUT_1_SOURCE),
 326MADERA_MIXER_CONTROLS("AIF1TX3", MADERA_AIF1TX3MIX_INPUT_1_SOURCE),
 327MADERA_MIXER_CONTROLS("AIF1TX4", MADERA_AIF1TX4MIX_INPUT_1_SOURCE),
 328MADERA_MIXER_CONTROLS("AIF1TX5", MADERA_AIF1TX5MIX_INPUT_1_SOURCE),
 329MADERA_MIXER_CONTROLS("AIF1TX6", MADERA_AIF1TX6MIX_INPUT_1_SOURCE),
 330
 331MADERA_MIXER_CONTROLS("AIF2TX1", MADERA_AIF2TX1MIX_INPUT_1_SOURCE),
 332MADERA_MIXER_CONTROLS("AIF2TX2", MADERA_AIF2TX2MIX_INPUT_1_SOURCE),
 333MADERA_MIXER_CONTROLS("AIF2TX3", MADERA_AIF2TX3MIX_INPUT_1_SOURCE),
 334MADERA_MIXER_CONTROLS("AIF2TX4", MADERA_AIF2TX4MIX_INPUT_1_SOURCE),
 335
 336MADERA_MIXER_CONTROLS("AIF3TX1", MADERA_AIF3TX1MIX_INPUT_1_SOURCE),
 337MADERA_MIXER_CONTROLS("AIF3TX2", MADERA_AIF3TX2MIX_INPUT_1_SOURCE),
 338
 339MADERA_GAINMUX_CONTROLS("SPDIF1TX1", MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE),
 340MADERA_GAINMUX_CONTROLS("SPDIF1TX2", MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE),
 341
 342WM_ADSP_FW_CONTROL("DSP1", 0),
 343};
 344
 345MADERA_MIXER_ENUMS(EQ1, MADERA_EQ1MIX_INPUT_1_SOURCE);
 346MADERA_MIXER_ENUMS(EQ2, MADERA_EQ2MIX_INPUT_1_SOURCE);
 347MADERA_MIXER_ENUMS(EQ3, MADERA_EQ3MIX_INPUT_1_SOURCE);
 348MADERA_MIXER_ENUMS(EQ4, MADERA_EQ4MIX_INPUT_1_SOURCE);
 349
 350MADERA_MIXER_ENUMS(DRC1L, MADERA_DRC1LMIX_INPUT_1_SOURCE);
 351MADERA_MIXER_ENUMS(DRC1R, MADERA_DRC1RMIX_INPUT_1_SOURCE);
 352MADERA_MIXER_ENUMS(DRC2L, MADERA_DRC2LMIX_INPUT_1_SOURCE);
 353MADERA_MIXER_ENUMS(DRC2R, MADERA_DRC2RMIX_INPUT_1_SOURCE);
 354
 355MADERA_MIXER_ENUMS(LHPF1, MADERA_HPLP1MIX_INPUT_1_SOURCE);
 356MADERA_MIXER_ENUMS(LHPF2, MADERA_HPLP2MIX_INPUT_1_SOURCE);
 357MADERA_MIXER_ENUMS(LHPF3, MADERA_HPLP3MIX_INPUT_1_SOURCE);
 358MADERA_MIXER_ENUMS(LHPF4, MADERA_HPLP4MIX_INPUT_1_SOURCE);
 359
 360MADERA_MIXER_ENUMS(DSP1L, MADERA_DSP1LMIX_INPUT_1_SOURCE);
 361MADERA_MIXER_ENUMS(DSP1R, MADERA_DSP1RMIX_INPUT_1_SOURCE);
 362MADERA_DSP_AUX_ENUMS(DSP1, MADERA_DSP1AUX1MIX_INPUT_1_SOURCE);
 363
 364MADERA_MIXER_ENUMS(PWM1, MADERA_PWM1MIX_INPUT_1_SOURCE);
 365MADERA_MIXER_ENUMS(PWM2, MADERA_PWM2MIX_INPUT_1_SOURCE);
 366
 367MADERA_MIXER_ENUMS(OUT1L, MADERA_OUT1LMIX_INPUT_1_SOURCE);
 368MADERA_MIXER_ENUMS(OUT1R, MADERA_OUT1RMIX_INPUT_1_SOURCE);
 369MADERA_MIXER_ENUMS(SPKOUTL, MADERA_OUT4LMIX_INPUT_1_SOURCE);
 370MADERA_MIXER_ENUMS(SPKDAT1L, MADERA_OUT5LMIX_INPUT_1_SOURCE);
 371MADERA_MIXER_ENUMS(SPKDAT1R, MADERA_OUT5RMIX_INPUT_1_SOURCE);
 372
 373MADERA_MIXER_ENUMS(AIF1TX1, MADERA_AIF1TX1MIX_INPUT_1_SOURCE);
 374MADERA_MIXER_ENUMS(AIF1TX2, MADERA_AIF1TX2MIX_INPUT_1_SOURCE);
 375MADERA_MIXER_ENUMS(AIF1TX3, MADERA_AIF1TX3MIX_INPUT_1_SOURCE);
 376MADERA_MIXER_ENUMS(AIF1TX4, MADERA_AIF1TX4MIX_INPUT_1_SOURCE);
 377MADERA_MIXER_ENUMS(AIF1TX5, MADERA_AIF1TX5MIX_INPUT_1_SOURCE);
 378MADERA_MIXER_ENUMS(AIF1TX6, MADERA_AIF1TX6MIX_INPUT_1_SOURCE);
 379
 380MADERA_MIXER_ENUMS(AIF2TX1, MADERA_AIF2TX1MIX_INPUT_1_SOURCE);
 381MADERA_MIXER_ENUMS(AIF2TX2, MADERA_AIF2TX2MIX_INPUT_1_SOURCE);
 382MADERA_MIXER_ENUMS(AIF2TX3, MADERA_AIF2TX3MIX_INPUT_1_SOURCE);
 383MADERA_MIXER_ENUMS(AIF2TX4, MADERA_AIF2TX4MIX_INPUT_1_SOURCE);
 384
 385MADERA_MIXER_ENUMS(AIF3TX1, MADERA_AIF3TX1MIX_INPUT_1_SOURCE);
 386MADERA_MIXER_ENUMS(AIF3TX2, MADERA_AIF3TX2MIX_INPUT_1_SOURCE);
 387
 388MADERA_MUX_ENUMS(SPD1TX1, MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE);
 389MADERA_MUX_ENUMS(SPD1TX2, MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE);
 390
 391MADERA_MUX_ENUMS(ISRC1INT1, MADERA_ISRC1INT1MIX_INPUT_1_SOURCE);
 392MADERA_MUX_ENUMS(ISRC1INT2, MADERA_ISRC1INT2MIX_INPUT_1_SOURCE);
 393MADERA_MUX_ENUMS(ISRC1INT3, MADERA_ISRC1INT3MIX_INPUT_1_SOURCE);
 394MADERA_MUX_ENUMS(ISRC1INT4, MADERA_ISRC1INT4MIX_INPUT_1_SOURCE);
 395
 396MADERA_MUX_ENUMS(ISRC1DEC1, MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE);
 397MADERA_MUX_ENUMS(ISRC1DEC2, MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE);
 398MADERA_MUX_ENUMS(ISRC1DEC3, MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE);
 399MADERA_MUX_ENUMS(ISRC1DEC4, MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE);
 400
 401MADERA_MUX_ENUMS(ISRC2INT1, MADERA_ISRC2INT1MIX_INPUT_1_SOURCE);
 402MADERA_MUX_ENUMS(ISRC2INT2, MADERA_ISRC2INT2MIX_INPUT_1_SOURCE);
 403MADERA_MUX_ENUMS(ISRC2INT3, MADERA_ISRC2INT3MIX_INPUT_1_SOURCE);
 404MADERA_MUX_ENUMS(ISRC2INT4, MADERA_ISRC2INT4MIX_INPUT_1_SOURCE);
 405
 406MADERA_MUX_ENUMS(ISRC2DEC1, MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE);
 407MADERA_MUX_ENUMS(ISRC2DEC2, MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE);
 408MADERA_MUX_ENUMS(ISRC2DEC3, MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE);
 409MADERA_MUX_ENUMS(ISRC2DEC4, MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE);
 410
 411static const char * const cs47l15_aec_loopback_texts[] = {
 412        "HPOUT1L", "HPOUT1R", "SPKOUTL", "SPKDAT1L", "SPKDAT1R",
 413};
 414
 415static const unsigned int cs47l15_aec_loopback_values[] = {
 416        0, 1, 6, 8, 9,
 417};
 418
 419static const struct soc_enum cs47l15_aec1_loopback =
 420        SOC_VALUE_ENUM_SINGLE(MADERA_DAC_AEC_CONTROL_1,
 421                              MADERA_AEC1_LOOPBACK_SRC_SHIFT, 0xf,
 422                              ARRAY_SIZE(cs47l15_aec_loopback_texts),
 423                              cs47l15_aec_loopback_texts,
 424                              cs47l15_aec_loopback_values);
 425
 426static const struct soc_enum cs47l15_aec2_loopback =
 427        SOC_VALUE_ENUM_SINGLE(MADERA_DAC_AEC_CONTROL_2,
 428                              MADERA_AEC2_LOOPBACK_SRC_SHIFT, 0xf,
 429                              ARRAY_SIZE(cs47l15_aec_loopback_texts),
 430                              cs47l15_aec_loopback_texts,
 431                              cs47l15_aec_loopback_values);
 432
 433static const struct snd_kcontrol_new cs47l15_aec_loopback_mux[] = {
 434        SOC_DAPM_ENUM("AEC1 Loopback", cs47l15_aec1_loopback),
 435        SOC_DAPM_ENUM("AEC2 Loopback", cs47l15_aec2_loopback),
 436};
 437
 438static const struct snd_soc_dapm_widget cs47l15_dapm_widgets[] = {
 439SND_SOC_DAPM_SUPPLY("SYSCLK", MADERA_SYSTEM_CLOCK_1, MADERA_SYSCLK_ENA_SHIFT,
 440                    0, madera_sysclk_ev,
 441                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
 442                    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
 443SND_SOC_DAPM_SUPPLY("OPCLK", MADERA_OUTPUT_SYSTEM_CLOCK,
 444                    MADERA_OPCLK_ENA_SHIFT, 0, NULL, 0),
 445SND_SOC_DAPM_SUPPLY("DSPCLK", MADERA_DSP_CLOCK_1, MADERA_DSP_CLK_ENA_SHIFT,
 446                    0, madera_clk_ev,
 447                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 448
 449SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD1", 20, 0),
 450SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS),
 451SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDD", 0, 0),
 452
 453SND_SOC_DAPM_SUPPLY("MICBIAS1", MADERA_MIC_BIAS_CTRL_1,
 454                    MADERA_MICB1_ENA_SHIFT, 0, NULL, 0),
 455
 456SND_SOC_DAPM_SUPPLY("MICBIAS1A", MADERA_MIC_BIAS_CTRL_5,
 457                    MADERA_MICB1A_ENA_SHIFT, 0, NULL, 0),
 458SND_SOC_DAPM_SUPPLY("MICBIAS1B", MADERA_MIC_BIAS_CTRL_5,
 459                    MADERA_MICB1B_ENA_SHIFT, 0, NULL, 0),
 460SND_SOC_DAPM_SUPPLY("MICBIAS1C", MADERA_MIC_BIAS_CTRL_5,
 461                    MADERA_MICB1C_ENA_SHIFT, 0, NULL, 0),
 462
 463SND_SOC_DAPM_SUPPLY("FXCLK", SND_SOC_NOPM,
 464                    MADERA_DOM_GRP_FX, 0,
 465                    madera_domain_clk_ev,
 466                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 467SND_SOC_DAPM_SUPPLY("ISRC1CLK", SND_SOC_NOPM,
 468                    MADERA_DOM_GRP_ISRC1, 0,
 469                    madera_domain_clk_ev,
 470                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 471SND_SOC_DAPM_SUPPLY("ISRC2CLK", SND_SOC_NOPM,
 472                    MADERA_DOM_GRP_ISRC2, 0,
 473                    madera_domain_clk_ev,
 474                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 475SND_SOC_DAPM_SUPPLY("OUTCLK", SND_SOC_NOPM,
 476                    MADERA_DOM_GRP_OUT, 0,
 477                    madera_domain_clk_ev,
 478                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 479SND_SOC_DAPM_SUPPLY("SPDCLK", SND_SOC_NOPM,
 480                    MADERA_DOM_GRP_SPD, 0,
 481                    madera_domain_clk_ev,
 482                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 483SND_SOC_DAPM_SUPPLY("DSP1CLK", SND_SOC_NOPM,
 484                    MADERA_DOM_GRP_DSP1, 0,
 485                    madera_domain_clk_ev,
 486                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 487SND_SOC_DAPM_SUPPLY("AIF1TXCLK", SND_SOC_NOPM,
 488                    MADERA_DOM_GRP_AIF1, 0,
 489                    madera_domain_clk_ev,
 490                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 491SND_SOC_DAPM_SUPPLY("AIF2TXCLK", SND_SOC_NOPM,
 492                    MADERA_DOM_GRP_AIF2, 0,
 493                    madera_domain_clk_ev,
 494                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 495SND_SOC_DAPM_SUPPLY("AIF3TXCLK", SND_SOC_NOPM,
 496                    MADERA_DOM_GRP_AIF3, 0,
 497                    madera_domain_clk_ev,
 498                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 499SND_SOC_DAPM_SUPPLY("PWMCLK", SND_SOC_NOPM,
 500                    MADERA_DOM_GRP_PWM, 0,
 501                    madera_domain_clk_ev,
 502                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 503
 504SND_SOC_DAPM_SIGGEN("TONE"),
 505SND_SOC_DAPM_SIGGEN("NOISE"),
 506
 507SND_SOC_DAPM_INPUT("IN1ALN"),
 508SND_SOC_DAPM_INPUT("IN1ALP"),
 509SND_SOC_DAPM_INPUT("IN1BLN"),
 510SND_SOC_DAPM_INPUT("IN1BLP"),
 511SND_SOC_DAPM_INPUT("IN1ARN"),
 512SND_SOC_DAPM_INPUT("IN1ARP"),
 513SND_SOC_DAPM_INPUT("IN1BRN"),
 514SND_SOC_DAPM_INPUT("IN1BRP"),
 515SND_SOC_DAPM_INPUT("IN2N"),
 516SND_SOC_DAPM_INPUT("IN2P"),
 517SND_SOC_DAPM_INPUT("SPKRXDAT"),
 518
 519SND_SOC_DAPM_MUX("IN1L Analog Mux", SND_SOC_NOPM, 0, 0, &madera_inmux[0]),
 520SND_SOC_DAPM_MUX("IN1R Analog Mux", SND_SOC_NOPM, 0, 0, &madera_inmux[1]),
 521
 522SND_SOC_DAPM_MUX("IN1L Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[0]),
 523SND_SOC_DAPM_MUX("IN1R Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[0]),
 524
 525SND_SOC_DAPM_MUX("IN2L Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[1]),
 526SND_SOC_DAPM_MUX("IN2R Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[1]),
 527
 528SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"),
 529SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"),
 530
 531SND_SOC_DAPM_OUTPUT("DSP Trigger Out"),
 532
 533SND_SOC_DAPM_DEMUX("HPOUT1 Demux", SND_SOC_NOPM, 0, 0, &cs47l15_outdemux),
 534SND_SOC_DAPM_MUX("HPOUT1 Mono Mux", SND_SOC_NOPM, 0, 0, &cs47l15_outdemux),
 535
 536SND_SOC_DAPM_PGA("PWM1 Driver", MADERA_PWM_DRIVE_1, MADERA_PWM1_ENA_SHIFT,
 537                 0, NULL, 0),
 538SND_SOC_DAPM_PGA("PWM2 Driver", MADERA_PWM_DRIVE_1, MADERA_PWM2_ENA_SHIFT,
 539                 0, NULL, 0),
 540
 541SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0,
 542                     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX1_ENA_SHIFT, 0),
 543SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 1,
 544                     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX2_ENA_SHIFT, 0),
 545SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 2,
 546                     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX3_ENA_SHIFT, 0),
 547SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 3,
 548                     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX4_ENA_SHIFT, 0),
 549SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 4,
 550                     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX5_ENA_SHIFT, 0),
 551SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 5,
 552                     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX6_ENA_SHIFT, 0),
 553
 554SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0,
 555                     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX1_ENA_SHIFT, 0),
 556SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 1,
 557                     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX2_ENA_SHIFT, 0),
 558SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 2,
 559                     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX3_ENA_SHIFT, 0),
 560SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 3,
 561                     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX4_ENA_SHIFT, 0),
 562
 563SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0,
 564                     MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX1_ENA_SHIFT, 0),
 565SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 1,
 566                     MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX2_ENA_SHIFT, 0),
 567
 568SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM,
 569                   MADERA_OUT1L_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,
 570                   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 571                   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 572SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM,
 573                   MADERA_OUT1R_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,
 574                   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 575                   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 576SND_SOC_DAPM_PGA_E("OUT4L", SND_SOC_NOPM,
 577                   MADERA_OUT4L_ENA_SHIFT, 0, NULL, 0, madera_spk_ev,
 578                   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 579SND_SOC_DAPM_PGA_E("OUT5L", MADERA_OUTPUT_ENABLES_1,
 580                   MADERA_OUT5L_ENA_SHIFT, 0, NULL, 0, madera_out_ev,
 581                   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 582SND_SOC_DAPM_PGA_E("OUT5R", MADERA_OUTPUT_ENABLES_1,
 583                   MADERA_OUT5R_ENA_SHIFT, 0, NULL, 0, madera_out_ev,
 584                   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 585
 586SND_SOC_DAPM_PGA("SPD1TX1", MADERA_SPD1_TX_CONTROL,
 587                 MADERA_SPD1_VAL1_SHIFT, 0, NULL, 0),
 588SND_SOC_DAPM_PGA("SPD1TX2", MADERA_SPD1_TX_CONTROL,
 589                 MADERA_SPD1_VAL2_SHIFT, 0, NULL, 0),
 590SND_SOC_DAPM_OUT_DRV("SPD1", MADERA_SPD1_TX_CONTROL,
 591                     MADERA_SPD1_ENA_SHIFT, 0, NULL, 0),
 592
 593/*
 594 * mux_in widgets : arranged in the order of sources
 595 * specified in MADERA_MIXER_INPUT_ROUTES
 596 */
 597
 598SND_SOC_DAPM_PGA("Noise Generator", MADERA_COMFORT_NOISE_GENERATOR,
 599                 MADERA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0),
 600
 601SND_SOC_DAPM_PGA("Tone Generator 1", MADERA_TONE_GENERATOR_1,
 602                 MADERA_TONE1_ENA_SHIFT, 0, NULL, 0),
 603SND_SOC_DAPM_PGA("Tone Generator 2", MADERA_TONE_GENERATOR_1,
 604                 MADERA_TONE2_ENA_SHIFT, 0, NULL, 0),
 605
 606SND_SOC_DAPM_SIGGEN("HAPTICS"),
 607
 608SND_SOC_DAPM_MUX("AEC1 Loopback", MADERA_DAC_AEC_CONTROL_1,
 609                 MADERA_AEC1_LOOPBACK_ENA_SHIFT, 0,
 610                 &cs47l15_aec_loopback_mux[0]),
 611SND_SOC_DAPM_MUX("AEC2 Loopback", MADERA_DAC_AEC_CONTROL_2,
 612                 MADERA_AEC2_LOOPBACK_ENA_SHIFT, 0,
 613                 &cs47l15_aec_loopback_mux[1]),
 614
 615SND_SOC_DAPM_PGA_E("IN1L", MADERA_INPUT_ENABLES, MADERA_IN1L_ENA_SHIFT,
 616                   0, NULL, 0, madera_in_ev,
 617                   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 618                   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 619SND_SOC_DAPM_PGA_E("IN1R", MADERA_INPUT_ENABLES, MADERA_IN1R_ENA_SHIFT,
 620                   0, NULL, 0, madera_in_ev,
 621                   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 622                   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 623SND_SOC_DAPM_PGA_E("IN2L", MADERA_INPUT_ENABLES, MADERA_IN2L_ENA_SHIFT,
 624                   0, NULL, 0, madera_in_ev,
 625                   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 626                   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 627SND_SOC_DAPM_PGA_E("IN2R", MADERA_INPUT_ENABLES, MADERA_IN2R_ENA_SHIFT,
 628                   0, NULL, 0, madera_in_ev,
 629                   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 630                   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 631
 632SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0,
 633                    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX1_ENA_SHIFT, 0),
 634SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 1,
 635                    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX2_ENA_SHIFT, 0),
 636SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 2,
 637                    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX3_ENA_SHIFT, 0),
 638SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 3,
 639                    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX4_ENA_SHIFT, 0),
 640SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 4,
 641                    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX5_ENA_SHIFT, 0),
 642SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 5,
 643                    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX6_ENA_SHIFT, 0),
 644
 645SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0,
 646                    MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX1_ENA_SHIFT, 0),
 647SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 1,
 648                    MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX2_ENA_SHIFT, 0),
 649SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 2,
 650                    MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX3_ENA_SHIFT, 0),
 651SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 3,
 652                    MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX4_ENA_SHIFT, 0),
 653
 654SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0,
 655                    MADERA_AIF3_RX_ENABLES, MADERA_AIF3RX1_ENA_SHIFT, 0),
 656SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 1,
 657                    MADERA_AIF3_RX_ENABLES, MADERA_AIF3RX2_ENA_SHIFT, 0),
 658
 659SND_SOC_DAPM_PGA("EQ1", MADERA_EQ1_1, MADERA_EQ1_ENA_SHIFT, 0, NULL, 0),
 660SND_SOC_DAPM_PGA("EQ2", MADERA_EQ2_1, MADERA_EQ2_ENA_SHIFT, 0, NULL, 0),
 661SND_SOC_DAPM_PGA("EQ3", MADERA_EQ3_1, MADERA_EQ3_ENA_SHIFT, 0, NULL, 0),
 662SND_SOC_DAPM_PGA("EQ4", MADERA_EQ4_1, MADERA_EQ4_ENA_SHIFT, 0, NULL, 0),
 663
 664SND_SOC_DAPM_PGA("DRC1L", MADERA_DRC1_CTRL1, MADERA_DRC1L_ENA_SHIFT, 0,
 665                 NULL, 0),
 666SND_SOC_DAPM_PGA("DRC1R", MADERA_DRC1_CTRL1, MADERA_DRC1R_ENA_SHIFT, 0,
 667                 NULL, 0),
 668SND_SOC_DAPM_PGA("DRC2L", MADERA_DRC2_CTRL1, MADERA_DRC2L_ENA_SHIFT, 0,
 669                 NULL, 0),
 670SND_SOC_DAPM_PGA("DRC2R", MADERA_DRC2_CTRL1, MADERA_DRC2R_ENA_SHIFT, 0,
 671                 NULL, 0),
 672
 673SND_SOC_DAPM_PGA("LHPF1", MADERA_HPLPF1_1, MADERA_LHPF1_ENA_SHIFT, 0, NULL, 0),
 674SND_SOC_DAPM_PGA("LHPF2", MADERA_HPLPF2_1, MADERA_LHPF2_ENA_SHIFT, 0, NULL, 0),
 675SND_SOC_DAPM_PGA("LHPF3", MADERA_HPLPF3_1, MADERA_LHPF3_ENA_SHIFT, 0, NULL, 0),
 676SND_SOC_DAPM_PGA("LHPF4", MADERA_HPLPF4_1, MADERA_LHPF4_ENA_SHIFT, 0, NULL, 0),
 677
 678SND_SOC_DAPM_PGA("ISRC1DEC1", MADERA_ISRC_1_CTRL_3,
 679                 MADERA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0),
 680SND_SOC_DAPM_PGA("ISRC1DEC2", MADERA_ISRC_1_CTRL_3,
 681                 MADERA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0),
 682SND_SOC_DAPM_PGA("ISRC1DEC3", MADERA_ISRC_1_CTRL_3,
 683                 MADERA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0),
 684SND_SOC_DAPM_PGA("ISRC1DEC4", MADERA_ISRC_1_CTRL_3,
 685                 MADERA_ISRC1_DEC4_ENA_SHIFT, 0, NULL, 0),
 686
 687SND_SOC_DAPM_PGA("ISRC1INT1", MADERA_ISRC_1_CTRL_3,
 688                 MADERA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0),
 689SND_SOC_DAPM_PGA("ISRC1INT2", MADERA_ISRC_1_CTRL_3,
 690                 MADERA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0),
 691SND_SOC_DAPM_PGA("ISRC1INT3", MADERA_ISRC_1_CTRL_3,
 692                 MADERA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0),
 693SND_SOC_DAPM_PGA("ISRC1INT4", MADERA_ISRC_1_CTRL_3,
 694                 MADERA_ISRC1_INT4_ENA_SHIFT, 0, NULL, 0),
 695
 696SND_SOC_DAPM_PGA("ISRC2DEC1", MADERA_ISRC_2_CTRL_3,
 697                 MADERA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0),
 698SND_SOC_DAPM_PGA("ISRC2DEC2", MADERA_ISRC_2_CTRL_3,
 699                 MADERA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0),
 700SND_SOC_DAPM_PGA("ISRC2DEC3", MADERA_ISRC_2_CTRL_3,
 701                 MADERA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0),
 702SND_SOC_DAPM_PGA("ISRC2DEC4", MADERA_ISRC_2_CTRL_3,
 703                 MADERA_ISRC2_DEC4_ENA_SHIFT, 0, NULL, 0),
 704
 705SND_SOC_DAPM_PGA("ISRC2INT1", MADERA_ISRC_2_CTRL_3,
 706                 MADERA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0),
 707SND_SOC_DAPM_PGA("ISRC2INT2", MADERA_ISRC_2_CTRL_3,
 708                 MADERA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0),
 709SND_SOC_DAPM_PGA("ISRC2INT3", MADERA_ISRC_2_CTRL_3,
 710                 MADERA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0),
 711SND_SOC_DAPM_PGA("ISRC2INT4", MADERA_ISRC_2_CTRL_3,
 712                 MADERA_ISRC2_INT4_ENA_SHIFT, 0, NULL, 0),
 713
 714WM_ADSP2("DSP1", 0, cs47l15_adsp_power_ev),
 715
 716/* end of ordered widget list */
 717
 718MADERA_MIXER_WIDGETS(EQ1, "EQ1"),
 719MADERA_MIXER_WIDGETS(EQ2, "EQ2"),
 720MADERA_MIXER_WIDGETS(EQ3, "EQ3"),
 721MADERA_MIXER_WIDGETS(EQ4, "EQ4"),
 722
 723MADERA_MIXER_WIDGETS(DRC1L, "DRC1L"),
 724MADERA_MIXER_WIDGETS(DRC1R, "DRC1R"),
 725MADERA_MIXER_WIDGETS(DRC2L, "DRC2L"),
 726MADERA_MIXER_WIDGETS(DRC2R, "DRC2R"),
 727
 728SND_SOC_DAPM_SWITCH("DRC1 Activity Output", SND_SOC_NOPM, 0, 0,
 729                    &madera_drc_activity_output_mux[0]),
 730SND_SOC_DAPM_SWITCH("DRC2 Activity Output", SND_SOC_NOPM, 0, 0,
 731                    &madera_drc_activity_output_mux[1]),
 732
 733MADERA_MIXER_WIDGETS(LHPF1, "LHPF1"),
 734MADERA_MIXER_WIDGETS(LHPF2, "LHPF2"),
 735MADERA_MIXER_WIDGETS(LHPF3, "LHPF3"),
 736MADERA_MIXER_WIDGETS(LHPF4, "LHPF4"),
 737
 738MADERA_MIXER_WIDGETS(PWM1, "PWM1"),
 739MADERA_MIXER_WIDGETS(PWM2, "PWM2"),
 740
 741MADERA_MIXER_WIDGETS(OUT1L, "HPOUT1L"),
 742MADERA_MIXER_WIDGETS(OUT1R, "HPOUT1R"),
 743MADERA_MIXER_WIDGETS(SPKOUTL, "SPKOUTL"),
 744MADERA_MIXER_WIDGETS(SPKDAT1L, "SPKDAT1L"),
 745MADERA_MIXER_WIDGETS(SPKDAT1R, "SPKDAT1R"),
 746
 747MADERA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"),
 748MADERA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"),
 749MADERA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"),
 750MADERA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"),
 751MADERA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"),
 752MADERA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"),
 753
 754MADERA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"),
 755MADERA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"),
 756MADERA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"),
 757MADERA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"),
 758
 759MADERA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"),
 760MADERA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"),
 761
 762MADERA_MUX_WIDGETS(SPD1TX1, "SPDIF1TX1"),
 763MADERA_MUX_WIDGETS(SPD1TX2, "SPDIF1TX2"),
 764
 765MADERA_DSP_WIDGETS(DSP1, "DSP1"),
 766
 767SND_SOC_DAPM_SWITCH("DSP1 Trigger Output", SND_SOC_NOPM, 0, 0,
 768                    &madera_dsp_trigger_output_mux[0]),
 769
 770MADERA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"),
 771MADERA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"),
 772MADERA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"),
 773MADERA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"),
 774
 775MADERA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"),
 776MADERA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"),
 777MADERA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"),
 778MADERA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"),
 779
 780MADERA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"),
 781MADERA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"),
 782MADERA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"),
 783MADERA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"),
 784
 785MADERA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"),
 786MADERA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"),
 787MADERA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"),
 788MADERA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"),
 789
 790SND_SOC_DAPM_OUTPUT("HPOUTL"),
 791SND_SOC_DAPM_OUTPUT("HPOUTR"),
 792SND_SOC_DAPM_OUTPUT("EPOUTP"),
 793SND_SOC_DAPM_OUTPUT("EPOUTN"),
 794SND_SOC_DAPM_OUTPUT("SPKOUTN"),
 795SND_SOC_DAPM_OUTPUT("SPKOUTP"),
 796SND_SOC_DAPM_OUTPUT("SPKDAT1L"),
 797SND_SOC_DAPM_OUTPUT("SPKDAT1R"),
 798SND_SOC_DAPM_OUTPUT("SPDIF1"),
 799
 800SND_SOC_DAPM_OUTPUT("MICSUPP"),
 801};
 802
 803#define MADERA_MIXER_INPUT_ROUTES(name) \
 804        { name, "Noise Generator", "Noise Generator" }, \
 805        { name, "Tone Generator 1", "Tone Generator 1" }, \
 806        { name, "Tone Generator 2", "Tone Generator 2" }, \
 807        { name, "Haptics", "HAPTICS" }, \
 808        { name, "AEC1", "AEC1 Loopback" }, \
 809        { name, "AEC2", "AEC2 Loopback" }, \
 810        { name, "IN1L", "IN1L" }, \
 811        { name, "IN1R", "IN1R" }, \
 812        { name, "IN2L", "IN2L" }, \
 813        { name, "IN2R", "IN2R" }, \
 814        { name, "AIF1RX1", "AIF1RX1" }, \
 815        { name, "AIF1RX2", "AIF1RX2" }, \
 816        { name, "AIF1RX3", "AIF1RX3" }, \
 817        { name, "AIF1RX4", "AIF1RX4" }, \
 818        { name, "AIF1RX5", "AIF1RX5" }, \
 819        { name, "AIF1RX6", "AIF1RX6" }, \
 820        { name, "AIF2RX1", "AIF2RX1" }, \
 821        { name, "AIF2RX2", "AIF2RX2" }, \
 822        { name, "AIF2RX3", "AIF2RX3" }, \
 823        { name, "AIF2RX4", "AIF2RX4" }, \
 824        { name, "AIF3RX1", "AIF3RX1" }, \
 825        { name, "AIF3RX2", "AIF3RX2" }, \
 826        { name, "EQ1", "EQ1" }, \
 827        { name, "EQ2", "EQ2" }, \
 828        { name, "EQ3", "EQ3" }, \
 829        { name, "EQ4", "EQ4" }, \
 830        { name, "DRC1L", "DRC1L" }, \
 831        { name, "DRC1R", "DRC1R" }, \
 832        { name, "DRC2L", "DRC2L" }, \
 833        { name, "DRC2R", "DRC2R" }, \
 834        { name, "LHPF1", "LHPF1" }, \
 835        { name, "LHPF2", "LHPF2" }, \
 836        { name, "LHPF3", "LHPF3" }, \
 837        { name, "LHPF4", "LHPF4" }, \
 838        { name, "ISRC1DEC1", "ISRC1DEC1" }, \
 839        { name, "ISRC1DEC2", "ISRC1DEC2" }, \
 840        { name, "ISRC1DEC3", "ISRC1DEC3" }, \
 841        { name, "ISRC1DEC4", "ISRC1DEC4" }, \
 842        { name, "ISRC1INT1", "ISRC1INT1" }, \
 843        { name, "ISRC1INT2", "ISRC1INT2" }, \
 844        { name, "ISRC1INT3", "ISRC1INT3" }, \
 845        { name, "ISRC1INT4", "ISRC1INT4" }, \
 846        { name, "ISRC2DEC1", "ISRC2DEC1" }, \
 847        { name, "ISRC2DEC2", "ISRC2DEC2" }, \
 848        { name, "ISRC2DEC3", "ISRC2DEC3" }, \
 849        { name, "ISRC2DEC4", "ISRC2DEC4" }, \
 850        { name, "ISRC2INT1", "ISRC2INT1" }, \
 851        { name, "ISRC2INT2", "ISRC2INT2" }, \
 852        { name, "ISRC2INT3", "ISRC2INT3" }, \
 853        { name, "ISRC2INT4", "ISRC2INT4" }, \
 854        { name, "DSP1.1", "DSP1" }, \
 855        { name, "DSP1.2", "DSP1" }, \
 856        { name, "DSP1.3", "DSP1" }, \
 857        { name, "DSP1.4", "DSP1" }, \
 858        { name, "DSP1.5", "DSP1" }, \
 859        { name, "DSP1.6", "DSP1" }
 860
 861static const struct snd_soc_dapm_route cs47l15_dapm_routes[] = {
 862        /* Internal clock domains */
 863        { "EQ1", NULL, "FXCLK" },
 864        { "EQ2", NULL, "FXCLK" },
 865        { "EQ3", NULL, "FXCLK" },
 866        { "EQ4", NULL, "FXCLK" },
 867        { "DRC1L", NULL, "FXCLK" },
 868        { "DRC1R", NULL, "FXCLK" },
 869        { "DRC2L", NULL, "FXCLK" },
 870        { "DRC2R", NULL, "FXCLK" },
 871        { "LHPF1", NULL, "FXCLK" },
 872        { "LHPF2", NULL, "FXCLK" },
 873        { "LHPF3", NULL, "FXCLK" },
 874        { "LHPF4", NULL, "FXCLK" },
 875        { "PWM1 Mixer", NULL, "PWMCLK" },
 876        { "PWM2 Mixer", NULL, "PWMCLK" },
 877        { "OUT1L", NULL, "OUTCLK" },
 878        { "OUT1R", NULL, "OUTCLK" },
 879        { "OUT4L", NULL, "OUTCLK" },
 880        { "OUT5L", NULL, "OUTCLK" },
 881        { "OUT5R", NULL, "OUTCLK" },
 882        { "AIF1TX1", NULL, "AIF1TXCLK" },
 883        { "AIF1TX2", NULL, "AIF1TXCLK" },
 884        { "AIF1TX3", NULL, "AIF1TXCLK" },
 885        { "AIF1TX4", NULL, "AIF1TXCLK" },
 886        { "AIF1TX5", NULL, "AIF1TXCLK" },
 887        { "AIF1TX6", NULL, "AIF1TXCLK" },
 888        { "AIF2TX1", NULL, "AIF2TXCLK" },
 889        { "AIF2TX2", NULL, "AIF2TXCLK" },
 890        { "AIF2TX3", NULL, "AIF2TXCLK" },
 891        { "AIF2TX4", NULL, "AIF2TXCLK" },
 892        { "AIF3TX1", NULL, "AIF3TXCLK" },
 893        { "AIF3TX2", NULL, "AIF3TXCLK" },
 894        { "SPD1TX1", NULL, "SPDCLK" },
 895        { "SPD1TX2", NULL, "SPDCLK" },
 896        { "DSP1", NULL, "DSP1CLK" },
 897        { "ISRC1DEC1", NULL, "ISRC1CLK" },
 898        { "ISRC1DEC2", NULL, "ISRC1CLK" },
 899        { "ISRC1DEC3", NULL, "ISRC1CLK" },
 900        { "ISRC1DEC4", NULL, "ISRC1CLK" },
 901        { "ISRC1INT1", NULL, "ISRC1CLK" },
 902        { "ISRC1INT2", NULL, "ISRC1CLK" },
 903        { "ISRC1INT3", NULL, "ISRC1CLK" },
 904        { "ISRC1INT4", NULL, "ISRC1CLK" },
 905        { "ISRC2DEC1", NULL, "ISRC2CLK" },
 906        { "ISRC2DEC2", NULL, "ISRC2CLK" },
 907        { "ISRC2DEC3", NULL, "ISRC2CLK" },
 908        { "ISRC2DEC4", NULL, "ISRC2CLK" },
 909        { "ISRC2INT1", NULL, "ISRC2CLK" },
 910        { "ISRC2INT2", NULL, "ISRC2CLK" },
 911        { "ISRC2INT3", NULL, "ISRC2CLK" },
 912        { "ISRC2INT4", NULL, "ISRC2CLK" },
 913
 914        { "OUT1L", NULL, "CPVDD1" },
 915        { "OUT1R", NULL, "CPVDD1" },
 916        { "OUT4L", NULL, "SPKVDD" },
 917
 918        { "OUT1L", NULL, "SYSCLK" },
 919        { "OUT1R", NULL, "SYSCLK" },
 920        { "OUT4L", NULL, "SYSCLK" },
 921        { "OUT5L", NULL, "SYSCLK" },
 922        { "OUT5R", NULL, "SYSCLK" },
 923
 924        { "SPD1", NULL, "SYSCLK" },
 925        { "SPD1", NULL, "SPD1TX1" },
 926        { "SPD1", NULL, "SPD1TX2" },
 927
 928        { "IN1L", NULL, "SYSCLK" },
 929        { "IN1R", NULL, "SYSCLK" },
 930        { "IN2L", NULL, "SYSCLK" },
 931        { "IN2R", NULL, "SYSCLK" },
 932
 933        { "MICBIAS1", NULL, "MICVDD" },
 934
 935        { "MICBIAS1A", NULL, "MICBIAS1" },
 936        { "MICBIAS1B", NULL, "MICBIAS1" },
 937        { "MICBIAS1C", NULL, "MICBIAS1" },
 938
 939        { "Noise Generator", NULL, "SYSCLK" },
 940        { "Tone Generator 1", NULL, "SYSCLK" },
 941        { "Tone Generator 2", NULL, "SYSCLK" },
 942
 943        { "Noise Generator", NULL, "NOISE" },
 944        { "Tone Generator 1", NULL, "TONE" },
 945        { "Tone Generator 2", NULL, "TONE" },
 946
 947        { "AIF1 Capture", NULL, "AIF1TX1" },
 948        { "AIF1 Capture", NULL, "AIF1TX2" },
 949        { "AIF1 Capture", NULL, "AIF1TX3" },
 950        { "AIF1 Capture", NULL, "AIF1TX4" },
 951        { "AIF1 Capture", NULL, "AIF1TX5" },
 952        { "AIF1 Capture", NULL, "AIF1TX6" },
 953
 954        { "AIF1RX1", NULL, "AIF1 Playback" },
 955        { "AIF1RX2", NULL, "AIF1 Playback" },
 956        { "AIF1RX3", NULL, "AIF1 Playback" },
 957        { "AIF1RX4", NULL, "AIF1 Playback" },
 958        { "AIF1RX5", NULL, "AIF1 Playback" },
 959        { "AIF1RX6", NULL, "AIF1 Playback" },
 960
 961        { "AIF2 Capture", NULL, "AIF2TX1" },
 962        { "AIF2 Capture", NULL, "AIF2TX2" },
 963        { "AIF2 Capture", NULL, "AIF2TX3" },
 964        { "AIF2 Capture", NULL, "AIF2TX4" },
 965
 966        { "AIF2RX1", NULL, "AIF2 Playback" },
 967        { "AIF2RX2", NULL, "AIF2 Playback" },
 968        { "AIF2RX3", NULL, "AIF2 Playback" },
 969        { "AIF2RX4", NULL, "AIF2 Playback" },
 970
 971        { "AIF3 Capture", NULL, "AIF3TX1" },
 972        { "AIF3 Capture", NULL, "AIF3TX2" },
 973
 974        { "AIF3RX1", NULL, "AIF3 Playback" },
 975        { "AIF3RX2", NULL, "AIF3 Playback" },
 976
 977        { "AIF1 Playback", NULL, "SYSCLK" },
 978        { "AIF2 Playback", NULL, "SYSCLK" },
 979        { "AIF3 Playback", NULL, "SYSCLK" },
 980
 981        { "AIF1 Capture", NULL, "SYSCLK" },
 982        { "AIF2 Capture", NULL, "SYSCLK" },
 983        { "AIF3 Capture", NULL, "SYSCLK" },
 984
 985        { "Audio Trace DSP", NULL, "DSP1" },
 986
 987        { "IN1L Analog Mux", "A", "IN1ALN" },
 988        { "IN1L Analog Mux", "A", "IN1ALP" },
 989        { "IN1L Analog Mux", "B", "IN1BLN" },
 990        { "IN1L Analog Mux", "B", "IN1BLP" },
 991        { "IN1R Analog Mux", "A", "IN1ARN" },
 992        { "IN1R Analog Mux", "A", "IN1ARP" },
 993        { "IN1R Analog Mux", "B", "IN1BRN" },
 994        { "IN1R Analog Mux", "B", "IN1BRP" },
 995
 996        { "IN1L Mode", "Analog", "IN1L Analog Mux" },
 997        { "IN1R Mode", "Analog", "IN1R Analog Mux" },
 998
 999        { "IN1L Mode", "Digital", "IN1ALN" },
1000        { "IN1L Mode", "Digital", "IN1ALP" },
1001        { "IN1R Mode", "Digital", "IN1ALN" },
1002        { "IN1R Mode", "Digital", "IN1ALP" },
1003
1004        { "IN1L", NULL, "IN1L Mode" },
1005        { "IN1R", NULL, "IN1R Mode" },
1006
1007        { "IN2L Mode", "Analog", "IN2N" },
1008        { "IN2L Mode", "Analog", "IN2P" },
1009
1010        { "IN2L Mode", "Digital", "SPKRXDAT" },
1011        { "IN2R Mode", "Digital", "SPKRXDAT" },
1012
1013        { "IN2L", NULL, "IN2L Mode" },
1014        { "IN2R", NULL, "IN2R Mode" },
1015
1016        MADERA_MIXER_ROUTES("OUT1L", "HPOUT1L"),
1017        MADERA_MIXER_ROUTES("OUT1R", "HPOUT1R"),
1018        MADERA_MIXER_ROUTES("OUT4L", "SPKOUTL"),
1019        MADERA_MIXER_ROUTES("OUT5L", "SPKDAT1L"),
1020        MADERA_MIXER_ROUTES("OUT5R", "SPKDAT1R"),
1021
1022        MADERA_MIXER_ROUTES("PWM1 Driver", "PWM1"),
1023        MADERA_MIXER_ROUTES("PWM2 Driver", "PWM2"),
1024
1025        MADERA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"),
1026        MADERA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"),
1027        MADERA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"),
1028        MADERA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"),
1029        MADERA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"),
1030        MADERA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"),
1031
1032        MADERA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"),
1033        MADERA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"),
1034        MADERA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"),
1035        MADERA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"),
1036
1037        MADERA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"),
1038        MADERA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"),
1039
1040        MADERA_MUX_ROUTES("SPD1TX1", "SPDIF1TX1"),
1041        MADERA_MUX_ROUTES("SPD1TX2", "SPDIF1TX2"),
1042
1043        MADERA_MIXER_ROUTES("EQ1", "EQ1"),
1044        MADERA_MIXER_ROUTES("EQ2", "EQ2"),
1045        MADERA_MIXER_ROUTES("EQ3", "EQ3"),
1046        MADERA_MIXER_ROUTES("EQ4", "EQ4"),
1047
1048        MADERA_MIXER_ROUTES("DRC1L", "DRC1L"),
1049        MADERA_MIXER_ROUTES("DRC1R", "DRC1R"),
1050        MADERA_MIXER_ROUTES("DRC2L", "DRC2L"),
1051        MADERA_MIXER_ROUTES("DRC2R", "DRC2R"),
1052
1053        MADERA_MIXER_ROUTES("LHPF1", "LHPF1"),
1054        MADERA_MIXER_ROUTES("LHPF2", "LHPF2"),
1055        MADERA_MIXER_ROUTES("LHPF3", "LHPF3"),
1056        MADERA_MIXER_ROUTES("LHPF4", "LHPF4"),
1057
1058        MADERA_DSP_ROUTES("DSP1"),
1059
1060        { "DSP Trigger Out", NULL, "DSP1 Trigger Output" },
1061
1062        { "DSP1 Trigger Output", "Switch", "DSP1" },
1063
1064        MADERA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"),
1065        MADERA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"),
1066        MADERA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"),
1067        MADERA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"),
1068
1069        MADERA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"),
1070        MADERA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"),
1071        MADERA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"),
1072        MADERA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"),
1073
1074        MADERA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"),
1075        MADERA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"),
1076        MADERA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"),
1077        MADERA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"),
1078
1079        MADERA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"),
1080        MADERA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"),
1081        MADERA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"),
1082        MADERA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"),
1083
1084        { "AEC1 Loopback", "HPOUT1L", "OUT1L" },
1085        { "AEC1 Loopback", "HPOUT1R", "OUT1R" },
1086        { "AEC2 Loopback", "HPOUT1L", "OUT1L" },
1087        { "AEC2 Loopback", "HPOUT1R", "OUT1R" },
1088        { "HPOUT1 Demux", NULL, "OUT1L" },
1089        { "HPOUT1 Demux", NULL, "OUT1R" },
1090
1091        { "OUT1R", NULL, "HPOUT1 Mono Mux" },
1092        { "HPOUT1 Mono Mux", "EPOUT", "OUT1L" },
1093
1094        { "HPOUTL", "HPOUT", "HPOUT1 Demux" },
1095        { "HPOUTR", "HPOUT", "HPOUT1 Demux" },
1096        { "EPOUTP", "EPOUT", "HPOUT1 Demux" },
1097        { "EPOUTN", "EPOUT", "HPOUT1 Demux" },
1098
1099        { "AEC1 Loopback", "SPKOUTL", "OUT4L" },
1100        { "AEC2 Loopback", "SPKOUTL", "OUT4L" },
1101        { "SPKOUTN", NULL, "OUT4L" },
1102        { "SPKOUTP", NULL, "OUT4L" },
1103
1104        { "AEC1 Loopback", "SPKDAT1L", "OUT5L" },
1105        { "AEC1 Loopback", "SPKDAT1R", "OUT5R" },
1106        { "AEC2 Loopback", "SPKDAT1L", "OUT5L" },
1107        { "AEC2 Loopback", "SPKDAT1R", "OUT5R" },
1108        { "SPKDAT1L", NULL, "OUT5L" },
1109        { "SPKDAT1R", NULL, "OUT5R" },
1110
1111        { "SPDIF1", NULL, "SPD1" },
1112
1113        { "MICSUPP", NULL, "SYSCLK" },
1114
1115        { "DRC1 Signal Activity", NULL, "DRC1 Activity Output" },
1116        { "DRC2 Signal Activity", NULL, "DRC2 Activity Output" },
1117        { "DRC1 Activity Output", "Switch", "DRC1L" },
1118        { "DRC1 Activity Output", "Switch", "DRC1R" },
1119        { "DRC2 Activity Output", "Switch", "DRC2L" },
1120        { "DRC2 Activity Output", "Switch", "DRC2R" },
1121};
1122
1123static int cs47l15_set_fll(struct snd_soc_component *component, int fll_id,
1124                           int source, unsigned int fref, unsigned int fout)
1125{
1126        struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1127
1128        switch (fll_id) {
1129        case MADERA_FLL1_REFCLK:
1130                return madera_set_fll_refclk(&cs47l15->fll[0], source, fref,
1131                                             fout);
1132        case MADERA_FLLAO_REFCLK:
1133                return madera_set_fll_ao_refclk(&cs47l15->fll[1], source, fref,
1134                                                fout);
1135        case MADERA_FLL1_SYNCCLK:
1136                return madera_set_fll_syncclk(&cs47l15->fll[0], source, fref,
1137                                              fout);
1138        default:
1139                return -EINVAL;
1140        }
1141}
1142
1143static struct snd_soc_dai_driver cs47l15_dai[] = {
1144        {
1145                .name = "cs47l15-aif1",
1146                .id = 1,
1147                .base = MADERA_AIF1_BCLK_CTRL,
1148                .playback = {
1149                        .stream_name = "AIF1 Playback",
1150                        .channels_min = 1,
1151                        .channels_max = 6,
1152                        .rates = MADERA_RATES,
1153                        .formats = MADERA_FORMATS,
1154                },
1155                .capture = {
1156                        .stream_name = "AIF1 Capture",
1157                        .channels_min = 1,
1158                        .channels_max = 6,
1159                        .rates = MADERA_RATES,
1160                        .formats = MADERA_FORMATS,
1161                 },
1162                .ops = &madera_dai_ops,
1163                .symmetric_rate = 1,
1164                .symmetric_sample_bits = 1,
1165        },
1166        {
1167                .name = "cs47l15-aif2",
1168                .id = 2,
1169                .base = MADERA_AIF2_BCLK_CTRL,
1170                .playback = {
1171                        .stream_name = "AIF2 Playback",
1172                        .channels_min = 1,
1173                        .channels_max = 4,
1174                        .rates = MADERA_RATES,
1175                        .formats = MADERA_FORMATS,
1176                },
1177                .capture = {
1178                        .stream_name = "AIF2 Capture",
1179                        .channels_min = 1,
1180                        .channels_max = 4,
1181                        .rates = MADERA_RATES,
1182                        .formats = MADERA_FORMATS,
1183                 },
1184                .ops = &madera_dai_ops,
1185                .symmetric_rate = 1,
1186                .symmetric_sample_bits = 1,
1187        },
1188        {
1189                .name = "cs47l15-aif3",
1190                .id = 3,
1191                .base = MADERA_AIF3_BCLK_CTRL,
1192                .playback = {
1193                        .stream_name = "AIF3 Playback",
1194                        .channels_min = 1,
1195                        .channels_max = 2,
1196                        .rates = MADERA_RATES,
1197                        .formats = MADERA_FORMATS,
1198                },
1199                .capture = {
1200                        .stream_name = "AIF3 Capture",
1201                        .channels_min = 1,
1202                        .channels_max = 2,
1203                        .rates = MADERA_RATES,
1204                        .formats = MADERA_FORMATS,
1205                 },
1206                .ops = &madera_dai_ops,
1207                .symmetric_rate = 1,
1208                .symmetric_sample_bits = 1,
1209        },
1210        {
1211                .name = "cs47l15-cpu-trace",
1212                .capture = {
1213                        .stream_name = "Audio Trace CPU",
1214                        .channels_min = 1,
1215                        .channels_max = 6,
1216                        .rates = MADERA_RATES,
1217                        .formats = MADERA_FORMATS,
1218                },
1219                .compress_new = snd_soc_new_compress,
1220        },
1221        {
1222                .name = "cs47l15-dsp-trace",
1223                .capture = {
1224                        .stream_name = "Audio Trace DSP",
1225                        .channels_min = 1,
1226                        .channels_max = 6,
1227                        .rates = MADERA_RATES,
1228                        .formats = MADERA_FORMATS,
1229                },
1230        },
1231};
1232
1233static int cs47l15_open(struct snd_soc_component *component,
1234                        struct snd_compr_stream *stream)
1235{
1236        struct snd_soc_pcm_runtime *rtd = stream->private_data;
1237        struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1238        struct madera_priv *priv = &cs47l15->core;
1239        struct madera *madera = priv->madera;
1240        int n_adsp;
1241
1242        if (strcmp(asoc_rtd_to_codec(rtd, 0)->name, "cs47l15-dsp-trace") == 0) {
1243                n_adsp = 0;
1244        } else {
1245                dev_err(madera->dev,
1246                        "No suitable compressed stream for DAI '%s'\n",
1247                        asoc_rtd_to_codec(rtd, 0)->name);
1248                return -EINVAL;
1249        }
1250
1251        return wm_adsp_compr_open(&priv->adsp[n_adsp], stream);
1252}
1253
1254static irqreturn_t cs47l15_adsp2_irq(int irq, void *data)
1255{
1256        struct cs47l15 *cs47l15 = data;
1257        struct madera_priv *priv = &cs47l15->core;
1258        struct madera *madera = priv->madera;
1259        int ret;
1260
1261        ret = wm_adsp_compr_handle_irq(&priv->adsp[0]);
1262        if (ret == -ENODEV) {
1263                dev_err(madera->dev, "Spurious compressed data IRQ\n");
1264                return IRQ_NONE;
1265        }
1266
1267        return IRQ_HANDLED;
1268}
1269
1270static const struct snd_soc_dapm_route cs47l15_mono_routes[] = {
1271        { "HPOUT1 Mono Mux", "HPOUT", "OUT1L" },
1272};
1273
1274static int cs47l15_component_probe(struct snd_soc_component *component)
1275{
1276        struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1277        struct madera *madera = cs47l15->core.madera;
1278        int ret;
1279
1280        snd_soc_component_init_regmap(component, madera->regmap);
1281
1282        mutex_lock(&madera->dapm_ptr_lock);
1283        madera->dapm = snd_soc_component_get_dapm(component);
1284        mutex_unlock(&madera->dapm_ptr_lock);
1285
1286        ret = madera_init_inputs(component);
1287        if (ret)
1288                return ret;
1289
1290        ret = madera_init_outputs(component, cs47l15_mono_routes,
1291                                  ARRAY_SIZE(cs47l15_mono_routes),
1292                                  CS47L15_MONO_OUTPUTS);
1293        if (ret)
1294                return ret;
1295
1296        snd_soc_component_disable_pin(component, "HAPTICS");
1297
1298        ret = snd_soc_add_component_controls(component,
1299                                             madera_adsp_rate_controls,
1300                                             CS47L15_NUM_ADSP);
1301        if (ret)
1302                return ret;
1303
1304        wm_adsp2_component_probe(&cs47l15->core.adsp[0], component);
1305
1306        return 0;
1307}
1308
1309static void cs47l15_component_remove(struct snd_soc_component *component)
1310{
1311        struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1312        struct madera *madera = cs47l15->core.madera;
1313
1314        mutex_lock(&madera->dapm_ptr_lock);
1315        madera->dapm = NULL;
1316        mutex_unlock(&madera->dapm_ptr_lock);
1317
1318        wm_adsp2_component_remove(&cs47l15->core.adsp[0], component);
1319}
1320
1321#define CS47L15_DIG_VU 0x0200
1322
1323static unsigned int cs47l15_digital_vu[] = {
1324        MADERA_DAC_DIGITAL_VOLUME_1L,
1325        MADERA_DAC_DIGITAL_VOLUME_1R,
1326        MADERA_DAC_DIGITAL_VOLUME_4L,
1327        MADERA_DAC_DIGITAL_VOLUME_5L,
1328        MADERA_DAC_DIGITAL_VOLUME_5R,
1329};
1330
1331static const struct snd_compress_ops cs47l15_compress_ops = {
1332        .open = &cs47l15_open,
1333        .free = &wm_adsp_compr_free,
1334        .set_params = &wm_adsp_compr_set_params,
1335        .get_caps = &wm_adsp_compr_get_caps,
1336        .trigger = &wm_adsp_compr_trigger,
1337        .pointer = &wm_adsp_compr_pointer,
1338        .copy = &wm_adsp_compr_copy,
1339};
1340
1341static const struct snd_soc_component_driver soc_component_dev_cs47l15 = {
1342        .probe                  = &cs47l15_component_probe,
1343        .remove                 = &cs47l15_component_remove,
1344        .set_sysclk             = &madera_set_sysclk,
1345        .set_pll                = &cs47l15_set_fll,
1346        .name                   = DRV_NAME,
1347        .compress_ops           = &cs47l15_compress_ops,
1348        .controls               = cs47l15_snd_controls,
1349        .num_controls           = ARRAY_SIZE(cs47l15_snd_controls),
1350        .dapm_widgets           = cs47l15_dapm_widgets,
1351        .num_dapm_widgets       = ARRAY_SIZE(cs47l15_dapm_widgets),
1352        .dapm_routes            = cs47l15_dapm_routes,
1353        .num_dapm_routes        = ARRAY_SIZE(cs47l15_dapm_routes),
1354        .use_pmdown_time        = 1,
1355        .endianness             = 1,
1356        .non_legacy_dai_naming  = 1,
1357};
1358
1359static int cs47l15_probe(struct platform_device *pdev)
1360{
1361        struct madera *madera = dev_get_drvdata(pdev->dev.parent);
1362        struct cs47l15 *cs47l15;
1363        int i, ret;
1364
1365        BUILD_BUG_ON(ARRAY_SIZE(cs47l15_dai) > MADERA_MAX_DAI);
1366
1367        /* quick exit if Madera irqchip driver hasn't completed probe */
1368        if (!madera->irq_dev) {
1369                dev_dbg(&pdev->dev, "irqchip driver not ready\n");
1370                return -EPROBE_DEFER;
1371        }
1372
1373        cs47l15 = devm_kzalloc(&pdev->dev, sizeof(struct cs47l15),
1374                               GFP_KERNEL);
1375        if (!cs47l15)
1376                return -ENOMEM;
1377
1378        platform_set_drvdata(pdev, cs47l15);
1379
1380        cs47l15->core.madera = madera;
1381        cs47l15->core.dev = &pdev->dev;
1382        cs47l15->core.num_inputs = 4;
1383
1384        ret = madera_core_init(&cs47l15->core);
1385        if (ret)
1386                return ret;
1387
1388        ret = madera_init_overheat(&cs47l15->core);
1389        if (ret)
1390                goto error_core;
1391
1392        ret = madera_request_irq(madera, MADERA_IRQ_DSP_IRQ1,
1393                                 "ADSP2 Compressed IRQ", cs47l15_adsp2_irq,
1394                                 cs47l15);
1395        if (ret != 0) {
1396                dev_err(&pdev->dev, "Failed to request DSP IRQ: %d\n", ret);
1397                goto error_overheat;
1398        }
1399
1400        ret = madera_set_irq_wake(madera, MADERA_IRQ_DSP_IRQ1, 1);
1401        if (ret)
1402                dev_warn(&pdev->dev, "Failed to set DSP IRQ wake: %d\n", ret);
1403
1404        cs47l15->core.adsp[0].part = "cs47l15";
1405        cs47l15->core.adsp[0].num = 1;
1406        cs47l15->core.adsp[0].type = WMFW_ADSP2;
1407        cs47l15->core.adsp[0].rev = 2;
1408        cs47l15->core.adsp[0].dev = madera->dev;
1409        cs47l15->core.adsp[0].regmap = madera->regmap_32bit;
1410
1411        cs47l15->core.adsp[0].base = MADERA_DSP1_CONFIG_1;
1412        cs47l15->core.adsp[0].mem = cs47l15_dsp1_regions;
1413        cs47l15->core.adsp[0].num_mems = ARRAY_SIZE(cs47l15_dsp1_regions);
1414
1415        cs47l15->core.adsp[0].lock_regions =
1416                WM_ADSP2_REGION_1 | WM_ADSP2_REGION_2 | WM_ADSP2_REGION_3;
1417
1418        ret = wm_adsp2_init(&cs47l15->core.adsp[0]);
1419        if (ret != 0)
1420                goto error_dsp_irq;
1421
1422        ret = madera_init_bus_error_irq(&cs47l15->core, 0, wm_adsp2_bus_error);
1423        if (ret)
1424                goto error_adsp;
1425
1426        madera_init_fll(madera, 1, MADERA_FLL1_CONTROL_1 - 1,
1427                        &cs47l15->fll[0]);
1428        madera_init_fll(madera, 4, MADERA_FLLAO_CONTROL_1 - 1,
1429                        &cs47l15->fll[1]);
1430
1431        for (i = 0; i < ARRAY_SIZE(cs47l15_dai); i++)
1432                madera_init_dai(&cs47l15->core, i);
1433
1434        /* Latch volume update bits */
1435        for (i = 0; i < ARRAY_SIZE(cs47l15_digital_vu); i++)
1436                regmap_update_bits(madera->regmap, cs47l15_digital_vu[i],
1437                                   CS47L15_DIG_VU, CS47L15_DIG_VU);
1438
1439        pm_runtime_enable(&pdev->dev);
1440        pm_runtime_idle(&pdev->dev);
1441
1442        ret = devm_snd_soc_register_component(&pdev->dev,
1443                                              &soc_component_dev_cs47l15,
1444                                              cs47l15_dai,
1445                                              ARRAY_SIZE(cs47l15_dai));
1446        if (ret < 0) {
1447                dev_err(&pdev->dev, "Failed to register component: %d\n", ret);
1448                goto error_pm_runtime;
1449        }
1450
1451        return ret;
1452
1453error_pm_runtime:
1454        pm_runtime_disable(&pdev->dev);
1455        madera_free_bus_error_irq(&cs47l15->core, 0);
1456error_adsp:
1457        wm_adsp2_remove(&cs47l15->core.adsp[0]);
1458error_dsp_irq:
1459        madera_set_irq_wake(madera, MADERA_IRQ_DSP_IRQ1, 0);
1460        madera_free_irq(madera, MADERA_IRQ_DSP_IRQ1, cs47l15);
1461error_overheat:
1462        madera_free_overheat(&cs47l15->core);
1463error_core:
1464        madera_core_free(&cs47l15->core);
1465
1466        return ret;
1467}
1468
1469static int cs47l15_remove(struct platform_device *pdev)
1470{
1471        struct cs47l15 *cs47l15 = platform_get_drvdata(pdev);
1472
1473        pm_runtime_disable(&pdev->dev);
1474
1475        madera_free_bus_error_irq(&cs47l15->core, 0);
1476
1477        wm_adsp2_remove(&cs47l15->core.adsp[0]);
1478
1479        madera_set_irq_wake(cs47l15->core.madera, MADERA_IRQ_DSP_IRQ1, 0);
1480        madera_free_irq(cs47l15->core.madera, MADERA_IRQ_DSP_IRQ1, cs47l15);
1481        madera_free_overheat(&cs47l15->core);
1482        madera_core_free(&cs47l15->core);
1483
1484        return 0;
1485}
1486
1487static struct platform_driver cs47l15_codec_driver = {
1488        .driver = {
1489                .name = "cs47l15-codec",
1490        },
1491        .probe = &cs47l15_probe,
1492        .remove = &cs47l15_remove,
1493};
1494
1495module_platform_driver(cs47l15_codec_driver);
1496
1497MODULE_SOFTDEP("pre: madera irq-madera arizona-micsupp");
1498MODULE_DESCRIPTION("ASoC CS47L15 driver");
1499MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
1500MODULE_AUTHOR("Jaswinder Jassal <jjassal@opensource.cirrus.com>");
1501MODULE_LICENSE("GPL v2");
1502MODULE_ALIAS("platform:cs47l15-codec");
1503