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57#ifndef _HFA384x_H
58#define _HFA384x_H
59
60#define HFA384x_FIRMWARE_VERSION(a, b, c) (((a) << 16) + ((b) << 8) + (c))
61
62#include <linux/if_ether.h>
63#include <linux/usb.h>
64
65
66#define HFA384x_PORTID_MAX ((u16)7)
67#define HFA384x_NUMPORTS_MAX ((u16)(HFA384x_PORTID_MAX + 1))
68#define HFA384x_PDR_LEN_MAX ((u16)512)
69#define HFA384x_PDA_RECS_MAX ((u16)200)
70#define HFA384x_PDA_LEN_MAX ((u16)1024)
71#define HFA384x_SCANRESULT_MAX ((u16)31)
72#define HFA384x_HSCANRESULT_MAX ((u16)31)
73#define HFA384x_CHINFORESULT_MAX ((u16)16)
74#define HFA384x_RID_GUESSING_MAXLEN 2048
75#define HFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN
76#define HFA384x_USB_RWMEM_MAXLEN 2048
77
78
79#define HFA384x_PORTTYPE_IBSS ((u16)0)
80#define HFA384x_PORTTYPE_BSS ((u16)1)
81#define HFA384x_PORTTYPE_PSUEDOIBSS ((u16)3)
82#define HFA384x_WEPFLAGS_PRIVINVOKED ((u16)BIT(0))
83#define HFA384x_WEPFLAGS_EXCLUDE ((u16)BIT(1))
84#define HFA384x_WEPFLAGS_DISABLE_TXCRYPT ((u16)BIT(4))
85#define HFA384x_WEPFLAGS_DISABLE_RXCRYPT ((u16)BIT(7))
86#define HFA384x_ROAMMODE_HOSTSCAN_HOSTROAM ((u16)3)
87#define HFA384x_PORTSTATUS_DISABLED ((u16)1)
88#define HFA384x_RATEBIT_1 ((u16)1)
89#define HFA384x_RATEBIT_2 ((u16)2)
90#define HFA384x_RATEBIT_5dot5 ((u16)4)
91#define HFA384x_RATEBIT_11 ((u16)8)
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108#define HFA384x_ADDR_FLAT_AUX_PAGE_MASK (0x007fff80)
109#define HFA384x_ADDR_FLAT_AUX_OFF_MASK (0x0000007f)
110#define HFA384x_ADDR_FLAT_CMD_PAGE_MASK (0xffff0000)
111#define HFA384x_ADDR_FLAT_CMD_OFF_MASK (0x0000ffff)
112
113
114
115
116#define HFA384x_ADDR_AUX_PAGE_MASK (0xffff)
117#define HFA384x_ADDR_AUX_OFF_MASK (0x007f)
118
119
120#define HFA384x_ADDR_AUX_MKFLAT(p, o) \
121 ((((u32)(((u16)(p)) & HFA384x_ADDR_AUX_PAGE_MASK)) << 7) | \
122 ((u32)(((u16)(o)) & HFA384x_ADDR_AUX_OFF_MASK)))
123
124
125#define HFA384x_ADDR_CMD_MKPAGE(f) \
126 ((u16)((((u32)(f)) & HFA384x_ADDR_FLAT_CMD_PAGE_MASK) >> 16))
127#define HFA384x_ADDR_CMD_MKOFF(f) \
128 ((u16)(((u32)(f)) & HFA384x_ADDR_FLAT_CMD_OFF_MASK))
129
130
131#define HFA3842_PDA_BASE (0x007f0000UL)
132#define HFA3841_PDA_BASE (0x003f0000UL)
133#define HFA3841_PDA_BOGUS_BASE (0x00390000UL)
134
135
136#define HFA384x_DLSTATE_DISABLED 0
137#define HFA384x_DLSTATE_RAMENABLED 1
138#define HFA384x_DLSTATE_FLASHENABLED 2
139
140
141#define HFA384x_CMD_AINFO ((u16)GENMASK(14, 8))
142#define HFA384x_CMD_MACPORT ((u16)GENMASK(10, 8))
143#define HFA384x_CMD_PROGMODE ((u16)GENMASK(9, 8))
144#define HFA384x_CMD_CMDCODE ((u16)GENMASK(5, 0))
145#define HFA384x_STATUS_RESULT ((u16)GENMASK(14, 8))
146
147
148
149#define HFA384x_CMDCODE_INIT ((u16)0x00)
150#define HFA384x_CMDCODE_ENABLE ((u16)0x01)
151#define HFA384x_CMDCODE_DISABLE ((u16)0x02)
152
153
154#define HFA384x_CMDCODE_INQ ((u16)0x11)
155
156
157#define HFA384x_CMDCODE_DOWNLD ((u16)0x22)
158
159
160#define HFA384x_CMDCODE_MONITOR ((u16)(0x38))
161#define HFA384x_MONITOR_ENABLE ((u16)(0x0b))
162#define HFA384x_MONITOR_DISABLE ((u16)(0x0f))
163
164
165#define HFA384x_CMD_ERR ((u16)(0x7F))
166
167
168
169
170
171
172
173
174#define HFA384x_PROGMODE_DISABLE ((u16)0x00)
175#define HFA384x_PROGMODE_RAM ((u16)0x01)
176#define HFA384x_PROGMODE_NV ((u16)0x02)
177#define HFA384x_PROGMODE_NVWRITE ((u16)0x03)
178
179
180
181
182
183
184#define HFA384x_RID_CNFPORTTYPE ((u16)0xFC00)
185#define HFA384x_RID_CNFOWNMACADDR ((u16)0xFC01)
186#define HFA384x_RID_CNFDESIREDSSID ((u16)0xFC02)
187#define HFA384x_RID_CNFOWNCHANNEL ((u16)0xFC03)
188#define HFA384x_RID_CNFOWNSSID ((u16)0xFC04)
189#define HFA384x_RID_CNFMAXDATALEN ((u16)0xFC07)
190
191
192
193
194
195
196
197#define HFA384x_RID_CNFOWNMACADDR_LEN ((u16)6)
198#define HFA384x_RID_CNFDESIREDSSID_LEN ((u16)34)
199#define HFA384x_RID_CNFOWNSSID_LEN ((u16)34)
200
201
202
203
204
205#define HFA384x_RID_CREATEIBSS ((u16)0xFC81)
206#define HFA384x_RID_FRAGTHRESH ((u16)0xFC82)
207#define HFA384x_RID_RTSTHRESH ((u16)0xFC83)
208#define HFA384x_RID_TXRATECNTL ((u16)0xFC84)
209#define HFA384x_RID_PROMISCMODE ((u16)0xFC85)
210
211
212
213
214
215#define HFA384x_RID_MAXLOADTIME ((u16)0xFD00)
216#define HFA384x_RID_DOWNLOADBUFFER ((u16)0xFD01)
217#define HFA384x_RID_PRIIDENTITY ((u16)0xFD02)
218#define HFA384x_RID_PRISUPRANGE ((u16)0xFD03)
219#define HFA384x_RID_PRI_CFIACTRANGES ((u16)0xFD04)
220#define HFA384x_RID_NICSERIALNUMBER ((u16)0xFD0A)
221#define HFA384x_RID_NICIDENTITY ((u16)0xFD0B)
222#define HFA384x_RID_MFISUPRANGE ((u16)0xFD0C)
223#define HFA384x_RID_CFISUPRANGE ((u16)0xFD0D)
224#define HFA384x_RID_STAIDENTITY ((u16)0xFD20)
225#define HFA384x_RID_STASUPRANGE ((u16)0xFD21)
226#define HFA384x_RID_STA_MFIACTRANGES ((u16)0xFD22)
227#define HFA384x_RID_STA_CFIACTRANGES ((u16)0xFD23)
228
229
230
231
232
233
234
235#define HFA384x_RID_NICSERIALNUMBER_LEN ((u16)12)
236
237
238
239
240
241#define HFA384x_RID_PORTSTATUS ((u16)0xFD40)
242#define HFA384x_RID_CURRENTSSID ((u16)0xFD41)
243#define HFA384x_RID_CURRENTBSSID ((u16)0xFD42)
244#define HFA384x_RID_CURRENTTXRATE ((u16)0xFD44)
245#define HFA384x_RID_SHORTRETRYLIMIT ((u16)0xFD48)
246#define HFA384x_RID_LONGRETRYLIMIT ((u16)0xFD49)
247#define HFA384x_RID_MAXTXLIFETIME ((u16)0xFD4A)
248#define HFA384x_RID_PRIVACYOPTIMP ((u16)0xFD4F)
249#define HFA384x_RID_DBMCOMMSQUALITY ((u16)0xFD51)
250
251
252
253
254
255
256
257#define HFA384x_RID_DBMCOMMSQUALITY_LEN \
258 ((u16)sizeof(struct hfa384x_dbmcommsquality))
259#define HFA384x_RID_JOINREQUEST_LEN \
260 ((u16)sizeof(struct hfa384x_join_request_data))
261
262
263
264
265
266#define HFA384x_RID_CURRENTCHANNEL ((u16)0xFDC1)
267
268
269
270
271
272#define HFA384x_RID_CNFWEPDEFAULTKEYID ((u16)0xFC23)
273#define HFA384x_RID_CNFWEPDEFAULTKEY0 ((u16)0xFC24)
274#define HFA384x_RID_CNFWEPDEFAULTKEY1 ((u16)0xFC25)
275#define HFA384x_RID_CNFWEPDEFAULTKEY2 ((u16)0xFC26)
276#define HFA384x_RID_CNFWEPDEFAULTKEY3 ((u16)0xFC27)
277#define HFA384x_RID_CNFWEPFLAGS ((u16)0xFC28)
278#define HFA384x_RID_CNFAUTHENTICATION ((u16)0xFC2A)
279#define HFA384x_RID_CNFROAMINGMODE ((u16)0xFC2D)
280#define HFA384x_RID_CNFAPBCNINT ((u16)0xFC33)
281#define HFA384x_RID_CNFDBMADJUST ((u16)0xFC46)
282#define HFA384x_RID_CNFWPADATA ((u16)0xFC48)
283#define HFA384x_RID_CNFBASICRATES ((u16)0xFCB3)
284#define HFA384x_RID_CNFSUPPRATES ((u16)0xFCB4)
285#define HFA384x_RID_CNFPASSIVESCANCTRL ((u16)0xFCBA)
286#define HFA384x_RID_TXPOWERMAX ((u16)0xFCBE)
287#define HFA384x_RID_JOINREQUEST ((u16)0xFCE2)
288#define HFA384x_RID_AUTHENTICATESTA ((u16)0xFCE3)
289#define HFA384x_RID_HOSTSCAN ((u16)0xFCE5)
290
291#define HFA384x_RID_CNFWEPDEFAULTKEY_LEN ((u16)6)
292#define HFA384x_RID_CNFWEP128DEFAULTKEY_LEN ((u16)14)
293
294
295
296
297
298#define HFA384x_PDR_PCB_PARTNUM ((u16)0x0001)
299#define HFA384x_PDR_PDAVER ((u16)0x0002)
300#define HFA384x_PDR_NIC_SERIAL ((u16)0x0003)
301#define HFA384x_PDR_MKK_MEASUREMENTS ((u16)0x0004)
302#define HFA384x_PDR_NIC_RAMSIZE ((u16)0x0005)
303#define HFA384x_PDR_MFISUPRANGE ((u16)0x0006)
304#define HFA384x_PDR_CFISUPRANGE ((u16)0x0007)
305#define HFA384x_PDR_NICID ((u16)0x0008)
306#define HFA384x_PDR_MAC_ADDRESS ((u16)0x0101)
307#define HFA384x_PDR_REGDOMAIN ((u16)0x0103)
308#define HFA384x_PDR_ALLOWED_CHANNEL ((u16)0x0104)
309#define HFA384x_PDR_DEFAULT_CHANNEL ((u16)0x0105)
310#define HFA384x_PDR_TEMPTYPE ((u16)0x0107)
311#define HFA384x_PDR_IFR_SETTING ((u16)0x0200)
312#define HFA384x_PDR_RFR_SETTING ((u16)0x0201)
313#define HFA384x_PDR_HFA3861_BASELINE ((u16)0x0202)
314#define HFA384x_PDR_HFA3861_SHADOW ((u16)0x0203)
315#define HFA384x_PDR_HFA3861_IFRF ((u16)0x0204)
316#define HFA384x_PDR_HFA3861_CHCALSP ((u16)0x0300)
317#define HFA384x_PDR_HFA3861_CHCALI ((u16)0x0301)
318#define HFA384x_PDR_MAX_TX_POWER ((u16)0x0302)
319#define HFA384x_PDR_MASTER_CHAN_LIST ((u16)0x0303)
320#define HFA384x_PDR_3842_NIC_CONFIG ((u16)0x0400)
321#define HFA384x_PDR_USB_ID ((u16)0x0401)
322#define HFA384x_PDR_PCI_ID ((u16)0x0402)
323#define HFA384x_PDR_PCI_IFCONF ((u16)0x0403)
324#define HFA384x_PDR_PCI_PMCONF ((u16)0x0404)
325#define HFA384x_PDR_RFENRGY ((u16)0x0406)
326#define HFA384x_PDR_USB_POWER_TYPE ((u16)0x0407)
327#define HFA384x_PDR_USB_MAX_POWER ((u16)0x0409)
328#define HFA384x_PDR_USB_MANUFACTURER ((u16)0x0410)
329#define HFA384x_PDR_USB_PRODUCT ((u16)0x0411)
330#define HFA384x_PDR_ANT_DIVERSITY ((u16)0x0412)
331#define HFA384x_PDR_HFO_DELAY ((u16)0x0413)
332#define HFA384x_PDR_SCALE_THRESH ((u16)0x0414)
333
334#define HFA384x_PDR_HFA3861_MANF_TESTSP ((u16)0x0900)
335#define HFA384x_PDR_HFA3861_MANF_TESTI ((u16)0x0901)
336#define HFA384x_PDR_END_OF_PDA ((u16)0x0000)
337
338
339
340#define HFA384x_CMD_AINFO_SET(value) ((u16)((u16)(value) << 8))
341#define HFA384x_CMD_MACPORT_SET(value) \
342 ((u16)HFA384x_CMD_AINFO_SET(value))
343#define HFA384x_CMD_PROGMODE_SET(value) \
344 ((u16)HFA384x_CMD_AINFO_SET((u16)value))
345#define HFA384x_CMD_CMDCODE_SET(value) ((u16)(value))
346
347#define HFA384x_STATUS_RESULT_SET(value) (((u16)(value)) << 8)
348
349
350#define HFA384x_STATE_PREINIT 0
351#define HFA384x_STATE_INIT 1
352#define HFA384x_STATE_RUNNING 2
353
354
355
356struct hfa384x_bytestr {
357 __le16 len;
358 u8 data[];
359} __packed;
360
361struct hfa384x_bytestr32 {
362 __le16 len;
363 u8 data[32];
364} __packed;
365
366
367
368
369
370
371
372
373struct hfa384x_compident {
374 u16 id;
375 u16 variant;
376 u16 major;
377 u16 minor;
378} __packed;
379
380struct hfa384x_caplevel {
381 u16 role;
382 u16 id;
383 u16 variant;
384 u16 bottom;
385 u16 top;
386} __packed;
387
388
389#define HFA384x_CNFAUTHENTICATION_OPENSYSTEM 0x0001
390#define HFA384x_CNFAUTHENTICATION_SHAREDKEY 0x0002
391#define HFA384x_CNFAUTHENTICATION_LEAP 0x0004
392
393
394
395
396
397
398
399#define HFA384x_CREATEIBSS_JOINCREATEIBSS 0
400
401
402struct hfa384x_host_scan_request_data {
403 __le16 channel_list;
404 __le16 tx_rate;
405 struct hfa384x_bytestr32 ssid;
406} __packed;
407
408
409struct hfa384x_join_request_data {
410 u8 bssid[WLAN_BSSID_LEN];
411 u16 channel;
412} __packed;
413
414
415struct hfa384x_authenticate_station_data {
416 u8 address[ETH_ALEN];
417 __le16 status;
418 __le16 algorithm;
419} __packed;
420
421
422struct hfa384x_wpa_data {
423 __le16 datalen;
424 u8 data[];
425} __packed;
426
427
428
429
430
431
432
433
434struct hfa384x_downloadbuffer {
435 u16 page;
436 u16 offset;
437 u16 len;
438} __packed;
439
440
441
442
443
444
445#define HFA384x_PSTATUS_CONN_IBSS ((u16)3)
446
447
448struct hfa384x_commsquality {
449 __le16 cq_curr_bss;
450 __le16 asl_curr_bss;
451 __le16 anl_curr_fc;
452} __packed;
453
454
455struct hfa384x_dbmcommsquality {
456 u16 cq_dbm_curr_bss;
457 u16 asl_dbm_curr_bss;
458 u16 anl_dbm_curr_fc;
459} __packed;
460
461
462
463
464
465
466
467
468struct hfa384x_tx_frame {
469 u16 status;
470 u16 reserved1;
471 u16 reserved2;
472 u32 sw_support;
473 u8 tx_retrycount;
474 u8 tx_rate;
475 u16 tx_control;
476
477
478
479 u16 frame_control;
480 u16 duration_id;
481 u8 address1[6];
482 u8 address2[6];
483 u8 address3[6];
484 u16 sequence_control;
485 u8 address4[6];
486 __le16 data_len;
487
488
489
490 u8 dest_addr[6];
491 u8 src_addr[6];
492 u16 data_length;
493} __packed;
494
495
496
497
498
499#define HFA384x_TXSTATUS_ACKERR ((u16)BIT(5))
500#define HFA384x_TXSTATUS_FORMERR ((u16)BIT(3))
501#define HFA384x_TXSTATUS_DISCON ((u16)BIT(2))
502#define HFA384x_TXSTATUS_AGEDERR ((u16)BIT(1))
503#define HFA384x_TXSTATUS_RETRYERR ((u16)BIT(0))
504
505#define HFA384x_TX_MACPORT ((u16)GENMASK(10, 8))
506#define HFA384x_TX_STRUCTYPE ((u16)GENMASK(4, 3))
507#define HFA384x_TX_TXEX ((u16)BIT(2))
508#define HFA384x_TX_TXOK ((u16)BIT(1))
509
510
511
512
513
514#define HFA384x_TXSTATUS_ISERROR(v) \
515 (((u16)(v)) & \
516 (HFA384x_TXSTATUS_ACKERR | HFA384x_TXSTATUS_FORMERR | \
517 HFA384x_TXSTATUS_DISCON | HFA384x_TXSTATUS_AGEDERR | \
518 HFA384x_TXSTATUS_RETRYERR))
519
520#define HFA384x_TX_SET(v, m, s) ((((u16)(v)) << ((u16)(s))) & ((u16)(m)))
521
522#define HFA384x_TX_MACPORT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_MACPORT, 8)
523#define HFA384x_TX_STRUCTYPE_SET(v) HFA384x_TX_SET(v, \
524 HFA384x_TX_STRUCTYPE, 3)
525#define HFA384x_TX_TXEX_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXEX, 2)
526#define HFA384x_TX_TXOK_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXOK, 1)
527
528
529
530
531
532struct hfa384x_rx_frame {
533
534 u16 status;
535 u32 time;
536 u8 silence;
537 u8 signal;
538 u8 rate;
539 u8 rx_flow;
540 u16 reserved1;
541 u16 reserved2;
542
543
544 __le16 frame_control;
545 u16 duration_id;
546 u8 address1[6];
547 u8 address2[6];
548 u8 address3[6];
549 u16 sequence_control;
550 u8 address4[6];
551 __le16 data_len;
552
553
554 u8 dest_addr[6];
555 u8 src_addr[6];
556 u16 data_length;
557} __packed;
558
559
560
561
562
563
564#define HFA384x_RXSTATUS_MACPORT ((u16)GENMASK(10, 8))
565#define HFA384x_RXSTATUS_FCSERR ((u16)BIT(0))
566
567
568
569
570#define HFA384x_RXSTATUS_MACPORT_GET(value) ((u16)((((u16)(value)) \
571 & HFA384x_RXSTATUS_MACPORT) >> 8))
572#define HFA384x_RXSTATUS_ISFCSERR(value) ((u16)(((u16)(value)) \
573 & HFA384x_RXSTATUS_FCSERR))
574
575
576
577
578
579
580#define HFA384x_IT_HANDOVERADDR ((u16)0xF000UL)
581#define HFA384x_IT_COMMTALLIES ((u16)0xF100UL)
582#define HFA384x_IT_SCANRESULTS ((u16)0xF101UL)
583#define HFA384x_IT_CHINFORESULTS ((u16)0xF102UL)
584#define HFA384x_IT_HOSTSCANRESULTS ((u16)0xF103UL)
585#define HFA384x_IT_LINKSTATUS ((u16)0xF200UL)
586#define HFA384x_IT_ASSOCSTATUS ((u16)0xF201UL)
587#define HFA384x_IT_AUTHREQ ((u16)0xF202UL)
588#define HFA384x_IT_PSUSERCNT ((u16)0xF203UL)
589#define HFA384x_IT_KEYIDCHANGED ((u16)0xF204UL)
590#define HFA384x_IT_ASSOCREQ ((u16)0xF205UL)
591#define HFA384x_IT_MICFAILURE ((u16)0xF206UL)
592
593
594
595
596
597
598
599
600
601struct hfa384x_comm_tallies_16 {
602 __le16 txunicastframes;
603 __le16 txmulticastframes;
604 __le16 txfragments;
605 __le16 txunicastoctets;
606 __le16 txmulticastoctets;
607 __le16 txdeferredtrans;
608 __le16 txsingleretryframes;
609 __le16 txmultipleretryframes;
610 __le16 txretrylimitexceeded;
611 __le16 txdiscards;
612 __le16 rxunicastframes;
613 __le16 rxmulticastframes;
614 __le16 rxfragments;
615 __le16 rxunicastoctets;
616 __le16 rxmulticastoctets;
617 __le16 rxfcserrors;
618 __le16 rxdiscardsnobuffer;
619 __le16 txdiscardswrongsa;
620 __le16 rxdiscardswepundecr;
621 __le16 rxmsginmsgfrag;
622 __le16 rxmsginbadmsgfrag;
623} __packed;
624
625struct hfa384x_comm_tallies_32 {
626 __le32 txunicastframes;
627 __le32 txmulticastframes;
628 __le32 txfragments;
629 __le32 txunicastoctets;
630 __le32 txmulticastoctets;
631 __le32 txdeferredtrans;
632 __le32 txsingleretryframes;
633 __le32 txmultipleretryframes;
634 __le32 txretrylimitexceeded;
635 __le32 txdiscards;
636 __le32 rxunicastframes;
637 __le32 rxmulticastframes;
638 __le32 rxfragments;
639 __le32 rxunicastoctets;
640 __le32 rxmulticastoctets;
641 __le32 rxfcserrors;
642 __le32 rxdiscardsnobuffer;
643 __le32 txdiscardswrongsa;
644 __le32 rxdiscardswepundecr;
645 __le32 rxmsginmsgfrag;
646 __le32 rxmsginbadmsgfrag;
647} __packed;
648
649
650struct hfa384x_scan_result_sub {
651 u16 chid;
652 u16 anl;
653 u16 sl;
654 u8 bssid[WLAN_BSSID_LEN];
655 u16 bcnint;
656 u16 capinfo;
657 struct hfa384x_bytestr32 ssid;
658 u8 supprates[10];
659 u16 proberesp_rate;
660} __packed;
661
662struct hfa384x_scan_result {
663 u16 rsvd;
664 u16 scanreason;
665 struct hfa384x_scan_result_sub result[HFA384x_SCANRESULT_MAX];
666} __packed;
667
668
669struct hfa384x_ch_info_result_sub {
670 u16 chid;
671 u16 anl;
672 u16 pnl;
673 u16 active;
674} __packed;
675
676#define HFA384x_CHINFORESULT_BSSACTIVE BIT(0)
677#define HFA384x_CHINFORESULT_PCFACTIVE BIT(1)
678
679struct hfa384x_ch_info_result {
680 u16 scanchannels;
681 struct hfa384x_ch_info_result_sub result[HFA384x_CHINFORESULT_MAX];
682} __packed;
683
684
685struct hfa384x_hscan_result_sub {
686 __le16 chid;
687 __le16 anl;
688 __le16 sl;
689 u8 bssid[WLAN_BSSID_LEN];
690 __le16 bcnint;
691 __le16 capinfo;
692 struct hfa384x_bytestr32 ssid;
693 u8 supprates[10];
694 u16 proberesp_rate;
695 __le16 atim;
696} __packed;
697
698struct hfa384x_hscan_result {
699 u16 nresult;
700 u16 rsvd;
701 struct hfa384x_hscan_result_sub result[HFA384x_HSCANRESULT_MAX];
702} __packed;
703
704
705
706#define HFA384x_LINK_NOTCONNECTED ((u16)0)
707#define HFA384x_LINK_CONNECTED ((u16)1)
708#define HFA384x_LINK_DISCONNECTED ((u16)2)
709#define HFA384x_LINK_AP_CHANGE ((u16)3)
710#define HFA384x_LINK_AP_OUTOFRANGE ((u16)4)
711#define HFA384x_LINK_AP_INRANGE ((u16)5)
712#define HFA384x_LINK_ASSOCFAIL ((u16)6)
713
714struct hfa384x_link_status {
715 __le16 linkstatus;
716} __packed;
717
718
719
720#define HFA384x_ASSOCSTATUS_STAASSOC ((u16)1)
721#define HFA384x_ASSOCSTATUS_REASSOC ((u16)2)
722#define HFA384x_ASSOCSTATUS_AUTHFAIL ((u16)5)
723
724struct hfa384x_assoc_status {
725 u16 assocstatus;
726 u8 sta_addr[ETH_ALEN];
727
728 u8 old_ap_addr[ETH_ALEN];
729 u16 reason;
730 u16 reserved;
731} __packed;
732
733
734
735struct hfa384x_auth_request {
736 u8 sta_addr[ETH_ALEN];
737 __le16 algorithm;
738} __packed;
739
740
741
742struct hfa384x_ps_user_count {
743 __le16 usercnt;
744} __packed;
745
746struct hfa384x_key_id_changed {
747 u8 sta_addr[ETH_ALEN];
748 u16 keyid;
749} __packed;
750
751
752union hfa384x_infodata {
753 struct hfa384x_comm_tallies_16 commtallies16;
754 struct hfa384x_comm_tallies_32 commtallies32;
755 struct hfa384x_scan_result scanresult;
756 struct hfa384x_ch_info_result chinforesult;
757 struct hfa384x_hscan_result hscanresult;
758 struct hfa384x_link_status linkstatus;
759 struct hfa384x_assoc_status assocstatus;
760 struct hfa384x_auth_request authreq;
761 struct hfa384x_ps_user_count psusercnt;
762 struct hfa384x_key_id_changed keyidchanged;
763} __packed;
764
765struct hfa384x_inf_frame {
766 u16 framelen;
767 u16 infotype;
768 union hfa384x_infodata info;
769} __packed;
770
771
772
773
774
775
776
777#define HFA384x_USB_TXFRM 0
778#define HFA384x_USB_CMDREQ 1
779#define HFA384x_USB_WRIDREQ 2
780#define HFA384x_USB_RRIDREQ 3
781#define HFA384x_USB_WMEMREQ 4
782#define HFA384x_USB_RMEMREQ 5
783
784
785#define HFA384x_USB_ISTXFRM(a) (((a) & 0x9000) == 0x1000)
786#define HFA384x_USB_ISRXFRM(a) (!((a) & 0x9000))
787#define HFA384x_USB_INFOFRM 0x8000
788#define HFA384x_USB_CMDRESP 0x8001
789#define HFA384x_USB_WRIDRESP 0x8002
790#define HFA384x_USB_RRIDRESP 0x8003
791#define HFA384x_USB_WMEMRESP 0x8004
792#define HFA384x_USB_RMEMRESP 0x8005
793#define HFA384x_USB_BUFAVAIL 0x8006
794#define HFA384x_USB_ERROR 0x8007
795
796
797
798
799struct hfa384x_usb_txfrm {
800 struct hfa384x_tx_frame desc;
801 u8 data[WLAN_DATA_MAXLEN];
802} __packed;
803
804struct hfa384x_usb_cmdreq {
805 __le16 type;
806 __le16 cmd;
807 __le16 parm0;
808 __le16 parm1;
809 __le16 parm2;
810 u8 pad[54];
811} __packed;
812
813struct hfa384x_usb_wridreq {
814 __le16 type;
815 __le16 frmlen;
816 __le16 rid;
817 u8 data[HFA384x_RIDDATA_MAXLEN];
818} __packed;
819
820struct hfa384x_usb_rridreq {
821 __le16 type;
822 __le16 frmlen;
823 __le16 rid;
824 u8 pad[58];
825} __packed;
826
827struct hfa384x_usb_wmemreq {
828 __le16 type;
829 __le16 frmlen;
830 __le16 offset;
831 __le16 page;
832 u8 data[HFA384x_USB_RWMEM_MAXLEN];
833} __packed;
834
835struct hfa384x_usb_rmemreq {
836 __le16 type;
837 __le16 frmlen;
838 __le16 offset;
839 __le16 page;
840 u8 pad[56];
841} __packed;
842
843
844
845
846struct hfa384x_usb_rxfrm {
847 struct hfa384x_rx_frame desc;
848 u8 data[WLAN_DATA_MAXLEN];
849} __packed;
850
851struct hfa384x_usb_infofrm {
852 u16 type;
853 struct hfa384x_inf_frame info;
854} __packed;
855
856struct hfa384x_usb_statusresp {
857 u16 type;
858 __le16 status;
859 __le16 resp0;
860 __le16 resp1;
861 __le16 resp2;
862} __packed;
863
864struct hfa384x_usb_rridresp {
865 u16 type;
866 __le16 frmlen;
867 __le16 rid;
868 u8 data[HFA384x_RIDDATA_MAXLEN];
869} __packed;
870
871struct hfa384x_usb_rmemresp {
872 u16 type;
873 u16 frmlen;
874 u8 data[HFA384x_USB_RWMEM_MAXLEN];
875} __packed;
876
877struct hfa384x_usb_bufavail {
878 u16 type;
879 u16 frmlen;
880} __packed;
881
882struct hfa384x_usb_error {
883 u16 type;
884 u16 errortype;
885} __packed;
886
887
888
889
890union hfa384x_usbout {
891 __le16 type;
892 struct hfa384x_usb_txfrm txfrm;
893 struct hfa384x_usb_cmdreq cmdreq;
894 struct hfa384x_usb_wridreq wridreq;
895 struct hfa384x_usb_rridreq rridreq;
896 struct hfa384x_usb_wmemreq wmemreq;
897 struct hfa384x_usb_rmemreq rmemreq;
898} __packed;
899
900union hfa384x_usbin {
901 __le16 type;
902 struct hfa384x_usb_rxfrm rxfrm;
903 struct hfa384x_usb_txfrm txfrm;
904 struct hfa384x_usb_infofrm infofrm;
905 struct hfa384x_usb_statusresp cmdresp;
906 struct hfa384x_usb_statusresp wridresp;
907 struct hfa384x_usb_rridresp rridresp;
908 struct hfa384x_usb_statusresp wmemresp;
909 struct hfa384x_usb_rmemresp rmemresp;
910 struct hfa384x_usb_bufavail bufavail;
911 struct hfa384x_usb_error usberror;
912 u8 boguspad[3000];
913} __packed;
914
915
916
917
918
919
920struct hfa384x_pdr_pcb_partnum {
921 u8 num[8];
922} __packed;
923
924struct hfa384x_pdr_pcb_tracenum {
925 u8 num[8];
926} __packed;
927
928struct hfa384x_pdr_nic_serial {
929 u8 num[12];
930} __packed;
931
932struct hfa384x_pdr_mkk_measurements {
933 double carrier_freq;
934 double occupied_band;
935 double power_density;
936 double tx_spur_f1;
937 double tx_spur_f2;
938 double tx_spur_f3;
939 double tx_spur_f4;
940 double tx_spur_l1;
941 double tx_spur_l2;
942 double tx_spur_l3;
943 double tx_spur_l4;
944 double rx_spur_f1;
945 double rx_spur_f2;
946 double rx_spur_l1;
947 double rx_spur_l2;
948} __packed;
949
950struct hfa384x_pdr_nic_ramsize {
951 u8 size[12];
952} __packed;
953
954struct hfa384x_pdr_mfisuprange {
955 u16 id;
956 u16 variant;
957 u16 bottom;
958 u16 top;
959} __packed;
960
961struct hfa384x_pdr_cfisuprange {
962 u16 id;
963 u16 variant;
964 u16 bottom;
965 u16 top;
966} __packed;
967
968struct hfa384x_pdr_nicid {
969 u16 id;
970 u16 variant;
971 u16 major;
972 u16 minor;
973} __packed;
974
975struct hfa384x_pdr_refdac_measurements {
976 u16 value[0];
977} __packed;
978
979struct hfa384x_pdr_vgdac_measurements {
980 u16 value[0];
981} __packed;
982
983struct hfa384x_pdr_level_comp_measurements {
984 u16 value[0];
985} __packed;
986
987struct hfa384x_pdr_mac_address {
988 u8 addr[6];
989} __packed;
990
991struct hfa384x_pdr_mkk_callname {
992 u8 callname[8];
993} __packed;
994
995struct hfa384x_pdr_regdomain {
996 u16 numdomains;
997 u16 domain[5];
998} __packed;
999
1000struct hfa384x_pdr_allowed_channel {
1001 u16 ch_bitmap;
1002} __packed;
1003
1004struct hfa384x_pdr_default_channel {
1005 u16 channel;
1006} __packed;
1007
1008struct hfa384x_pdr_privacy_option {
1009 u16 available;
1010} __packed;
1011
1012struct hfa384x_pdr_temptype {
1013 u16 type;
1014} __packed;
1015
1016struct hfa384x_pdr_refdac_setup {
1017 u16 ch_value[14];
1018} __packed;
1019
1020struct hfa384x_pdr_vgdac_setup {
1021 u16 ch_value[14];
1022} __packed;
1023
1024struct hfa384x_pdr_level_comp_setup {
1025 u16 ch_value[14];
1026} __packed;
1027
1028struct hfa384x_pdr_trimdac_setup {
1029 u16 trimidac;
1030 u16 trimqdac;
1031} __packed;
1032
1033struct hfa384x_pdr_ifr_setting {
1034 u16 value[3];
1035} __packed;
1036
1037struct hfa384x_pdr_rfr_setting {
1038 u16 value[3];
1039} __packed;
1040
1041struct hfa384x_pdr_hfa3861_baseline {
1042 u16 value[50];
1043} __packed;
1044
1045struct hfa384x_pdr_hfa3861_shadow {
1046 u32 value[32];
1047} __packed;
1048
1049struct hfa384x_pdr_hfa3861_ifrf {
1050 u32 value[20];
1051} __packed;
1052
1053struct hfa384x_pdr_hfa3861_chcalsp {
1054 u16 value[14];
1055} __packed;
1056
1057struct hfa384x_pdr_hfa3861_chcali {
1058 u16 value[17];
1059} __packed;
1060
1061struct hfa384x_pdr_hfa3861_nic_config {
1062 u16 config_bitmap;
1063} __packed;
1064
1065struct hfa384x_pdr_hfo_delay {
1066 u8 hfo_delay;
1067} __packed;
1068
1069struct hfa384x_pdr_hfa3861_manf_testsp {
1070 u16 value[30];
1071} __packed;
1072
1073struct hfa384x_pdr_hfa3861_manf_testi {
1074 u16 value[30];
1075} __packed;
1076
1077struct hfa384x_pdr_end_of_pda {
1078 u16 crc;
1079} __packed;
1080
1081struct hfa384x_pdrec {
1082 __le16 len;
1083 __le16 code;
1084 union pdr {
1085 struct hfa384x_pdr_pcb_partnum pcb_partnum;
1086 struct hfa384x_pdr_pcb_tracenum pcb_tracenum;
1087 struct hfa384x_pdr_nic_serial nic_serial;
1088 struct hfa384x_pdr_mkk_measurements mkk_measurements;
1089 struct hfa384x_pdr_nic_ramsize nic_ramsize;
1090 struct hfa384x_pdr_mfisuprange mfisuprange;
1091 struct hfa384x_pdr_cfisuprange cfisuprange;
1092 struct hfa384x_pdr_nicid nicid;
1093 struct hfa384x_pdr_refdac_measurements refdac_measurements;
1094 struct hfa384x_pdr_vgdac_measurements vgdac_measurements;
1095 struct hfa384x_pdr_level_comp_measurements level_compc_measurements;
1096 struct hfa384x_pdr_mac_address mac_address;
1097 struct hfa384x_pdr_mkk_callname mkk_callname;
1098 struct hfa384x_pdr_regdomain regdomain;
1099 struct hfa384x_pdr_allowed_channel allowed_channel;
1100 struct hfa384x_pdr_default_channel default_channel;
1101 struct hfa384x_pdr_privacy_option privacy_option;
1102 struct hfa384x_pdr_temptype temptype;
1103 struct hfa384x_pdr_refdac_setup refdac_setup;
1104 struct hfa384x_pdr_vgdac_setup vgdac_setup;
1105 struct hfa384x_pdr_level_comp_setup level_comp_setup;
1106 struct hfa384x_pdr_trimdac_setup trimdac_setup;
1107 struct hfa384x_pdr_ifr_setting ifr_setting;
1108 struct hfa384x_pdr_rfr_setting rfr_setting;
1109 struct hfa384x_pdr_hfa3861_baseline hfa3861_baseline;
1110 struct hfa384x_pdr_hfa3861_shadow hfa3861_shadow;
1111 struct hfa384x_pdr_hfa3861_ifrf hfa3861_ifrf;
1112 struct hfa384x_pdr_hfa3861_chcalsp hfa3861_chcalsp;
1113 struct hfa384x_pdr_hfa3861_chcali hfa3861_chcali;
1114 struct hfa384x_pdr_hfa3861_nic_config nic_config;
1115 struct hfa384x_pdr_hfo_delay hfo_delay;
1116 struct hfa384x_pdr_hfa3861_manf_testsp hfa3861_manf_testsp;
1117 struct hfa384x_pdr_hfa3861_manf_testi hfa3861_manf_testi;
1118 struct hfa384x_pdr_end_of_pda end_of_pda;
1119
1120 } data;
1121} __packed;
1122
1123#ifdef __KERNEL__
1124
1125
1126
1127
1128
1129struct hfa384x_cmdresult {
1130 u16 status;
1131 u16 resp0;
1132 u16 resp1;
1133 u16 resp2;
1134};
1135
1136
1137
1138
1139
1140
1141
1142
1143struct hfa384x_rridresult {
1144 u16 rid;
1145 const void *riddata;
1146 unsigned int riddata_len;
1147};
1148
1149enum ctlx_state {
1150 CTLX_START = 0,
1151
1152 CTLX_COMPLETE,
1153 CTLX_REQ_FAILED,
1154
1155 CTLX_PENDING,
1156 CTLX_REQ_SUBMITTED,
1157 CTLX_REQ_COMPLETE,
1158 CTLX_RESP_COMPLETE
1159};
1160
1161struct hfa384x_usbctlx;
1162struct hfa384x;
1163
1164typedef void (*ctlx_cmdcb_t) (struct hfa384x *, const struct hfa384x_usbctlx *);
1165
1166typedef void (*ctlx_usercb_t) (struct hfa384x *hw,
1167 void *ctlxresult, void *usercb_data);
1168
1169struct hfa384x_usbctlx {
1170 struct list_head list;
1171
1172 size_t outbufsize;
1173 union hfa384x_usbout outbuf;
1174 union hfa384x_usbin inbuf;
1175
1176 enum ctlx_state state;
1177
1178 struct completion done;
1179 int reapable;
1180
1181 ctlx_cmdcb_t cmdcb;
1182 ctlx_usercb_t usercb;
1183 void *usercb_data;
1184};
1185
1186struct hfa384x_usbctlxq {
1187 spinlock_t lock;
1188 struct list_head pending;
1189 struct list_head active;
1190 struct list_head completing;
1191 struct list_head reapable;
1192};
1193
1194struct hfa384x_metacmd {
1195 u16 cmd;
1196
1197 u16 parm0;
1198 u16 parm1;
1199 u16 parm2;
1200
1201 struct hfa384x_cmdresult result;
1202};
1203
1204#define MAX_GRP_ADDR 32
1205#define WLAN_COMMENT_MAX 80
1206
1207#define WLAN_AUTH_MAX 60
1208#define WLAN_ACCESS_MAX 60
1209#define WLAN_ACCESS_NONE 0
1210#define WLAN_ACCESS_ALL 1
1211#define WLAN_ACCESS_ALLOW 2
1212#define WLAN_ACCESS_DENY 3
1213
1214
1215struct prism2sta_authlist {
1216 unsigned int cnt;
1217 u8 addr[WLAN_AUTH_MAX][ETH_ALEN];
1218 u8 assoc[WLAN_AUTH_MAX];
1219};
1220
1221struct prism2sta_accesslist {
1222 unsigned int modify;
1223 unsigned int cnt;
1224 u8 addr[WLAN_ACCESS_MAX][ETH_ALEN];
1225 unsigned int cnt1;
1226 u8 addr1[WLAN_ACCESS_MAX][ETH_ALEN];
1227};
1228
1229struct hfa384x {
1230
1231 struct usb_device *usb;
1232 struct urb rx_urb;
1233 struct sk_buff *rx_urb_skb;
1234 struct urb tx_urb;
1235 struct urb ctlx_urb;
1236 union hfa384x_usbout txbuff;
1237 struct hfa384x_usbctlxq ctlxq;
1238 struct timer_list reqtimer;
1239 struct timer_list resptimer;
1240
1241 struct timer_list throttle;
1242
1243 struct tasklet_struct reaper_bh;
1244 struct tasklet_struct completion_bh;
1245
1246 struct work_struct usb_work;
1247
1248 unsigned long usb_flags;
1249#define THROTTLE_RX 0
1250#define THROTTLE_TX 1
1251#define WORK_RX_HALT 2
1252#define WORK_TX_HALT 3
1253#define WORK_RX_RESUME 4
1254#define WORK_TX_RESUME 5
1255
1256 unsigned short req_timer_done:1;
1257 unsigned short resp_timer_done:1;
1258
1259 int endp_in;
1260 int endp_out;
1261
1262 int sniff_fcs;
1263 int sniff_channel;
1264 int sniff_truncate;
1265 int sniffhdr;
1266
1267 wait_queue_head_t cmdq;
1268
1269
1270 u32 state;
1271 u32 isap;
1272 u8 port_enabled[HFA384x_NUMPORTS_MAX];
1273
1274
1275 unsigned int dlstate;
1276 struct hfa384x_downloadbuffer bufinfo;
1277 u16 dltimeout;
1278
1279 int scanflag;
1280 int join_ap;
1281 int join_retries;
1282 struct hfa384x_join_request_data joinreq;
1283
1284 struct wlandevice *wlandev;
1285
1286 struct work_struct link_bh;
1287
1288 struct work_struct commsqual_bh;
1289 struct hfa384x_commsquality qual;
1290 struct timer_list commsqual_timer;
1291
1292 u16 link_status;
1293 u16 link_status_new;
1294 struct sk_buff_head authq;
1295
1296 u32 txrate;
1297
1298
1299
1300
1301 unsigned int presniff_port_type;
1302 u16 presniff_wepflags;
1303 u32 dot11_desired_bss_type;
1304
1305 int dbmadjust;
1306
1307
1308
1309
1310 u8 dot11_grp_addr[MAX_GRP_ADDR][ETH_ALEN];
1311 unsigned int dot11_grpcnt;
1312
1313
1314 struct hfa384x_compident ident_nic;
1315 struct hfa384x_compident ident_pri_fw;
1316 struct hfa384x_compident ident_sta_fw;
1317 struct hfa384x_compident ident_ap_fw;
1318 u16 mm_mods;
1319
1320
1321 struct hfa384x_caplevel cap_sup_mfi;
1322 struct hfa384x_caplevel cap_sup_cfi;
1323 struct hfa384x_caplevel cap_sup_pri;
1324 struct hfa384x_caplevel cap_sup_sta;
1325 struct hfa384x_caplevel cap_sup_ap;
1326
1327
1328 struct hfa384x_caplevel cap_act_pri_cfi;
1329
1330
1331
1332
1333 struct hfa384x_caplevel cap_act_sta_cfi;
1334
1335
1336
1337
1338 struct hfa384x_caplevel cap_act_sta_mfi;
1339
1340
1341
1342 struct hfa384x_caplevel cap_act_ap_cfi;
1343
1344
1345
1346
1347 struct hfa384x_caplevel cap_act_ap_mfi;
1348
1349 u32 psusercount;
1350 struct hfa384x_comm_tallies_32 tallies;
1351 u8 comment[WLAN_COMMENT_MAX + 1];
1352
1353
1354 struct {
1355 atomic_t done;
1356 u8 count;
1357 struct hfa384x_ch_info_result results;
1358 } channel_info;
1359
1360 struct hfa384x_inf_frame *scanresults;
1361
1362 struct prism2sta_authlist authlist;
1363
1364
1365 unsigned int accessmode;
1366 struct prism2sta_accesslist allow;
1367 struct prism2sta_accesslist deny;
1368
1369};
1370
1371void hfa384x_create(struct hfa384x *hw, struct usb_device *usb);
1372void hfa384x_destroy(struct hfa384x *hw);
1373
1374int hfa384x_corereset(struct hfa384x *hw, int holdtime, int settletime,
1375 int genesis);
1376int hfa384x_drvr_disable(struct hfa384x *hw, u16 macport);
1377int hfa384x_drvr_enable(struct hfa384x *hw, u16 macport);
1378int hfa384x_drvr_flashdl_enable(struct hfa384x *hw);
1379int hfa384x_drvr_flashdl_disable(struct hfa384x *hw);
1380int hfa384x_drvr_flashdl_write(struct hfa384x *hw, u32 daddr, void *buf,
1381 u32 len);
1382int hfa384x_drvr_getconfig(struct hfa384x *hw, u16 rid, void *buf, u16 len);
1383int hfa384x_drvr_ramdl_enable(struct hfa384x *hw, u32 exeaddr);
1384int hfa384x_drvr_ramdl_disable(struct hfa384x *hw);
1385int hfa384x_drvr_ramdl_write(struct hfa384x *hw, u32 daddr, void *buf, u32 len);
1386int hfa384x_drvr_readpda(struct hfa384x *hw, void *buf, unsigned int len);
1387int hfa384x_drvr_setconfig(struct hfa384x *hw, u16 rid, void *buf, u16 len);
1388
1389static inline int
1390hfa384x_drvr_getconfig16(struct hfa384x *hw, u16 rid, void *val)
1391{
1392 int result = 0;
1393
1394 result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u16));
1395 if (result == 0)
1396 le16_to_cpus(val);
1397 return result;
1398}
1399
1400static inline int hfa384x_drvr_setconfig16(struct hfa384x *hw, u16 rid, u16 val)
1401{
1402 __le16 value = cpu_to_le16(val);
1403
1404 return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value));
1405}
1406
1407int
1408hfa384x_drvr_setconfig_async(struct hfa384x *hw,
1409 u16 rid,
1410 void *buf,
1411 u16 len, ctlx_usercb_t usercb, void *usercb_data);
1412
1413static inline int
1414hfa384x_drvr_setconfig16_async(struct hfa384x *hw, u16 rid, u16 val)
1415{
1416 __le16 value = cpu_to_le16(val);
1417
1418 return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value),
1419 NULL, NULL);
1420}
1421
1422int hfa384x_drvr_start(struct hfa384x *hw);
1423int hfa384x_drvr_stop(struct hfa384x *hw);
1424int
1425hfa384x_drvr_txframe(struct hfa384x *hw, struct sk_buff *skb,
1426 union p80211_hdr *p80211_hdr,
1427 struct p80211_metawep *p80211_wep);
1428void hfa384x_tx_timeout(struct wlandevice *wlandev);
1429
1430int hfa384x_cmd_initialize(struct hfa384x *hw);
1431int hfa384x_cmd_enable(struct hfa384x *hw, u16 macport);
1432int hfa384x_cmd_disable(struct hfa384x *hw, u16 macport);
1433int hfa384x_cmd_allocate(struct hfa384x *hw, u16 len);
1434int hfa384x_cmd_monitor(struct hfa384x *hw, u16 enable);
1435int
1436hfa384x_cmd_download(struct hfa384x *hw,
1437 u16 mode, u16 lowaddr, u16 highaddr, u16 codelen);
1438
1439#endif
1440
1441#endif
1442