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7#ifndef __HAL_INTF_H__
8#define __HAL_INTF_H__
9
10
11enum {
12 RTW_PCIE = BIT0,
13 RTW_USB = BIT1,
14 RTW_SDIO = BIT2,
15 RTW_GSPI = BIT3,
16};
17
18enum {
19 HW_VAR_MEDIA_STATUS,
20 HW_VAR_MEDIA_STATUS1,
21 HW_VAR_SET_OPMODE,
22 HW_VAR_MAC_ADDR,
23 HW_VAR_BSSID,
24 HW_VAR_INIT_RTS_RATE,
25 HW_VAR_BASIC_RATE,
26 HW_VAR_TXPAUSE,
27 HW_VAR_BCN_FUNC,
28 HW_VAR_CORRECT_TSF,
29 HW_VAR_CHECK_BSSID,
30 HW_VAR_MLME_DISCONNECT,
31 HW_VAR_MLME_SITESURVEY,
32 HW_VAR_MLME_JOIN,
33 HW_VAR_ON_RCR_AM,
34 HW_VAR_OFF_RCR_AM,
35 HW_VAR_BEACON_INTERVAL,
36 HW_VAR_SLOT_TIME,
37 HW_VAR_RESP_SIFS,
38 HW_VAR_ACK_PREAMBLE,
39 HW_VAR_SEC_CFG,
40 HW_VAR_SEC_DK_CFG,
41 HW_VAR_BCN_VALID,
42 HW_VAR_RF_TYPE,
43 HW_VAR_DM_FLAG,
44 HW_VAR_DM_FUNC_OP,
45 HW_VAR_DM_FUNC_SET,
46 HW_VAR_DM_FUNC_CLR,
47 HW_VAR_CAM_EMPTY_ENTRY,
48 HW_VAR_CAM_INVALID_ALL,
49 HW_VAR_CAM_WRITE,
50 HW_VAR_CAM_READ,
51 HW_VAR_AC_PARAM_VO,
52 HW_VAR_AC_PARAM_VI,
53 HW_VAR_AC_PARAM_BE,
54 HW_VAR_AC_PARAM_BK,
55 HW_VAR_ACM_CTRL,
56 HW_VAR_AMPDU_MIN_SPACE,
57 HW_VAR_AMPDU_FACTOR,
58 HW_VAR_RXDMA_AGG_PG_TH,
59 HW_VAR_SET_RPWM,
60 HW_VAR_CPWM,
61 HW_VAR_H2C_FW_PWRMODE,
62 HW_VAR_H2C_PS_TUNE_PARAM,
63 HW_VAR_H2C_FW_JOINBSSRPT,
64 HW_VAR_FWLPS_RF_ON,
65 HW_VAR_H2C_FW_P2P_PS_OFFLOAD,
66 HW_VAR_TDLS_WRCR,
67 HW_VAR_TDLS_INIT_CH_SEN,
68 HW_VAR_TDLS_RS_RCR,
69 HW_VAR_TDLS_DONE_CH_SEN,
70 HW_VAR_INITIAL_GAIN,
71 HW_VAR_TRIGGER_GPIO_0,
72 HW_VAR_BT_SET_COEXIST,
73 HW_VAR_BT_ISSUE_DELBA,
74 HW_VAR_CURRENT_ANTENNA,
75 HW_VAR_ANTENNA_DIVERSITY_LINK,
76 HW_VAR_ANTENNA_DIVERSITY_SELECT,
77 HW_VAR_SWITCH_EPHY_WoWLAN,
78 HW_VAR_EFUSE_USAGE,
79 HW_VAR_EFUSE_BYTES,
80 HW_VAR_EFUSE_BT_USAGE,
81 HW_VAR_EFUSE_BT_BYTES,
82 HW_VAR_FIFO_CLEARN_UP,
83 HW_VAR_CHECK_TXBUF,
84 HW_VAR_PCIE_STOP_TX_DMA,
85 HW_VAR_APFM_ON_MAC,
86
87
88 HW_VAR_SYS_CLKR,
89 HW_VAR_NAV_UPPER,
90 HW_VAR_C2H_HANDLE,
91 HW_VAR_RPT_TIMER_SETTING,
92 HW_VAR_TX_RPT_MAX_MACID,
93 HW_VAR_H2C_MEDIA_STATUS_RPT,
94 HW_VAR_CHK_HI_QUEUE_EMPTY,
95 HW_VAR_DL_BCN_SEL,
96 HW_VAR_AMPDU_MAX_TIME,
97 HW_VAR_WIRELESS_MODE,
98 HW_VAR_USB_MODE,
99 HW_VAR_PORT_SWITCH,
100 HW_VAR_DO_IQK,
101 HW_VAR_DM_IN_LPS,
102 HW_VAR_SET_REQ_FW_PS,
103 HW_VAR_FW_PS_STATE,
104 HW_VAR_SOUNDING_ENTER,
105 HW_VAR_SOUNDING_LEAVE,
106 HW_VAR_SOUNDING_RATE,
107 HW_VAR_SOUNDING_STATUS,
108 HW_VAR_SOUNDING_FW_NDPA,
109 HW_VAR_SOUNDING_CLK,
110 HW_VAR_DL_RSVD_PAGE,
111 HW_VAR_MACID_SLEEP,
112 HW_VAR_MACID_WAKEUP,
113};
114
115enum hal_def_variable {
116 HAL_DEF_UNDERCORATEDSMOOTHEDPWDB,
117 HAL_DEF_IS_SUPPORT_ANT_DIV,
118 HAL_DEF_CURRENT_ANTENNA,
119 HAL_DEF_DRVINFO_SZ,
120 HAL_DEF_MAX_RECVBUF_SZ,
121 HAL_DEF_RX_PACKET_OFFSET,
122 HAL_DEF_DBG_DUMP_RXPKT,
123 HAL_DEF_DBG_DM_FUNC,
124 HAL_DEF_RA_DECISION_RATE,
125 HAL_DEF_RA_SGI,
126 HAL_DEF_PT_PWR_STATUS,
127 HAL_DEF_TX_LDPC,
128 HAL_DEF_RX_LDPC,
129 HAL_DEF_TX_STBC,
130 HAL_DEF_RX_STBC,
131 HAL_DEF_EXPLICIT_BEAMFORMER,
132 HAL_DEF_EXPLICIT_BEAMFORMEE,
133 HW_VAR_MAX_RX_AMPDU_FACTOR,
134 HW_DEF_RA_INFO_DUMP,
135 HAL_DEF_DBG_DUMP_TXPKT,
136 HW_DEF_FA_CNT_DUMP,
137 HW_DEF_ODM_DBG_FLAG,
138 HW_DEF_ODM_DBG_LEVEL,
139 HAL_DEF_TX_PAGE_SIZE,
140 HAL_DEF_TX_PAGE_BOUNDARY,
141 HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN,
142 HAL_DEF_ANT_DETECT,
143 HAL_DEF_PCI_SUUPORT_L1_BACKDOOR,
144 HAL_DEF_PCI_AMD_L1_SUPPORT,
145 HAL_DEF_PCI_ASPM_OSC,
146 HAL_DEF_MACID_SLEEP,
147 HAL_DEF_DBG_RX_INFO_DUMP,
148};
149
150enum hal_odm_variable {
151 HAL_ODM_STA_INFO,
152 HAL_ODM_P2P_STATE,
153 HAL_ODM_WIFI_DISPLAY_STATE,
154 HAL_ODM_NOISE_MONITOR,
155};
156
157enum hal_intf_ps_func {
158 HAL_USB_SELECT_SUSPEND,
159 HAL_MAX_ID,
160};
161
162typedef s32 (*c2h_id_filter)(u8 *c2h_evt);
163
164struct hal_ops {
165 u32 (*hal_power_on)(struct adapter *padapter);
166 void (*hal_power_off)(struct adapter *padapter);
167 u32 (*hal_init)(struct adapter *padapter);
168 u32 (*hal_deinit)(struct adapter *padapter);
169
170 void (*free_hal_data)(struct adapter *padapter);
171
172 u32 (*inirp_init)(struct adapter *padapter);
173 u32 (*inirp_deinit)(struct adapter *padapter);
174 void (*irp_reset)(struct adapter *padapter);
175
176 s32 (*init_xmit_priv)(struct adapter *padapter);
177 void (*free_xmit_priv)(struct adapter *padapter);
178
179 s32 (*init_recv_priv)(struct adapter *padapter);
180 void (*free_recv_priv)(struct adapter *padapter);
181
182 void (*dm_init)(struct adapter *padapter);
183 void (*dm_deinit)(struct adapter *padapter);
184 void (*read_chip_version)(struct adapter *padapter);
185
186 void (*init_default_value)(struct adapter *padapter);
187
188 void (*intf_chip_configure)(struct adapter *padapter);
189
190 void (*read_adapter_info)(struct adapter *padapter);
191
192 void (*enable_interrupt)(struct adapter *padapter);
193 void (*disable_interrupt)(struct adapter *padapter);
194 u8 (*check_ips_status)(struct adapter *padapter);
195 s32 (*interrupt_handler)(struct adapter *padapter);
196 void (*clear_interrupt)(struct adapter *padapter);
197 void (*set_bwmode_handler)(struct adapter *padapter, enum channel_width Bandwidth, u8 Offset);
198 void (*set_channel_handler)(struct adapter *padapter, u8 channel);
199 void (*set_chnl_bw_handler)(struct adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80);
200
201 void (*set_tx_power_level_handler)(struct adapter *padapter, u8 channel);
202 void (*get_tx_power_level_handler)(struct adapter *padapter, s32 *powerlevel);
203
204 void (*hal_dm_watchdog)(struct adapter *padapter);
205 void (*hal_dm_watchdog_in_lps)(struct adapter *padapter);
206
207
208 void (*SetHwRegHandler)(struct adapter *padapter, u8 variable, u8 *val);
209 void (*GetHwRegHandler)(struct adapter *padapter, u8 variable, u8 *val);
210
211 void (*SetHwRegHandlerWithBuf)(struct adapter *padapter, u8 variable, u8 *pbuf, int len);
212
213 u8 (*GetHalDefVarHandler)(struct adapter *padapter, enum hal_def_variable eVariable, void *pValue);
214 u8 (*SetHalDefVarHandler)(struct adapter *padapter, enum hal_def_variable eVariable, void *pValue);
215
216 void (*GetHalODMVarHandler)(struct adapter *padapter, enum hal_odm_variable eVariable, void *pValue1, void *pValue2);
217 void (*SetHalODMVarHandler)(struct adapter *padapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet);
218
219 void (*UpdateRAMaskHandler)(struct adapter *padapter, u32 mac_id, u8 rssi_level);
220 void (*SetBeaconRelatedRegistersHandler)(struct adapter *padapter);
221
222 void (*Add_RateATid)(struct adapter *padapter, u32 bitmap, u8 *arg, u8 rssi_level);
223
224 void (*run_thread)(struct adapter *padapter);
225 void (*cancel_thread)(struct adapter *padapter);
226
227 u8 (*interface_ps_func)(struct adapter *padapter, enum hal_intf_ps_func efunc_id, u8 *val);
228
229 s32 (*hal_xmit)(struct adapter *padapter, struct xmit_frame *pxmitframe);
230
231
232
233 s32 (*mgnt_xmit)(struct adapter *padapter, struct xmit_frame *pmgntframe);
234 s32 (*hal_xmitframe_enqueue)(struct adapter *padapter, struct xmit_frame *pxmitframe);
235
236 u32 (*read_bbreg)(struct adapter *padapter, u32 RegAddr, u32 BitMask);
237 void (*write_bbreg)(struct adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data);
238 u32 (*read_rfreg)(struct adapter *padapter, u8 eRFPath, u32 RegAddr, u32 BitMask);
239 void (*write_rfreg)(struct adapter *padapter, u8 eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
240
241 void (*EfusePowerSwitch)(struct adapter *padapter, u8 bWrite, u8 PwrState);
242 void (*BTEfusePowerSwitch)(struct adapter *padapter, u8 bWrite, u8 PwrState);
243 void (*ReadEFuse)(struct adapter *padapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest);
244 void (*EFUSEGetEfuseDefinition)(struct adapter *padapter, u8 efuseType, u8 type, void *pOut, bool bPseudoTest);
245 u16 (*EfuseGetCurrentSize)(struct adapter *padapter, u8 efuseType, bool bPseudoTest);
246 int (*Efuse_PgPacketRead)(struct adapter *padapter, u8 offset, u8 *data, bool bPseudoTest);
247 int (*Efuse_PgPacketWrite)(struct adapter *padapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest);
248 u8 (*Efuse_WordEnableDataWrite)(struct adapter *padapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest);
249 bool (*Efuse_PgPacketWrite_BT)(struct adapter *padapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest);
250
251 s32 (*xmit_thread_handler)(struct adapter *padapter);
252 void (*hal_notch_filter)(struct adapter *adapter, bool enable);
253 void (*hal_reset_security_engine)(struct adapter *adapter);
254 s32 (*c2h_handler)(struct adapter *padapter, u8 *c2h_evt);
255 c2h_id_filter c2h_id_filter_ccx;
256
257 s32 (*fill_h2c_cmd)(struct adapter *, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
258};
259
260#define RF_CHANGE_BY_INIT 0
261#define RF_CHANGE_BY_IPS BIT28
262#define RF_CHANGE_BY_PS BIT29
263#define RF_CHANGE_BY_HW BIT30
264#define RF_CHANGE_BY_SW BIT31
265
266#define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv)
267#define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse)
268
269#define Rx_Pairwisekey 0x01
270#define Rx_GTK 0x02
271#define Rx_DisAssoc 0x04
272#define Rx_DeAuth 0x08
273#define Rx_ARPReq 0x09
274#define FWDecisionDisconnect 0x10
275#define Rx_MagicPkt 0x21
276#define Rx_UnicastPkt 0x22
277#define Rx_PatternPkt 0x23
278#define RX_PNOWakeUp 0x55
279#define AP_WakeUp 0x66
280
281void rtw_hal_def_value_init(struct adapter *padapter);
282
283void rtw_hal_free_data(struct adapter *padapter);
284
285void rtw_hal_dm_init(struct adapter *padapter);
286void rtw_hal_dm_deinit(struct adapter *padapter);
287
288uint rtw_hal_init(struct adapter *padapter);
289uint rtw_hal_deinit(struct adapter *padapter);
290void rtw_hal_stop(struct adapter *padapter);
291void rtw_hal_set_hwreg(struct adapter *padapter, u8 variable, u8 *val);
292void rtw_hal_get_hwreg(struct adapter *padapter, u8 variable, u8 *val);
293
294void rtw_hal_set_hwreg_with_buf(struct adapter *padapter, u8 variable, u8 *pbuf, int len);
295
296void rtw_hal_chip_configure(struct adapter *padapter);
297void rtw_hal_read_chip_info(struct adapter *padapter);
298void rtw_hal_read_chip_version(struct adapter *padapter);
299
300u8 rtw_hal_set_def_var(struct adapter *padapter, enum hal_def_variable eVariable, void *pValue);
301u8 rtw_hal_get_def_var(struct adapter *padapter, enum hal_def_variable eVariable, void *pValue);
302
303void rtw_hal_set_odm_var(struct adapter *padapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet);
304void rtw_hal_get_odm_var(struct adapter *padapter, enum hal_odm_variable eVariable, void *pValue1, void *pValue2);
305
306void rtw_hal_enable_interrupt(struct adapter *padapter);
307void rtw_hal_disable_interrupt(struct adapter *padapter);
308
309u8 rtw_hal_check_ips_status(struct adapter *padapter);
310
311s32 rtw_hal_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe);
312s32 rtw_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe);
313s32 rtw_hal_mgnt_xmit(struct adapter *padapter, struct xmit_frame *pmgntframe);
314
315s32 rtw_hal_init_xmit_priv(struct adapter *padapter);
316void rtw_hal_free_xmit_priv(struct adapter *padapter);
317
318s32 rtw_hal_init_recv_priv(struct adapter *padapter);
319void rtw_hal_free_recv_priv(struct adapter *padapter);
320
321void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level);
322void rtw_hal_add_ra_tid(struct adapter *padapter, u32 bitmap, u8 *arg, u8 rssi_level);
323
324void rtw_hal_start_thread(struct adapter *padapter);
325void rtw_hal_stop_thread(struct adapter *padapter);
326
327void beacon_timing_control(struct adapter *padapter);
328
329u32 rtw_hal_read_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask);
330void rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data);
331u32 rtw_hal_read_rfreg(struct adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask);
332void rtw_hal_write_rfreg(struct adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
333
334#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtw_hal_read_bbreg((Adapter), (RegAddr), (BitMask))
335#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtw_hal_write_bbreg((Adapter), (RegAddr), (BitMask), (Data))
336#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtw_hal_read_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask))
337#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtw_hal_write_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data))
338
339#define PHY_SetMacReg PHY_SetBBReg
340#define PHY_QueryMacReg PHY_QueryBBReg
341
342void rtw_hal_set_chan(struct adapter *padapter, u8 channel);
343void rtw_hal_set_chnl_bw(struct adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80);
344void rtw_hal_dm_watchdog(struct adapter *padapter);
345void rtw_hal_dm_watchdog_in_lps(struct adapter *padapter);
346
347s32 rtw_hal_xmit_thread_handler(struct adapter *padapter);
348
349void rtw_hal_notch_filter(struct adapter *adapter, bool enable);
350void rtw_hal_reset_security_engine(struct adapter *adapter);
351
352bool rtw_hal_c2h_valid(struct adapter *adapter, u8 *buf);
353s32 rtw_hal_c2h_handler(struct adapter *adapter, u8 *c2h_evt);
354c2h_id_filter rtw_hal_c2h_id_filter_ccx(struct adapter *adapter);
355
356s32 rtw_hal_is_disable_sw_channel_plan(struct adapter *padapter);
357
358s32 rtw_hal_macid_sleep(struct adapter *padapter, u32 macid);
359s32 rtw_hal_macid_wakeup(struct adapter *padapter, u32 macid);
360
361s32 rtw_hal_fill_h2c_cmd(struct adapter *, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
362
363#endif
364
