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14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/capability.h>
19#include <linux/slab.h>
20#include <linux/types.h>
21#include <linux/fcntl.h>
22#include <linux/in.h>
23#include <linux/string.h>
24#include <linux/errno.h>
25#include <linux/init.h>
26#include <linux/ioport.h>
27#include <linux/netdevice.h>
28#include <linux/hdlc.h>
29#include <linux/pci.h>
30#include <linux/delay.h>
31#include <asm/io.h>
32
33#include "hd64572.h"
34
35#undef DEBUG_PKT
36#define DEBUG_RINGS
37
38#define PCI200SYN_PLX_SIZE 0x80
39#define PCI200SYN_SCA_SIZE 0x400
40#define MAX_TX_BUFFERS 10
41
42static int pci_clock_freq = 33000000;
43#define CLOCK_BASE pci_clock_freq
44
45
46
47
48typedef struct {
49 u32 loc_addr_range[4];
50 u32 loc_rom_range;
51 u32 loc_addr_base[4];
52 u32 loc_rom_base;
53 u32 loc_bus_descr[4];
54 u32 rom_bus_descr;
55 u32 cs_base[4];
56 u32 intr_ctrl_stat;
57 u32 init_ctrl;
58} plx9052;
59
60typedef struct port_s {
61 struct napi_struct napi;
62 struct net_device *netdev;
63 struct card_s *card;
64 spinlock_t lock;
65 sync_serial_settings settings;
66 int rxpart;
67 unsigned short encoding;
68 unsigned short parity;
69 u16 rxin;
70 u16 txin;
71 u16 txlast;
72 u8 rxs, txs, tmc;
73 u8 chan;
74} port_t;
75
76typedef struct card_s {
77 u8 __iomem *rambase;
78 u8 __iomem *scabase;
79 plx9052 __iomem *plxbase;
80 u16 rx_ring_buffers;
81 u16 tx_ring_buffers;
82 u16 buff_offset;
83 u8 irq;
84
85 port_t ports[2];
86} card_t;
87
88#define get_port(card, port) (&(card)->ports[port])
89#define sca_flush(card) (sca_in(IER0, card))
90
91static inline void new_memcpy_toio(char __iomem *dest, char *src, int length)
92{
93 int len;
94
95 do {
96 len = length > 256 ? 256 : length;
97 memcpy_toio(dest, src, len);
98 dest += len;
99 src += len;
100 length -= len;
101 readb(dest);
102 } while (len);
103}
104
105#undef memcpy_toio
106#define memcpy_toio new_memcpy_toio
107
108#include "hd64572.c"
109
110static void pci200_set_iface(port_t *port)
111{
112 card_t *card = port->card;
113 u16 msci = get_msci(port);
114 u8 rxs = port->rxs & CLK_BRG_MASK;
115 u8 txs = port->txs & CLK_BRG_MASK;
116
117 sca_out(EXS_TES1, (port->chan ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS,
118 port->card);
119 switch (port->settings.clock_type) {
120 case CLOCK_INT:
121 rxs |= CLK_BRG;
122 txs |= CLK_PIN_OUT | CLK_TX_RXCLK;
123 break;
124
125 case CLOCK_TXINT:
126 rxs |= CLK_LINE;
127 txs |= CLK_PIN_OUT | CLK_BRG;
128 break;
129
130 case CLOCK_TXFROMRX:
131 rxs |= CLK_LINE;
132 txs |= CLK_PIN_OUT | CLK_TX_RXCLK;
133 break;
134
135 default:
136 rxs |= CLK_LINE;
137 txs |= CLK_PIN_OUT | CLK_LINE;
138 break;
139 }
140
141 port->rxs = rxs;
142 port->txs = txs;
143 sca_out(rxs, msci + RXS, card);
144 sca_out(txs, msci + TXS, card);
145 sca_set_port(port);
146}
147
148static int pci200_open(struct net_device *dev)
149{
150 port_t *port = dev_to_port(dev);
151 int result = hdlc_open(dev);
152
153 if (result)
154 return result;
155
156 sca_open(dev);
157 pci200_set_iface(port);
158 sca_flush(port->card);
159 return 0;
160}
161
162static int pci200_close(struct net_device *dev)
163{
164 sca_close(dev);
165 sca_flush(dev_to_port(dev)->card);
166 hdlc_close(dev);
167 return 0;
168}
169
170static int pci200_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
171{
172 const size_t size = sizeof(sync_serial_settings);
173 sync_serial_settings new_line;
174 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
175 port_t *port = dev_to_port(dev);
176
177#ifdef DEBUG_RINGS
178 if (cmd == SIOCDEVPRIVATE) {
179 sca_dump_rings(dev);
180 return 0;
181 }
182#endif
183 if (cmd != SIOCWANDEV)
184 return hdlc_ioctl(dev, ifr, cmd);
185
186 switch (ifr->ifr_settings.type) {
187 case IF_GET_IFACE:
188 ifr->ifr_settings.type = IF_IFACE_V35;
189 if (ifr->ifr_settings.size < size) {
190 ifr->ifr_settings.size = size;
191 return -ENOBUFS;
192 }
193 if (copy_to_user(line, &port->settings, size))
194 return -EFAULT;
195 return 0;
196
197 case IF_IFACE_V35:
198 case IF_IFACE_SYNC_SERIAL:
199 if (!capable(CAP_NET_ADMIN))
200 return -EPERM;
201
202 if (copy_from_user(&new_line, line, size))
203 return -EFAULT;
204
205 if (new_line.clock_type != CLOCK_EXT &&
206 new_line.clock_type != CLOCK_TXFROMRX &&
207 new_line.clock_type != CLOCK_INT &&
208 new_line.clock_type != CLOCK_TXINT)
209 return -EINVAL;
210
211 if (new_line.loopback != 0 && new_line.loopback != 1)
212 return -EINVAL;
213
214 memcpy(&port->settings, &new_line, size);
215 pci200_set_iface(port);
216 sca_flush(port->card);
217 return 0;
218
219 default:
220 return hdlc_ioctl(dev, ifr, cmd);
221 }
222}
223
224static void pci200_pci_remove_one(struct pci_dev *pdev)
225{
226 int i;
227 card_t *card = pci_get_drvdata(pdev);
228
229 for (i = 0; i < 2; i++)
230 if (card->ports[i].card)
231 unregister_hdlc_device(card->ports[i].netdev);
232
233 if (card->irq)
234 free_irq(card->irq, card);
235
236 if (card->rambase)
237 iounmap(card->rambase);
238 if (card->scabase)
239 iounmap(card->scabase);
240 if (card->plxbase)
241 iounmap(card->plxbase);
242
243 pci_release_regions(pdev);
244 pci_disable_device(pdev);
245 if (card->ports[0].netdev)
246 free_netdev(card->ports[0].netdev);
247 if (card->ports[1].netdev)
248 free_netdev(card->ports[1].netdev);
249 kfree(card);
250}
251
252static const struct net_device_ops pci200_ops = {
253 .ndo_open = pci200_open,
254 .ndo_stop = pci200_close,
255 .ndo_start_xmit = hdlc_start_xmit,
256 .ndo_do_ioctl = pci200_ioctl,
257};
258
259static int pci200_pci_init_one(struct pci_dev *pdev,
260 const struct pci_device_id *ent)
261{
262 card_t *card;
263 u32 __iomem *p;
264 int i;
265 u32 ramsize;
266 u32 ramphys;
267 u32 scaphys;
268 u32 plxphys;
269
270 i = pci_enable_device(pdev);
271 if (i)
272 return i;
273
274 i = pci_request_regions(pdev, "PCI200SYN");
275 if (i) {
276 pci_disable_device(pdev);
277 return i;
278 }
279
280 card = kzalloc(sizeof(card_t), GFP_KERNEL);
281 if (!card) {
282 pci_release_regions(pdev);
283 pci_disable_device(pdev);
284 return -ENOBUFS;
285 }
286 pci_set_drvdata(pdev, card);
287 card->ports[0].netdev = alloc_hdlcdev(&card->ports[0]);
288 card->ports[1].netdev = alloc_hdlcdev(&card->ports[1]);
289 if (!card->ports[0].netdev || !card->ports[1].netdev) {
290 pr_err("unable to allocate memory\n");
291 pci200_pci_remove_one(pdev);
292 return -ENOMEM;
293 }
294
295 if (pci_resource_len(pdev, 0) != PCI200SYN_PLX_SIZE ||
296 pci_resource_len(pdev, 2) != PCI200SYN_SCA_SIZE ||
297 pci_resource_len(pdev, 3) < 16384) {
298 pr_err("invalid card EEPROM parameters\n");
299 pci200_pci_remove_one(pdev);
300 return -EFAULT;
301 }
302
303 plxphys = pci_resource_start(pdev, 0) & PCI_BASE_ADDRESS_MEM_MASK;
304 card->plxbase = ioremap(plxphys, PCI200SYN_PLX_SIZE);
305
306 scaphys = pci_resource_start(pdev, 2) & PCI_BASE_ADDRESS_MEM_MASK;
307 card->scabase = ioremap(scaphys, PCI200SYN_SCA_SIZE);
308
309 ramphys = pci_resource_start(pdev, 3) & PCI_BASE_ADDRESS_MEM_MASK;
310 card->rambase = pci_ioremap_bar(pdev, 3);
311
312 if (!card->plxbase || !card->scabase || !card->rambase) {
313 pr_err("ioremap() failed\n");
314 pci200_pci_remove_one(pdev);
315 return -EFAULT;
316 }
317
318
319 p = &card->plxbase->init_ctrl;
320 writel(readl(p) | 0x40000000, p);
321 readl(p);
322 udelay(1);
323
324 writel(readl(p) & ~0x40000000, p);
325 readl(p);
326 udelay(1);
327
328 ramsize = sca_detect_ram(card, card->rambase,
329 pci_resource_len(pdev, 3));
330
331
332 i = ramsize / (2 * (sizeof(pkt_desc) + HDLC_MAX_MRU));
333 card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
334 card->rx_ring_buffers = i - card->tx_ring_buffers;
335
336 card->buff_offset = 2 * sizeof(pkt_desc) * (card->tx_ring_buffers +
337 card->rx_ring_buffers);
338
339 pr_info("%u KB RAM at 0x%x, IRQ%u, using %u TX + %u RX packets rings\n",
340 ramsize / 1024, ramphys,
341 pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers);
342
343 if (card->tx_ring_buffers < 1) {
344 pr_err("RAM test failed\n");
345 pci200_pci_remove_one(pdev);
346 return -EFAULT;
347 }
348
349
350 p = &card->plxbase->intr_ctrl_stat;
351 writew(readw(p) | 0x0040, p);
352
353
354 if (request_irq(pdev->irq, sca_intr, IRQF_SHARED, "pci200syn", card)) {
355 pr_warn("could not allocate IRQ%d\n", pdev->irq);
356 pci200_pci_remove_one(pdev);
357 return -EBUSY;
358 }
359 card->irq = pdev->irq;
360
361 sca_init(card, 0);
362
363 for (i = 0; i < 2; i++) {
364 port_t *port = &card->ports[i];
365 struct net_device *dev = port->netdev;
366 hdlc_device *hdlc = dev_to_hdlc(dev);
367
368 port->chan = i;
369
370 spin_lock_init(&port->lock);
371 dev->irq = card->irq;
372 dev->mem_start = ramphys;
373 dev->mem_end = ramphys + ramsize - 1;
374 dev->tx_queue_len = 50;
375 dev->netdev_ops = &pci200_ops;
376 hdlc->attach = sca_attach;
377 hdlc->xmit = sca_xmit;
378 port->settings.clock_type = CLOCK_EXT;
379 port->card = card;
380 sca_init_port(port);
381 if (register_hdlc_device(dev)) {
382 pr_err("unable to register hdlc device\n");
383 port->card = NULL;
384 pci200_pci_remove_one(pdev);
385 return -ENOBUFS;
386 }
387
388 netdev_info(dev, "PCI200SYN channel %d\n", port->chan);
389 }
390
391 sca_flush(card);
392 return 0;
393}
394
395static const struct pci_device_id pci200_pci_tbl[] = {
396 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX,
397 PCI_DEVICE_ID_PLX_PCI200SYN, 0, 0, 0 },
398 { 0, }
399};
400
401static struct pci_driver pci200_pci_driver = {
402 .name = "PCI200SYN",
403 .id_table = pci200_pci_tbl,
404 .probe = pci200_pci_init_one,
405 .remove = pci200_pci_remove_one,
406};
407
408static int __init pci200_init_module(void)
409{
410 if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) {
411 pr_err("Invalid PCI clock frequency\n");
412 return -EINVAL;
413 }
414 return pci_register_driver(&pci200_pci_driver);
415}
416
417static void __exit pci200_cleanup_module(void)
418{
419 pci_unregister_driver(&pci200_pci_driver);
420}
421
422MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
423MODULE_DESCRIPTION("Goramo PCI200SYN serial port driver");
424MODULE_LICENSE("GPL v2");
425MODULE_DEVICE_TABLE(pci, pci200_pci_tbl);
426module_param(pci_clock_freq, int, 0444);
427MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz");
428module_init(pci200_init_module);
429module_exit(pci200_cleanup_module);
430