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17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/slab.h>
22#include <linux/sched.h>
23#include <linux/types.h>
24#include <linux/fcntl.h>
25#include <linux/in.h>
26#include <linux/string.h>
27#include <linux/errno.h>
28#include <linux/init.h>
29#include <linux/ioport.h>
30#include <linux/moduleparam.h>
31#include <linux/netdevice.h>
32#include <linux/hdlc.h>
33#include <linux/pci.h>
34#include <linux/delay.h>
35#include <asm/io.h>
36
37#include "hd64572.h"
38
39#undef DEBUG_PKT
40#define DEBUG_RINGS
41
42#define PC300_PLX_SIZE 0x80
43#define PC300_SCA_SIZE 0x400
44#define MAX_TX_BUFFERS 10
45
46static int pci_clock_freq = 33000000;
47static int use_crystal_clock;
48static unsigned int CLOCK_BASE;
49
50
51#define PC300_CLKSEL_MASK (0x00000004UL)
52#define PC300_CHMEDIA_MASK(port) (0x00000020UL << ((port) * 3))
53#define PC300_CTYPE_MASK (0x00000800UL)
54
55enum { PC300_RSV = 1, PC300_X21, PC300_TE };
56
57
58
59
60typedef struct {
61 u32 loc_addr_range[4];
62 u32 loc_rom_range;
63 u32 loc_addr_base[4];
64 u32 loc_rom_base;
65 u32 loc_bus_descr[4];
66 u32 rom_bus_descr;
67 u32 cs_base[4];
68 u32 intr_ctrl_stat;
69 u32 init_ctrl;
70} plx9050;
71
72typedef struct port_s {
73 struct napi_struct napi;
74 struct net_device *netdev;
75 struct card_s *card;
76 spinlock_t lock;
77 sync_serial_settings settings;
78 int rxpart;
79 unsigned short encoding;
80 unsigned short parity;
81 unsigned int iface;
82 u16 rxin;
83 u16 txin;
84 u16 txlast;
85 u8 rxs, txs, tmc;
86 u8 chan;
87} port_t;
88
89typedef struct card_s {
90 int type;
91 int n_ports;
92 u8 __iomem *rambase;
93 u8 __iomem *scabase;
94 plx9050 __iomem *plxbase;
95 u32 init_ctrl_value;
96 u16 rx_ring_buffers;
97 u16 tx_ring_buffers;
98 u16 buff_offset;
99 u8 irq;
100
101 port_t ports[2];
102} card_t;
103
104#define get_port(card, port) ((port) < (card)->n_ports ? \
105 (&(card)->ports[port]) : (NULL))
106
107#include "hd64572.c"
108
109static void pc300_set_iface(port_t *port)
110{
111 card_t *card = port->card;
112 u32 __iomem *init_ctrl = &card->plxbase->init_ctrl;
113 u16 msci = get_msci(port);
114 u8 rxs = port->rxs & CLK_BRG_MASK;
115 u8 txs = port->txs & CLK_BRG_MASK;
116
117 sca_out(EXS_TES1, (port->chan ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS,
118 port->card);
119 switch (port->settings.clock_type) {
120 case CLOCK_INT:
121 rxs |= CLK_BRG;
122 txs |= CLK_PIN_OUT | CLK_TX_RXCLK;
123 break;
124
125 case CLOCK_TXINT:
126 rxs |= CLK_LINE;
127 txs |= CLK_PIN_OUT | CLK_BRG;
128 break;
129
130 case CLOCK_TXFROMRX:
131 rxs |= CLK_LINE;
132 txs |= CLK_PIN_OUT | CLK_TX_RXCLK;
133 break;
134
135 default:
136 rxs |= CLK_LINE;
137 txs |= CLK_PIN_OUT | CLK_LINE;
138 break;
139 }
140
141 port->rxs = rxs;
142 port->txs = txs;
143 sca_out(rxs, msci + RXS, card);
144 sca_out(txs, msci + TXS, card);
145 sca_set_port(port);
146
147 if (port->card->type == PC300_RSV) {
148 if (port->iface == IF_IFACE_V35)
149 writel(card->init_ctrl_value |
150 PC300_CHMEDIA_MASK(port->chan), init_ctrl);
151 else
152 writel(card->init_ctrl_value &
153 ~PC300_CHMEDIA_MASK(port->chan), init_ctrl);
154 }
155}
156
157static int pc300_open(struct net_device *dev)
158{
159 port_t *port = dev_to_port(dev);
160 int result = hdlc_open(dev);
161
162 if (result)
163 return result;
164
165 sca_open(dev);
166 pc300_set_iface(port);
167 return 0;
168}
169
170static int pc300_close(struct net_device *dev)
171{
172 sca_close(dev);
173 hdlc_close(dev);
174 return 0;
175}
176
177static int pc300_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
178{
179 const size_t size = sizeof(sync_serial_settings);
180 sync_serial_settings new_line;
181 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
182 int new_type;
183 port_t *port = dev_to_port(dev);
184
185#ifdef DEBUG_RINGS
186 if (cmd == SIOCDEVPRIVATE) {
187 sca_dump_rings(dev);
188 return 0;
189 }
190#endif
191 if (cmd != SIOCWANDEV)
192 return hdlc_ioctl(dev, ifr, cmd);
193
194 if (ifr->ifr_settings.type == IF_GET_IFACE) {
195 ifr->ifr_settings.type = port->iface;
196 if (ifr->ifr_settings.size < size) {
197 ifr->ifr_settings.size = size;
198 return -ENOBUFS;
199 }
200 if (copy_to_user(line, &port->settings, size))
201 return -EFAULT;
202 return 0;
203 }
204
205 if (port->card->type == PC300_X21 &&
206 (ifr->ifr_settings.type == IF_IFACE_SYNC_SERIAL ||
207 ifr->ifr_settings.type == IF_IFACE_X21))
208 new_type = IF_IFACE_X21;
209
210 else if (port->card->type == PC300_RSV &&
211 (ifr->ifr_settings.type == IF_IFACE_SYNC_SERIAL ||
212 ifr->ifr_settings.type == IF_IFACE_V35))
213 new_type = IF_IFACE_V35;
214
215 else if (port->card->type == PC300_RSV &&
216 ifr->ifr_settings.type == IF_IFACE_V24)
217 new_type = IF_IFACE_V24;
218
219 else
220 return hdlc_ioctl(dev, ifr, cmd);
221
222 if (!capable(CAP_NET_ADMIN))
223 return -EPERM;
224
225 if (copy_from_user(&new_line, line, size))
226 return -EFAULT;
227
228 if (new_line.clock_type != CLOCK_EXT &&
229 new_line.clock_type != CLOCK_TXFROMRX &&
230 new_line.clock_type != CLOCK_INT &&
231 new_line.clock_type != CLOCK_TXINT)
232 return -EINVAL;
233
234 if (new_line.loopback != 0 && new_line.loopback != 1)
235 return -EINVAL;
236
237 memcpy(&port->settings, &new_line, size);
238 port->iface = new_type;
239 pc300_set_iface(port);
240 return 0;
241}
242
243static void pc300_pci_remove_one(struct pci_dev *pdev)
244{
245 int i;
246 card_t *card = pci_get_drvdata(pdev);
247
248 for (i = 0; i < 2; i++)
249 if (card->ports[i].card)
250 unregister_hdlc_device(card->ports[i].netdev);
251
252 if (card->irq)
253 free_irq(card->irq, card);
254
255 if (card->rambase)
256 iounmap(card->rambase);
257 if (card->scabase)
258 iounmap(card->scabase);
259 if (card->plxbase)
260 iounmap(card->plxbase);
261
262 pci_release_regions(pdev);
263 pci_disable_device(pdev);
264 if (card->ports[0].netdev)
265 free_netdev(card->ports[0].netdev);
266 if (card->ports[1].netdev)
267 free_netdev(card->ports[1].netdev);
268 kfree(card);
269}
270
271static const struct net_device_ops pc300_ops = {
272 .ndo_open = pc300_open,
273 .ndo_stop = pc300_close,
274 .ndo_start_xmit = hdlc_start_xmit,
275 .ndo_do_ioctl = pc300_ioctl,
276};
277
278static int pc300_pci_init_one(struct pci_dev *pdev,
279 const struct pci_device_id *ent)
280{
281 card_t *card;
282 u32 __iomem *p;
283 int i;
284 u32 ramsize;
285 u32 ramphys;
286 u32 scaphys;
287 u32 plxphys;
288
289 i = pci_enable_device(pdev);
290 if (i)
291 return i;
292
293 i = pci_request_regions(pdev, "PC300");
294 if (i) {
295 pci_disable_device(pdev);
296 return i;
297 }
298
299 card = kzalloc(sizeof(card_t), GFP_KERNEL);
300 if (!card) {
301 pci_release_regions(pdev);
302 pci_disable_device(pdev);
303 return -ENOBUFS;
304 }
305 pci_set_drvdata(pdev, card);
306
307 if (pci_resource_len(pdev, 0) != PC300_PLX_SIZE ||
308 pci_resource_len(pdev, 2) != PC300_SCA_SIZE ||
309 pci_resource_len(pdev, 3) < 16384) {
310 pr_err("invalid card EEPROM parameters\n");
311 pc300_pci_remove_one(pdev);
312 return -EFAULT;
313 }
314
315 plxphys = pci_resource_start(pdev, 0) & PCI_BASE_ADDRESS_MEM_MASK;
316 card->plxbase = ioremap(plxphys, PC300_PLX_SIZE);
317
318 scaphys = pci_resource_start(pdev, 2) & PCI_BASE_ADDRESS_MEM_MASK;
319 card->scabase = ioremap(scaphys, PC300_SCA_SIZE);
320
321 ramphys = pci_resource_start(pdev, 3) & PCI_BASE_ADDRESS_MEM_MASK;
322 card->rambase = pci_ioremap_bar(pdev, 3);
323
324 if (!card->plxbase || !card->scabase || !card->rambase) {
325 pr_err("ioremap() failed\n");
326 pc300_pci_remove_one(pdev);
327 return -ENOMEM;
328 }
329
330
331 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, scaphys);
332 card->init_ctrl_value = readl(&((plx9050 __iomem *)card->scabase)->init_ctrl);
333 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, plxphys);
334
335 if (pdev->device == PCI_DEVICE_ID_PC300_TE_1 ||
336 pdev->device == PCI_DEVICE_ID_PC300_TE_2)
337 card->type = PC300_TE;
338 else if (card->init_ctrl_value & PC300_CTYPE_MASK)
339 card->type = PC300_X21;
340 else
341 card->type = PC300_RSV;
342
343 if (pdev->device == PCI_DEVICE_ID_PC300_RX_1 ||
344 pdev->device == PCI_DEVICE_ID_PC300_TE_1)
345 card->n_ports = 1;
346 else
347 card->n_ports = 2;
348
349 for (i = 0; i < card->n_ports; i++) {
350 card->ports[i].netdev = alloc_hdlcdev(&card->ports[i]);
351 if (!card->ports[i].netdev) {
352 pr_err("unable to allocate memory\n");
353 pc300_pci_remove_one(pdev);
354 return -ENOMEM;
355 }
356 }
357
358
359 p = &card->plxbase->init_ctrl;
360 writel(card->init_ctrl_value | 0x40000000, p);
361 readl(p);
362 udelay(1);
363
364 writel(card->init_ctrl_value, p);
365 readl(p);
366 udelay(1);
367
368
369 writel(card->init_ctrl_value | 0x20000000, p);
370 readl(p);
371 udelay(1);
372
373 writel(card->init_ctrl_value, p);
374 readl(p);
375 udelay(1);
376
377 ramsize = sca_detect_ram(card, card->rambase,
378 pci_resource_len(pdev, 3));
379
380 if (use_crystal_clock)
381 card->init_ctrl_value &= ~PC300_CLKSEL_MASK;
382 else
383 card->init_ctrl_value |= PC300_CLKSEL_MASK;
384
385 writel(card->init_ctrl_value, &card->plxbase->init_ctrl);
386
387 i = ramsize / (card->n_ports * (sizeof(pkt_desc) + HDLC_MAX_MRU));
388 card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
389 card->rx_ring_buffers = i - card->tx_ring_buffers;
390
391 card->buff_offset = card->n_ports * sizeof(pkt_desc) *
392 (card->tx_ring_buffers + card->rx_ring_buffers);
393
394 pr_info("PC300/%s, %u KB RAM at 0x%x, IRQ%u, using %u TX + %u RX packets rings\n",
395 card->type == PC300_X21 ? "X21" :
396 card->type == PC300_TE ? "TE" : "RSV",
397 ramsize / 1024, ramphys, pdev->irq,
398 card->tx_ring_buffers, card->rx_ring_buffers);
399
400 if (card->tx_ring_buffers < 1) {
401 pr_err("RAM test failed\n");
402 pc300_pci_remove_one(pdev);
403 return -EFAULT;
404 }
405
406
407 writew(0x0041, &card->plxbase->intr_ctrl_stat);
408
409
410 if (request_irq(pdev->irq, sca_intr, IRQF_SHARED, "pc300", card)) {
411 pr_warn("could not allocate IRQ%d\n", pdev->irq);
412 pc300_pci_remove_one(pdev);
413 return -EBUSY;
414 }
415 card->irq = pdev->irq;
416
417 sca_init(card, 0);
418
419
420
421
422 sca_out(0x10, BTCR, card);
423
424 for (i = 0; i < card->n_ports; i++) {
425 port_t *port = &card->ports[i];
426 struct net_device *dev = port->netdev;
427 hdlc_device *hdlc = dev_to_hdlc(dev);
428
429 port->chan = i;
430
431 spin_lock_init(&port->lock);
432 dev->irq = card->irq;
433 dev->mem_start = ramphys;
434 dev->mem_end = ramphys + ramsize - 1;
435 dev->tx_queue_len = 50;
436 dev->netdev_ops = &pc300_ops;
437 hdlc->attach = sca_attach;
438 hdlc->xmit = sca_xmit;
439 port->settings.clock_type = CLOCK_EXT;
440 port->card = card;
441 if (card->type == PC300_X21)
442 port->iface = IF_IFACE_X21;
443 else
444 port->iface = IF_IFACE_V35;
445
446 sca_init_port(port);
447 if (register_hdlc_device(dev)) {
448 pr_err("unable to register hdlc device\n");
449 port->card = NULL;
450 pc300_pci_remove_one(pdev);
451 return -ENOBUFS;
452 }
453
454 netdev_info(dev, "PC300 channel %d\n", port->chan);
455 }
456 return 0;
457}
458
459static const struct pci_device_id pc300_pci_tbl[] = {
460 { PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_PC300_RX_1, PCI_ANY_ID,
461 PCI_ANY_ID, 0, 0, 0 },
462 { PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_PC300_RX_2, PCI_ANY_ID,
463 PCI_ANY_ID, 0, 0, 0 },
464 { PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_PC300_TE_1, PCI_ANY_ID,
465 PCI_ANY_ID, 0, 0, 0 },
466 { PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_PC300_TE_2, PCI_ANY_ID,
467 PCI_ANY_ID, 0, 0, 0 },
468 { 0, }
469};
470
471static struct pci_driver pc300_pci_driver = {
472 .name = "PC300",
473 .id_table = pc300_pci_tbl,
474 .probe = pc300_pci_init_one,
475 .remove = pc300_pci_remove_one,
476};
477
478static int __init pc300_init_module(void)
479{
480 if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) {
481 pr_err("Invalid PCI clock frequency\n");
482 return -EINVAL;
483 }
484 if (use_crystal_clock != 0 && use_crystal_clock != 1) {
485 pr_err("Invalid 'use_crystal_clock' value\n");
486 return -EINVAL;
487 }
488
489 CLOCK_BASE = use_crystal_clock ? 24576000 : pci_clock_freq;
490
491 return pci_register_driver(&pc300_pci_driver);
492}
493
494static void __exit pc300_cleanup_module(void)
495{
496 pci_unregister_driver(&pc300_pci_driver);
497}
498
499MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
500MODULE_DESCRIPTION("Cyclades PC300 serial port driver");
501MODULE_LICENSE("GPL v2");
502MODULE_DEVICE_TABLE(pci, pc300_pci_tbl);
503module_param(pci_clock_freq, int, 0444);
504MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz");
505module_param(use_crystal_clock, int, 0444);
506MODULE_PARM_DESC(use_crystal_clock,
507 "Use 24.576 MHz clock instead of PCI clock");
508module_init(pc300_init_module);
509module_exit(pc300_cleanup_module);
510
