1
2
3
4
5
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7
8#include <generated/utsrelease.h>
9#include "ice.h"
10#include "ice_base.h"
11#include "ice_lib.h"
12#include "ice_fltr.h"
13#include "ice_dcb_lib.h"
14#include "ice_dcb_nl.h"
15#include "ice_devlink.h"
16
17
18
19
20#define CREATE_TRACE_POINTS
21#include "ice_trace.h"
22
23#define DRV_SUMMARY "Intel(R) Ethernet Connection E800 Series Linux Driver"
24static const char ice_driver_string[] = DRV_SUMMARY;
25static const char ice_copyright[] = "Copyright (c) 2018, Intel Corporation.";
26
27
28#define ICE_DDP_PKG_PATH "intel/ice/ddp/"
29#define ICE_DDP_PKG_FILE ICE_DDP_PKG_PATH "ice.pkg"
30
31MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
32MODULE_DESCRIPTION(DRV_SUMMARY);
33MODULE_LICENSE("GPL v2");
34MODULE_FIRMWARE(ICE_DDP_PKG_FILE);
35
36static int debug = -1;
37module_param(debug, int, 0644);
38#ifndef CONFIG_DYNAMIC_DEBUG
39MODULE_PARM_DESC(debug, "netif level (0=none,...,16=all), hw debug_mask (0x8XXXXXXX)");
40#else
41MODULE_PARM_DESC(debug, "netif level (0=none,...,16=all)");
42#endif
43
44static DEFINE_IDA(ice_aux_ida);
45
46static struct workqueue_struct *ice_wq;
47static const struct net_device_ops ice_netdev_safe_mode_ops;
48static const struct net_device_ops ice_netdev_ops;
49static int ice_vsi_open(struct ice_vsi *vsi);
50
51static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type);
52
53static void ice_vsi_release_all(struct ice_pf *pf);
54
55bool netif_is_ice(struct net_device *dev)
56{
57 return dev && (dev->netdev_ops == &ice_netdev_ops);
58}
59
60
61
62
63
64static u16 ice_get_tx_pending(struct ice_ring *ring)
65{
66 u16 head, tail;
67
68 head = ring->next_to_clean;
69 tail = ring->next_to_use;
70
71 if (head != tail)
72 return (head < tail) ?
73 tail - head : (tail + ring->count - head);
74 return 0;
75}
76
77
78
79
80
81static void ice_check_for_hang_subtask(struct ice_pf *pf)
82{
83 struct ice_vsi *vsi = NULL;
84 struct ice_hw *hw;
85 unsigned int i;
86 int packets;
87 u32 v;
88
89 ice_for_each_vsi(pf, v)
90 if (pf->vsi[v] && pf->vsi[v]->type == ICE_VSI_PF) {
91 vsi = pf->vsi[v];
92 break;
93 }
94
95 if (!vsi || test_bit(ICE_VSI_DOWN, vsi->state))
96 return;
97
98 if (!(vsi->netdev && netif_carrier_ok(vsi->netdev)))
99 return;
100
101 hw = &vsi->back->hw;
102
103 for (i = 0; i < vsi->num_txq; i++) {
104 struct ice_ring *tx_ring = vsi->tx_rings[i];
105
106 if (tx_ring && tx_ring->desc) {
107
108
109
110
111
112
113
114 packets = tx_ring->stats.pkts & INT_MAX;
115 if (tx_ring->tx_stats.prev_pkt == packets) {
116
117 ice_trigger_sw_intr(hw, tx_ring->q_vector);
118 continue;
119 }
120
121
122
123
124 smp_rmb();
125 tx_ring->tx_stats.prev_pkt =
126 ice_get_tx_pending(tx_ring) ? packets : -1;
127 }
128 }
129}
130
131
132
133
134
135
136
137
138
139static int ice_init_mac_fltr(struct ice_pf *pf)
140{
141 enum ice_status status;
142 struct ice_vsi *vsi;
143 u8 *perm_addr;
144
145 vsi = ice_get_main_vsi(pf);
146 if (!vsi)
147 return -EINVAL;
148
149 perm_addr = vsi->port_info->mac.perm_addr;
150 status = ice_fltr_add_mac_and_broadcast(vsi, perm_addr, ICE_FWD_TO_VSI);
151 if (status)
152 return -EIO;
153
154 return 0;
155}
156
157
158
159
160
161
162
163
164
165
166
167static int ice_add_mac_to_sync_list(struct net_device *netdev, const u8 *addr)
168{
169 struct ice_netdev_priv *np = netdev_priv(netdev);
170 struct ice_vsi *vsi = np->vsi;
171
172 if (ice_fltr_add_mac_to_list(vsi, &vsi->tmp_sync_list, addr,
173 ICE_FWD_TO_VSI))
174 return -EINVAL;
175
176 return 0;
177}
178
179
180
181
182
183
184
185
186
187
188
189static int ice_add_mac_to_unsync_list(struct net_device *netdev, const u8 *addr)
190{
191 struct ice_netdev_priv *np = netdev_priv(netdev);
192 struct ice_vsi *vsi = np->vsi;
193
194
195
196
197
198
199 if (ether_addr_equal(addr, netdev->dev_addr))
200 return 0;
201
202 if (ice_fltr_add_mac_to_list(vsi, &vsi->tmp_unsync_list, addr,
203 ICE_FWD_TO_VSI))
204 return -EINVAL;
205
206 return 0;
207}
208
209
210
211
212
213
214
215static bool ice_vsi_fltr_changed(struct ice_vsi *vsi)
216{
217 return test_bit(ICE_VSI_UMAC_FLTR_CHANGED, vsi->state) ||
218 test_bit(ICE_VSI_MMAC_FLTR_CHANGED, vsi->state) ||
219 test_bit(ICE_VSI_VLAN_FLTR_CHANGED, vsi->state);
220}
221
222
223
224
225
226
227
228
229static int ice_cfg_promisc(struct ice_vsi *vsi, u8 promisc_m, bool set_promisc)
230{
231 struct ice_hw *hw = &vsi->back->hw;
232 enum ice_status status = 0;
233
234 if (vsi->type != ICE_VSI_PF)
235 return 0;
236
237 if (vsi->num_vlan > 1) {
238 status = ice_set_vlan_vsi_promisc(hw, vsi->idx, promisc_m,
239 set_promisc);
240 } else {
241 if (set_promisc)
242 status = ice_set_vsi_promisc(hw, vsi->idx, promisc_m,
243 0);
244 else
245 status = ice_clear_vsi_promisc(hw, vsi->idx, promisc_m,
246 0);
247 }
248
249 if (status)
250 return -EIO;
251
252 return 0;
253}
254
255
256
257
258
259
260
261static int ice_vsi_sync_fltr(struct ice_vsi *vsi)
262{
263 struct device *dev = ice_pf_to_dev(vsi->back);
264 struct net_device *netdev = vsi->netdev;
265 bool promisc_forced_on = false;
266 struct ice_pf *pf = vsi->back;
267 struct ice_hw *hw = &pf->hw;
268 enum ice_status status = 0;
269 u32 changed_flags = 0;
270 u8 promisc_m;
271 int err = 0;
272
273 if (!vsi->netdev)
274 return -EINVAL;
275
276 while (test_and_set_bit(ICE_CFG_BUSY, vsi->state))
277 usleep_range(1000, 2000);
278
279 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
280 vsi->current_netdev_flags = vsi->netdev->flags;
281
282 INIT_LIST_HEAD(&vsi->tmp_sync_list);
283 INIT_LIST_HEAD(&vsi->tmp_unsync_list);
284
285 if (ice_vsi_fltr_changed(vsi)) {
286 clear_bit(ICE_VSI_UMAC_FLTR_CHANGED, vsi->state);
287 clear_bit(ICE_VSI_MMAC_FLTR_CHANGED, vsi->state);
288 clear_bit(ICE_VSI_VLAN_FLTR_CHANGED, vsi->state);
289
290
291 netif_addr_lock_bh(netdev);
292 __dev_uc_sync(netdev, ice_add_mac_to_sync_list,
293 ice_add_mac_to_unsync_list);
294 __dev_mc_sync(netdev, ice_add_mac_to_sync_list,
295 ice_add_mac_to_unsync_list);
296
297 netif_addr_unlock_bh(netdev);
298 }
299
300
301 status = ice_fltr_remove_mac_list(vsi, &vsi->tmp_unsync_list);
302 ice_fltr_free_list(dev, &vsi->tmp_unsync_list);
303 if (status) {
304 netdev_err(netdev, "Failed to delete MAC filters\n");
305
306 if (status == ICE_ERR_NO_MEMORY) {
307 err = -ENOMEM;
308 goto out;
309 }
310 }
311
312
313 status = ice_fltr_add_mac_list(vsi, &vsi->tmp_sync_list);
314 ice_fltr_free_list(dev, &vsi->tmp_sync_list);
315
316
317
318
319 if (status && status != ICE_ERR_ALREADY_EXISTS) {
320 netdev_err(netdev, "Failed to add MAC filters\n");
321
322
323
324
325 if (hw->adminq.sq_last_status == ICE_AQ_RC_ENOSPC &&
326 !test_and_set_bit(ICE_FLTR_OVERFLOW_PROMISC,
327 vsi->state)) {
328 promisc_forced_on = true;
329 netdev_warn(netdev, "Reached MAC filter limit, forcing promisc mode on VSI %d\n",
330 vsi->vsi_num);
331 } else {
332 err = -EIO;
333 goto out;
334 }
335 }
336
337 if (changed_flags & IFF_ALLMULTI) {
338 if (vsi->current_netdev_flags & IFF_ALLMULTI) {
339 if (vsi->num_vlan > 1)
340 promisc_m = ICE_MCAST_VLAN_PROMISC_BITS;
341 else
342 promisc_m = ICE_MCAST_PROMISC_BITS;
343
344 err = ice_cfg_promisc(vsi, promisc_m, true);
345 if (err) {
346 netdev_err(netdev, "Error setting Multicast promiscuous mode on VSI %i\n",
347 vsi->vsi_num);
348 vsi->current_netdev_flags &= ~IFF_ALLMULTI;
349 goto out_promisc;
350 }
351 } else {
352
353 if (vsi->num_vlan > 1)
354 promisc_m = ICE_MCAST_VLAN_PROMISC_BITS;
355 else
356 promisc_m = ICE_MCAST_PROMISC_BITS;
357
358 err = ice_cfg_promisc(vsi, promisc_m, false);
359 if (err) {
360 netdev_err(netdev, "Error clearing Multicast promiscuous mode on VSI %i\n",
361 vsi->vsi_num);
362 vsi->current_netdev_flags |= IFF_ALLMULTI;
363 goto out_promisc;
364 }
365 }
366 }
367
368 if (((changed_flags & IFF_PROMISC) || promisc_forced_on) ||
369 test_bit(ICE_VSI_PROMISC_CHANGED, vsi->state)) {
370 clear_bit(ICE_VSI_PROMISC_CHANGED, vsi->state);
371 if (vsi->current_netdev_flags & IFF_PROMISC) {
372
373 if (!ice_is_dflt_vsi_in_use(pf->first_sw)) {
374 err = ice_set_dflt_vsi(pf->first_sw, vsi);
375 if (err && err != -EEXIST) {
376 netdev_err(netdev, "Error %d setting default VSI %i Rx rule\n",
377 err, vsi->vsi_num);
378 vsi->current_netdev_flags &=
379 ~IFF_PROMISC;
380 goto out_promisc;
381 }
382 ice_cfg_vlan_pruning(vsi, false, false);
383 }
384 } else {
385
386 if (ice_is_vsi_dflt_vsi(pf->first_sw, vsi)) {
387 err = ice_clear_dflt_vsi(pf->first_sw);
388 if (err) {
389 netdev_err(netdev, "Error %d clearing default VSI %i Rx rule\n",
390 err, vsi->vsi_num);
391 vsi->current_netdev_flags |=
392 IFF_PROMISC;
393 goto out_promisc;
394 }
395 if (vsi->num_vlan > 1)
396 ice_cfg_vlan_pruning(vsi, true, false);
397 }
398 }
399 }
400 goto exit;
401
402out_promisc:
403 set_bit(ICE_VSI_PROMISC_CHANGED, vsi->state);
404 goto exit;
405out:
406
407 set_bit(ICE_VSI_UMAC_FLTR_CHANGED, vsi->state);
408 set_bit(ICE_VSI_MMAC_FLTR_CHANGED, vsi->state);
409exit:
410 clear_bit(ICE_CFG_BUSY, vsi->state);
411 return err;
412}
413
414
415
416
417
418static void ice_sync_fltr_subtask(struct ice_pf *pf)
419{
420 int v;
421
422 if (!pf || !(test_bit(ICE_FLAG_FLTR_SYNC, pf->flags)))
423 return;
424
425 clear_bit(ICE_FLAG_FLTR_SYNC, pf->flags);
426
427 ice_for_each_vsi(pf, v)
428 if (pf->vsi[v] && ice_vsi_fltr_changed(pf->vsi[v]) &&
429 ice_vsi_sync_fltr(pf->vsi[v])) {
430
431 set_bit(ICE_FLAG_FLTR_SYNC, pf->flags);
432 break;
433 }
434}
435
436
437
438
439
440
441static void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked)
442{
443 int node;
444 int v;
445
446 ice_for_each_vsi(pf, v)
447 if (pf->vsi[v])
448 ice_dis_vsi(pf->vsi[v], locked);
449
450 for (node = 0; node < ICE_MAX_PF_AGG_NODES; node++)
451 pf->pf_agg_node[node].num_vsis = 0;
452
453 for (node = 0; node < ICE_MAX_VF_AGG_NODES; node++)
454 pf->vf_agg_node[node].num_vsis = 0;
455}
456
457
458
459
460
461
462
463static void
464ice_prepare_for_reset(struct ice_pf *pf)
465{
466 struct ice_hw *hw = &pf->hw;
467 unsigned int i;
468
469
470 if (test_bit(ICE_PREPARED_FOR_RESET, pf->state))
471 return;
472
473 ice_unplug_aux_dev(pf);
474
475
476 if (ice_check_sq_alive(hw, &hw->mailboxq))
477 ice_vc_notify_reset(pf);
478
479
480 ice_for_each_vf(pf, i)
481 ice_set_vf_state_qs_dis(&pf->vf[i]);
482
483
484 ice_clear_hw_tbls(hw);
485
486 ice_pf_dis_all_vsi(pf, false);
487
488 if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags))
489 ice_ptp_release(pf);
490
491 if (hw->port_info)
492 ice_sched_clear_port(hw->port_info);
493
494 ice_shutdown_all_ctrlq(hw);
495
496 set_bit(ICE_PREPARED_FOR_RESET, pf->state);
497}
498
499
500
501
502
503
504
505static void ice_do_reset(struct ice_pf *pf, enum ice_reset_req reset_type)
506{
507 struct device *dev = ice_pf_to_dev(pf);
508 struct ice_hw *hw = &pf->hw;
509
510 dev_dbg(dev, "reset_type 0x%x requested\n", reset_type);
511
512 ice_prepare_for_reset(pf);
513
514
515 if (ice_reset(hw, reset_type)) {
516 dev_err(dev, "reset %d failed\n", reset_type);
517 set_bit(ICE_RESET_FAILED, pf->state);
518 clear_bit(ICE_RESET_OICR_RECV, pf->state);
519 clear_bit(ICE_PREPARED_FOR_RESET, pf->state);
520 clear_bit(ICE_PFR_REQ, pf->state);
521 clear_bit(ICE_CORER_REQ, pf->state);
522 clear_bit(ICE_GLOBR_REQ, pf->state);
523 wake_up(&pf->reset_wait_queue);
524 return;
525 }
526
527
528
529
530
531 if (reset_type == ICE_RESET_PFR) {
532 pf->pfr_count++;
533 ice_rebuild(pf, reset_type);
534 clear_bit(ICE_PREPARED_FOR_RESET, pf->state);
535 clear_bit(ICE_PFR_REQ, pf->state);
536 wake_up(&pf->reset_wait_queue);
537 ice_reset_all_vfs(pf, true);
538 }
539}
540
541
542
543
544
545static void ice_reset_subtask(struct ice_pf *pf)
546{
547 enum ice_reset_req reset_type = ICE_RESET_INVAL;
548
549
550
551
552
553
554
555
556
557
558
559 if (test_bit(ICE_RESET_OICR_RECV, pf->state)) {
560
561 if (test_and_clear_bit(ICE_CORER_RECV, pf->state))
562 reset_type = ICE_RESET_CORER;
563 if (test_and_clear_bit(ICE_GLOBR_RECV, pf->state))
564 reset_type = ICE_RESET_GLOBR;
565 if (test_and_clear_bit(ICE_EMPR_RECV, pf->state))
566 reset_type = ICE_RESET_EMPR;
567
568 if (reset_type == ICE_RESET_INVAL)
569 return;
570 ice_prepare_for_reset(pf);
571
572
573 if (ice_check_reset(&pf->hw)) {
574 set_bit(ICE_RESET_FAILED, pf->state);
575 } else {
576
577 pf->hw.reset_ongoing = false;
578 ice_rebuild(pf, reset_type);
579
580
581
582 clear_bit(ICE_RESET_OICR_RECV, pf->state);
583 clear_bit(ICE_PREPARED_FOR_RESET, pf->state);
584 clear_bit(ICE_PFR_REQ, pf->state);
585 clear_bit(ICE_CORER_REQ, pf->state);
586 clear_bit(ICE_GLOBR_REQ, pf->state);
587 wake_up(&pf->reset_wait_queue);
588 ice_reset_all_vfs(pf, true);
589 }
590
591 return;
592 }
593
594
595 if (test_bit(ICE_PFR_REQ, pf->state))
596 reset_type = ICE_RESET_PFR;
597 if (test_bit(ICE_CORER_REQ, pf->state))
598 reset_type = ICE_RESET_CORER;
599 if (test_bit(ICE_GLOBR_REQ, pf->state))
600 reset_type = ICE_RESET_GLOBR;
601
602 if (reset_type == ICE_RESET_INVAL)
603 return;
604
605
606 if (!test_bit(ICE_DOWN, pf->state) &&
607 !test_bit(ICE_CFG_BUSY, pf->state)) {
608 ice_do_reset(pf, reset_type);
609 }
610}
611
612
613
614
615
616static void ice_print_topo_conflict(struct ice_vsi *vsi)
617{
618 switch (vsi->port_info->phy.link_info.topo_media_conflict) {
619 case ICE_AQ_LINK_TOPO_CONFLICT:
620 case ICE_AQ_LINK_MEDIA_CONFLICT:
621 case ICE_AQ_LINK_TOPO_UNREACH_PRT:
622 case ICE_AQ_LINK_TOPO_UNDRUTIL_PRT:
623 case ICE_AQ_LINK_TOPO_UNDRUTIL_MEDIA:
624 netdev_info(vsi->netdev, "Potential misconfiguration of the Ethernet port detected. If it was not intended, please use the Intel (R) Ethernet Port Configuration Tool to address the issue.\n");
625 break;
626 case ICE_AQ_LINK_TOPO_UNSUPP_MEDIA:
627 netdev_info(vsi->netdev, "Rx/Tx is disabled on this device because an unsupported module type was detected. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
628 break;
629 default:
630 break;
631 }
632}
633
634
635
636
637
638
639void ice_print_link_msg(struct ice_vsi *vsi, bool isup)
640{
641 struct ice_aqc_get_phy_caps_data *caps;
642 const char *an_advertised;
643 enum ice_status status;
644 const char *fec_req;
645 const char *speed;
646 const char *fec;
647 const char *fc;
648 const char *an;
649
650 if (!vsi)
651 return;
652
653 if (vsi->current_isup == isup)
654 return;
655
656 vsi->current_isup = isup;
657
658 if (!isup) {
659 netdev_info(vsi->netdev, "NIC Link is Down\n");
660 return;
661 }
662
663 switch (vsi->port_info->phy.link_info.link_speed) {
664 case ICE_AQ_LINK_SPEED_100GB:
665 speed = "100 G";
666 break;
667 case ICE_AQ_LINK_SPEED_50GB:
668 speed = "50 G";
669 break;
670 case ICE_AQ_LINK_SPEED_40GB:
671 speed = "40 G";
672 break;
673 case ICE_AQ_LINK_SPEED_25GB:
674 speed = "25 G";
675 break;
676 case ICE_AQ_LINK_SPEED_20GB:
677 speed = "20 G";
678 break;
679 case ICE_AQ_LINK_SPEED_10GB:
680 speed = "10 G";
681 break;
682 case ICE_AQ_LINK_SPEED_5GB:
683 speed = "5 G";
684 break;
685 case ICE_AQ_LINK_SPEED_2500MB:
686 speed = "2.5 G";
687 break;
688 case ICE_AQ_LINK_SPEED_1000MB:
689 speed = "1 G";
690 break;
691 case ICE_AQ_LINK_SPEED_100MB:
692 speed = "100 M";
693 break;
694 default:
695 speed = "Unknown ";
696 break;
697 }
698
699 switch (vsi->port_info->fc.current_mode) {
700 case ICE_FC_FULL:
701 fc = "Rx/Tx";
702 break;
703 case ICE_FC_TX_PAUSE:
704 fc = "Tx";
705 break;
706 case ICE_FC_RX_PAUSE:
707 fc = "Rx";
708 break;
709 case ICE_FC_NONE:
710 fc = "None";
711 break;
712 default:
713 fc = "Unknown";
714 break;
715 }
716
717
718 switch (vsi->port_info->phy.link_info.fec_info) {
719 case ICE_AQ_LINK_25G_RS_528_FEC_EN:
720 case ICE_AQ_LINK_25G_RS_544_FEC_EN:
721 fec = "RS-FEC";
722 break;
723 case ICE_AQ_LINK_25G_KR_FEC_EN:
724 fec = "FC-FEC/BASE-R";
725 break;
726 default:
727 fec = "NONE";
728 break;
729 }
730
731
732 if (vsi->port_info->phy.link_info.an_info & ICE_AQ_AN_COMPLETED)
733 an = "True";
734 else
735 an = "False";
736
737
738 caps = kzalloc(sizeof(*caps), GFP_KERNEL);
739 if (!caps) {
740 fec_req = "Unknown";
741 an_advertised = "Unknown";
742 goto done;
743 }
744
745 status = ice_aq_get_phy_caps(vsi->port_info, false,
746 ICE_AQC_REPORT_ACTIVE_CFG, caps, NULL);
747 if (status)
748 netdev_info(vsi->netdev, "Get phy capability failed.\n");
749
750 an_advertised = ice_is_phy_caps_an_enabled(caps) ? "On" : "Off";
751
752 if (caps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_528_REQ ||
753 caps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_544_REQ)
754 fec_req = "RS-FEC";
755 else if (caps->link_fec_options & ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ ||
756 caps->link_fec_options & ICE_AQC_PHY_FEC_25G_KR_REQ)
757 fec_req = "FC-FEC/BASE-R";
758 else
759 fec_req = "NONE";
760
761 kfree(caps);
762
763done:
764 netdev_info(vsi->netdev, "NIC Link is up %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg Advertised: %s, Autoneg Negotiated: %s, Flow Control: %s\n",
765 speed, fec_req, fec, an_advertised, an, fc);
766 ice_print_topo_conflict(vsi);
767}
768
769
770
771
772
773
774static void ice_vsi_link_event(struct ice_vsi *vsi, bool link_up)
775{
776 if (!vsi)
777 return;
778
779 if (test_bit(ICE_VSI_DOWN, vsi->state) || !vsi->netdev)
780 return;
781
782 if (vsi->type == ICE_VSI_PF) {
783 if (link_up == netif_carrier_ok(vsi->netdev))
784 return;
785
786 if (link_up) {
787 netif_carrier_on(vsi->netdev);
788 netif_tx_wake_all_queues(vsi->netdev);
789 } else {
790 netif_carrier_off(vsi->netdev);
791 netif_tx_stop_all_queues(vsi->netdev);
792 }
793 }
794}
795
796
797
798
799
800
801
802
803
804
805
806
807static void ice_set_dflt_mib(struct ice_pf *pf)
808{
809 struct device *dev = ice_pf_to_dev(pf);
810 u8 mib_type, *buf, *lldpmib = NULL;
811 u16 len, typelen, offset = 0;
812 struct ice_lldp_org_tlv *tlv;
813 struct ice_hw *hw = &pf->hw;
814 u32 ouisubtype;
815
816 mib_type = SET_LOCAL_MIB_TYPE_LOCAL_MIB;
817 lldpmib = kzalloc(ICE_LLDPDU_SIZE, GFP_KERNEL);
818 if (!lldpmib) {
819 dev_dbg(dev, "%s Failed to allocate MIB memory\n",
820 __func__);
821 return;
822 }
823
824
825 tlv = (struct ice_lldp_org_tlv *)lldpmib;
826 typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
827 ICE_IEEE_ETS_TLV_LEN);
828 tlv->typelen = htons(typelen);
829 ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
830 ICE_IEEE_SUBTYPE_ETS_CFG);
831 tlv->ouisubtype = htonl(ouisubtype);
832
833 buf = tlv->tlvinfo;
834 buf[0] = 0;
835
836
837
838
839
840 buf[5] = 0x64;
841 len = (typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S;
842 offset += len + 2;
843 tlv = (struct ice_lldp_org_tlv *)
844 ((char *)tlv + sizeof(tlv->typelen) + len);
845
846
847 buf = tlv->tlvinfo;
848 tlv->typelen = htons(typelen);
849
850 ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
851 ICE_IEEE_SUBTYPE_ETS_REC);
852 tlv->ouisubtype = htonl(ouisubtype);
853
854
855
856
857
858
859 buf[5] = 0x64;
860 offset += len + 2;
861 tlv = (struct ice_lldp_org_tlv *)
862 ((char *)tlv + sizeof(tlv->typelen) + len);
863
864
865 typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
866 ICE_IEEE_PFC_TLV_LEN);
867 tlv->typelen = htons(typelen);
868
869 ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
870 ICE_IEEE_SUBTYPE_PFC_CFG);
871 tlv->ouisubtype = htonl(ouisubtype);
872
873
874 buf[0] = 0x08;
875 len = (typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S;
876 offset += len + 2;
877
878 if (ice_aq_set_lldp_mib(hw, mib_type, (void *)lldpmib, offset, NULL))
879 dev_dbg(dev, "%s Failed to set default LLDP MIB\n", __func__);
880
881 kfree(lldpmib);
882}
883
884
885
886
887
888
889
890
891
892static void ice_check_module_power(struct ice_pf *pf, u8 link_cfg_err)
893{
894
895 if (!(link_cfg_err & (ICE_AQ_LINK_INVAL_MAX_POWER_LIMIT |
896 ICE_AQ_LINK_MODULE_POWER_UNSUPPORTED))) {
897 clear_bit(ICE_FLAG_MOD_POWER_UNSUPPORTED, pf->flags);
898 return;
899 }
900
901
902
903
904 if (test_bit(ICE_FLAG_MOD_POWER_UNSUPPORTED, pf->flags))
905 return;
906
907 if (link_cfg_err & ICE_AQ_LINK_INVAL_MAX_POWER_LIMIT) {
908 dev_err(ice_pf_to_dev(pf), "The installed module is incompatible with the device's NVM image. Cannot start link\n");
909 set_bit(ICE_FLAG_MOD_POWER_UNSUPPORTED, pf->flags);
910 } else if (link_cfg_err & ICE_AQ_LINK_MODULE_POWER_UNSUPPORTED) {
911 dev_err(ice_pf_to_dev(pf), "The module's power requirements exceed the device's power supply. Cannot start link\n");
912 set_bit(ICE_FLAG_MOD_POWER_UNSUPPORTED, pf->flags);
913 }
914}
915
916
917
918
919
920
921
922
923
924
925static int
926ice_link_event(struct ice_pf *pf, struct ice_port_info *pi, bool link_up,
927 u16 link_speed)
928{
929 struct device *dev = ice_pf_to_dev(pf);
930 struct ice_phy_info *phy_info;
931 enum ice_status status;
932 struct ice_vsi *vsi;
933 u16 old_link_speed;
934 bool old_link;
935
936 phy_info = &pi->phy;
937 phy_info->link_info_old = phy_info->link_info;
938
939 old_link = !!(phy_info->link_info_old.link_info & ICE_AQ_LINK_UP);
940 old_link_speed = phy_info->link_info_old.link_speed;
941
942
943
944
945 status = ice_update_link_info(pi);
946 if (status)
947 dev_dbg(dev, "Failed to update link status on port %d, err %s aq_err %s\n",
948 pi->lport, ice_stat_str(status),
949 ice_aq_str(pi->hw->adminq.sq_last_status));
950
951 ice_check_module_power(pf, pi->phy.link_info.link_cfg_err);
952
953
954
955
956 if (phy_info->link_info.link_info & ICE_AQ_LINK_UP)
957 link_up = true;
958
959 vsi = ice_get_main_vsi(pf);
960 if (!vsi || !vsi->port_info)
961 return -EINVAL;
962
963
964 if (!test_bit(ICE_FLAG_NO_MEDIA, pf->flags) &&
965 !(pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE)) {
966 set_bit(ICE_FLAG_NO_MEDIA, pf->flags);
967 ice_set_link(vsi, false);
968 }
969
970
971 if (link_up == old_link && link_speed == old_link_speed)
972 return 0;
973
974 if (ice_is_dcb_active(pf)) {
975 if (test_bit(ICE_FLAG_DCB_ENA, pf->flags))
976 ice_dcb_rebuild(pf);
977 } else {
978 if (link_up)
979 ice_set_dflt_mib(pf);
980 }
981 ice_vsi_link_event(vsi, link_up);
982 ice_print_link_msg(vsi, link_up);
983
984 ice_vc_notify_link_state(pf);
985
986 return 0;
987}
988
989
990
991
992
993static void ice_watchdog_subtask(struct ice_pf *pf)
994{
995 int i;
996
997
998 if (test_bit(ICE_DOWN, pf->state) ||
999 test_bit(ICE_CFG_BUSY, pf->state))
1000 return;
1001
1002
1003 if (time_before(jiffies,
1004 pf->serv_tmr_prev + pf->serv_tmr_period))
1005 return;
1006
1007 pf->serv_tmr_prev = jiffies;
1008
1009
1010
1011
1012 ice_update_pf_stats(pf);
1013 ice_for_each_vsi(pf, i)
1014 if (pf->vsi[i] && pf->vsi[i]->netdev)
1015 ice_update_vsi_stats(pf->vsi[i]);
1016}
1017
1018
1019
1020
1021
1022
1023
1024static int ice_init_link_events(struct ice_port_info *pi)
1025{
1026 u16 mask;
1027
1028 mask = ~((u16)(ICE_AQ_LINK_EVENT_UPDOWN | ICE_AQ_LINK_EVENT_MEDIA_NA |
1029 ICE_AQ_LINK_EVENT_MODULE_QUAL_FAIL));
1030
1031 if (ice_aq_set_event_mask(pi->hw, pi->lport, mask, NULL)) {
1032 dev_dbg(ice_hw_to_dev(pi->hw), "Failed to set link event mask for port %d\n",
1033 pi->lport);
1034 return -EIO;
1035 }
1036
1037 if (ice_aq_get_link_info(pi, true, NULL, NULL)) {
1038 dev_dbg(ice_hw_to_dev(pi->hw), "Failed to enable link events for port %d\n",
1039 pi->lport);
1040 return -EIO;
1041 }
1042
1043 return 0;
1044}
1045
1046
1047
1048
1049
1050
1051static int
1052ice_handle_link_event(struct ice_pf *pf, struct ice_rq_event_info *event)
1053{
1054 struct ice_aqc_get_link_status_data *link_data;
1055 struct ice_port_info *port_info;
1056 int status;
1057
1058 link_data = (struct ice_aqc_get_link_status_data *)event->msg_buf;
1059 port_info = pf->hw.port_info;
1060 if (!port_info)
1061 return -EINVAL;
1062
1063 status = ice_link_event(pf, port_info,
1064 !!(link_data->link_info & ICE_AQ_LINK_UP),
1065 le16_to_cpu(link_data->link_speed));
1066 if (status)
1067 dev_dbg(ice_pf_to_dev(pf), "Could not process link event, error %d\n",
1068 status);
1069
1070 return status;
1071}
1072
1073enum ice_aq_task_state {
1074 ICE_AQ_TASK_WAITING = 0,
1075 ICE_AQ_TASK_COMPLETE,
1076 ICE_AQ_TASK_CANCELED,
1077};
1078
1079struct ice_aq_task {
1080 struct hlist_node entry;
1081
1082 u16 opcode;
1083 struct ice_rq_event_info *event;
1084 enum ice_aq_task_state state;
1085};
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
1105 struct ice_rq_event_info *event)
1106{
1107 struct device *dev = ice_pf_to_dev(pf);
1108 struct ice_aq_task *task;
1109 unsigned long start;
1110 long ret;
1111 int err;
1112
1113 task = kzalloc(sizeof(*task), GFP_KERNEL);
1114 if (!task)
1115 return -ENOMEM;
1116
1117 INIT_HLIST_NODE(&task->entry);
1118 task->opcode = opcode;
1119 task->event = event;
1120 task->state = ICE_AQ_TASK_WAITING;
1121
1122 spin_lock_bh(&pf->aq_wait_lock);
1123 hlist_add_head(&task->entry, &pf->aq_wait_list);
1124 spin_unlock_bh(&pf->aq_wait_lock);
1125
1126 start = jiffies;
1127
1128 ret = wait_event_interruptible_timeout(pf->aq_wait_queue, task->state,
1129 timeout);
1130 switch (task->state) {
1131 case ICE_AQ_TASK_WAITING:
1132 err = ret < 0 ? ret : -ETIMEDOUT;
1133 break;
1134 case ICE_AQ_TASK_CANCELED:
1135 err = ret < 0 ? ret : -ECANCELED;
1136 break;
1137 case ICE_AQ_TASK_COMPLETE:
1138 err = ret < 0 ? ret : 0;
1139 break;
1140 default:
1141 WARN(1, "Unexpected AdminQ wait task state %u", task->state);
1142 err = -EINVAL;
1143 break;
1144 }
1145
1146 dev_dbg(dev, "Waited %u msecs (max %u msecs) for firmware response to op 0x%04x\n",
1147 jiffies_to_msecs(jiffies - start),
1148 jiffies_to_msecs(timeout),
1149 opcode);
1150
1151 spin_lock_bh(&pf->aq_wait_lock);
1152 hlist_del(&task->entry);
1153 spin_unlock_bh(&pf->aq_wait_lock);
1154 kfree(task);
1155
1156 return err;
1157}
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177static void ice_aq_check_events(struct ice_pf *pf, u16 opcode,
1178 struct ice_rq_event_info *event)
1179{
1180 struct ice_aq_task *task;
1181 bool found = false;
1182
1183 spin_lock_bh(&pf->aq_wait_lock);
1184 hlist_for_each_entry(task, &pf->aq_wait_list, entry) {
1185 if (task->state || task->opcode != opcode)
1186 continue;
1187
1188 memcpy(&task->event->desc, &event->desc, sizeof(event->desc));
1189 task->event->msg_len = event->msg_len;
1190
1191
1192 if (task->event->msg_buf &&
1193 task->event->buf_len > event->buf_len) {
1194 memcpy(task->event->msg_buf, event->msg_buf,
1195 event->buf_len);
1196 task->event->buf_len = event->buf_len;
1197 }
1198
1199 task->state = ICE_AQ_TASK_COMPLETE;
1200 found = true;
1201 }
1202 spin_unlock_bh(&pf->aq_wait_lock);
1203
1204 if (found)
1205 wake_up(&pf->aq_wait_queue);
1206}
1207
1208
1209
1210
1211
1212
1213
1214
1215static void ice_aq_cancel_waiting_tasks(struct ice_pf *pf)
1216{
1217 struct ice_aq_task *task;
1218
1219 spin_lock_bh(&pf->aq_wait_lock);
1220 hlist_for_each_entry(task, &pf->aq_wait_list, entry)
1221 task->state = ICE_AQ_TASK_CANCELED;
1222 spin_unlock_bh(&pf->aq_wait_lock);
1223
1224 wake_up(&pf->aq_wait_queue);
1225}
1226
1227
1228
1229
1230
1231
1232static int __ice_clean_ctrlq(struct ice_pf *pf, enum ice_ctl_q q_type)
1233{
1234 struct device *dev = ice_pf_to_dev(pf);
1235 struct ice_rq_event_info event;
1236 struct ice_hw *hw = &pf->hw;
1237 struct ice_ctl_q_info *cq;
1238 u16 pending, i = 0;
1239 const char *qtype;
1240 u32 oldval, val;
1241
1242
1243 if (test_bit(ICE_RESET_FAILED, pf->state))
1244 return 0;
1245
1246 switch (q_type) {
1247 case ICE_CTL_Q_ADMIN:
1248 cq = &hw->adminq;
1249 qtype = "Admin";
1250 break;
1251 case ICE_CTL_Q_SB:
1252 cq = &hw->sbq;
1253 qtype = "Sideband";
1254 break;
1255 case ICE_CTL_Q_MAILBOX:
1256 cq = &hw->mailboxq;
1257 qtype = "Mailbox";
1258
1259
1260
1261 hw->mbx_snapshot.mbx_buf.state = ICE_MAL_VF_DETECT_STATE_NEW_SNAPSHOT;
1262 break;
1263 default:
1264 dev_warn(dev, "Unknown control queue type 0x%x\n", q_type);
1265 return 0;
1266 }
1267
1268
1269
1270
1271 val = rd32(hw, cq->rq.len);
1272 if (val & (PF_FW_ARQLEN_ARQVFE_M | PF_FW_ARQLEN_ARQOVFL_M |
1273 PF_FW_ARQLEN_ARQCRIT_M)) {
1274 oldval = val;
1275 if (val & PF_FW_ARQLEN_ARQVFE_M)
1276 dev_dbg(dev, "%s Receive Queue VF Error detected\n",
1277 qtype);
1278 if (val & PF_FW_ARQLEN_ARQOVFL_M) {
1279 dev_dbg(dev, "%s Receive Queue Overflow Error detected\n",
1280 qtype);
1281 }
1282 if (val & PF_FW_ARQLEN_ARQCRIT_M)
1283 dev_dbg(dev, "%s Receive Queue Critical Error detected\n",
1284 qtype);
1285 val &= ~(PF_FW_ARQLEN_ARQVFE_M | PF_FW_ARQLEN_ARQOVFL_M |
1286 PF_FW_ARQLEN_ARQCRIT_M);
1287 if (oldval != val)
1288 wr32(hw, cq->rq.len, val);
1289 }
1290
1291 val = rd32(hw, cq->sq.len);
1292 if (val & (PF_FW_ATQLEN_ATQVFE_M | PF_FW_ATQLEN_ATQOVFL_M |
1293 PF_FW_ATQLEN_ATQCRIT_M)) {
1294 oldval = val;
1295 if (val & PF_FW_ATQLEN_ATQVFE_M)
1296 dev_dbg(dev, "%s Send Queue VF Error detected\n",
1297 qtype);
1298 if (val & PF_FW_ATQLEN_ATQOVFL_M) {
1299 dev_dbg(dev, "%s Send Queue Overflow Error detected\n",
1300 qtype);
1301 }
1302 if (val & PF_FW_ATQLEN_ATQCRIT_M)
1303 dev_dbg(dev, "%s Send Queue Critical Error detected\n",
1304 qtype);
1305 val &= ~(PF_FW_ATQLEN_ATQVFE_M | PF_FW_ATQLEN_ATQOVFL_M |
1306 PF_FW_ATQLEN_ATQCRIT_M);
1307 if (oldval != val)
1308 wr32(hw, cq->sq.len, val);
1309 }
1310
1311 event.buf_len = cq->rq_buf_size;
1312 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
1313 if (!event.msg_buf)
1314 return 0;
1315
1316 do {
1317 enum ice_status ret;
1318 u16 opcode;
1319
1320 ret = ice_clean_rq_elem(hw, cq, &event, &pending);
1321 if (ret == ICE_ERR_AQ_NO_WORK)
1322 break;
1323 if (ret) {
1324 dev_err(dev, "%s Receive Queue event error %s\n", qtype,
1325 ice_stat_str(ret));
1326 break;
1327 }
1328
1329 opcode = le16_to_cpu(event.desc.opcode);
1330
1331
1332 ice_aq_check_events(pf, opcode, &event);
1333
1334 switch (opcode) {
1335 case ice_aqc_opc_get_link_status:
1336 if (ice_handle_link_event(pf, &event))
1337 dev_err(dev, "Could not handle link event\n");
1338 break;
1339 case ice_aqc_opc_event_lan_overflow:
1340 ice_vf_lan_overflow_event(pf, &event);
1341 break;
1342 case ice_mbx_opc_send_msg_to_pf:
1343 if (!ice_is_malicious_vf(pf, &event, i, pending))
1344 ice_vc_process_vf_msg(pf, &event);
1345 break;
1346 case ice_aqc_opc_fw_logging:
1347 ice_output_fw_log(hw, &event.desc, event.msg_buf);
1348 break;
1349 case ice_aqc_opc_lldp_set_mib_change:
1350 ice_dcb_process_lldp_set_mib_change(pf, &event);
1351 break;
1352 default:
1353 dev_dbg(dev, "%s Receive Queue unknown event 0x%04x ignored\n",
1354 qtype, opcode);
1355 break;
1356 }
1357 } while (pending && (i++ < ICE_DFLT_IRQ_WORK));
1358
1359 kfree(event.msg_buf);
1360
1361 return pending && (i == ICE_DFLT_IRQ_WORK);
1362}
1363
1364
1365
1366
1367
1368
1369
1370
1371static bool ice_ctrlq_pending(struct ice_hw *hw, struct ice_ctl_q_info *cq)
1372{
1373 u16 ntu;
1374
1375 ntu = (u16)(rd32(hw, cq->rq.head) & cq->rq.head_mask);
1376 return cq->rq.next_to_clean != ntu;
1377}
1378
1379
1380
1381
1382
1383static void ice_clean_adminq_subtask(struct ice_pf *pf)
1384{
1385 struct ice_hw *hw = &pf->hw;
1386
1387 if (!test_bit(ICE_ADMINQ_EVENT_PENDING, pf->state))
1388 return;
1389
1390 if (__ice_clean_ctrlq(pf, ICE_CTL_Q_ADMIN))
1391 return;
1392
1393 clear_bit(ICE_ADMINQ_EVENT_PENDING, pf->state);
1394
1395
1396
1397
1398
1399
1400 if (ice_ctrlq_pending(hw, &hw->adminq))
1401 __ice_clean_ctrlq(pf, ICE_CTL_Q_ADMIN);
1402
1403 ice_flush(hw);
1404}
1405
1406
1407
1408
1409
1410static void ice_clean_mailboxq_subtask(struct ice_pf *pf)
1411{
1412 struct ice_hw *hw = &pf->hw;
1413
1414 if (!test_bit(ICE_MAILBOXQ_EVENT_PENDING, pf->state))
1415 return;
1416
1417 if (__ice_clean_ctrlq(pf, ICE_CTL_Q_MAILBOX))
1418 return;
1419
1420 clear_bit(ICE_MAILBOXQ_EVENT_PENDING, pf->state);
1421
1422 if (ice_ctrlq_pending(hw, &hw->mailboxq))
1423 __ice_clean_ctrlq(pf, ICE_CTL_Q_MAILBOX);
1424
1425 ice_flush(hw);
1426}
1427
1428
1429
1430
1431
1432static void ice_clean_sbq_subtask(struct ice_pf *pf)
1433{
1434 struct ice_hw *hw = &pf->hw;
1435
1436
1437 if (!ice_is_sbq_supported(hw)) {
1438 clear_bit(ICE_SIDEBANDQ_EVENT_PENDING, pf->state);
1439 return;
1440 }
1441
1442 if (!test_bit(ICE_SIDEBANDQ_EVENT_PENDING, pf->state))
1443 return;
1444
1445 if (__ice_clean_ctrlq(pf, ICE_CTL_Q_SB))
1446 return;
1447
1448 clear_bit(ICE_SIDEBANDQ_EVENT_PENDING, pf->state);
1449
1450 if (ice_ctrlq_pending(hw, &hw->sbq))
1451 __ice_clean_ctrlq(pf, ICE_CTL_Q_SB);
1452
1453 ice_flush(hw);
1454}
1455
1456
1457
1458
1459
1460
1461
1462void ice_service_task_schedule(struct ice_pf *pf)
1463{
1464 if (!test_bit(ICE_SERVICE_DIS, pf->state) &&
1465 !test_and_set_bit(ICE_SERVICE_SCHED, pf->state) &&
1466 !test_bit(ICE_NEEDS_RESTART, pf->state))
1467 queue_work(ice_wq, &pf->serv_task);
1468}
1469
1470
1471
1472
1473
1474static void ice_service_task_complete(struct ice_pf *pf)
1475{
1476 WARN_ON(!test_bit(ICE_SERVICE_SCHED, pf->state));
1477
1478
1479 smp_mb__before_atomic();
1480 clear_bit(ICE_SERVICE_SCHED, pf->state);
1481}
1482
1483
1484
1485
1486
1487
1488
1489
1490static int ice_service_task_stop(struct ice_pf *pf)
1491{
1492 int ret;
1493
1494 ret = test_and_set_bit(ICE_SERVICE_DIS, pf->state);
1495
1496 if (pf->serv_tmr.function)
1497 del_timer_sync(&pf->serv_tmr);
1498 if (pf->serv_task.func)
1499 cancel_work_sync(&pf->serv_task);
1500
1501 clear_bit(ICE_SERVICE_SCHED, pf->state);
1502 return ret;
1503}
1504
1505
1506
1507
1508
1509
1510
1511static void ice_service_task_restart(struct ice_pf *pf)
1512{
1513 clear_bit(ICE_SERVICE_DIS, pf->state);
1514 ice_service_task_schedule(pf);
1515}
1516
1517
1518
1519
1520
1521static void ice_service_timer(struct timer_list *t)
1522{
1523 struct ice_pf *pf = from_timer(pf, t, serv_tmr);
1524
1525 mod_timer(&pf->serv_tmr, round_jiffies(pf->serv_tmr_period + jiffies));
1526 ice_service_task_schedule(pf);
1527}
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539static void ice_handle_mdd_event(struct ice_pf *pf)
1540{
1541 struct device *dev = ice_pf_to_dev(pf);
1542 struct ice_hw *hw = &pf->hw;
1543 unsigned int i;
1544 u32 reg;
1545
1546 if (!test_and_clear_bit(ICE_MDD_EVENT_PENDING, pf->state)) {
1547
1548
1549
1550 ice_print_vfs_mdd_events(pf);
1551 return;
1552 }
1553
1554
1555 reg = rd32(hw, GL_MDET_TX_PQM);
1556 if (reg & GL_MDET_TX_PQM_VALID_M) {
1557 u8 pf_num = (reg & GL_MDET_TX_PQM_PF_NUM_M) >>
1558 GL_MDET_TX_PQM_PF_NUM_S;
1559 u16 vf_num = (reg & GL_MDET_TX_PQM_VF_NUM_M) >>
1560 GL_MDET_TX_PQM_VF_NUM_S;
1561 u8 event = (reg & GL_MDET_TX_PQM_MAL_TYPE_M) >>
1562 GL_MDET_TX_PQM_MAL_TYPE_S;
1563 u16 queue = ((reg & GL_MDET_TX_PQM_QNUM_M) >>
1564 GL_MDET_TX_PQM_QNUM_S);
1565
1566 if (netif_msg_tx_err(pf))
1567 dev_info(dev, "Malicious Driver Detection event %d on TX queue %d PF# %d VF# %d\n",
1568 event, queue, pf_num, vf_num);
1569 wr32(hw, GL_MDET_TX_PQM, 0xffffffff);
1570 }
1571
1572 reg = rd32(hw, GL_MDET_TX_TCLAN);
1573 if (reg & GL_MDET_TX_TCLAN_VALID_M) {
1574 u8 pf_num = (reg & GL_MDET_TX_TCLAN_PF_NUM_M) >>
1575 GL_MDET_TX_TCLAN_PF_NUM_S;
1576 u16 vf_num = (reg & GL_MDET_TX_TCLAN_VF_NUM_M) >>
1577 GL_MDET_TX_TCLAN_VF_NUM_S;
1578 u8 event = (reg & GL_MDET_TX_TCLAN_MAL_TYPE_M) >>
1579 GL_MDET_TX_TCLAN_MAL_TYPE_S;
1580 u16 queue = ((reg & GL_MDET_TX_TCLAN_QNUM_M) >>
1581 GL_MDET_TX_TCLAN_QNUM_S);
1582
1583 if (netif_msg_tx_err(pf))
1584 dev_info(dev, "Malicious Driver Detection event %d on TX queue %d PF# %d VF# %d\n",
1585 event, queue, pf_num, vf_num);
1586 wr32(hw, GL_MDET_TX_TCLAN, 0xffffffff);
1587 }
1588
1589 reg = rd32(hw, GL_MDET_RX);
1590 if (reg & GL_MDET_RX_VALID_M) {
1591 u8 pf_num = (reg & GL_MDET_RX_PF_NUM_M) >>
1592 GL_MDET_RX_PF_NUM_S;
1593 u16 vf_num = (reg & GL_MDET_RX_VF_NUM_M) >>
1594 GL_MDET_RX_VF_NUM_S;
1595 u8 event = (reg & GL_MDET_RX_MAL_TYPE_M) >>
1596 GL_MDET_RX_MAL_TYPE_S;
1597 u16 queue = ((reg & GL_MDET_RX_QNUM_M) >>
1598 GL_MDET_RX_QNUM_S);
1599
1600 if (netif_msg_rx_err(pf))
1601 dev_info(dev, "Malicious Driver Detection event %d on RX queue %d PF# %d VF# %d\n",
1602 event, queue, pf_num, vf_num);
1603 wr32(hw, GL_MDET_RX, 0xffffffff);
1604 }
1605
1606
1607 reg = rd32(hw, PF_MDET_TX_PQM);
1608 if (reg & PF_MDET_TX_PQM_VALID_M) {
1609 wr32(hw, PF_MDET_TX_PQM, 0xFFFF);
1610 if (netif_msg_tx_err(pf))
1611 dev_info(dev, "Malicious Driver Detection event TX_PQM detected on PF\n");
1612 }
1613
1614 reg = rd32(hw, PF_MDET_TX_TCLAN);
1615 if (reg & PF_MDET_TX_TCLAN_VALID_M) {
1616 wr32(hw, PF_MDET_TX_TCLAN, 0xFFFF);
1617 if (netif_msg_tx_err(pf))
1618 dev_info(dev, "Malicious Driver Detection event TX_TCLAN detected on PF\n");
1619 }
1620
1621 reg = rd32(hw, PF_MDET_RX);
1622 if (reg & PF_MDET_RX_VALID_M) {
1623 wr32(hw, PF_MDET_RX, 0xFFFF);
1624 if (netif_msg_rx_err(pf))
1625 dev_info(dev, "Malicious Driver Detection event RX detected on PF\n");
1626 }
1627
1628
1629
1630
1631 ice_for_each_vf(pf, i) {
1632 struct ice_vf *vf = &pf->vf[i];
1633
1634 reg = rd32(hw, VP_MDET_TX_PQM(i));
1635 if (reg & VP_MDET_TX_PQM_VALID_M) {
1636 wr32(hw, VP_MDET_TX_PQM(i), 0xFFFF);
1637 vf->mdd_tx_events.count++;
1638 set_bit(ICE_MDD_VF_PRINT_PENDING, pf->state);
1639 if (netif_msg_tx_err(pf))
1640 dev_info(dev, "Malicious Driver Detection event TX_PQM detected on VF %d\n",
1641 i);
1642 }
1643
1644 reg = rd32(hw, VP_MDET_TX_TCLAN(i));
1645 if (reg & VP_MDET_TX_TCLAN_VALID_M) {
1646 wr32(hw, VP_MDET_TX_TCLAN(i), 0xFFFF);
1647 vf->mdd_tx_events.count++;
1648 set_bit(ICE_MDD_VF_PRINT_PENDING, pf->state);
1649 if (netif_msg_tx_err(pf))
1650 dev_info(dev, "Malicious Driver Detection event TX_TCLAN detected on VF %d\n",
1651 i);
1652 }
1653
1654 reg = rd32(hw, VP_MDET_TX_TDPU(i));
1655 if (reg & VP_MDET_TX_TDPU_VALID_M) {
1656 wr32(hw, VP_MDET_TX_TDPU(i), 0xFFFF);
1657 vf->mdd_tx_events.count++;
1658 set_bit(ICE_MDD_VF_PRINT_PENDING, pf->state);
1659 if (netif_msg_tx_err(pf))
1660 dev_info(dev, "Malicious Driver Detection event TX_TDPU detected on VF %d\n",
1661 i);
1662 }
1663
1664 reg = rd32(hw, VP_MDET_RX(i));
1665 if (reg & VP_MDET_RX_VALID_M) {
1666 wr32(hw, VP_MDET_RX(i), 0xFFFF);
1667 vf->mdd_rx_events.count++;
1668 set_bit(ICE_MDD_VF_PRINT_PENDING, pf->state);
1669 if (netif_msg_rx_err(pf))
1670 dev_info(dev, "Malicious Driver Detection event RX detected on VF %d\n",
1671 i);
1672
1673
1674
1675
1676
1677 if (test_bit(ICE_FLAG_MDD_AUTO_RESET_VF, pf->flags)) {
1678
1679
1680
1681 ice_print_vf_rx_mdd_event(vf);
1682 ice_reset_vf(&pf->vf[i], false);
1683 }
1684 }
1685 }
1686
1687 ice_print_vfs_mdd_events(pf);
1688}
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702static int ice_force_phys_link_state(struct ice_vsi *vsi, bool link_up)
1703{
1704 struct ice_aqc_get_phy_caps_data *pcaps;
1705 struct ice_aqc_set_phy_cfg_data *cfg;
1706 struct ice_port_info *pi;
1707 struct device *dev;
1708 int retcode;
1709
1710 if (!vsi || !vsi->port_info || !vsi->back)
1711 return -EINVAL;
1712 if (vsi->type != ICE_VSI_PF)
1713 return 0;
1714
1715 dev = ice_pf_to_dev(vsi->back);
1716
1717 pi = vsi->port_info;
1718
1719 pcaps = kzalloc(sizeof(*pcaps), GFP_KERNEL);
1720 if (!pcaps)
1721 return -ENOMEM;
1722
1723 retcode = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_ACTIVE_CFG, pcaps,
1724 NULL);
1725 if (retcode) {
1726 dev_err(dev, "Failed to get phy capabilities, VSI %d error %d\n",
1727 vsi->vsi_num, retcode);
1728 retcode = -EIO;
1729 goto out;
1730 }
1731
1732
1733 if (link_up == !!(pcaps->caps & ICE_AQC_PHY_EN_LINK) &&
1734 link_up == !!(pi->phy.link_info.link_info & ICE_AQ_LINK_UP))
1735 goto out;
1736
1737
1738
1739
1740
1741 cfg = kmemdup(&pi->phy.curr_user_phy_cfg, sizeof(*cfg), GFP_KERNEL);
1742 if (!cfg) {
1743 retcode = -ENOMEM;
1744 goto out;
1745 }
1746
1747 cfg->caps |= ICE_AQ_PHY_ENA_AUTO_LINK_UPDT;
1748 if (link_up)
1749 cfg->caps |= ICE_AQ_PHY_ENA_LINK;
1750 else
1751 cfg->caps &= ~ICE_AQ_PHY_ENA_LINK;
1752
1753 retcode = ice_aq_set_phy_cfg(&vsi->back->hw, pi, cfg, NULL);
1754 if (retcode) {
1755 dev_err(dev, "Failed to set phy config, VSI %d error %d\n",
1756 vsi->vsi_num, retcode);
1757 retcode = -EIO;
1758 }
1759
1760 kfree(cfg);
1761out:
1762 kfree(pcaps);
1763 return retcode;
1764}
1765
1766
1767
1768
1769
1770
1771
1772static int ice_init_nvm_phy_type(struct ice_port_info *pi)
1773{
1774 struct ice_aqc_get_phy_caps_data *pcaps;
1775 struct ice_pf *pf = pi->hw->back;
1776 enum ice_status status;
1777 int err = 0;
1778
1779 pcaps = kzalloc(sizeof(*pcaps), GFP_KERNEL);
1780 if (!pcaps)
1781 return -ENOMEM;
1782
1783 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP_NO_MEDIA, pcaps,
1784 NULL);
1785
1786 if (status) {
1787 dev_err(ice_pf_to_dev(pf), "Get PHY capability failed.\n");
1788 err = -EIO;
1789 goto out;
1790 }
1791
1792 pf->nvm_phy_type_hi = pcaps->phy_type_high;
1793 pf->nvm_phy_type_lo = pcaps->phy_type_low;
1794
1795out:
1796 kfree(pcaps);
1797 return err;
1798}
1799
1800
1801
1802
1803
1804
1805
1806static void ice_init_link_dflt_override(struct ice_port_info *pi)
1807{
1808 struct ice_link_default_override_tlv *ldo;
1809 struct ice_pf *pf = pi->hw->back;
1810
1811 ldo = &pf->link_dflt_override;
1812 if (ice_get_link_default_override(ldo, pi))
1813 return;
1814
1815 if (!(ldo->options & ICE_LINK_OVERRIDE_PORT_DIS))
1816 return;
1817
1818
1819
1820
1821 set_bit(ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, pf->flags);
1822 set_bit(ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, pf->flags);
1823}
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842static void ice_init_phy_cfg_dflt_override(struct ice_port_info *pi)
1843{
1844 struct ice_link_default_override_tlv *ldo;
1845 struct ice_aqc_set_phy_cfg_data *cfg;
1846 struct ice_phy_info *phy = &pi->phy;
1847 struct ice_pf *pf = pi->hw->back;
1848
1849 ldo = &pf->link_dflt_override;
1850
1851
1852
1853
1854 cfg = &phy->curr_user_phy_cfg;
1855
1856 if (ldo->phy_type_low || ldo->phy_type_high) {
1857 cfg->phy_type_low = pf->nvm_phy_type_lo &
1858 cpu_to_le64(ldo->phy_type_low);
1859 cfg->phy_type_high = pf->nvm_phy_type_hi &
1860 cpu_to_le64(ldo->phy_type_high);
1861 }
1862 cfg->link_fec_opt = ldo->fec_options;
1863 phy->curr_user_fec_req = ICE_FEC_AUTO;
1864
1865 set_bit(ICE_LINK_DEFAULT_OVERRIDE_PENDING, pf->state);
1866}
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882static int ice_init_phy_user_cfg(struct ice_port_info *pi)
1883{
1884 struct ice_aqc_get_phy_caps_data *pcaps;
1885 struct ice_phy_info *phy = &pi->phy;
1886 struct ice_pf *pf = pi->hw->back;
1887 enum ice_status status;
1888 int err = 0;
1889
1890 if (!(phy->link_info.link_info & ICE_AQ_MEDIA_AVAILABLE))
1891 return -EIO;
1892
1893 pcaps = kzalloc(sizeof(*pcaps), GFP_KERNEL);
1894 if (!pcaps)
1895 return -ENOMEM;
1896
1897 if (ice_fw_supports_report_dflt_cfg(pi->hw))
1898 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_DFLT_CFG,
1899 pcaps, NULL);
1900 else
1901 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP_MEDIA,
1902 pcaps, NULL);
1903 if (status) {
1904 dev_err(ice_pf_to_dev(pf), "Get PHY capability failed.\n");
1905 err = -EIO;
1906 goto err_out;
1907 }
1908
1909 ice_copy_phy_caps_to_cfg(pi, pcaps, &pi->phy.curr_user_phy_cfg);
1910
1911
1912 if (ice_fw_supports_link_override(pi->hw) &&
1913 !(pcaps->module_compliance_enforcement &
1914 ICE_AQC_MOD_ENFORCE_STRICT_MODE)) {
1915 set_bit(ICE_FLAG_LINK_LENIENT_MODE_ENA, pf->flags);
1916
1917
1918
1919
1920
1921 if (!ice_fw_supports_report_dflt_cfg(pi->hw) &&
1922 (pf->link_dflt_override.options & ICE_LINK_OVERRIDE_EN)) {
1923 ice_init_phy_cfg_dflt_override(pi);
1924 goto out;
1925 }
1926 }
1927
1928
1929
1930
1931 phy->curr_user_fec_req = ice_caps_to_fec_mode(pcaps->caps,
1932 pcaps->link_fec_options);
1933 phy->curr_user_fc_req = ice_caps_to_fc_mode(pcaps->caps);
1934
1935out:
1936 phy->curr_user_speed_req = ICE_AQ_LINK_SPEED_M;
1937 set_bit(ICE_PHY_INIT_COMPLETE, pf->state);
1938err_out:
1939 kfree(pcaps);
1940 return err;
1941}
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951static int ice_configure_phy(struct ice_vsi *vsi)
1952{
1953 struct device *dev = ice_pf_to_dev(vsi->back);
1954 struct ice_port_info *pi = vsi->port_info;
1955 struct ice_aqc_get_phy_caps_data *pcaps;
1956 struct ice_aqc_set_phy_cfg_data *cfg;
1957 struct ice_phy_info *phy = &pi->phy;
1958 struct ice_pf *pf = vsi->back;
1959 enum ice_status status;
1960 int err = 0;
1961
1962
1963 if (!(phy->link_info.link_info & ICE_AQ_MEDIA_AVAILABLE))
1964 return -EPERM;
1965
1966 ice_print_topo_conflict(vsi);
1967
1968 if (phy->link_info.topo_media_conflict == ICE_AQ_LINK_TOPO_UNSUPP_MEDIA)
1969 return -EPERM;
1970
1971 if (test_bit(ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, pf->flags))
1972 return ice_force_phys_link_state(vsi, true);
1973
1974 pcaps = kzalloc(sizeof(*pcaps), GFP_KERNEL);
1975 if (!pcaps)
1976 return -ENOMEM;
1977
1978
1979 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_ACTIVE_CFG, pcaps,
1980 NULL);
1981 if (status) {
1982 dev_err(dev, "Failed to get PHY configuration, VSI %d error %s\n",
1983 vsi->vsi_num, ice_stat_str(status));
1984 err = -EIO;
1985 goto done;
1986 }
1987
1988
1989
1990
1991 if (pcaps->caps & ICE_AQC_PHY_EN_LINK &&
1992 ice_phy_caps_equals_cfg(pcaps, &phy->curr_user_phy_cfg))
1993 goto done;
1994
1995
1996 memset(pcaps, 0, sizeof(*pcaps));
1997 if (ice_fw_supports_report_dflt_cfg(pi->hw))
1998 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_DFLT_CFG,
1999 pcaps, NULL);
2000 else
2001 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP_MEDIA,
2002 pcaps, NULL);
2003 if (status) {
2004 dev_err(dev, "Failed to get PHY caps, VSI %d error %s\n",
2005 vsi->vsi_num, ice_stat_str(status));
2006 err = -EIO;
2007 goto done;
2008 }
2009
2010 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
2011 if (!cfg) {
2012 err = -ENOMEM;
2013 goto done;
2014 }
2015
2016 ice_copy_phy_caps_to_cfg(pi, pcaps, cfg);
2017
2018
2019
2020
2021 if (test_and_clear_bit(ICE_LINK_DEFAULT_OVERRIDE_PENDING,
2022 vsi->back->state)) {
2023 cfg->phy_type_low = phy->curr_user_phy_cfg.phy_type_low;
2024 cfg->phy_type_high = phy->curr_user_phy_cfg.phy_type_high;
2025 } else {
2026 u64 phy_low = 0, phy_high = 0;
2027
2028 ice_update_phy_type(&phy_low, &phy_high,
2029 pi->phy.curr_user_speed_req);
2030 cfg->phy_type_low = pcaps->phy_type_low & cpu_to_le64(phy_low);
2031 cfg->phy_type_high = pcaps->phy_type_high &
2032 cpu_to_le64(phy_high);
2033 }
2034
2035
2036 if (!cfg->phy_type_low && !cfg->phy_type_high) {
2037 cfg->phy_type_low = pcaps->phy_type_low;
2038 cfg->phy_type_high = pcaps->phy_type_high;
2039 }
2040
2041
2042 ice_cfg_phy_fec(pi, cfg, phy->curr_user_fec_req);
2043
2044
2045 if (cfg->link_fec_opt !=
2046 (cfg->link_fec_opt & pcaps->link_fec_options)) {
2047 cfg->caps |= pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC;
2048 cfg->link_fec_opt = pcaps->link_fec_options;
2049 }
2050
2051
2052
2053
2054 ice_cfg_phy_fc(pi, cfg, phy->curr_user_fc_req);
2055
2056
2057 cfg->caps |= ICE_AQ_PHY_ENA_AUTO_LINK_UPDT | ICE_AQ_PHY_ENA_LINK;
2058
2059 status = ice_aq_set_phy_cfg(&pf->hw, pi, cfg, NULL);
2060 if (status) {
2061 dev_err(dev, "Failed to set phy config, VSI %d error %s\n",
2062 vsi->vsi_num, ice_stat_str(status));
2063 err = -EIO;
2064 }
2065
2066 kfree(cfg);
2067done:
2068 kfree(pcaps);
2069 return err;
2070}
2071
2072
2073
2074
2075
2076
2077
2078
2079static void ice_check_media_subtask(struct ice_pf *pf)
2080{
2081 struct ice_port_info *pi;
2082 struct ice_vsi *vsi;
2083 int err;
2084
2085
2086 if (!test_bit(ICE_FLAG_NO_MEDIA, pf->flags))
2087 return;
2088
2089 vsi = ice_get_main_vsi(pf);
2090 if (!vsi)
2091 return;
2092
2093
2094 pi = vsi->port_info;
2095 err = ice_update_link_info(pi);
2096 if (err)
2097 return;
2098
2099 ice_check_module_power(pf, pi->phy.link_info.link_cfg_err);
2100
2101 if (pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) {
2102 if (!test_bit(ICE_PHY_INIT_COMPLETE, pf->state))
2103 ice_init_phy_user_cfg(pi);
2104
2105
2106
2107
2108 if (test_bit(ICE_VSI_DOWN, vsi->state) &&
2109 test_bit(ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, vsi->back->flags))
2110 return;
2111
2112 err = ice_configure_phy(vsi);
2113 if (!err)
2114 clear_bit(ICE_FLAG_NO_MEDIA, pf->flags);
2115
2116
2117
2118
2119 }
2120}
2121
2122
2123
2124
2125
2126static void ice_service_task(struct work_struct *work)
2127{
2128 struct ice_pf *pf = container_of(work, struct ice_pf, serv_task);
2129 unsigned long start_time = jiffies;
2130
2131
2132
2133
2134 ice_reset_subtask(pf);
2135
2136
2137 if (ice_is_reset_in_progress(pf->state) ||
2138 test_bit(ICE_SUSPENDED, pf->state) ||
2139 test_bit(ICE_NEEDS_RESTART, pf->state)) {
2140 ice_service_task_complete(pf);
2141 return;
2142 }
2143
2144 ice_clean_adminq_subtask(pf);
2145 ice_check_media_subtask(pf);
2146 ice_check_for_hang_subtask(pf);
2147 ice_sync_fltr_subtask(pf);
2148 ice_handle_mdd_event(pf);
2149 ice_watchdog_subtask(pf);
2150
2151 if (ice_is_safe_mode(pf)) {
2152 ice_service_task_complete(pf);
2153 return;
2154 }
2155
2156 ice_process_vflr_event(pf);
2157 ice_clean_mailboxq_subtask(pf);
2158 ice_clean_sbq_subtask(pf);
2159 ice_sync_arfs_fltrs(pf);
2160 ice_flush_fdir_ctx(pf);
2161
2162
2163 ice_service_task_complete(pf);
2164
2165
2166
2167
2168
2169 if (time_after(jiffies, (start_time + pf->serv_tmr_period)) ||
2170 test_bit(ICE_MDD_EVENT_PENDING, pf->state) ||
2171 test_bit(ICE_VFLR_EVENT_PENDING, pf->state) ||
2172 test_bit(ICE_MAILBOXQ_EVENT_PENDING, pf->state) ||
2173 test_bit(ICE_FD_VF_FLUSH_CTX, pf->state) ||
2174 test_bit(ICE_SIDEBANDQ_EVENT_PENDING, pf->state) ||
2175 test_bit(ICE_ADMINQ_EVENT_PENDING, pf->state))
2176 mod_timer(&pf->serv_tmr, jiffies);
2177}
2178
2179
2180
2181
2182
2183static void ice_set_ctrlq_len(struct ice_hw *hw)
2184{
2185 hw->adminq.num_rq_entries = ICE_AQ_LEN;
2186 hw->adminq.num_sq_entries = ICE_AQ_LEN;
2187 hw->adminq.rq_buf_size = ICE_AQ_MAX_BUF_LEN;
2188 hw->adminq.sq_buf_size = ICE_AQ_MAX_BUF_LEN;
2189 hw->mailboxq.num_rq_entries = PF_MBX_ARQLEN_ARQLEN_M;
2190 hw->mailboxq.num_sq_entries = ICE_MBXSQ_LEN;
2191 hw->mailboxq.rq_buf_size = ICE_MBXQ_MAX_BUF_LEN;
2192 hw->mailboxq.sq_buf_size = ICE_MBXQ_MAX_BUF_LEN;
2193 hw->sbq.num_rq_entries = ICE_SBQ_LEN;
2194 hw->sbq.num_sq_entries = ICE_SBQ_LEN;
2195 hw->sbq.rq_buf_size = ICE_SBQ_MAX_BUF_LEN;
2196 hw->sbq.sq_buf_size = ICE_SBQ_MAX_BUF_LEN;
2197}
2198
2199
2200
2201
2202
2203
2204int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset)
2205{
2206 struct device *dev = ice_pf_to_dev(pf);
2207
2208
2209 if (test_bit(ICE_RESET_FAILED, pf->state)) {
2210 dev_dbg(dev, "earlier reset has failed\n");
2211 return -EIO;
2212 }
2213
2214 if (ice_is_reset_in_progress(pf->state)) {
2215 dev_dbg(dev, "Reset already in progress\n");
2216 return -EBUSY;
2217 }
2218
2219 ice_unplug_aux_dev(pf);
2220
2221 switch (reset) {
2222 case ICE_RESET_PFR:
2223 set_bit(ICE_PFR_REQ, pf->state);
2224 break;
2225 case ICE_RESET_CORER:
2226 set_bit(ICE_CORER_REQ, pf->state);
2227 break;
2228 case ICE_RESET_GLOBR:
2229 set_bit(ICE_GLOBR_REQ, pf->state);
2230 break;
2231 default:
2232 return -EINVAL;
2233 }
2234
2235 ice_service_task_schedule(pf);
2236 return 0;
2237}
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247static void
2248ice_irq_affinity_notify(struct irq_affinity_notify *notify,
2249 const cpumask_t *mask)
2250{
2251 struct ice_q_vector *q_vector =
2252 container_of(notify, struct ice_q_vector, affinity_notify);
2253
2254 cpumask_copy(&q_vector->affinity_mask, mask);
2255}
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265static void ice_irq_affinity_release(struct kref __always_unused *ref) {}
2266
2267
2268
2269
2270
2271static int ice_vsi_ena_irq(struct ice_vsi *vsi)
2272{
2273 struct ice_hw *hw = &vsi->back->hw;
2274 int i;
2275
2276 ice_for_each_q_vector(vsi, i)
2277 ice_irq_dynamic_ena(hw, vsi, vsi->q_vectors[i]);
2278
2279 ice_flush(hw);
2280 return 0;
2281}
2282
2283
2284
2285
2286
2287
2288static int ice_vsi_req_irq_msix(struct ice_vsi *vsi, char *basename)
2289{
2290 int q_vectors = vsi->num_q_vectors;
2291 struct ice_pf *pf = vsi->back;
2292 int base = vsi->base_vector;
2293 struct device *dev;
2294 int rx_int_idx = 0;
2295 int tx_int_idx = 0;
2296 int vector, err;
2297 int irq_num;
2298
2299 dev = ice_pf_to_dev(pf);
2300 for (vector = 0; vector < q_vectors; vector++) {
2301 struct ice_q_vector *q_vector = vsi->q_vectors[vector];
2302
2303 irq_num = pf->msix_entries[base + vector].vector;
2304
2305 if (q_vector->tx.ring && q_vector->rx.ring) {
2306 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2307 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2308 tx_int_idx++;
2309 } else if (q_vector->rx.ring) {
2310 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2311 "%s-%s-%d", basename, "rx", rx_int_idx++);
2312 } else if (q_vector->tx.ring) {
2313 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2314 "%s-%s-%d", basename, "tx", tx_int_idx++);
2315 } else {
2316
2317 continue;
2318 }
2319 if (vsi->type == ICE_VSI_CTRL && vsi->vf_id != ICE_INVAL_VFID)
2320 err = devm_request_irq(dev, irq_num, vsi->irq_handler,
2321 IRQF_SHARED, q_vector->name,
2322 q_vector);
2323 else
2324 err = devm_request_irq(dev, irq_num, vsi->irq_handler,
2325 0, q_vector->name, q_vector);
2326 if (err) {
2327 netdev_err(vsi->netdev, "MSIX request_irq failed, error: %d\n",
2328 err);
2329 goto free_q_irqs;
2330 }
2331
2332
2333 if (!IS_ENABLED(CONFIG_RFS_ACCEL)) {
2334 struct irq_affinity_notify *affinity_notify;
2335
2336 affinity_notify = &q_vector->affinity_notify;
2337 affinity_notify->notify = ice_irq_affinity_notify;
2338 affinity_notify->release = ice_irq_affinity_release;
2339 irq_set_affinity_notifier(irq_num, affinity_notify);
2340 }
2341
2342
2343 irq_set_affinity_hint(irq_num, &q_vector->affinity_mask);
2344 }
2345
2346 vsi->irqs_ready = true;
2347 return 0;
2348
2349free_q_irqs:
2350 while (vector) {
2351 vector--;
2352 irq_num = pf->msix_entries[base + vector].vector;
2353 if (!IS_ENABLED(CONFIG_RFS_ACCEL))
2354 irq_set_affinity_notifier(irq_num, NULL);
2355 irq_set_affinity_hint(irq_num, NULL);
2356 devm_free_irq(dev, irq_num, &vsi->q_vectors[vector]);
2357 }
2358 return err;
2359}
2360
2361
2362
2363
2364
2365
2366
2367static int ice_xdp_alloc_setup_rings(struct ice_vsi *vsi)
2368{
2369 struct device *dev = ice_pf_to_dev(vsi->back);
2370 int i;
2371
2372 for (i = 0; i < vsi->num_xdp_txq; i++) {
2373 u16 xdp_q_idx = vsi->alloc_txq + i;
2374 struct ice_ring *xdp_ring;
2375
2376 xdp_ring = kzalloc(sizeof(*xdp_ring), GFP_KERNEL);
2377
2378 if (!xdp_ring)
2379 goto free_xdp_rings;
2380
2381 xdp_ring->q_index = xdp_q_idx;
2382 xdp_ring->reg_idx = vsi->txq_map[xdp_q_idx];
2383 xdp_ring->ring_active = false;
2384 xdp_ring->vsi = vsi;
2385 xdp_ring->netdev = NULL;
2386 xdp_ring->dev = dev;
2387 xdp_ring->count = vsi->num_tx_desc;
2388 WRITE_ONCE(vsi->xdp_rings[i], xdp_ring);
2389 if (ice_setup_tx_ring(xdp_ring))
2390 goto free_xdp_rings;
2391 ice_set_ring_xdp(xdp_ring);
2392 xdp_ring->xsk_pool = ice_xsk_pool(xdp_ring);
2393 }
2394
2395 return 0;
2396
2397free_xdp_rings:
2398 for (; i >= 0; i--)
2399 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
2400 ice_free_tx_ring(vsi->xdp_rings[i]);
2401 return -ENOMEM;
2402}
2403
2404
2405
2406
2407
2408
2409static void ice_vsi_assign_bpf_prog(struct ice_vsi *vsi, struct bpf_prog *prog)
2410{
2411 struct bpf_prog *old_prog;
2412 int i;
2413
2414 old_prog = xchg(&vsi->xdp_prog, prog);
2415 if (old_prog)
2416 bpf_prog_put(old_prog);
2417
2418 ice_for_each_rxq(vsi, i)
2419 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
2420}
2421
2422
2423
2424
2425
2426
2427
2428
2429int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog)
2430{
2431 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2432 int xdp_rings_rem = vsi->num_xdp_txq;
2433 struct ice_pf *pf = vsi->back;
2434 struct ice_qs_cfg xdp_qs_cfg = {
2435 .qs_mutex = &pf->avail_q_mutex,
2436 .pf_map = pf->avail_txqs,
2437 .pf_map_size = pf->max_pf_txqs,
2438 .q_count = vsi->num_xdp_txq,
2439 .scatter_count = ICE_MAX_SCATTER_TXQS,
2440 .vsi_map = vsi->txq_map,
2441 .vsi_map_offset = vsi->alloc_txq,
2442 .mapping_mode = ICE_VSI_MAP_CONTIG
2443 };
2444 enum ice_status status;
2445 struct device *dev;
2446 int i, v_idx;
2447
2448 dev = ice_pf_to_dev(pf);
2449 vsi->xdp_rings = devm_kcalloc(dev, vsi->num_xdp_txq,
2450 sizeof(*vsi->xdp_rings), GFP_KERNEL);
2451 if (!vsi->xdp_rings)
2452 return -ENOMEM;
2453
2454 vsi->xdp_mapping_mode = xdp_qs_cfg.mapping_mode;
2455 if (__ice_vsi_get_qs(&xdp_qs_cfg))
2456 goto err_map_xdp;
2457
2458 if (ice_xdp_alloc_setup_rings(vsi))
2459 goto clear_xdp_rings;
2460
2461
2462 ice_for_each_q_vector(vsi, v_idx) {
2463 struct ice_q_vector *q_vector = vsi->q_vectors[v_idx];
2464 int xdp_rings_per_v, q_id, q_base;
2465
2466 xdp_rings_per_v = DIV_ROUND_UP(xdp_rings_rem,
2467 vsi->num_q_vectors - v_idx);
2468 q_base = vsi->num_xdp_txq - xdp_rings_rem;
2469
2470 for (q_id = q_base; q_id < (q_base + xdp_rings_per_v); q_id++) {
2471 struct ice_ring *xdp_ring = vsi->xdp_rings[q_id];
2472
2473 xdp_ring->q_vector = q_vector;
2474 xdp_ring->next = q_vector->tx.ring;
2475 q_vector->tx.ring = xdp_ring;
2476 }
2477 xdp_rings_rem -= xdp_rings_per_v;
2478 }
2479
2480
2481
2482
2483
2484 if (ice_is_reset_in_progress(pf->state))
2485 return 0;
2486
2487
2488
2489
2490 for (i = 0; i < vsi->tc_cfg.numtc; i++)
2491 max_txqs[i] = vsi->num_txq + vsi->num_xdp_txq;
2492
2493 status = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2494 max_txqs);
2495 if (status) {
2496 dev_err(dev, "Failed VSI LAN queue config for XDP, error: %s\n",
2497 ice_stat_str(status));
2498 goto clear_xdp_rings;
2499 }
2500 ice_vsi_assign_bpf_prog(vsi, prog);
2501
2502 return 0;
2503clear_xdp_rings:
2504 for (i = 0; i < vsi->num_xdp_txq; i++)
2505 if (vsi->xdp_rings[i]) {
2506 kfree_rcu(vsi->xdp_rings[i], rcu);
2507 vsi->xdp_rings[i] = NULL;
2508 }
2509
2510err_map_xdp:
2511 mutex_lock(&pf->avail_q_mutex);
2512 for (i = 0; i < vsi->num_xdp_txq; i++) {
2513 clear_bit(vsi->txq_map[i + vsi->alloc_txq], pf->avail_txqs);
2514 vsi->txq_map[i + vsi->alloc_txq] = ICE_INVAL_Q_INDEX;
2515 }
2516 mutex_unlock(&pf->avail_q_mutex);
2517
2518 devm_kfree(dev, vsi->xdp_rings);
2519 return -ENOMEM;
2520}
2521
2522
2523
2524
2525
2526
2527
2528
2529int ice_destroy_xdp_rings(struct ice_vsi *vsi)
2530{
2531 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2532 struct ice_pf *pf = vsi->back;
2533 int i, v_idx;
2534
2535
2536
2537
2538
2539
2540 if (ice_is_reset_in_progress(pf->state) || !vsi->q_vectors[0])
2541 goto free_qmap;
2542
2543 ice_for_each_q_vector(vsi, v_idx) {
2544 struct ice_q_vector *q_vector = vsi->q_vectors[v_idx];
2545 struct ice_ring *ring;
2546
2547 ice_for_each_ring(ring, q_vector->tx)
2548 if (!ring->tx_buf || !ice_ring_is_xdp(ring))
2549 break;
2550
2551
2552 q_vector->tx.ring = ring;
2553 }
2554
2555free_qmap:
2556 mutex_lock(&pf->avail_q_mutex);
2557 for (i = 0; i < vsi->num_xdp_txq; i++) {
2558 clear_bit(vsi->txq_map[i + vsi->alloc_txq], pf->avail_txqs);
2559 vsi->txq_map[i + vsi->alloc_txq] = ICE_INVAL_Q_INDEX;
2560 }
2561 mutex_unlock(&pf->avail_q_mutex);
2562
2563 for (i = 0; i < vsi->num_xdp_txq; i++)
2564 if (vsi->xdp_rings[i]) {
2565 if (vsi->xdp_rings[i]->desc)
2566 ice_free_tx_ring(vsi->xdp_rings[i]);
2567 kfree_rcu(vsi->xdp_rings[i], rcu);
2568 vsi->xdp_rings[i] = NULL;
2569 }
2570
2571 devm_kfree(ice_pf_to_dev(pf), vsi->xdp_rings);
2572 vsi->xdp_rings = NULL;
2573
2574 if (ice_is_reset_in_progress(pf->state) || !vsi->q_vectors[0])
2575 return 0;
2576
2577 ice_vsi_assign_bpf_prog(vsi, NULL);
2578
2579
2580
2581
2582 for (i = 0; i < vsi->tc_cfg.numtc; i++)
2583 max_txqs[i] = vsi->num_txq;
2584
2585
2586 vsi->num_xdp_txq = 0;
2587
2588 return ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2589 max_txqs);
2590}
2591
2592
2593
2594
2595
2596static void ice_vsi_rx_napi_schedule(struct ice_vsi *vsi)
2597{
2598 int i;
2599
2600 ice_for_each_rxq(vsi, i) {
2601 struct ice_ring *rx_ring = vsi->rx_rings[i];
2602
2603 if (rx_ring->xsk_pool)
2604 napi_schedule(&rx_ring->q_vector->napi);
2605 }
2606}
2607
2608
2609
2610
2611
2612
2613
2614static int
2615ice_xdp_setup_prog(struct ice_vsi *vsi, struct bpf_prog *prog,
2616 struct netlink_ext_ack *extack)
2617{
2618 int frame_size = vsi->netdev->mtu + ICE_ETH_PKT_HDR_PAD;
2619 bool if_running = netif_running(vsi->netdev);
2620 int ret = 0, xdp_ring_err = 0;
2621
2622 if (frame_size > vsi->rx_buf_len) {
2623 NL_SET_ERR_MSG_MOD(extack, "MTU too large for loading XDP");
2624 return -EOPNOTSUPP;
2625 }
2626
2627
2628 if (if_running && !test_and_set_bit(ICE_VSI_DOWN, vsi->state)) {
2629 ret = ice_down(vsi);
2630 if (ret) {
2631 NL_SET_ERR_MSG_MOD(extack, "Preparing device for XDP attach failed");
2632 return ret;
2633 }
2634 }
2635
2636 if (!ice_is_xdp_ena_vsi(vsi) && prog) {
2637 vsi->num_xdp_txq = vsi->alloc_rxq;
2638 xdp_ring_err = ice_prepare_xdp_rings(vsi, prog);
2639 if (xdp_ring_err)
2640 NL_SET_ERR_MSG_MOD(extack, "Setting up XDP Tx resources failed");
2641 } else if (ice_is_xdp_ena_vsi(vsi) && !prog) {
2642 xdp_ring_err = ice_destroy_xdp_rings(vsi);
2643 if (xdp_ring_err)
2644 NL_SET_ERR_MSG_MOD(extack, "Freeing XDP Tx resources failed");
2645 } else {
2646 ice_vsi_assign_bpf_prog(vsi, prog);
2647 }
2648
2649 if (if_running)
2650 ret = ice_up(vsi);
2651
2652 if (!ret && prog)
2653 ice_vsi_rx_napi_schedule(vsi);
2654
2655 return (ret || xdp_ring_err) ? -ENOMEM : 0;
2656}
2657
2658
2659
2660
2661
2662
2663static int ice_xdp_safe_mode(struct net_device __always_unused *dev,
2664 struct netdev_bpf *xdp)
2665{
2666 NL_SET_ERR_MSG_MOD(xdp->extack,
2667 "Please provide working DDP firmware package in order to use XDP\n"
2668 "Refer to Documentation/networking/device_drivers/ethernet/intel/ice.rst");
2669 return -EOPNOTSUPP;
2670}
2671
2672
2673
2674
2675
2676
2677static int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2678{
2679 struct ice_netdev_priv *np = netdev_priv(dev);
2680 struct ice_vsi *vsi = np->vsi;
2681
2682 if (vsi->type != ICE_VSI_PF) {
2683 NL_SET_ERR_MSG_MOD(xdp->extack, "XDP can be loaded only on PF VSI");
2684 return -EINVAL;
2685 }
2686
2687 switch (xdp->command) {
2688 case XDP_SETUP_PROG:
2689 return ice_xdp_setup_prog(vsi, xdp->prog, xdp->extack);
2690 case XDP_SETUP_XSK_POOL:
2691 return ice_xsk_pool_setup(vsi, xdp->xsk.pool,
2692 xdp->xsk.queue_id);
2693 default:
2694 return -EINVAL;
2695 }
2696}
2697
2698
2699
2700
2701
2702static void ice_ena_misc_vector(struct ice_pf *pf)
2703{
2704 struct ice_hw *hw = &pf->hw;
2705 u32 val;
2706
2707
2708
2709
2710
2711 val = rd32(hw, GL_MDCK_TX_TDPU);
2712 val |= GL_MDCK_TX_TDPU_RCU_ANTISPOOF_ITR_DIS_M;
2713 wr32(hw, GL_MDCK_TX_TDPU, val);
2714
2715
2716 wr32(hw, PFINT_OICR_ENA, 0);
2717 rd32(hw, PFINT_OICR);
2718
2719 val = (PFINT_OICR_ECC_ERR_M |
2720 PFINT_OICR_MAL_DETECT_M |
2721 PFINT_OICR_GRST_M |
2722 PFINT_OICR_PCI_EXCEPTION_M |
2723 PFINT_OICR_VFLR_M |
2724 PFINT_OICR_HMC_ERR_M |
2725 PFINT_OICR_PE_PUSH_M |
2726 PFINT_OICR_PE_CRITERR_M);
2727
2728 wr32(hw, PFINT_OICR_ENA, val);
2729
2730
2731 wr32(hw, GLINT_DYN_CTL(pf->oicr_idx),
2732 GLINT_DYN_CTL_SW_ITR_INDX_M | GLINT_DYN_CTL_INTENA_MSK_M);
2733}
2734
2735
2736
2737
2738
2739
2740static irqreturn_t ice_misc_intr(int __always_unused irq, void *data)
2741{
2742 struct ice_pf *pf = (struct ice_pf *)data;
2743 struct ice_hw *hw = &pf->hw;
2744 irqreturn_t ret = IRQ_NONE;
2745 struct device *dev;
2746 u32 oicr, ena_mask;
2747
2748 dev = ice_pf_to_dev(pf);
2749 set_bit(ICE_ADMINQ_EVENT_PENDING, pf->state);
2750 set_bit(ICE_MAILBOXQ_EVENT_PENDING, pf->state);
2751 set_bit(ICE_SIDEBANDQ_EVENT_PENDING, pf->state);
2752
2753 oicr = rd32(hw, PFINT_OICR);
2754 ena_mask = rd32(hw, PFINT_OICR_ENA);
2755
2756 if (oicr & PFINT_OICR_SWINT_M) {
2757 ena_mask &= ~PFINT_OICR_SWINT_M;
2758 pf->sw_int_count++;
2759 }
2760
2761 if (oicr & PFINT_OICR_MAL_DETECT_M) {
2762 ena_mask &= ~PFINT_OICR_MAL_DETECT_M;
2763 set_bit(ICE_MDD_EVENT_PENDING, pf->state);
2764 }
2765 if (oicr & PFINT_OICR_VFLR_M) {
2766
2767 if (test_bit(ICE_VF_RESETS_DISABLED, pf->state)) {
2768 u32 reg = rd32(hw, PFINT_OICR_ENA);
2769
2770 reg &= ~PFINT_OICR_VFLR_M;
2771 wr32(hw, PFINT_OICR_ENA, reg);
2772 } else {
2773 ena_mask &= ~PFINT_OICR_VFLR_M;
2774 set_bit(ICE_VFLR_EVENT_PENDING, pf->state);
2775 }
2776 }
2777
2778 if (oicr & PFINT_OICR_GRST_M) {
2779 u32 reset;
2780
2781
2782 ena_mask &= ~PFINT_OICR_GRST_M;
2783 reset = (rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_RESET_TYPE_M) >>
2784 GLGEN_RSTAT_RESET_TYPE_S;
2785
2786 if (reset == ICE_RESET_CORER)
2787 pf->corer_count++;
2788 else if (reset == ICE_RESET_GLOBR)
2789 pf->globr_count++;
2790 else if (reset == ICE_RESET_EMPR)
2791 pf->empr_count++;
2792 else
2793 dev_dbg(dev, "Invalid reset type %d\n", reset);
2794
2795
2796
2797
2798 if (!test_and_set_bit(ICE_RESET_OICR_RECV, pf->state)) {
2799 if (reset == ICE_RESET_CORER)
2800 set_bit(ICE_CORER_RECV, pf->state);
2801 else if (reset == ICE_RESET_GLOBR)
2802 set_bit(ICE_GLOBR_RECV, pf->state);
2803 else
2804 set_bit(ICE_EMPR_RECV, pf->state);
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819 hw->reset_ongoing = true;
2820 }
2821 }
2822
2823 if (oicr & PFINT_OICR_TSYN_TX_M) {
2824 ena_mask &= ~PFINT_OICR_TSYN_TX_M;
2825 ice_ptp_process_ts(pf);
2826 }
2827
2828 if (oicr & PFINT_OICR_TSYN_EVNT_M) {
2829 u8 tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned;
2830 u32 gltsyn_stat = rd32(hw, GLTSYN_STAT(tmr_idx));
2831
2832
2833 pf->ptp.ext_ts_irq |= gltsyn_stat & (GLTSYN_STAT_EVENT0_M |
2834 GLTSYN_STAT_EVENT1_M |
2835 GLTSYN_STAT_EVENT2_M);
2836 ena_mask &= ~PFINT_OICR_TSYN_EVNT_M;
2837 kthread_queue_work(pf->ptp.kworker, &pf->ptp.extts_work);
2838 }
2839
2840#define ICE_AUX_CRIT_ERR (PFINT_OICR_PE_CRITERR_M | PFINT_OICR_HMC_ERR_M | PFINT_OICR_PE_PUSH_M)
2841 if (oicr & ICE_AUX_CRIT_ERR) {
2842 struct iidc_event *event;
2843
2844 ena_mask &= ~ICE_AUX_CRIT_ERR;
2845 event = kzalloc(sizeof(*event), GFP_KERNEL);
2846 if (event) {
2847 set_bit(IIDC_EVENT_CRIT_ERR, event->type);
2848
2849 event->reg = oicr;
2850 ice_send_event_to_aux(pf, event);
2851 kfree(event);
2852 }
2853 }
2854
2855
2856 oicr &= ena_mask;
2857 if (oicr) {
2858 dev_dbg(dev, "unhandled interrupt oicr=0x%08x\n", oicr);
2859
2860
2861
2862 if (oicr & (PFINT_OICR_PCI_EXCEPTION_M |
2863 PFINT_OICR_ECC_ERR_M)) {
2864 set_bit(ICE_PFR_REQ, pf->state);
2865 ice_service_task_schedule(pf);
2866 }
2867 }
2868 ret = IRQ_HANDLED;
2869
2870 ice_service_task_schedule(pf);
2871 ice_irq_dynamic_ena(hw, NULL, NULL);
2872
2873 return ret;
2874}
2875
2876
2877
2878
2879
2880static void ice_dis_ctrlq_interrupts(struct ice_hw *hw)
2881{
2882
2883 wr32(hw, PFINT_FW_CTL,
2884 rd32(hw, PFINT_FW_CTL) & ~PFINT_FW_CTL_CAUSE_ENA_M);
2885
2886
2887 wr32(hw, PFINT_MBX_CTL,
2888 rd32(hw, PFINT_MBX_CTL) & ~PFINT_MBX_CTL_CAUSE_ENA_M);
2889
2890 wr32(hw, PFINT_SB_CTL,
2891 rd32(hw, PFINT_SB_CTL) & ~PFINT_SB_CTL_CAUSE_ENA_M);
2892
2893
2894 wr32(hw, PFINT_OICR_CTL,
2895 rd32(hw, PFINT_OICR_CTL) & ~PFINT_OICR_CTL_CAUSE_ENA_M);
2896
2897 ice_flush(hw);
2898}
2899
2900
2901
2902
2903
2904static void ice_free_irq_msix_misc(struct ice_pf *pf)
2905{
2906 struct ice_hw *hw = &pf->hw;
2907
2908 ice_dis_ctrlq_interrupts(hw);
2909
2910
2911 wr32(hw, PFINT_OICR_ENA, 0);
2912 ice_flush(hw);
2913
2914 if (pf->msix_entries) {
2915 synchronize_irq(pf->msix_entries[pf->oicr_idx].vector);
2916 devm_free_irq(ice_pf_to_dev(pf),
2917 pf->msix_entries[pf->oicr_idx].vector, pf);
2918 }
2919
2920 pf->num_avail_sw_msix += 1;
2921 ice_free_res(pf->irq_tracker, pf->oicr_idx, ICE_RES_MISC_VEC_ID);
2922}
2923
2924
2925
2926
2927
2928
2929static void ice_ena_ctrlq_interrupts(struct ice_hw *hw, u16 reg_idx)
2930{
2931 u32 val;
2932
2933 val = ((reg_idx & PFINT_OICR_CTL_MSIX_INDX_M) |
2934 PFINT_OICR_CTL_CAUSE_ENA_M);
2935 wr32(hw, PFINT_OICR_CTL, val);
2936
2937
2938 val = ((reg_idx & PFINT_FW_CTL_MSIX_INDX_M) |
2939 PFINT_FW_CTL_CAUSE_ENA_M);
2940 wr32(hw, PFINT_FW_CTL, val);
2941
2942
2943 val = ((reg_idx & PFINT_MBX_CTL_MSIX_INDX_M) |
2944 PFINT_MBX_CTL_CAUSE_ENA_M);
2945 wr32(hw, PFINT_MBX_CTL, val);
2946
2947
2948 val = ((reg_idx & PFINT_SB_CTL_MSIX_INDX_M) |
2949 PFINT_SB_CTL_CAUSE_ENA_M);
2950 wr32(hw, PFINT_SB_CTL, val);
2951
2952 ice_flush(hw);
2953}
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963static int ice_req_irq_msix_misc(struct ice_pf *pf)
2964{
2965 struct device *dev = ice_pf_to_dev(pf);
2966 struct ice_hw *hw = &pf->hw;
2967 int oicr_idx, err = 0;
2968
2969 if (!pf->int_name[0])
2970 snprintf(pf->int_name, sizeof(pf->int_name) - 1, "%s-%s:misc",
2971 dev_driver_string(dev), dev_name(dev));
2972
2973
2974
2975
2976
2977 if (ice_is_reset_in_progress(pf->state))
2978 goto skip_req_irq;
2979
2980
2981 oicr_idx = ice_get_res(pf, pf->irq_tracker, 1, ICE_RES_MISC_VEC_ID);
2982 if (oicr_idx < 0)
2983 return oicr_idx;
2984
2985 pf->num_avail_sw_msix -= 1;
2986 pf->oicr_idx = (u16)oicr_idx;
2987
2988 err = devm_request_irq(dev, pf->msix_entries[pf->oicr_idx].vector,
2989 ice_misc_intr, 0, pf->int_name, pf);
2990 if (err) {
2991 dev_err(dev, "devm_request_irq for %s failed: %d\n",
2992 pf->int_name, err);
2993 ice_free_res(pf->irq_tracker, 1, ICE_RES_MISC_VEC_ID);
2994 pf->num_avail_sw_msix += 1;
2995 return err;
2996 }
2997
2998skip_req_irq:
2999 ice_ena_misc_vector(pf);
3000
3001 ice_ena_ctrlq_interrupts(hw, pf->oicr_idx);
3002 wr32(hw, GLINT_ITR(ICE_RX_ITR, pf->oicr_idx),
3003 ITR_REG_ALIGN(ICE_ITR_8K) >> ICE_ITR_GRAN_S);
3004
3005 ice_flush(hw);
3006 ice_irq_dynamic_ena(hw, NULL, NULL);
3007
3008 return 0;
3009}
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019static void ice_napi_add(struct ice_vsi *vsi)
3020{
3021 int v_idx;
3022
3023 if (!vsi->netdev)
3024 return;
3025
3026 ice_for_each_q_vector(vsi, v_idx)
3027 netif_napi_add(vsi->netdev, &vsi->q_vectors[v_idx]->napi,
3028 ice_napi_poll, NAPI_POLL_WEIGHT);
3029}
3030
3031
3032
3033
3034
3035static void ice_set_ops(struct net_device *netdev)
3036{
3037 struct ice_pf *pf = ice_netdev_to_pf(netdev);
3038
3039 if (ice_is_safe_mode(pf)) {
3040 netdev->netdev_ops = &ice_netdev_safe_mode_ops;
3041 ice_set_ethtool_safe_mode_ops(netdev);
3042 return;
3043 }
3044
3045 netdev->netdev_ops = &ice_netdev_ops;
3046 netdev->udp_tunnel_nic_info = &pf->hw.udp_tunnel_nic;
3047 ice_set_ethtool_ops(netdev);
3048}
3049
3050
3051
3052
3053
3054static void ice_set_netdev_features(struct net_device *netdev)
3055{
3056 struct ice_pf *pf = ice_netdev_to_pf(netdev);
3057 netdev_features_t csumo_features;
3058 netdev_features_t vlano_features;
3059 netdev_features_t dflt_features;
3060 netdev_features_t tso_features;
3061
3062 if (ice_is_safe_mode(pf)) {
3063
3064 netdev->features = NETIF_F_SG | NETIF_F_HIGHDMA;
3065 netdev->hw_features = netdev->features;
3066 return;
3067 }
3068
3069 dflt_features = NETIF_F_SG |
3070 NETIF_F_HIGHDMA |
3071 NETIF_F_NTUPLE |
3072 NETIF_F_RXHASH;
3073
3074 csumo_features = NETIF_F_RXCSUM |
3075 NETIF_F_IP_CSUM |
3076 NETIF_F_SCTP_CRC |
3077 NETIF_F_IPV6_CSUM;
3078
3079 vlano_features = NETIF_F_HW_VLAN_CTAG_FILTER |
3080 NETIF_F_HW_VLAN_CTAG_TX |
3081 NETIF_F_HW_VLAN_CTAG_RX;
3082
3083 tso_features = NETIF_F_TSO |
3084 NETIF_F_TSO_ECN |
3085 NETIF_F_TSO6 |
3086 NETIF_F_GSO_GRE |
3087 NETIF_F_GSO_UDP_TUNNEL |
3088 NETIF_F_GSO_GRE_CSUM |
3089 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3090 NETIF_F_GSO_PARTIAL |
3091 NETIF_F_GSO_IPXIP4 |
3092 NETIF_F_GSO_IPXIP6 |
3093 NETIF_F_GSO_UDP_L4;
3094
3095 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM |
3096 NETIF_F_GSO_GRE_CSUM;
3097
3098 netdev->hw_features = dflt_features | csumo_features |
3099 vlano_features | tso_features;
3100
3101
3102 netdev->mpls_features = NETIF_F_HW_CSUM;
3103
3104
3105 netdev->features |= netdev->hw_features;
3106
3107 netdev->hw_enc_features |= dflt_features | csumo_features |
3108 tso_features;
3109 netdev->vlan_features |= dflt_features | csumo_features |
3110 tso_features;
3111}
3112
3113
3114
3115
3116
3117
3118
3119static int ice_cfg_netdev(struct ice_vsi *vsi)
3120{
3121 struct ice_netdev_priv *np;
3122 struct net_device *netdev;
3123 u8 mac_addr[ETH_ALEN];
3124
3125 netdev = alloc_etherdev_mqs(sizeof(*np), vsi->alloc_txq,
3126 vsi->alloc_rxq);
3127 if (!netdev)
3128 return -ENOMEM;
3129
3130 set_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state);
3131 vsi->netdev = netdev;
3132 np = netdev_priv(netdev);
3133 np->vsi = vsi;
3134
3135 ice_set_netdev_features(netdev);
3136
3137 ice_set_ops(netdev);
3138
3139 if (vsi->type == ICE_VSI_PF) {
3140 SET_NETDEV_DEV(netdev, ice_pf_to_dev(vsi->back));
3141 ether_addr_copy(mac_addr, vsi->port_info->mac.perm_addr);
3142 ether_addr_copy(netdev->dev_addr, mac_addr);
3143 ether_addr_copy(netdev->perm_addr, mac_addr);
3144 }
3145
3146 netdev->priv_flags |= IFF_UNICAST_FLT;
3147
3148
3149 ice_vsi_cfg_netdev_tc(vsi, vsi->tc_cfg.ena_tc);
3150
3151
3152 netdev->watchdog_timeo = 5 * HZ;
3153
3154 netdev->min_mtu = ETH_MIN_MTU;
3155 netdev->max_mtu = ICE_MAX_MTU;
3156
3157 return 0;
3158}
3159
3160
3161
3162
3163
3164
3165
3166void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size)
3167{
3168 u16 i;
3169
3170 for (i = 0; i < rss_table_size; i++)
3171 lut[i] = i % rss_size;
3172}
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182static struct ice_vsi *
3183ice_pf_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi)
3184{
3185 return ice_vsi_setup(pf, pi, ICE_VSI_PF, ICE_INVAL_VFID);
3186}
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196static struct ice_vsi *
3197ice_ctrl_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi)
3198{
3199 return ice_vsi_setup(pf, pi, ICE_VSI_CTRL, ICE_INVAL_VFID);
3200}
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210struct ice_vsi *
3211ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi)
3212{
3213 return ice_vsi_setup(pf, pi, ICE_VSI_LB, ICE_INVAL_VFID);
3214}
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224static int
3225ice_vlan_rx_add_vid(struct net_device *netdev, __always_unused __be16 proto,
3226 u16 vid)
3227{
3228 struct ice_netdev_priv *np = netdev_priv(netdev);
3229 struct ice_vsi *vsi = np->vsi;
3230 int ret;
3231
3232
3233 if (!vid)
3234 return 0;
3235
3236
3237 if (!ice_vsi_is_vlan_pruning_ena(vsi)) {
3238 ret = ice_cfg_vlan_pruning(vsi, true, false);
3239 if (ret)
3240 return ret;
3241 }
3242
3243
3244
3245
3246 ret = ice_vsi_add_vlan(vsi, vid, ICE_FWD_TO_VSI);
3247 if (!ret)
3248 set_bit(ICE_VSI_VLAN_FLTR_CHANGED, vsi->state);
3249
3250 return ret;
3251}
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261static int
3262ice_vlan_rx_kill_vid(struct net_device *netdev, __always_unused __be16 proto,
3263 u16 vid)
3264{
3265 struct ice_netdev_priv *np = netdev_priv(netdev);
3266 struct ice_vsi *vsi = np->vsi;
3267 int ret;
3268
3269
3270 if (!vid)
3271 return 0;
3272
3273
3274
3275
3276 ret = ice_vsi_kill_vlan(vsi, vid);
3277 if (ret)
3278 return ret;
3279
3280
3281 if (vsi->num_vlan == 1 && ice_vsi_is_vlan_pruning_ena(vsi))
3282 ret = ice_cfg_vlan_pruning(vsi, false, false);
3283
3284 set_bit(ICE_VSI_VLAN_FLTR_CHANGED, vsi->state);
3285 return ret;
3286}
3287
3288
3289
3290
3291
3292
3293
3294static int ice_setup_pf_sw(struct ice_pf *pf)
3295{
3296 struct ice_vsi *vsi;
3297 int status = 0;
3298
3299 if (ice_is_reset_in_progress(pf->state))
3300 return -EBUSY;
3301
3302 vsi = ice_pf_vsi_setup(pf, pf->hw.port_info);
3303 if (!vsi)
3304 return -ENOMEM;
3305
3306 status = ice_cfg_netdev(vsi);
3307 if (status) {
3308 status = -ENODEV;
3309 goto unroll_vsi_setup;
3310 }
3311
3312 ice_vsi_cfg_frame_size(vsi);
3313
3314
3315 ice_dcbnl_setup(vsi);
3316
3317
3318
3319
3320
3321 ice_napi_add(vsi);
3322
3323 status = ice_set_cpu_rx_rmap(vsi);
3324 if (status) {
3325 dev_err(ice_pf_to_dev(pf), "Failed to set CPU Rx map VSI %d error %d\n",
3326 vsi->vsi_num, status);
3327 status = -EINVAL;
3328 goto unroll_napi_add;
3329 }
3330 status = ice_init_mac_fltr(pf);
3331 if (status)
3332 goto free_cpu_rx_map;
3333
3334 return status;
3335
3336free_cpu_rx_map:
3337 ice_free_cpu_rx_rmap(vsi);
3338
3339unroll_napi_add:
3340 if (vsi) {
3341 ice_napi_del(vsi);
3342 if (vsi->netdev) {
3343 clear_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state);
3344 free_netdev(vsi->netdev);
3345 vsi->netdev = NULL;
3346 }
3347 }
3348
3349unroll_vsi_setup:
3350 ice_vsi_release(vsi);
3351 return status;
3352}
3353
3354
3355
3356
3357
3358
3359
3360static u16
3361ice_get_avail_q_count(unsigned long *pf_qmap, struct mutex *lock, u16 size)
3362{
3363 unsigned long bit;
3364 u16 count = 0;
3365
3366 mutex_lock(lock);
3367 for_each_clear_bit(bit, pf_qmap, size)
3368 count++;
3369 mutex_unlock(lock);
3370
3371 return count;
3372}
3373
3374
3375
3376
3377
3378u16 ice_get_avail_txq_count(struct ice_pf *pf)
3379{
3380 return ice_get_avail_q_count(pf->avail_txqs, &pf->avail_q_mutex,
3381 pf->max_pf_txqs);
3382}
3383
3384
3385
3386
3387
3388u16 ice_get_avail_rxq_count(struct ice_pf *pf)
3389{
3390 return ice_get_avail_q_count(pf->avail_rxqs, &pf->avail_q_mutex,
3391 pf->max_pf_rxqs);
3392}
3393
3394
3395
3396
3397
3398static void ice_deinit_pf(struct ice_pf *pf)
3399{
3400 ice_service_task_stop(pf);
3401 mutex_destroy(&pf->sw_mutex);
3402 mutex_destroy(&pf->tc_mutex);
3403 mutex_destroy(&pf->avail_q_mutex);
3404
3405 if (pf->avail_txqs) {
3406 bitmap_free(pf->avail_txqs);
3407 pf->avail_txqs = NULL;
3408 }
3409
3410 if (pf->avail_rxqs) {
3411 bitmap_free(pf->avail_rxqs);
3412 pf->avail_rxqs = NULL;
3413 }
3414
3415 if (pf->ptp.clock)
3416 ptp_clock_unregister(pf->ptp.clock);
3417}
3418
3419
3420
3421
3422
3423static void ice_set_pf_caps(struct ice_pf *pf)
3424{
3425 struct ice_hw_func_caps *func_caps = &pf->hw.func_caps;
3426
3427 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
3428 clear_bit(ICE_FLAG_AUX_ENA, pf->flags);
3429 if (func_caps->common_cap.rdma) {
3430 set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
3431 set_bit(ICE_FLAG_AUX_ENA, pf->flags);
3432 }
3433 clear_bit(ICE_FLAG_DCB_CAPABLE, pf->flags);
3434 if (func_caps->common_cap.dcb)
3435 set_bit(ICE_FLAG_DCB_CAPABLE, pf->flags);
3436 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
3437 if (func_caps->common_cap.sr_iov_1_1) {
3438 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
3439 pf->num_vfs_supported = min_t(int, func_caps->num_allocd_vfs,
3440 ICE_MAX_VF_COUNT);
3441 }
3442 clear_bit(ICE_FLAG_RSS_ENA, pf->flags);
3443 if (func_caps->common_cap.rss_table_size)
3444 set_bit(ICE_FLAG_RSS_ENA, pf->flags);
3445
3446 clear_bit(ICE_FLAG_FD_ENA, pf->flags);
3447 if (func_caps->fd_fltr_guar > 0 || func_caps->fd_fltr_best_effort > 0) {
3448 u16 unused;
3449
3450
3451
3452
3453 pf->ctrl_vsi_idx = ICE_NO_VSI;
3454 set_bit(ICE_FLAG_FD_ENA, pf->flags);
3455
3456 ice_alloc_fd_guar_item(&pf->hw, &unused,
3457 func_caps->fd_fltr_guar);
3458
3459 ice_alloc_fd_shrd_item(&pf->hw, &unused,
3460 func_caps->fd_fltr_best_effort);
3461 }
3462
3463 clear_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags);
3464 if (func_caps->common_cap.ieee_1588)
3465 set_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags);
3466
3467 pf->max_pf_txqs = func_caps->common_cap.num_txq;
3468 pf->max_pf_rxqs = func_caps->common_cap.num_rxq;
3469}
3470
3471
3472
3473
3474
3475static int ice_init_pf(struct ice_pf *pf)
3476{
3477 ice_set_pf_caps(pf);
3478
3479 mutex_init(&pf->sw_mutex);
3480 mutex_init(&pf->tc_mutex);
3481
3482 INIT_HLIST_HEAD(&pf->aq_wait_list);
3483 spin_lock_init(&pf->aq_wait_lock);
3484 init_waitqueue_head(&pf->aq_wait_queue);
3485
3486 init_waitqueue_head(&pf->reset_wait_queue);
3487
3488
3489 timer_setup(&pf->serv_tmr, ice_service_timer, 0);
3490 pf->serv_tmr_period = HZ;
3491 INIT_WORK(&pf->serv_task, ice_service_task);
3492 clear_bit(ICE_SERVICE_SCHED, pf->state);
3493
3494 mutex_init(&pf->avail_q_mutex);
3495 pf->avail_txqs = bitmap_zalloc(pf->max_pf_txqs, GFP_KERNEL);
3496 if (!pf->avail_txqs)
3497 return -ENOMEM;
3498
3499 pf->avail_rxqs = bitmap_zalloc(pf->max_pf_rxqs, GFP_KERNEL);
3500 if (!pf->avail_rxqs) {
3501 devm_kfree(ice_pf_to_dev(pf), pf->avail_txqs);
3502 pf->avail_txqs = NULL;
3503 return -ENOMEM;
3504 }
3505
3506 return 0;
3507}
3508
3509
3510
3511
3512
3513
3514
3515
3516static int ice_ena_msix_range(struct ice_pf *pf)
3517{
3518 int num_cpus, v_left, v_actual, v_other, v_budget = 0;
3519 struct device *dev = ice_pf_to_dev(pf);
3520 int needed, err, i;
3521
3522 v_left = pf->hw.func_caps.common_cap.num_msix_vectors;
3523 num_cpus = num_online_cpus();
3524
3525
3526 needed = ICE_MIN_LAN_OICR_MSIX;
3527 if (v_left < needed)
3528 goto no_hw_vecs_left_err;
3529 v_budget += needed;
3530 v_left -= needed;
3531
3532
3533 if (test_bit(ICE_FLAG_FD_ENA, pf->flags)) {
3534 needed = ICE_FDIR_MSIX;
3535 if (v_left < needed)
3536 goto no_hw_vecs_left_err;
3537 v_budget += needed;
3538 v_left -= needed;
3539 }
3540
3541
3542 v_other = v_budget;
3543
3544
3545 needed = num_cpus;
3546 if (v_left < needed)
3547 goto no_hw_vecs_left_err;
3548 pf->num_lan_msix = needed;
3549 v_budget += needed;
3550 v_left -= needed;
3551
3552
3553 if (test_bit(ICE_FLAG_RDMA_ENA, pf->flags)) {
3554 needed = num_cpus + ICE_RDMA_NUM_AEQ_MSIX;
3555 if (v_left < needed)
3556 goto no_hw_vecs_left_err;
3557 pf->num_rdma_msix = needed;
3558 v_budget += needed;
3559 v_left -= needed;
3560 }
3561
3562 pf->msix_entries = devm_kcalloc(dev, v_budget,
3563 sizeof(*pf->msix_entries), GFP_KERNEL);
3564 if (!pf->msix_entries) {
3565 err = -ENOMEM;
3566 goto exit_err;
3567 }
3568
3569 for (i = 0; i < v_budget; i++)
3570 pf->msix_entries[i].entry = i;
3571
3572
3573 v_actual = pci_enable_msix_range(pf->pdev, pf->msix_entries,
3574 ICE_MIN_MSIX, v_budget);
3575 if (v_actual < 0) {
3576 dev_err(dev, "unable to reserve MSI-X vectors\n");
3577 err = v_actual;
3578 goto msix_err;
3579 }
3580
3581 if (v_actual < v_budget) {
3582 dev_warn(dev, "not enough OS MSI-X vectors. requested = %d, obtained = %d\n",
3583 v_budget, v_actual);
3584
3585 if (v_actual < ICE_MIN_MSIX) {
3586
3587 pci_disable_msix(pf->pdev);
3588 err = -ERANGE;
3589 goto msix_err;
3590 } else {
3591 int v_remain = v_actual - v_other;
3592 int v_rdma = 0, v_min_rdma = 0;
3593
3594 if (test_bit(ICE_FLAG_RDMA_ENA, pf->flags)) {
3595
3596
3597
3598 v_rdma = ICE_RDMA_NUM_AEQ_MSIX + 1;
3599 v_min_rdma = ICE_MIN_RDMA_MSIX;
3600 }
3601
3602 if (v_actual == ICE_MIN_MSIX ||
3603 v_remain < ICE_MIN_LAN_TXRX_MSIX + v_min_rdma) {
3604 dev_warn(dev, "Not enough MSI-X vectors to support RDMA.\n");
3605 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
3606
3607 pf->num_rdma_msix = 0;
3608 pf->num_lan_msix = ICE_MIN_LAN_TXRX_MSIX;
3609 } else if ((v_remain < ICE_MIN_LAN_TXRX_MSIX + v_rdma) ||
3610 (v_remain - v_rdma < v_rdma)) {
3611
3612
3613
3614 pf->num_rdma_msix = v_min_rdma;
3615 pf->num_lan_msix = v_remain - v_min_rdma;
3616 } else {
3617
3618
3619
3620 pf->num_rdma_msix = (v_remain - ICE_RDMA_NUM_AEQ_MSIX) / 2 +
3621 ICE_RDMA_NUM_AEQ_MSIX;
3622 pf->num_lan_msix = v_remain - pf->num_rdma_msix;
3623 }
3624
3625 dev_notice(dev, "Enabled %d MSI-X vectors for LAN traffic.\n",
3626 pf->num_lan_msix);
3627
3628 if (test_bit(ICE_FLAG_RDMA_ENA, pf->flags))
3629 dev_notice(dev, "Enabled %d MSI-X vectors for RDMA.\n",
3630 pf->num_rdma_msix);
3631 }
3632 }
3633
3634 return v_actual;
3635
3636msix_err:
3637 devm_kfree(dev, pf->msix_entries);
3638 goto exit_err;
3639
3640no_hw_vecs_left_err:
3641 dev_err(dev, "not enough device MSI-X vectors. requested = %d, available = %d\n",
3642 needed, v_left);
3643 err = -ERANGE;
3644exit_err:
3645 pf->num_rdma_msix = 0;
3646 pf->num_lan_msix = 0;
3647 return err;
3648}
3649
3650
3651
3652
3653
3654static void ice_dis_msix(struct ice_pf *pf)
3655{
3656 pci_disable_msix(pf->pdev);
3657 devm_kfree(ice_pf_to_dev(pf), pf->msix_entries);
3658 pf->msix_entries = NULL;
3659}
3660
3661
3662
3663
3664
3665static void ice_clear_interrupt_scheme(struct ice_pf *pf)
3666{
3667 ice_dis_msix(pf);
3668
3669 if (pf->irq_tracker) {
3670 devm_kfree(ice_pf_to_dev(pf), pf->irq_tracker);
3671 pf->irq_tracker = NULL;
3672 }
3673}
3674
3675
3676
3677
3678
3679static int ice_init_interrupt_scheme(struct ice_pf *pf)
3680{
3681 int vectors;
3682
3683 vectors = ice_ena_msix_range(pf);
3684
3685 if (vectors < 0)
3686 return vectors;
3687
3688
3689 pf->irq_tracker = devm_kzalloc(ice_pf_to_dev(pf),
3690 struct_size(pf->irq_tracker, list, vectors),
3691 GFP_KERNEL);
3692 if (!pf->irq_tracker) {
3693 ice_dis_msix(pf);
3694 return -ENOMEM;
3695 }
3696
3697
3698 pf->num_avail_sw_msix = (u16)vectors;
3699 pf->irq_tracker->num_entries = (u16)vectors;
3700 pf->irq_tracker->end = pf->irq_tracker->num_entries;
3701
3702 return 0;
3703}
3704
3705
3706
3707
3708
3709
3710
3711
3712bool ice_is_wol_supported(struct ice_hw *hw)
3713{
3714 u16 wol_ctrl;
3715
3716
3717
3718
3719 if (ice_read_sr_word(hw, ICE_SR_NVM_WOL_CFG, &wol_ctrl))
3720 return false;
3721
3722 return !(BIT(hw->port_info->lport) & wol_ctrl);
3723}
3724
3725
3726
3727
3728
3729
3730
3731
3732
3733
3734
3735int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx)
3736{
3737 struct ice_pf *pf = vsi->back;
3738 int err = 0, timeout = 50;
3739
3740 if (!new_rx && !new_tx)
3741 return -EINVAL;
3742
3743 while (test_and_set_bit(ICE_CFG_BUSY, pf->state)) {
3744 timeout--;
3745 if (!timeout)
3746 return -EBUSY;
3747 usleep_range(1000, 2000);
3748 }
3749
3750 if (new_tx)
3751 vsi->req_txq = (u16)new_tx;
3752 if (new_rx)
3753 vsi->req_rxq = (u16)new_rx;
3754
3755
3756 if (!netif_running(vsi->netdev)) {
3757 ice_vsi_rebuild(vsi, false);
3758 dev_dbg(ice_pf_to_dev(pf), "Link is down, queue count change happens when link is brought up\n");
3759 goto done;
3760 }
3761
3762 ice_vsi_close(vsi);
3763 ice_vsi_rebuild(vsi, false);
3764 ice_pf_dcb_recfg(pf);
3765 ice_vsi_open(vsi);
3766done:
3767 clear_bit(ICE_CFG_BUSY, pf->state);
3768 return err;
3769}
3770
3771
3772
3773
3774
3775
3776
3777
3778static void ice_set_safe_mode_vlan_cfg(struct ice_pf *pf)
3779{
3780 struct ice_vsi *vsi = ice_get_main_vsi(pf);
3781 struct ice_vsi_ctx *ctxt;
3782 enum ice_status status;
3783 struct ice_hw *hw;
3784
3785 if (!vsi)
3786 return;
3787
3788 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
3789 if (!ctxt)
3790 return;
3791
3792 hw = &pf->hw;
3793 ctxt->info = vsi->info;
3794
3795 ctxt->info.valid_sections =
3796 cpu_to_le16(ICE_AQ_VSI_PROP_VLAN_VALID |
3797 ICE_AQ_VSI_PROP_SECURITY_VALID |
3798 ICE_AQ_VSI_PROP_SW_VALID);
3799
3800
3801 ctxt->info.sec_flags &= ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
3802 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
3803
3804
3805 ctxt->info.sw_flags2 &= ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
3806
3807
3808 ctxt->info.vlan_flags = ICE_AQ_VSI_VLAN_MODE_ALL |
3809 ICE_AQ_VSI_VLAN_EMOD_NOTHING;
3810
3811 status = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
3812 if (status) {
3813 dev_err(ice_pf_to_dev(vsi->back), "Failed to update VSI for safe mode VLANs, err %s aq_err %s\n",
3814 ice_stat_str(status),
3815 ice_aq_str(hw->adminq.sq_last_status));
3816 } else {
3817 vsi->info.sec_flags = ctxt->info.sec_flags;
3818 vsi->info.sw_flags2 = ctxt->info.sw_flags2;
3819 vsi->info.vlan_flags = ctxt->info.vlan_flags;
3820 }
3821
3822 kfree(ctxt);
3823}
3824
3825
3826
3827
3828
3829
3830static void
3831ice_log_pkg_init(struct ice_hw *hw, enum ice_status *status)
3832{
3833 struct ice_pf *pf = (struct ice_pf *)hw->back;
3834 struct device *dev = ice_pf_to_dev(pf);
3835
3836 switch (*status) {
3837 case ICE_SUCCESS:
3838
3839
3840
3841
3842 if (hw->pkg_ver.major == hw->active_pkg_ver.major &&
3843 hw->pkg_ver.minor == hw->active_pkg_ver.minor &&
3844 hw->pkg_ver.update == hw->active_pkg_ver.update &&
3845 hw->pkg_ver.draft == hw->active_pkg_ver.draft &&
3846 !memcmp(hw->pkg_name, hw->active_pkg_name,
3847 sizeof(hw->pkg_name))) {
3848 if (hw->pkg_dwnld_status == ICE_AQ_RC_EEXIST)
3849 dev_info(dev, "DDP package already present on device: %s version %d.%d.%d.%d\n",
3850 hw->active_pkg_name,
3851 hw->active_pkg_ver.major,
3852 hw->active_pkg_ver.minor,
3853 hw->active_pkg_ver.update,
3854 hw->active_pkg_ver.draft);
3855 else
3856 dev_info(dev, "The DDP package was successfully loaded: %s version %d.%d.%d.%d\n",
3857 hw->active_pkg_name,
3858 hw->active_pkg_ver.major,
3859 hw->active_pkg_ver.minor,
3860 hw->active_pkg_ver.update,
3861 hw->active_pkg_ver.draft);
3862 } else if (hw->active_pkg_ver.major != ICE_PKG_SUPP_VER_MAJ ||
3863 hw->active_pkg_ver.minor != ICE_PKG_SUPP_VER_MNR) {
3864 dev_err(dev, "The device has a DDP package that is not supported by the driver. The device has package '%s' version %d.%d.x.x. The driver requires version %d.%d.x.x. Entering Safe Mode.\n",
3865 hw->active_pkg_name,
3866 hw->active_pkg_ver.major,
3867 hw->active_pkg_ver.minor,
3868 ICE_PKG_SUPP_VER_MAJ, ICE_PKG_SUPP_VER_MNR);
3869 *status = ICE_ERR_NOT_SUPPORTED;
3870 } else if (hw->active_pkg_ver.major == ICE_PKG_SUPP_VER_MAJ &&
3871 hw->active_pkg_ver.minor == ICE_PKG_SUPP_VER_MNR) {
3872 dev_info(dev, "The driver could not load the DDP package file because a compatible DDP package is already present on the device. The device has package '%s' version %d.%d.%d.%d. The package file found by the driver: '%s' version %d.%d.%d.%d.\n",
3873 hw->active_pkg_name,
3874 hw->active_pkg_ver.major,
3875 hw->active_pkg_ver.minor,
3876 hw->active_pkg_ver.update,
3877 hw->active_pkg_ver.draft,
3878 hw->pkg_name,
3879 hw->pkg_ver.major,
3880 hw->pkg_ver.minor,
3881 hw->pkg_ver.update,
3882 hw->pkg_ver.draft);
3883 } else {
3884 dev_err(dev, "An unknown error occurred when loading the DDP package, please reboot the system. If the problem persists, update the NVM. Entering Safe Mode.\n");
3885 *status = ICE_ERR_NOT_SUPPORTED;
3886 }
3887 break;
3888 case ICE_ERR_FW_DDP_MISMATCH:
3889 dev_err(dev, "The firmware loaded on the device is not compatible with the DDP package. Please update the device's NVM. Entering safe mode.\n");
3890 break;
3891 case ICE_ERR_BUF_TOO_SHORT:
3892 case ICE_ERR_CFG:
3893 dev_err(dev, "The DDP package file is invalid. Entering Safe Mode.\n");
3894 break;
3895 case ICE_ERR_NOT_SUPPORTED:
3896
3897 if (hw->pkg_ver.major > ICE_PKG_SUPP_VER_MAJ ||
3898 (hw->pkg_ver.major == ICE_PKG_SUPP_VER_MAJ &&
3899 hw->pkg_ver.minor > ICE_PKG_SUPP_VER_MNR))
3900 dev_err(dev, "The DDP package file version is higher than the driver supports. Please use an updated driver. Entering Safe Mode.\n");
3901 else if (hw->pkg_ver.major < ICE_PKG_SUPP_VER_MAJ ||
3902 (hw->pkg_ver.major == ICE_PKG_SUPP_VER_MAJ &&
3903 hw->pkg_ver.minor < ICE_PKG_SUPP_VER_MNR))
3904 dev_err(dev, "The DDP package file version is lower than the driver supports. The driver requires version %d.%d.x.x. Please use an updated DDP Package file. Entering Safe Mode.\n",
3905 ICE_PKG_SUPP_VER_MAJ, ICE_PKG_SUPP_VER_MNR);
3906 break;
3907 case ICE_ERR_AQ_ERROR:
3908 switch (hw->pkg_dwnld_status) {
3909 case ICE_AQ_RC_ENOSEC:
3910 case ICE_AQ_RC_EBADSIG:
3911 dev_err(dev, "The DDP package could not be loaded because its signature is not valid. Please use a valid DDP Package. Entering Safe Mode.\n");
3912 return;
3913 case ICE_AQ_RC_ESVN:
3914 dev_err(dev, "The DDP Package could not be loaded because its security revision is too low. Please use an updated DDP Package. Entering Safe Mode.\n");
3915 return;
3916 case ICE_AQ_RC_EBADMAN:
3917 case ICE_AQ_RC_EBADBUF:
3918 dev_err(dev, "An error occurred on the device while loading the DDP package. The device will be reset.\n");
3919
3920 if (ice_check_reset(hw))
3921 dev_err(dev, "Error resetting device. Please reload the driver\n");
3922 return;
3923 default:
3924 break;
3925 }
3926 fallthrough;
3927 default:
3928 dev_err(dev, "An unknown error (%d) occurred when loading the DDP package. Entering Safe Mode.\n",
3929 *status);
3930 break;
3931 }
3932}
3933
3934
3935
3936
3937
3938
3939
3940
3941
3942static void
3943ice_load_pkg(const struct firmware *firmware, struct ice_pf *pf)
3944{
3945 enum ice_status status = ICE_ERR_PARAM;
3946 struct device *dev = ice_pf_to_dev(pf);
3947 struct ice_hw *hw = &pf->hw;
3948
3949
3950 if (firmware && !hw->pkg_copy) {
3951 status = ice_copy_and_init_pkg(hw, firmware->data,
3952 firmware->size);
3953 ice_log_pkg_init(hw, &status);
3954 } else if (!firmware && hw->pkg_copy) {
3955
3956 status = ice_init_pkg(hw, hw->pkg_copy, hw->pkg_size);
3957 ice_log_pkg_init(hw, &status);
3958 } else {
3959 dev_err(dev, "The DDP package file failed to load. Entering Safe Mode.\n");
3960 }
3961
3962 if (status) {
3963
3964 clear_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
3965 return;
3966 }
3967
3968
3969
3970
3971 set_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
3972}
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982static void ice_verify_cacheline_size(struct ice_pf *pf)
3983{
3984 if (rd32(&pf->hw, GLPCI_CNF2) & GLPCI_CNF2_CACHELINE_SIZE_M)
3985 dev_warn(ice_pf_to_dev(pf), "%d Byte cache line assumption is invalid, driver may have Tx timeouts!\n",
3986 ICE_CACHE_LINE_BYTES);
3987}
3988
3989
3990
3991
3992
3993
3994
3995static enum ice_status ice_send_version(struct ice_pf *pf)
3996{
3997 struct ice_driver_ver dv;
3998
3999 dv.major_ver = 0xff;
4000 dv.minor_ver = 0xff;
4001 dv.build_ver = 0xff;
4002 dv.subbuild_ver = 0;
4003 strscpy((char *)dv.driver_string, UTS_RELEASE,
4004 sizeof(dv.driver_string));
4005 return ice_aq_send_driver_ver(&pf->hw, &dv, NULL);
4006}
4007
4008
4009
4010
4011
4012
4013
4014static int ice_init_fdir(struct ice_pf *pf)
4015{
4016 struct device *dev = ice_pf_to_dev(pf);
4017 struct ice_vsi *ctrl_vsi;
4018 int err;
4019
4020
4021
4022
4023 ctrl_vsi = ice_ctrl_vsi_setup(pf, pf->hw.port_info);
4024 if (!ctrl_vsi) {
4025 dev_dbg(dev, "could not create control VSI\n");
4026 return -ENOMEM;
4027 }
4028
4029 err = ice_vsi_open_ctrl(ctrl_vsi);
4030 if (err) {
4031 dev_dbg(dev, "could not open control VSI\n");
4032 goto err_vsi_open;
4033 }
4034
4035 mutex_init(&pf->hw.fdir_fltr_lock);
4036
4037 err = ice_fdir_create_dflt_rules(pf);
4038 if (err)
4039 goto err_fdir_rule;
4040
4041 return 0;
4042
4043err_fdir_rule:
4044 ice_fdir_release_flows(&pf->hw);
4045 ice_vsi_close(ctrl_vsi);
4046err_vsi_open:
4047 ice_vsi_release(ctrl_vsi);
4048 if (pf->ctrl_vsi_idx != ICE_NO_VSI) {
4049 pf->vsi[pf->ctrl_vsi_idx] = NULL;
4050 pf->ctrl_vsi_idx = ICE_NO_VSI;
4051 }
4052 return err;
4053}
4054
4055
4056
4057
4058
4059static char *ice_get_opt_fw_name(struct ice_pf *pf)
4060{
4061
4062
4063
4064 struct pci_dev *pdev = pf->pdev;
4065 char *opt_fw_filename;
4066 u64 dsn;
4067
4068
4069
4070
4071 dsn = pci_get_dsn(pdev);
4072 if (!dsn)
4073 return NULL;
4074
4075 opt_fw_filename = kzalloc(NAME_MAX, GFP_KERNEL);
4076 if (!opt_fw_filename)
4077 return NULL;
4078
4079 snprintf(opt_fw_filename, NAME_MAX, "%sice-%016llx.pkg",
4080 ICE_DDP_PKG_PATH, dsn);
4081
4082 return opt_fw_filename;
4083}
4084
4085
4086
4087
4088
4089static void ice_request_fw(struct ice_pf *pf)
4090{
4091 char *opt_fw_filename = ice_get_opt_fw_name(pf);
4092 const struct firmware *firmware = NULL;
4093 struct device *dev = ice_pf_to_dev(pf);
4094 int err = 0;
4095
4096
4097
4098
4099
4100 if (opt_fw_filename) {
4101 err = firmware_request_nowarn(&firmware, opt_fw_filename, dev);
4102 if (err) {
4103 kfree(opt_fw_filename);
4104 goto dflt_pkg_load;
4105 }
4106
4107
4108 ice_load_pkg(firmware, pf);
4109 kfree(opt_fw_filename);
4110 release_firmware(firmware);
4111 return;
4112 }
4113
4114dflt_pkg_load:
4115 err = request_firmware(&firmware, ICE_DDP_PKG_FILE, dev);
4116 if (err) {
4117 dev_err(dev, "The DDP package file was not found or could not be read. Entering Safe Mode\n");
4118 return;
4119 }
4120
4121
4122 ice_load_pkg(firmware, pf);
4123 release_firmware(firmware);
4124}
4125
4126
4127
4128
4129
4130static void ice_print_wake_reason(struct ice_pf *pf)
4131{
4132 u32 wus = pf->wakeup_reason;
4133 const char *wake_str;
4134
4135
4136 if (!wus)
4137 return;
4138
4139 if (wus & PFPM_WUS_LNKC_M)
4140 wake_str = "Link\n";
4141 else if (wus & PFPM_WUS_MAG_M)
4142 wake_str = "Magic Packet\n";
4143 else if (wus & PFPM_WUS_MNG_M)
4144 wake_str = "Management\n";
4145 else if (wus & PFPM_WUS_FW_RST_WK_M)
4146 wake_str = "Firmware Reset\n";
4147 else
4148 wake_str = "Unknown\n";
4149
4150 dev_info(ice_pf_to_dev(pf), "Wake reason: %s", wake_str);
4151}
4152
4153
4154
4155
4156
4157static int ice_register_netdev(struct ice_pf *pf)
4158{
4159 struct ice_vsi *vsi;
4160 int err = 0;
4161
4162 vsi = ice_get_main_vsi(pf);
4163 if (!vsi || !vsi->netdev)
4164 return -EIO;
4165
4166 err = register_netdev(vsi->netdev);
4167 if (err)
4168 goto err_register_netdev;
4169
4170 set_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state);
4171 netif_carrier_off(vsi->netdev);
4172 netif_tx_stop_all_queues(vsi->netdev);
4173 err = ice_devlink_create_port(vsi);
4174 if (err)
4175 goto err_devlink_create;
4176
4177 devlink_port_type_eth_set(&vsi->devlink_port, vsi->netdev);
4178
4179 return 0;
4180err_devlink_create:
4181 unregister_netdev(vsi->netdev);
4182 clear_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state);
4183err_register_netdev:
4184 free_netdev(vsi->netdev);
4185 vsi->netdev = NULL;
4186 clear_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state);
4187 return err;
4188}
4189
4190
4191
4192
4193
4194
4195
4196
4197static int
4198ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent)
4199{
4200 struct device *dev = &pdev->dev;
4201 struct ice_pf *pf;
4202 struct ice_hw *hw;
4203 int i, err;
4204
4205 if (pdev->is_virtfn) {
4206 dev_err(dev, "can't probe a virtual function\n");
4207 return -EINVAL;
4208 }
4209
4210
4211
4212
4213 err = pcim_enable_device(pdev);
4214 if (err)
4215 return err;
4216
4217 err = pcim_iomap_regions(pdev, BIT(ICE_BAR0), dev_driver_string(dev));
4218 if (err) {
4219 dev_err(dev, "BAR0 I/O map error %d\n", err);
4220 return err;
4221 }
4222
4223 pf = ice_allocate_pf(dev);
4224 if (!pf)
4225 return -ENOMEM;
4226
4227
4228 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
4229 if (err)
4230 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
4231 if (err) {
4232 dev_err(dev, "DMA configuration failed: 0x%x\n", err);
4233 return err;
4234 }
4235
4236 pci_enable_pcie_error_reporting(pdev);
4237 pci_set_master(pdev);
4238
4239 pf->pdev = pdev;
4240 pci_set_drvdata(pdev, pf);
4241 set_bit(ICE_DOWN, pf->state);
4242
4243 set_bit(ICE_SERVICE_DIS, pf->state);
4244
4245 hw = &pf->hw;
4246 hw->hw_addr = pcim_iomap_table(pdev)[ICE_BAR0];
4247 pci_save_state(pdev);
4248
4249 hw->back = pf;
4250 hw->vendor_id = pdev->vendor;
4251 hw->device_id = pdev->device;
4252 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
4253 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4254 hw->subsystem_device_id = pdev->subsystem_device;
4255 hw->bus.device = PCI_SLOT(pdev->devfn);
4256 hw->bus.func = PCI_FUNC(pdev->devfn);
4257 ice_set_ctrlq_len(hw);
4258
4259 pf->msg_enable = netif_msg_init(debug, ICE_DFLT_NETIF_M);
4260
4261 err = ice_devlink_register(pf);
4262 if (err) {
4263 dev_err(dev, "ice_devlink_register failed: %d\n", err);
4264 goto err_exit_unroll;
4265 }
4266
4267#ifndef CONFIG_DYNAMIC_DEBUG
4268 if (debug < -1)
4269 hw->debug_mask = debug;
4270#endif
4271
4272 err = ice_init_hw(hw);
4273 if (err) {
4274 dev_err(dev, "ice_init_hw failed: %d\n", err);
4275 err = -EIO;
4276 goto err_exit_unroll;
4277 }
4278
4279 ice_request_fw(pf);
4280
4281
4282
4283
4284
4285 if (ice_is_safe_mode(pf)) {
4286 dev_err(dev, "Package download failed. Advanced features disabled - Device now in Safe Mode\n");
4287
4288
4289
4290
4291
4292 ice_set_safe_mode_caps(hw);
4293 }
4294
4295 err = ice_init_pf(pf);
4296 if (err) {
4297 dev_err(dev, "ice_init_pf failed: %d\n", err);
4298 goto err_init_pf_unroll;
4299 }
4300
4301 ice_devlink_init_regions(pf);
4302
4303 pf->hw.udp_tunnel_nic.set_port = ice_udp_tunnel_set_port;
4304 pf->hw.udp_tunnel_nic.unset_port = ice_udp_tunnel_unset_port;
4305 pf->hw.udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
4306 pf->hw.udp_tunnel_nic.shared = &pf->hw.udp_tunnel_shared;
4307 i = 0;
4308 if (pf->hw.tnl.valid_count[TNL_VXLAN]) {
4309 pf->hw.udp_tunnel_nic.tables[i].n_entries =
4310 pf->hw.tnl.valid_count[TNL_VXLAN];
4311 pf->hw.udp_tunnel_nic.tables[i].tunnel_types =
4312 UDP_TUNNEL_TYPE_VXLAN;
4313 i++;
4314 }
4315 if (pf->hw.tnl.valid_count[TNL_GENEVE]) {
4316 pf->hw.udp_tunnel_nic.tables[i].n_entries =
4317 pf->hw.tnl.valid_count[TNL_GENEVE];
4318 pf->hw.udp_tunnel_nic.tables[i].tunnel_types =
4319 UDP_TUNNEL_TYPE_GENEVE;
4320 i++;
4321 }
4322
4323 pf->num_alloc_vsi = hw->func_caps.guar_num_vsi;
4324 if (!pf->num_alloc_vsi) {
4325 err = -EIO;
4326 goto err_init_pf_unroll;
4327 }
4328 if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
4329 dev_warn(&pf->pdev->dev,
4330 "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
4331 pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
4332 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
4333 }
4334
4335 pf->vsi = devm_kcalloc(dev, pf->num_alloc_vsi, sizeof(*pf->vsi),
4336 GFP_KERNEL);
4337 if (!pf->vsi) {
4338 err = -ENOMEM;
4339 goto err_init_pf_unroll;
4340 }
4341
4342 err = ice_init_interrupt_scheme(pf);
4343 if (err) {
4344 dev_err(dev, "ice_init_interrupt_scheme failed: %d\n", err);
4345 err = -EIO;
4346 goto err_init_vsi_unroll;
4347 }
4348
4349
4350
4351
4352
4353
4354 err = ice_req_irq_msix_misc(pf);
4355 if (err) {
4356 dev_err(dev, "setup of misc vector failed: %d\n", err);
4357 goto err_init_interrupt_unroll;
4358 }
4359
4360
4361 pf->first_sw = devm_kzalloc(dev, sizeof(*pf->first_sw), GFP_KERNEL);
4362 if (!pf->first_sw) {
4363 err = -ENOMEM;
4364 goto err_msix_misc_unroll;
4365 }
4366
4367 if (hw->evb_veb)
4368 pf->first_sw->bridge_mode = BRIDGE_MODE_VEB;
4369 else
4370 pf->first_sw->bridge_mode = BRIDGE_MODE_VEPA;
4371
4372 pf->first_sw->pf = pf;
4373
4374
4375 pf->first_sw->sw_id = hw->port_info->sw_id;
4376
4377 err = ice_setup_pf_sw(pf);
4378 if (err) {
4379 dev_err(dev, "probe failed due to setup PF switch: %d\n", err);
4380 goto err_alloc_sw_unroll;
4381 }
4382
4383 clear_bit(ICE_SERVICE_DIS, pf->state);
4384
4385
4386 err = ice_send_version(pf);
4387 if (err) {
4388 dev_err(dev, "probe failed sending driver version %s. error: %d\n",
4389 UTS_RELEASE, err);
4390 goto err_send_version_unroll;
4391 }
4392
4393
4394 mod_timer(&pf->serv_tmr, round_jiffies(jiffies + pf->serv_tmr_period));
4395
4396 err = ice_init_link_events(pf->hw.port_info);
4397 if (err) {
4398 dev_err(dev, "ice_init_link_events failed: %d\n", err);
4399 goto err_send_version_unroll;
4400 }
4401
4402
4403 err = ice_init_nvm_phy_type(pf->hw.port_info);
4404 if (err)
4405 dev_err(dev, "ice_init_nvm_phy_type failed: %d\n", err);
4406
4407
4408 err = ice_update_link_info(pf->hw.port_info);
4409 if (err)
4410 dev_err(dev, "ice_update_link_info failed: %d\n", err);
4411
4412 ice_init_link_dflt_override(pf->hw.port_info);
4413
4414 ice_check_module_power(pf, pf->hw.port_info->phy.link_info.link_cfg_err);
4415
4416
4417 if (pf->hw.port_info->phy.link_info.link_info &
4418 ICE_AQ_MEDIA_AVAILABLE) {
4419
4420 err = ice_init_phy_user_cfg(pf->hw.port_info);
4421 if (err)
4422 dev_err(dev, "ice_init_phy_user_cfg failed: %d\n", err);
4423
4424 if (!test_bit(ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, pf->flags)) {
4425 struct ice_vsi *vsi = ice_get_main_vsi(pf);
4426
4427 if (vsi)
4428 ice_configure_phy(vsi);
4429 }
4430 } else {
4431 set_bit(ICE_FLAG_NO_MEDIA, pf->flags);
4432 }
4433
4434 ice_verify_cacheline_size(pf);
4435
4436
4437 pf->wakeup_reason = rd32(hw, PFPM_WUS);
4438
4439
4440 ice_print_wake_reason(pf);
4441
4442
4443 wr32(hw, PFPM_WUS, U32_MAX);
4444
4445
4446 device_set_wakeup_enable(dev, false);
4447
4448 if (ice_is_safe_mode(pf)) {
4449 ice_set_safe_mode_vlan_cfg(pf);
4450 goto probe_done;
4451 }
4452
4453
4454 if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags))
4455 ice_ptp_init(pf);
4456
4457
4458 if (ice_init_fdir(pf))
4459 dev_err(dev, "could not initialize flow director\n");
4460
4461
4462 if (ice_init_pf_dcb(pf, false)) {
4463 clear_bit(ICE_FLAG_DCB_CAPABLE, pf->flags);
4464 clear_bit(ICE_FLAG_DCB_ENA, pf->flags);
4465 } else {
4466 ice_cfg_lldp_mib_change(&pf->hw, true);
4467 }
4468
4469 if (ice_init_lag(pf))
4470 dev_warn(dev, "Failed to init link aggregation support\n");
4471
4472
4473 pcie_print_link_status(pf->pdev);
4474
4475probe_done:
4476 err = ice_register_netdev(pf);
4477 if (err)
4478 goto err_netdev_reg;
4479
4480
4481 clear_bit(ICE_DOWN, pf->state);
4482 if (ice_is_aux_ena(pf)) {
4483 pf->aux_idx = ida_alloc(&ice_aux_ida, GFP_KERNEL);
4484 if (pf->aux_idx < 0) {
4485 dev_err(dev, "Failed to allocate device ID for AUX driver\n");
4486 err = -ENOMEM;
4487 goto err_netdev_reg;
4488 }
4489
4490 err = ice_init_rdma(pf);
4491 if (err) {
4492 dev_err(dev, "Failed to initialize RDMA: %d\n", err);
4493 err = -EIO;
4494 goto err_init_aux_unroll;
4495 }
4496 } else {
4497 dev_warn(dev, "RDMA is not supported on this device\n");
4498 }
4499
4500 return 0;
4501
4502err_init_aux_unroll:
4503 pf->adev = NULL;
4504 ida_free(&ice_aux_ida, pf->aux_idx);
4505err_netdev_reg:
4506err_send_version_unroll:
4507 ice_vsi_release_all(pf);
4508err_alloc_sw_unroll:
4509 set_bit(ICE_SERVICE_DIS, pf->state);
4510 set_bit(ICE_DOWN, pf->state);
4511 devm_kfree(dev, pf->first_sw);
4512err_msix_misc_unroll:
4513 ice_free_irq_msix_misc(pf);
4514err_init_interrupt_unroll:
4515 ice_clear_interrupt_scheme(pf);
4516err_init_vsi_unroll:
4517 devm_kfree(dev, pf->vsi);
4518err_init_pf_unroll:
4519 ice_deinit_pf(pf);
4520 ice_devlink_destroy_regions(pf);
4521 ice_deinit_hw(hw);
4522err_exit_unroll:
4523 ice_devlink_unregister(pf);
4524 pci_disable_pcie_error_reporting(pdev);
4525 pci_disable_device(pdev);
4526 return err;
4527}
4528
4529
4530
4531
4532
4533
4534
4535static void ice_set_wake(struct ice_pf *pf)
4536{
4537 struct ice_hw *hw = &pf->hw;
4538 bool wol = pf->wol_ena;
4539
4540
4541 wr32(hw, PFPM_WUS, U32_MAX);
4542
4543
4544 wr32(hw, PFPM_APM, wol ? PFPM_APM_APME_M : 0);
4545
4546
4547 wr32(hw, PFPM_WUFC, wol ? PFPM_WUFC_MAG_M : 0);
4548}
4549
4550
4551
4552
4553
4554
4555
4556
4557
4558static void ice_setup_mc_magic_wake(struct ice_pf *pf)
4559{
4560 struct device *dev = ice_pf_to_dev(pf);
4561 struct ice_hw *hw = &pf->hw;
4562 enum ice_status status;
4563 u8 mac_addr[ETH_ALEN];
4564 struct ice_vsi *vsi;
4565 u8 flags;
4566
4567 if (!pf->wol_ena)
4568 return;
4569
4570 vsi = ice_get_main_vsi(pf);
4571 if (!vsi)
4572 return;
4573
4574
4575 if (vsi->netdev)
4576 ether_addr_copy(mac_addr, vsi->netdev->dev_addr);
4577 else
4578 ether_addr_copy(mac_addr, vsi->port_info->mac.perm_addr);
4579
4580 flags = ICE_AQC_MAN_MAC_WR_MC_MAG_EN |
4581 ICE_AQC_MAN_MAC_UPDATE_LAA_WOL |
4582 ICE_AQC_MAN_MAC_WR_WOL_LAA_PFR_KEEP;
4583
4584 status = ice_aq_manage_mac_write(hw, mac_addr, flags, NULL);
4585 if (status)
4586 dev_err(dev, "Failed to enable Multicast Magic Packet wake, err %s aq_err %s\n",
4587 ice_stat_str(status),
4588 ice_aq_str(hw->adminq.sq_last_status));
4589}
4590
4591
4592
4593
4594
4595static void ice_remove(struct pci_dev *pdev)
4596{
4597 struct ice_pf *pf = pci_get_drvdata(pdev);
4598 int i;
4599
4600 if (!pf)
4601 return;
4602
4603 for (i = 0; i < ICE_MAX_RESET_WAIT; i++) {
4604 if (!ice_is_reset_in_progress(pf->state))
4605 break;
4606 msleep(100);
4607 }
4608
4609 if (test_bit(ICE_FLAG_SRIOV_ENA, pf->flags)) {
4610 set_bit(ICE_VF_RESETS_DISABLED, pf->state);
4611 ice_free_vfs(pf);
4612 }
4613
4614 ice_service_task_stop(pf);
4615
4616 ice_aq_cancel_waiting_tasks(pf);
4617 ice_unplug_aux_dev(pf);
4618 ida_free(&ice_aux_ida, pf->aux_idx);
4619 set_bit(ICE_DOWN, pf->state);
4620
4621 mutex_destroy(&(&pf->hw)->fdir_fltr_lock);
4622 ice_deinit_lag(pf);
4623 if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags))
4624 ice_ptp_release(pf);
4625 if (!ice_is_safe_mode(pf))
4626 ice_remove_arfs(pf);
4627 ice_setup_mc_magic_wake(pf);
4628 ice_vsi_release_all(pf);
4629 ice_set_wake(pf);
4630 ice_free_irq_msix_misc(pf);
4631 ice_for_each_vsi(pf, i) {
4632 if (!pf->vsi[i])
4633 continue;
4634 ice_vsi_free_q_vectors(pf->vsi[i]);
4635 }
4636 ice_deinit_pf(pf);
4637 ice_devlink_destroy_regions(pf);
4638 ice_deinit_hw(&pf->hw);
4639 ice_devlink_unregister(pf);
4640
4641
4642
4643
4644
4645 ice_reset(&pf->hw, ICE_RESET_PFR);
4646 pci_wait_for_pending_transaction(pdev);
4647 ice_clear_interrupt_scheme(pf);
4648 pci_disable_pcie_error_reporting(pdev);
4649 pci_disable_device(pdev);
4650}
4651
4652
4653
4654
4655
4656static void ice_shutdown(struct pci_dev *pdev)
4657{
4658 struct ice_pf *pf = pci_get_drvdata(pdev);
4659
4660 ice_remove(pdev);
4661
4662 if (system_state == SYSTEM_POWER_OFF) {
4663 pci_wake_from_d3(pdev, pf->wol_ena);
4664 pci_set_power_state(pdev, PCI_D3hot);
4665 }
4666}
4667
4668#ifdef CONFIG_PM
4669
4670
4671
4672
4673
4674
4675static void ice_prepare_for_shutdown(struct ice_pf *pf)
4676{
4677 struct ice_hw *hw = &pf->hw;
4678 u32 v;
4679
4680
4681 if (ice_check_sq_alive(hw, &hw->mailboxq))
4682 ice_vc_notify_reset(pf);
4683
4684 dev_dbg(ice_pf_to_dev(pf), "Tearing down internal switch for shutdown\n");
4685
4686
4687 ice_pf_dis_all_vsi(pf, false);
4688
4689 ice_for_each_vsi(pf, v)
4690 if (pf->vsi[v])
4691 pf->vsi[v]->vsi_num = 0;
4692
4693 ice_shutdown_all_ctrlq(hw);
4694}
4695
4696
4697
4698
4699
4700
4701
4702
4703
4704
4705
4706static int ice_reinit_interrupt_scheme(struct ice_pf *pf)
4707{
4708 struct device *dev = ice_pf_to_dev(pf);
4709 int ret, v;
4710
4711
4712
4713
4714
4715 ret = ice_init_interrupt_scheme(pf);
4716 if (ret) {
4717 dev_err(dev, "Failed to re-initialize interrupt %d\n", ret);
4718 return ret;
4719 }
4720
4721
4722 ice_for_each_vsi(pf, v) {
4723 if (!pf->vsi[v])
4724 continue;
4725
4726 ret = ice_vsi_alloc_q_vectors(pf->vsi[v]);
4727 if (ret)
4728 goto err_reinit;
4729 ice_vsi_map_rings_to_vectors(pf->vsi[v]);
4730 }
4731
4732 ret = ice_req_irq_msix_misc(pf);
4733 if (ret) {
4734 dev_err(dev, "Setting up misc vector failed after device suspend %d\n",
4735 ret);
4736 goto err_reinit;
4737 }
4738
4739 return 0;
4740
4741err_reinit:
4742 while (v--)
4743 if (pf->vsi[v])
4744 ice_vsi_free_q_vectors(pf->vsi[v]);
4745
4746 return ret;
4747}
4748
4749
4750
4751
4752
4753
4754
4755
4756static int __maybe_unused ice_suspend(struct device *dev)
4757{
4758 struct pci_dev *pdev = to_pci_dev(dev);
4759 struct ice_pf *pf;
4760 int disabled, v;
4761
4762 pf = pci_get_drvdata(pdev);
4763
4764 if (!ice_pf_state_is_nominal(pf)) {
4765 dev_err(dev, "Device is not ready, no need to suspend it\n");
4766 return -EBUSY;
4767 }
4768
4769
4770
4771
4772
4773
4774
4775 disabled = ice_service_task_stop(pf);
4776
4777 ice_unplug_aux_dev(pf);
4778
4779
4780 if (test_and_set_bit(ICE_SUSPENDED, pf->state)) {
4781 if (!disabled)
4782 ice_service_task_restart(pf);
4783 return 0;
4784 }
4785
4786 if (test_bit(ICE_DOWN, pf->state) ||
4787 ice_is_reset_in_progress(pf->state)) {
4788 dev_err(dev, "can't suspend device in reset or already down\n");
4789 if (!disabled)
4790 ice_service_task_restart(pf);
4791 return 0;
4792 }
4793
4794 ice_setup_mc_magic_wake(pf);
4795
4796 ice_prepare_for_shutdown(pf);
4797
4798 ice_set_wake(pf);
4799
4800
4801
4802
4803
4804
4805 ice_free_irq_msix_misc(pf);
4806 ice_for_each_vsi(pf, v) {
4807 if (!pf->vsi[v])
4808 continue;
4809 ice_vsi_free_q_vectors(pf->vsi[v]);
4810 }
4811 ice_free_cpu_rx_rmap(ice_get_main_vsi(pf));
4812 ice_clear_interrupt_scheme(pf);
4813
4814 pci_save_state(pdev);
4815 pci_wake_from_d3(pdev, pf->wol_ena);
4816 pci_set_power_state(pdev, PCI_D3hot);
4817 return 0;
4818}
4819
4820
4821
4822
4823
4824static int __maybe_unused ice_resume(struct device *dev)
4825{
4826 struct pci_dev *pdev = to_pci_dev(dev);
4827 enum ice_reset_req reset_type;
4828 struct ice_pf *pf;
4829 struct ice_hw *hw;
4830 int ret;
4831
4832 pci_set_power_state(pdev, PCI_D0);
4833 pci_restore_state(pdev);
4834 pci_save_state(pdev);
4835
4836 if (!pci_device_is_present(pdev))
4837 return -ENODEV;
4838
4839 ret = pci_enable_device_mem(pdev);
4840 if (ret) {
4841 dev_err(dev, "Cannot enable device after suspend\n");
4842 return ret;
4843 }
4844
4845 pf = pci_get_drvdata(pdev);
4846 hw = &pf->hw;
4847
4848 pf->wakeup_reason = rd32(hw, PFPM_WUS);
4849 ice_print_wake_reason(pf);
4850
4851
4852
4853
4854 ret = ice_reinit_interrupt_scheme(pf);
4855 if (ret)
4856 dev_err(dev, "Cannot restore interrupt scheme: %d\n", ret);
4857
4858 clear_bit(ICE_DOWN, pf->state);
4859
4860 reset_type = ICE_RESET_PFR;
4861
4862 clear_bit(ICE_SERVICE_DIS, pf->state);
4863
4864 if (ice_schedule_reset(pf, reset_type))
4865 dev_err(dev, "Reset during resume failed.\n");
4866
4867 clear_bit(ICE_SUSPENDED, pf->state);
4868 ice_service_task_restart(pf);
4869
4870
4871 mod_timer(&pf->serv_tmr, round_jiffies(jiffies + pf->serv_tmr_period));
4872
4873 return 0;
4874}
4875#endif
4876
4877
4878
4879
4880
4881
4882
4883
4884
4885static pci_ers_result_t
4886ice_pci_err_detected(struct pci_dev *pdev, pci_channel_state_t err)
4887{
4888 struct ice_pf *pf = pci_get_drvdata(pdev);
4889
4890 if (!pf) {
4891 dev_err(&pdev->dev, "%s: unrecoverable device error %d\n",
4892 __func__, err);
4893 return PCI_ERS_RESULT_DISCONNECT;
4894 }
4895
4896 if (!test_bit(ICE_SUSPENDED, pf->state)) {
4897 ice_service_task_stop(pf);
4898
4899 if (!test_bit(ICE_PREPARED_FOR_RESET, pf->state)) {
4900 set_bit(ICE_PFR_REQ, pf->state);
4901 ice_prepare_for_reset(pf);
4902 }
4903 }
4904
4905 return PCI_ERS_RESULT_NEED_RESET;
4906}
4907
4908
4909
4910
4911
4912
4913
4914
4915static pci_ers_result_t ice_pci_err_slot_reset(struct pci_dev *pdev)
4916{
4917 struct ice_pf *pf = pci_get_drvdata(pdev);
4918 pci_ers_result_t result;
4919 int err;
4920 u32 reg;
4921
4922 err = pci_enable_device_mem(pdev);
4923 if (err) {
4924 dev_err(&pdev->dev, "Cannot re-enable PCI device after reset, error %d\n",
4925 err);
4926 result = PCI_ERS_RESULT_DISCONNECT;
4927 } else {
4928 pci_set_master(pdev);
4929 pci_restore_state(pdev);
4930 pci_save_state(pdev);
4931 pci_wake_from_d3(pdev, false);
4932
4933
4934 reg = rd32(&pf->hw, GLGEN_RTRIG);
4935 if (!reg)
4936 result = PCI_ERS_RESULT_RECOVERED;
4937 else
4938 result = PCI_ERS_RESULT_DISCONNECT;
4939 }
4940
4941 err = pci_aer_clear_nonfatal_status(pdev);
4942 if (err)
4943 dev_dbg(&pdev->dev, "pci_aer_clear_nonfatal_status() failed, error %d\n",
4944 err);
4945
4946
4947 return result;
4948}
4949
4950
4951
4952
4953
4954
4955
4956
4957static void ice_pci_err_resume(struct pci_dev *pdev)
4958{
4959 struct ice_pf *pf = pci_get_drvdata(pdev);
4960
4961 if (!pf) {
4962 dev_err(&pdev->dev, "%s failed, device is unrecoverable\n",
4963 __func__);
4964 return;
4965 }
4966
4967 if (test_bit(ICE_SUSPENDED, pf->state)) {
4968 dev_dbg(&pdev->dev, "%s failed to resume normal operations!\n",
4969 __func__);
4970 return;
4971 }
4972
4973 ice_restore_all_vfs_msi_state(pdev);
4974
4975 ice_do_reset(pf, ICE_RESET_PFR);
4976 ice_service_task_restart(pf);
4977 mod_timer(&pf->serv_tmr, round_jiffies(jiffies + pf->serv_tmr_period));
4978}
4979
4980
4981
4982
4983
4984static void ice_pci_err_reset_prepare(struct pci_dev *pdev)
4985{
4986 struct ice_pf *pf = pci_get_drvdata(pdev);
4987
4988 if (!test_bit(ICE_SUSPENDED, pf->state)) {
4989 ice_service_task_stop(pf);
4990
4991 if (!test_bit(ICE_PREPARED_FOR_RESET, pf->state)) {
4992 set_bit(ICE_PFR_REQ, pf->state);
4993 ice_prepare_for_reset(pf);
4994 }
4995 }
4996}
4997
4998
4999
5000
5001
5002static void ice_pci_err_reset_done(struct pci_dev *pdev)
5003{
5004 ice_pci_err_resume(pdev);
5005}
5006
5007
5008
5009
5010
5011
5012
5013
5014
5015static const struct pci_device_id ice_pci_tbl[] = {
5016 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_BACKPLANE), 0 },
5017 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_QSFP), 0 },
5018 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_SFP), 0 },
5019 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810_XXV_SFP), 0 },
5020 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_BACKPLANE), 0 },
5021 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_QSFP), 0 },
5022 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_SFP), 0 },
5023 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_10G_BASE_T), 0 },
5024 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_SGMII), 0 },
5025 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_BACKPLANE), 0 },
5026 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_QSFP), 0 },
5027 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_SFP), 0 },
5028 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_10G_BASE_T), 0 },
5029 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_SGMII), 0 },
5030 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_BACKPLANE), 0 },
5031 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_SFP), 0 },
5032 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_10G_BASE_T), 0 },
5033 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_SGMII), 0 },
5034 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_BACKPLANE), 0 },
5035 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_SFP), 0 },
5036 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_10G_BASE_T), 0 },
5037 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_1GBE), 0 },
5038 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_QSFP), 0 },
5039
5040 { 0, }
5041};
5042MODULE_DEVICE_TABLE(pci, ice_pci_tbl);
5043
5044static __maybe_unused SIMPLE_DEV_PM_OPS(ice_pm_ops, ice_suspend, ice_resume);
5045
5046static const struct pci_error_handlers ice_pci_err_handler = {
5047 .error_detected = ice_pci_err_detected,
5048 .slot_reset = ice_pci_err_slot_reset,
5049 .reset_prepare = ice_pci_err_reset_prepare,
5050 .reset_done = ice_pci_err_reset_done,
5051 .resume = ice_pci_err_resume
5052};
5053
5054static struct pci_driver ice_driver = {
5055 .name = KBUILD_MODNAME,
5056 .id_table = ice_pci_tbl,
5057 .probe = ice_probe,
5058 .remove = ice_remove,
5059#ifdef CONFIG_PM
5060 .driver.pm = &ice_pm_ops,
5061#endif
5062 .shutdown = ice_shutdown,
5063 .sriov_configure = ice_sriov_configure,
5064 .err_handler = &ice_pci_err_handler
5065};
5066
5067
5068
5069
5070
5071
5072
5073static int __init ice_module_init(void)
5074{
5075 int status;
5076
5077 pr_info("%s\n", ice_driver_string);
5078 pr_info("%s\n", ice_copyright);
5079
5080 ice_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, KBUILD_MODNAME);
5081 if (!ice_wq) {
5082 pr_err("Failed to create workqueue\n");
5083 return -ENOMEM;
5084 }
5085
5086 status = pci_register_driver(&ice_driver);
5087 if (status) {
5088 pr_err("failed to register PCI driver, err %d\n", status);
5089 destroy_workqueue(ice_wq);
5090 }
5091
5092 return status;
5093}
5094module_init(ice_module_init);
5095
5096
5097
5098
5099
5100
5101
5102static void __exit ice_module_exit(void)
5103{
5104 pci_unregister_driver(&ice_driver);
5105 destroy_workqueue(ice_wq);
5106 pr_info("module unloaded\n");
5107}
5108module_exit(ice_module_exit);
5109
5110
5111
5112
5113
5114
5115
5116
5117static int ice_set_mac_address(struct net_device *netdev, void *pi)
5118{
5119 struct ice_netdev_priv *np = netdev_priv(netdev);
5120 struct ice_vsi *vsi = np->vsi;
5121 struct ice_pf *pf = vsi->back;
5122 struct ice_hw *hw = &pf->hw;
5123 struct sockaddr *addr = pi;
5124 enum ice_status status;
5125 u8 flags = 0;
5126 int err = 0;
5127 u8 *mac;
5128
5129 mac = (u8 *)addr->sa_data;
5130
5131 if (!is_valid_ether_addr(mac))
5132 return -EADDRNOTAVAIL;
5133
5134 if (ether_addr_equal(netdev->dev_addr, mac)) {
5135 netdev_dbg(netdev, "already using mac %pM\n", mac);
5136 return 0;
5137 }
5138
5139 if (test_bit(ICE_DOWN, pf->state) ||
5140 ice_is_reset_in_progress(pf->state)) {
5141 netdev_err(netdev, "can't set mac %pM. device not ready\n",
5142 mac);
5143 return -EBUSY;
5144 }
5145
5146 netif_addr_lock_bh(netdev);
5147
5148 status = ice_fltr_remove_mac(vsi, netdev->dev_addr, ICE_FWD_TO_VSI);
5149 if (status && status != ICE_ERR_DOES_NOT_EXIST) {
5150 err = -EADDRNOTAVAIL;
5151 goto err_update_filters;
5152 }
5153
5154
5155 status = ice_fltr_add_mac(vsi, mac, ICE_FWD_TO_VSI);
5156 if (status == ICE_ERR_ALREADY_EXISTS)
5157
5158
5159
5160
5161
5162 netdev_dbg(netdev, "filter for MAC %pM already exists\n", mac);
5163 else if (status)
5164
5165 err = -EADDRNOTAVAIL;
5166
5167err_update_filters:
5168 if (err) {
5169 netdev_err(netdev, "can't set MAC %pM. filter update failed\n",
5170 mac);
5171 netif_addr_unlock_bh(netdev);
5172 return err;
5173 }
5174
5175
5176 memcpy(netdev->dev_addr, mac, netdev->addr_len);
5177 netif_addr_unlock_bh(netdev);
5178 netdev_dbg(vsi->netdev, "updated MAC address to %pM\n",
5179 netdev->dev_addr);
5180
5181
5182 flags = ICE_AQC_MAN_MAC_UPDATE_LAA_WOL;
5183 status = ice_aq_manage_mac_write(hw, mac, flags, NULL);
5184 if (status) {
5185 netdev_err(netdev, "can't set MAC %pM. write to firmware failed error %s\n",
5186 mac, ice_stat_str(status));
5187 }
5188 return 0;
5189}
5190
5191
5192
5193
5194
5195static void ice_set_rx_mode(struct net_device *netdev)
5196{
5197 struct ice_netdev_priv *np = netdev_priv(netdev);
5198 struct ice_vsi *vsi = np->vsi;
5199
5200 if (!vsi)
5201 return;
5202
5203
5204
5205
5206
5207 set_bit(ICE_VSI_UMAC_FLTR_CHANGED, vsi->state);
5208 set_bit(ICE_VSI_MMAC_FLTR_CHANGED, vsi->state);
5209 set_bit(ICE_FLAG_FLTR_SYNC, vsi->back->flags);
5210
5211
5212
5213
5214 ice_service_task_schedule(vsi->back);
5215}
5216
5217
5218
5219
5220
5221
5222
5223static int
5224ice_set_tx_maxrate(struct net_device *netdev, int queue_index, u32 maxrate)
5225{
5226 struct ice_netdev_priv *np = netdev_priv(netdev);
5227 struct ice_vsi *vsi = np->vsi;
5228 enum ice_status status;
5229 u16 q_handle;
5230 u8 tc;
5231
5232
5233 if (maxrate && (maxrate > (ICE_SCHED_MAX_BW / 1000))) {
5234 netdev_err(netdev, "Invalid max rate %d specified for the queue %d\n",
5235 maxrate, queue_index);
5236 return -EINVAL;
5237 }
5238
5239 q_handle = vsi->tx_rings[queue_index]->q_handle;
5240 tc = ice_dcb_get_tc(vsi, queue_index);
5241
5242
5243 if (!maxrate)
5244 status = ice_cfg_q_bw_dflt_lmt(vsi->port_info, vsi->idx, tc,
5245 q_handle, ICE_MAX_BW);
5246 else
5247 status = ice_cfg_q_bw_lmt(vsi->port_info, vsi->idx, tc,
5248 q_handle, ICE_MAX_BW, maxrate * 1000);
5249 if (status) {
5250 netdev_err(netdev, "Unable to set Tx max rate, error %s\n",
5251 ice_stat_str(status));
5252 return -EIO;
5253 }
5254
5255 return 0;
5256}
5257
5258
5259
5260
5261
5262
5263
5264
5265
5266
5267
5268static int
5269ice_fdb_add(struct ndmsg *ndm, struct nlattr __always_unused *tb[],
5270 struct net_device *dev, const unsigned char *addr, u16 vid,
5271 u16 flags, struct netlink_ext_ack __always_unused *extack)
5272{
5273 int err;
5274
5275 if (vid) {
5276 netdev_err(dev, "VLANs aren't supported yet for dev_uc|mc_add()\n");
5277 return -EINVAL;
5278 }
5279 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
5280 netdev_err(dev, "FDB only supports static addresses\n");
5281 return -EINVAL;
5282 }
5283
5284 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
5285 err = dev_uc_add_excl(dev, addr);
5286 else if (is_multicast_ether_addr(addr))
5287 err = dev_mc_add_excl(dev, addr);
5288 else
5289 err = -EINVAL;
5290
5291
5292 if (err == -EEXIST && !(flags & NLM_F_EXCL))
5293 err = 0;
5294
5295 return err;
5296}
5297
5298
5299
5300
5301
5302
5303
5304
5305
5306static int
5307ice_fdb_del(struct ndmsg *ndm, __always_unused struct nlattr *tb[],
5308 struct net_device *dev, const unsigned char *addr,
5309 __always_unused u16 vid)
5310{
5311 int err;
5312
5313 if (ndm->ndm_state & NUD_PERMANENT) {
5314 netdev_err(dev, "FDB only supports static addresses\n");
5315 return -EINVAL;
5316 }
5317
5318 if (is_unicast_ether_addr(addr))
5319 err = dev_uc_del(dev, addr);
5320 else if (is_multicast_ether_addr(addr))
5321 err = dev_mc_del(dev, addr);
5322 else
5323 err = -EINVAL;
5324
5325 return err;
5326}
5327
5328
5329
5330
5331
5332
5333static int
5334ice_set_features(struct net_device *netdev, netdev_features_t features)
5335{
5336 struct ice_netdev_priv *np = netdev_priv(netdev);
5337 struct ice_vsi *vsi = np->vsi;
5338 struct ice_pf *pf = vsi->back;
5339 int ret = 0;
5340
5341
5342 if (ice_is_safe_mode(vsi->back)) {
5343 dev_err(ice_pf_to_dev(vsi->back), "Device is in Safe Mode - not enabling advanced netdev features\n");
5344 return ret;
5345 }
5346
5347
5348 if (ice_is_reset_in_progress(pf->state)) {
5349 dev_err(ice_pf_to_dev(vsi->back), "Device is resetting, changing advanced netdev features temporarily unavailable.\n");
5350 return -EBUSY;
5351 }
5352
5353
5354
5355
5356 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
5357 ice_vsi_manage_rss_lut(vsi, true);
5358 else if (!(features & NETIF_F_RXHASH) &&
5359 netdev->features & NETIF_F_RXHASH)
5360 ice_vsi_manage_rss_lut(vsi, false);
5361
5362 if ((features & NETIF_F_HW_VLAN_CTAG_RX) &&
5363 !(netdev->features & NETIF_F_HW_VLAN_CTAG_RX))
5364 ret = ice_vsi_manage_vlan_stripping(vsi, true);
5365 else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) &&
5366 (netdev->features & NETIF_F_HW_VLAN_CTAG_RX))
5367 ret = ice_vsi_manage_vlan_stripping(vsi, false);
5368
5369 if ((features & NETIF_F_HW_VLAN_CTAG_TX) &&
5370 !(netdev->features & NETIF_F_HW_VLAN_CTAG_TX))
5371 ret = ice_vsi_manage_vlan_insertion(vsi);
5372 else if (!(features & NETIF_F_HW_VLAN_CTAG_TX) &&
5373 (netdev->features & NETIF_F_HW_VLAN_CTAG_TX))
5374 ret = ice_vsi_manage_vlan_insertion(vsi);
5375
5376 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) &&
5377 !(netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER))
5378 ret = ice_cfg_vlan_pruning(vsi, true, false);
5379 else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) &&
5380 (netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER))
5381 ret = ice_cfg_vlan_pruning(vsi, false, false);
5382
5383 if ((features & NETIF_F_NTUPLE) &&
5384 !(netdev->features & NETIF_F_NTUPLE)) {
5385 ice_vsi_manage_fdir(vsi, true);
5386 ice_init_arfs(vsi);
5387 } else if (!(features & NETIF_F_NTUPLE) &&
5388 (netdev->features & NETIF_F_NTUPLE)) {
5389 ice_vsi_manage_fdir(vsi, false);
5390 ice_clear_arfs(vsi);
5391 }
5392
5393 return ret;
5394}
5395
5396
5397
5398
5399
5400static int ice_vsi_vlan_setup(struct ice_vsi *vsi)
5401{
5402 int ret = 0;
5403
5404 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
5405 ret = ice_vsi_manage_vlan_stripping(vsi, true);
5406 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_TX)
5407 ret = ice_vsi_manage_vlan_insertion(vsi);
5408
5409 return ret;
5410}
5411
5412
5413
5414
5415
5416
5417
5418int ice_vsi_cfg(struct ice_vsi *vsi)
5419{
5420 int err;
5421
5422 if (vsi->netdev) {
5423 ice_set_rx_mode(vsi->netdev);
5424
5425 err = ice_vsi_vlan_setup(vsi);
5426
5427 if (err)
5428 return err;
5429 }
5430 ice_vsi_cfg_dcb_rings(vsi);
5431
5432 err = ice_vsi_cfg_lan_txqs(vsi);
5433 if (!err && ice_is_xdp_ena_vsi(vsi))
5434 err = ice_vsi_cfg_xdp_txqs(vsi);
5435 if (!err)
5436 err = ice_vsi_cfg_rxqs(vsi);
5437
5438 return err;
5439}
5440
5441
5442
5443
5444
5445
5446
5447
5448
5449
5450
5451struct ice_dim {
5452
5453
5454
5455 u16 itr;
5456
5457
5458
5459
5460
5461
5462 u16 intrl;
5463};
5464
5465
5466
5467
5468
5469
5470
5471
5472
5473static const struct ice_dim rx_profile[] = {
5474 {2, 10},
5475 {8, 16},
5476 {32, 0},
5477 {96, 0},
5478 {128, 0}
5479};
5480
5481
5482
5483
5484static const struct ice_dim tx_profile[] = {
5485 {2, 10},
5486 {8, 16},
5487 {64, 0},
5488 {128, 0},
5489 {256, 0}
5490};
5491
5492static void ice_tx_dim_work(struct work_struct *work)
5493{
5494 struct ice_ring_container *rc;
5495 struct ice_q_vector *q_vector;
5496 struct dim *dim;
5497 u16 itr, intrl;
5498
5499 dim = container_of(work, struct dim, work);
5500 rc = container_of(dim, struct ice_ring_container, dim);
5501 q_vector = container_of(rc, struct ice_q_vector, tx);
5502
5503 if (dim->profile_ix >= ARRAY_SIZE(tx_profile))
5504 dim->profile_ix = ARRAY_SIZE(tx_profile) - 1;
5505
5506
5507 itr = tx_profile[dim->profile_ix].itr;
5508 intrl = tx_profile[dim->profile_ix].intrl;
5509
5510 ice_trace(tx_dim_work, q_vector, dim);
5511 ice_write_itr(rc, itr);
5512 ice_write_intrl(q_vector, intrl);
5513
5514 dim->state = DIM_START_MEASURE;
5515}
5516
5517static void ice_rx_dim_work(struct work_struct *work)
5518{
5519 struct ice_ring_container *rc;
5520 struct ice_q_vector *q_vector;
5521 struct dim *dim;
5522 u16 itr, intrl;
5523
5524 dim = container_of(work, struct dim, work);
5525 rc = container_of(dim, struct ice_ring_container, dim);
5526 q_vector = container_of(rc, struct ice_q_vector, rx);
5527
5528 if (dim->profile_ix >= ARRAY_SIZE(rx_profile))
5529 dim->profile_ix = ARRAY_SIZE(rx_profile) - 1;
5530
5531
5532 itr = rx_profile[dim->profile_ix].itr;
5533 intrl = rx_profile[dim->profile_ix].intrl;
5534
5535 ice_trace(rx_dim_work, q_vector, dim);
5536 ice_write_itr(rc, itr);
5537 ice_write_intrl(q_vector, intrl);
5538
5539 dim->state = DIM_START_MEASURE;
5540}
5541
5542
5543
5544
5545
5546static void ice_napi_enable_all(struct ice_vsi *vsi)
5547{
5548 int q_idx;
5549
5550 if (!vsi->netdev)
5551 return;
5552
5553 ice_for_each_q_vector(vsi, q_idx) {
5554 struct ice_q_vector *q_vector = vsi->q_vectors[q_idx];
5555
5556 INIT_WORK(&q_vector->tx.dim.work, ice_tx_dim_work);
5557 q_vector->tx.dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
5558
5559 INIT_WORK(&q_vector->rx.dim.work, ice_rx_dim_work);
5560 q_vector->rx.dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
5561
5562 if (q_vector->rx.ring || q_vector->tx.ring)
5563 napi_enable(&q_vector->napi);
5564 }
5565}
5566
5567
5568
5569
5570
5571
5572
5573static int ice_up_complete(struct ice_vsi *vsi)
5574{
5575 struct ice_pf *pf = vsi->back;
5576 int err;
5577
5578 ice_vsi_cfg_msix(vsi);
5579
5580
5581
5582
5583
5584 err = ice_vsi_start_all_rx_rings(vsi);
5585 if (err)
5586 return err;
5587
5588 clear_bit(ICE_VSI_DOWN, vsi->state);
5589 ice_napi_enable_all(vsi);
5590 ice_vsi_ena_irq(vsi);
5591
5592 if (vsi->port_info &&
5593 (vsi->port_info->phy.link_info.link_info & ICE_AQ_LINK_UP) &&
5594 vsi->netdev) {
5595 ice_print_link_msg(vsi, true);
5596 netif_tx_start_all_queues(vsi->netdev);
5597 netif_carrier_on(vsi->netdev);
5598 }
5599
5600 ice_service_task_schedule(pf);
5601
5602 return 0;
5603}
5604
5605
5606
5607
5608
5609int ice_up(struct ice_vsi *vsi)
5610{
5611 int err;
5612
5613 err = ice_vsi_cfg(vsi);
5614 if (!err)
5615 err = ice_up_complete(vsi);
5616
5617 return err;
5618}
5619
5620
5621
5622
5623
5624
5625
5626
5627
5628
5629static void
5630ice_fetch_u64_stats_per_ring(struct ice_ring *ring, u64 *pkts, u64 *bytes)
5631{
5632 unsigned int start;
5633 *pkts = 0;
5634 *bytes = 0;
5635
5636 if (!ring)
5637 return;
5638 do {
5639 start = u64_stats_fetch_begin_irq(&ring->syncp);
5640 *pkts = ring->stats.pkts;
5641 *bytes = ring->stats.bytes;
5642 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
5643}
5644
5645
5646
5647
5648
5649
5650
5651static void
5652ice_update_vsi_tx_ring_stats(struct ice_vsi *vsi, struct ice_ring **rings,
5653 u16 count)
5654{
5655 struct rtnl_link_stats64 *vsi_stats = &vsi->net_stats;
5656 u16 i;
5657
5658 for (i = 0; i < count; i++) {
5659 struct ice_ring *ring;
5660 u64 pkts, bytes;
5661
5662 ring = READ_ONCE(rings[i]);
5663 ice_fetch_u64_stats_per_ring(ring, &pkts, &bytes);
5664 vsi_stats->tx_packets += pkts;
5665 vsi_stats->tx_bytes += bytes;
5666 vsi->tx_restart += ring->tx_stats.restart_q;
5667 vsi->tx_busy += ring->tx_stats.tx_busy;
5668 vsi->tx_linearize += ring->tx_stats.tx_linearize;
5669 }
5670}
5671
5672
5673
5674
5675
5676static void ice_update_vsi_ring_stats(struct ice_vsi *vsi)
5677{
5678 struct rtnl_link_stats64 *vsi_stats = &vsi->net_stats;
5679 u64 pkts, bytes;
5680 int i;
5681
5682
5683 vsi_stats->tx_packets = 0;
5684 vsi_stats->tx_bytes = 0;
5685 vsi_stats->rx_packets = 0;
5686 vsi_stats->rx_bytes = 0;
5687
5688
5689 vsi->tx_restart = 0;
5690 vsi->tx_busy = 0;
5691 vsi->tx_linearize = 0;
5692 vsi->rx_buf_failed = 0;
5693 vsi->rx_page_failed = 0;
5694
5695 rcu_read_lock();
5696
5697
5698 ice_update_vsi_tx_ring_stats(vsi, vsi->tx_rings, vsi->num_txq);
5699
5700
5701 ice_for_each_rxq(vsi, i) {
5702 struct ice_ring *ring = READ_ONCE(vsi->rx_rings[i]);
5703
5704 ice_fetch_u64_stats_per_ring(ring, &pkts, &bytes);
5705 vsi_stats->rx_packets += pkts;
5706 vsi_stats->rx_bytes += bytes;
5707 vsi->rx_buf_failed += ring->rx_stats.alloc_buf_failed;
5708 vsi->rx_page_failed += ring->rx_stats.alloc_page_failed;
5709 }
5710
5711
5712 if (ice_is_xdp_ena_vsi(vsi))
5713 ice_update_vsi_tx_ring_stats(vsi, vsi->xdp_rings,
5714 vsi->num_xdp_txq);
5715
5716 rcu_read_unlock();
5717}
5718
5719
5720
5721
5722
5723void ice_update_vsi_stats(struct ice_vsi *vsi)
5724{
5725 struct rtnl_link_stats64 *cur_ns = &vsi->net_stats;
5726 struct ice_eth_stats *cur_es = &vsi->eth_stats;
5727 struct ice_pf *pf = vsi->back;
5728
5729 if (test_bit(ICE_VSI_DOWN, vsi->state) ||
5730 test_bit(ICE_CFG_BUSY, pf->state))
5731 return;
5732
5733
5734 ice_update_vsi_ring_stats(vsi);
5735
5736
5737 ice_update_eth_stats(vsi);
5738
5739 cur_ns->tx_errors = cur_es->tx_errors;
5740 cur_ns->rx_dropped = cur_es->rx_discards;
5741 cur_ns->tx_dropped = cur_es->tx_discards;
5742 cur_ns->multicast = cur_es->rx_multicast;
5743
5744
5745 if (vsi->type == ICE_VSI_PF) {
5746 cur_ns->rx_crc_errors = pf->stats.crc_errors;
5747 cur_ns->rx_errors = pf->stats.crc_errors +
5748 pf->stats.illegal_bytes +
5749 pf->stats.rx_len_errors +
5750 pf->stats.rx_undersize +
5751 pf->hw_csum_rx_error +
5752 pf->stats.rx_jabber +
5753 pf->stats.rx_fragments +
5754 pf->stats.rx_oversize;
5755 cur_ns->rx_length_errors = pf->stats.rx_len_errors;
5756
5757 cur_ns->rx_missed_errors = pf->stats.eth.rx_discards;
5758 }
5759}
5760
5761
5762
5763
5764
5765void ice_update_pf_stats(struct ice_pf *pf)
5766{
5767 struct ice_hw_port_stats *prev_ps, *cur_ps;
5768 struct ice_hw *hw = &pf->hw;
5769 u16 fd_ctr_base;
5770 u8 port;
5771
5772 port = hw->port_info->lport;
5773 prev_ps = &pf->stats_prev;
5774 cur_ps = &pf->stats;
5775
5776 ice_stat_update40(hw, GLPRT_GORCL(port), pf->stat_prev_loaded,
5777 &prev_ps->eth.rx_bytes,
5778 &cur_ps->eth.rx_bytes);
5779
5780 ice_stat_update40(hw, GLPRT_UPRCL(port), pf->stat_prev_loaded,
5781 &prev_ps->eth.rx_unicast,
5782 &cur_ps->eth.rx_unicast);
5783
5784 ice_stat_update40(hw, GLPRT_MPRCL(port), pf->stat_prev_loaded,
5785 &prev_ps->eth.rx_multicast,
5786 &cur_ps->eth.rx_multicast);
5787
5788 ice_stat_update40(hw, GLPRT_BPRCL(port), pf->stat_prev_loaded,
5789 &prev_ps->eth.rx_broadcast,
5790 &cur_ps->eth.rx_broadcast);
5791
5792 ice_stat_update32(hw, PRTRPB_RDPC, pf->stat_prev_loaded,
5793 &prev_ps->eth.rx_discards,
5794 &cur_ps->eth.rx_discards);
5795
5796 ice_stat_update40(hw, GLPRT_GOTCL(port), pf->stat_prev_loaded,
5797 &prev_ps->eth.tx_bytes,
5798 &cur_ps->eth.tx_bytes);
5799
5800 ice_stat_update40(hw, GLPRT_UPTCL(port), pf->stat_prev_loaded,
5801 &prev_ps->eth.tx_unicast,
5802 &cur_ps->eth.tx_unicast);
5803
5804 ice_stat_update40(hw, GLPRT_MPTCL(port), pf->stat_prev_loaded,
5805 &prev_ps->eth.tx_multicast,
5806 &cur_ps->eth.tx_multicast);
5807
5808 ice_stat_update40(hw, GLPRT_BPTCL(port), pf->stat_prev_loaded,
5809 &prev_ps->eth.tx_broadcast,
5810 &cur_ps->eth.tx_broadcast);
5811
5812 ice_stat_update32(hw, GLPRT_TDOLD(port), pf->stat_prev_loaded,
5813 &prev_ps->tx_dropped_link_down,
5814 &cur_ps->tx_dropped_link_down);
5815
5816 ice_stat_update40(hw, GLPRT_PRC64L(port), pf->stat_prev_loaded,
5817 &prev_ps->rx_size_64, &cur_ps->rx_size_64);
5818
5819 ice_stat_update40(hw, GLPRT_PRC127L(port), pf->stat_prev_loaded,
5820 &prev_ps->rx_size_127, &cur_ps->rx_size_127);
5821
5822 ice_stat_update40(hw, GLPRT_PRC255L(port), pf->stat_prev_loaded,
5823 &prev_ps->rx_size_255, &cur_ps->rx_size_255);
5824
5825 ice_stat_update40(hw, GLPRT_PRC511L(port), pf->stat_prev_loaded,
5826 &prev_ps->rx_size_511, &cur_ps->rx_size_511);
5827
5828 ice_stat_update40(hw, GLPRT_PRC1023L(port), pf->stat_prev_loaded,
5829 &prev_ps->rx_size_1023, &cur_ps->rx_size_1023);
5830
5831 ice_stat_update40(hw, GLPRT_PRC1522L(port), pf->stat_prev_loaded,
5832 &prev_ps->rx_size_1522, &cur_ps->rx_size_1522);
5833
5834 ice_stat_update40(hw, GLPRT_PRC9522L(port), pf->stat_prev_loaded,
5835 &prev_ps->rx_size_big, &cur_ps->rx_size_big);
5836
5837 ice_stat_update40(hw, GLPRT_PTC64L(port), pf->stat_prev_loaded,
5838 &prev_ps->tx_size_64, &cur_ps->tx_size_64);
5839
5840 ice_stat_update40(hw, GLPRT_PTC127L(port), pf->stat_prev_loaded,
5841 &prev_ps->tx_size_127, &cur_ps->tx_size_127);
5842
5843 ice_stat_update40(hw, GLPRT_PTC255L(port), pf->stat_prev_loaded,
5844 &prev_ps->tx_size_255, &cur_ps->tx_size_255);
5845
5846 ice_stat_update40(hw, GLPRT_PTC511L(port), pf->stat_prev_loaded,
5847 &prev_ps->tx_size_511, &cur_ps->tx_size_511);
5848
5849 ice_stat_update40(hw, GLPRT_PTC1023L(port), pf->stat_prev_loaded,
5850 &prev_ps->tx_size_1023, &cur_ps->tx_size_1023);
5851
5852 ice_stat_update40(hw, GLPRT_PTC1522L(port), pf->stat_prev_loaded,
5853 &prev_ps->tx_size_1522, &cur_ps->tx_size_1522);
5854
5855 ice_stat_update40(hw, GLPRT_PTC9522L(port), pf->stat_prev_loaded,
5856 &prev_ps->tx_size_big, &cur_ps->tx_size_big);
5857
5858 fd_ctr_base = hw->fd_ctr_base;
5859
5860 ice_stat_update40(hw,
5861 GLSTAT_FD_CNT0L(ICE_FD_SB_STAT_IDX(fd_ctr_base)),
5862 pf->stat_prev_loaded, &prev_ps->fd_sb_match,
5863 &cur_ps->fd_sb_match);
5864 ice_stat_update32(hw, GLPRT_LXONRXC(port), pf->stat_prev_loaded,
5865 &prev_ps->link_xon_rx, &cur_ps->link_xon_rx);
5866
5867 ice_stat_update32(hw, GLPRT_LXOFFRXC(port), pf->stat_prev_loaded,
5868 &prev_ps->link_xoff_rx, &cur_ps->link_xoff_rx);
5869
5870 ice_stat_update32(hw, GLPRT_LXONTXC(port), pf->stat_prev_loaded,
5871 &prev_ps->link_xon_tx, &cur_ps->link_xon_tx);
5872
5873 ice_stat_update32(hw, GLPRT_LXOFFTXC(port), pf->stat_prev_loaded,
5874 &prev_ps->link_xoff_tx, &cur_ps->link_xoff_tx);
5875
5876 ice_update_dcb_stats(pf);
5877
5878 ice_stat_update32(hw, GLPRT_CRCERRS(port), pf->stat_prev_loaded,
5879 &prev_ps->crc_errors, &cur_ps->crc_errors);
5880
5881 ice_stat_update32(hw, GLPRT_ILLERRC(port), pf->stat_prev_loaded,
5882 &prev_ps->illegal_bytes, &cur_ps->illegal_bytes);
5883
5884 ice_stat_update32(hw, GLPRT_MLFC(port), pf->stat_prev_loaded,
5885 &prev_ps->mac_local_faults,
5886 &cur_ps->mac_local_faults);
5887
5888 ice_stat_update32(hw, GLPRT_MRFC(port), pf->stat_prev_loaded,
5889 &prev_ps->mac_remote_faults,
5890 &cur_ps->mac_remote_faults);
5891
5892 ice_stat_update32(hw, GLPRT_RLEC(port), pf->stat_prev_loaded,
5893 &prev_ps->rx_len_errors, &cur_ps->rx_len_errors);
5894
5895 ice_stat_update32(hw, GLPRT_RUC(port), pf->stat_prev_loaded,
5896 &prev_ps->rx_undersize, &cur_ps->rx_undersize);
5897
5898 ice_stat_update32(hw, GLPRT_RFC(port), pf->stat_prev_loaded,
5899 &prev_ps->rx_fragments, &cur_ps->rx_fragments);
5900
5901 ice_stat_update32(hw, GLPRT_ROC(port), pf->stat_prev_loaded,
5902 &prev_ps->rx_oversize, &cur_ps->rx_oversize);
5903
5904 ice_stat_update32(hw, GLPRT_RJC(port), pf->stat_prev_loaded,
5905 &prev_ps->rx_jabber, &cur_ps->rx_jabber);
5906
5907 cur_ps->fd_sb_status = test_bit(ICE_FLAG_FD_ENA, pf->flags) ? 1 : 0;
5908
5909 pf->stat_prev_loaded = true;
5910}
5911
5912
5913
5914
5915
5916
5917static
5918void ice_get_stats64(struct net_device *netdev, struct rtnl_link_stats64 *stats)
5919{
5920 struct ice_netdev_priv *np = netdev_priv(netdev);
5921 struct rtnl_link_stats64 *vsi_stats;
5922 struct ice_vsi *vsi = np->vsi;
5923
5924 vsi_stats = &vsi->net_stats;
5925
5926 if (!vsi->num_txq || !vsi->num_rxq)
5927 return;
5928
5929
5930
5931
5932
5933
5934 if (!test_bit(ICE_VSI_DOWN, vsi->state))
5935 ice_update_vsi_ring_stats(vsi);
5936 stats->tx_packets = vsi_stats->tx_packets;
5937 stats->tx_bytes = vsi_stats->tx_bytes;
5938 stats->rx_packets = vsi_stats->rx_packets;
5939 stats->rx_bytes = vsi_stats->rx_bytes;
5940
5941
5942
5943
5944
5945 stats->multicast = vsi_stats->multicast;
5946 stats->tx_errors = vsi_stats->tx_errors;
5947 stats->tx_dropped = vsi_stats->tx_dropped;
5948 stats->rx_errors = vsi_stats->rx_errors;
5949 stats->rx_dropped = vsi_stats->rx_dropped;
5950 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
5951 stats->rx_length_errors = vsi_stats->rx_length_errors;
5952}
5953
5954
5955
5956
5957
5958static void ice_napi_disable_all(struct ice_vsi *vsi)
5959{
5960 int q_idx;
5961
5962 if (!vsi->netdev)
5963 return;
5964
5965 ice_for_each_q_vector(vsi, q_idx) {
5966 struct ice_q_vector *q_vector = vsi->q_vectors[q_idx];
5967
5968 if (q_vector->rx.ring || q_vector->tx.ring)
5969 napi_disable(&q_vector->napi);
5970
5971 cancel_work_sync(&q_vector->tx.dim.work);
5972 cancel_work_sync(&q_vector->rx.dim.work);
5973 }
5974}
5975
5976
5977
5978
5979
5980int ice_down(struct ice_vsi *vsi)
5981{
5982 int i, tx_err, rx_err, link_err = 0;
5983
5984
5985
5986
5987 if (vsi->netdev) {
5988 netif_carrier_off(vsi->netdev);
5989 netif_tx_disable(vsi->netdev);
5990 }
5991
5992 ice_vsi_dis_irq(vsi);
5993
5994 tx_err = ice_vsi_stop_lan_tx_rings(vsi, ICE_NO_RESET, 0);
5995 if (tx_err)
5996 netdev_err(vsi->netdev, "Failed stop Tx rings, VSI %d error %d\n",
5997 vsi->vsi_num, tx_err);
5998 if (!tx_err && ice_is_xdp_ena_vsi(vsi)) {
5999 tx_err = ice_vsi_stop_xdp_tx_rings(vsi);
6000 if (tx_err)
6001 netdev_err(vsi->netdev, "Failed stop XDP rings, VSI %d error %d\n",
6002 vsi->vsi_num, tx_err);
6003 }
6004
6005 rx_err = ice_vsi_stop_all_rx_rings(vsi);
6006 if (rx_err)
6007 netdev_err(vsi->netdev, "Failed stop Rx rings, VSI %d error %d\n",
6008 vsi->vsi_num, rx_err);
6009
6010 ice_napi_disable_all(vsi);
6011
6012 if (test_bit(ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, vsi->back->flags)) {
6013 link_err = ice_force_phys_link_state(vsi, false);
6014 if (link_err)
6015 netdev_err(vsi->netdev, "Failed to set physical link down, VSI %d error %d\n",
6016 vsi->vsi_num, link_err);
6017 }
6018
6019 ice_for_each_txq(vsi, i)
6020 ice_clean_tx_ring(vsi->tx_rings[i]);
6021
6022 ice_for_each_rxq(vsi, i)
6023 ice_clean_rx_ring(vsi->rx_rings[i]);
6024
6025 if (tx_err || rx_err || link_err) {
6026 netdev_err(vsi->netdev, "Failed to close VSI 0x%04X on switch 0x%04X\n",
6027 vsi->vsi_num, vsi->vsw->sw_id);
6028 return -EIO;
6029 }
6030
6031 return 0;
6032}
6033
6034
6035
6036
6037
6038
6039
6040int ice_vsi_setup_tx_rings(struct ice_vsi *vsi)
6041{
6042 int i, err = 0;
6043
6044 if (!vsi->num_txq) {
6045 dev_err(ice_pf_to_dev(vsi->back), "VSI %d has 0 Tx queues\n",
6046 vsi->vsi_num);
6047 return -EINVAL;
6048 }
6049
6050 ice_for_each_txq(vsi, i) {
6051 struct ice_ring *ring = vsi->tx_rings[i];
6052
6053 if (!ring)
6054 return -EINVAL;
6055
6056 ring->netdev = vsi->netdev;
6057 err = ice_setup_tx_ring(ring);
6058 if (err)
6059 break;
6060 }
6061
6062 return err;
6063}
6064
6065
6066
6067
6068
6069
6070
6071int ice_vsi_setup_rx_rings(struct ice_vsi *vsi)
6072{
6073 int i, err = 0;
6074
6075 if (!vsi->num_rxq) {
6076 dev_err(ice_pf_to_dev(vsi->back), "VSI %d has 0 Rx queues\n",
6077 vsi->vsi_num);
6078 return -EINVAL;
6079 }
6080
6081 ice_for_each_rxq(vsi, i) {
6082 struct ice_ring *ring = vsi->rx_rings[i];
6083
6084 if (!ring)
6085 return -EINVAL;
6086
6087 ring->netdev = vsi->netdev;
6088 err = ice_setup_rx_ring(ring);
6089 if (err)
6090 break;
6091 }
6092
6093 return err;
6094}
6095
6096
6097
6098
6099
6100
6101
6102
6103
6104int ice_vsi_open_ctrl(struct ice_vsi *vsi)
6105{
6106 char int_name[ICE_INT_NAME_STR_LEN];
6107 struct ice_pf *pf = vsi->back;
6108 struct device *dev;
6109 int err;
6110
6111 dev = ice_pf_to_dev(pf);
6112
6113 err = ice_vsi_setup_tx_rings(vsi);
6114 if (err)
6115 goto err_setup_tx;
6116
6117 err = ice_vsi_setup_rx_rings(vsi);
6118 if (err)
6119 goto err_setup_rx;
6120
6121 err = ice_vsi_cfg(vsi);
6122 if (err)
6123 goto err_setup_rx;
6124
6125 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:ctrl",
6126 dev_driver_string(dev), dev_name(dev));
6127 err = ice_vsi_req_irq_msix(vsi, int_name);
6128 if (err)
6129 goto err_setup_rx;
6130
6131 ice_vsi_cfg_msix(vsi);
6132
6133 err = ice_vsi_start_all_rx_rings(vsi);
6134 if (err)
6135 goto err_up_complete;
6136
6137 clear_bit(ICE_VSI_DOWN, vsi->state);
6138 ice_vsi_ena_irq(vsi);
6139
6140 return 0;
6141
6142err_up_complete:
6143 ice_down(vsi);
6144err_setup_rx:
6145 ice_vsi_free_rx_rings(vsi);
6146err_setup_tx:
6147 ice_vsi_free_tx_rings(vsi);
6148
6149 return err;
6150}
6151
6152
6153
6154
6155
6156
6157
6158
6159
6160static int ice_vsi_open(struct ice_vsi *vsi)
6161{
6162 char int_name[ICE_INT_NAME_STR_LEN];
6163 struct ice_pf *pf = vsi->back;
6164 int err;
6165
6166
6167 err = ice_vsi_setup_tx_rings(vsi);
6168 if (err)
6169 goto err_setup_tx;
6170
6171 err = ice_vsi_setup_rx_rings(vsi);
6172 if (err)
6173 goto err_setup_rx;
6174
6175 err = ice_vsi_cfg(vsi);
6176 if (err)
6177 goto err_setup_rx;
6178
6179 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
6180 dev_driver_string(ice_pf_to_dev(pf)), vsi->netdev->name);
6181 err = ice_vsi_req_irq_msix(vsi, int_name);
6182 if (err)
6183 goto err_setup_rx;
6184
6185
6186 err = netif_set_real_num_tx_queues(vsi->netdev, vsi->num_txq);
6187 if (err)
6188 goto err_set_qs;
6189
6190 err = netif_set_real_num_rx_queues(vsi->netdev, vsi->num_rxq);
6191 if (err)
6192 goto err_set_qs;
6193
6194 err = ice_up_complete(vsi);
6195 if (err)
6196 goto err_up_complete;
6197
6198 return 0;
6199
6200err_up_complete:
6201 ice_down(vsi);
6202err_set_qs:
6203 ice_vsi_free_irq(vsi);
6204err_setup_rx:
6205 ice_vsi_free_rx_rings(vsi);
6206err_setup_tx:
6207 ice_vsi_free_tx_rings(vsi);
6208
6209 return err;
6210}
6211
6212
6213
6214
6215
6216static void ice_vsi_release_all(struct ice_pf *pf)
6217{
6218 int err, i;
6219
6220 if (!pf->vsi)
6221 return;
6222
6223 ice_for_each_vsi(pf, i) {
6224 if (!pf->vsi[i])
6225 continue;
6226
6227 err = ice_vsi_release(pf->vsi[i]);
6228 if (err)
6229 dev_dbg(ice_pf_to_dev(pf), "Failed to release pf->vsi[%d], err %d, vsi_num = %d\n",
6230 i, err, pf->vsi[i]->vsi_num);
6231 }
6232}
6233
6234
6235
6236
6237
6238
6239
6240
6241static int ice_vsi_rebuild_by_type(struct ice_pf *pf, enum ice_vsi_type type)
6242{
6243 struct device *dev = ice_pf_to_dev(pf);
6244 enum ice_status status;
6245 int i, err;
6246
6247 ice_for_each_vsi(pf, i) {
6248 struct ice_vsi *vsi = pf->vsi[i];
6249
6250 if (!vsi || vsi->type != type)
6251 continue;
6252
6253
6254 err = ice_vsi_rebuild(vsi, true);
6255 if (err) {
6256 dev_err(dev, "rebuild VSI failed, err %d, VSI index %d, type %s\n",
6257 err, vsi->idx, ice_vsi_type_str(type));
6258 return err;
6259 }
6260
6261
6262 status = ice_replay_vsi(&pf->hw, vsi->idx);
6263 if (status) {
6264 dev_err(dev, "replay VSI failed, status %s, VSI index %d, type %s\n",
6265 ice_stat_str(status), vsi->idx,
6266 ice_vsi_type_str(type));
6267 return -EIO;
6268 }
6269
6270
6271
6272
6273 vsi->vsi_num = ice_get_hw_vsi_num(&pf->hw, vsi->idx);
6274
6275
6276 err = ice_ena_vsi(vsi, false);
6277 if (err) {
6278 dev_err(dev, "enable VSI failed, err %d, VSI index %d, type %s\n",
6279 err, vsi->idx, ice_vsi_type_str(type));
6280 return err;
6281 }
6282
6283 dev_info(dev, "VSI rebuilt. VSI index %d, type %s\n", vsi->idx,
6284 ice_vsi_type_str(type));
6285 }
6286
6287 return 0;
6288}
6289
6290
6291
6292
6293
6294static void ice_update_pf_netdev_link(struct ice_pf *pf)
6295{
6296 bool link_up;
6297 int i;
6298
6299 ice_for_each_vsi(pf, i) {
6300 struct ice_vsi *vsi = pf->vsi[i];
6301
6302 if (!vsi || vsi->type != ICE_VSI_PF)
6303 return;
6304
6305 ice_get_link_status(pf->vsi[i]->port_info, &link_up);
6306 if (link_up) {
6307 netif_carrier_on(pf->vsi[i]->netdev);
6308 netif_tx_wake_all_queues(pf->vsi[i]->netdev);
6309 } else {
6310 netif_carrier_off(pf->vsi[i]->netdev);
6311 netif_tx_stop_all_queues(pf->vsi[i]->netdev);
6312 }
6313 }
6314}
6315
6316
6317
6318
6319
6320
6321
6322
6323
6324
6325
6326static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type)
6327{
6328 struct device *dev = ice_pf_to_dev(pf);
6329 struct ice_hw *hw = &pf->hw;
6330 enum ice_status ret;
6331 int err;
6332
6333 if (test_bit(ICE_DOWN, pf->state))
6334 goto clear_recovery;
6335
6336 dev_dbg(dev, "rebuilding PF after reset_type=%d\n", reset_type);
6337
6338 ret = ice_init_all_ctrlq(hw);
6339 if (ret) {
6340 dev_err(dev, "control queues init failed %s\n",
6341 ice_stat_str(ret));
6342 goto err_init_ctrlq;
6343 }
6344
6345
6346 if (!ice_is_safe_mode(pf)) {
6347
6348 if (reset_type == ICE_RESET_PFR)
6349 ice_fill_blk_tbls(hw);
6350 else
6351
6352 ice_load_pkg(NULL, pf);
6353 }
6354
6355 ret = ice_clear_pf_cfg(hw);
6356 if (ret) {
6357 dev_err(dev, "clear PF configuration failed %s\n",
6358 ice_stat_str(ret));
6359 goto err_init_ctrlq;
6360 }
6361
6362 if (pf->first_sw->dflt_vsi_ena)
6363 dev_info(dev, "Clearing default VSI, re-enable after reset completes\n");
6364
6365 pf->first_sw->dflt_vsi = NULL;
6366 pf->first_sw->dflt_vsi_ena = false;
6367
6368 ice_clear_pxe_mode(hw);
6369
6370 ret = ice_init_nvm(hw);
6371 if (ret) {
6372 dev_err(dev, "ice_init_nvm failed %s\n", ice_stat_str(ret));
6373 goto err_init_ctrlq;
6374 }
6375
6376 ret = ice_get_caps(hw);
6377 if (ret) {
6378 dev_err(dev, "ice_get_caps failed %s\n", ice_stat_str(ret));
6379 goto err_init_ctrlq;
6380 }
6381
6382 ret = ice_aq_set_mac_cfg(hw, ICE_AQ_SET_MAC_FRAME_SIZE_MAX, NULL);
6383 if (ret) {
6384 dev_err(dev, "set_mac_cfg failed %s\n", ice_stat_str(ret));
6385 goto err_init_ctrlq;
6386 }
6387
6388 err = ice_sched_init_port(hw->port_info);
6389 if (err)
6390 goto err_sched_init_port;
6391
6392
6393 err = ice_req_irq_msix_misc(pf);
6394 if (err) {
6395 dev_err(dev, "misc vector setup failed: %d\n", err);
6396 goto err_sched_init_port;
6397 }
6398
6399 if (test_bit(ICE_FLAG_FD_ENA, pf->flags)) {
6400 wr32(hw, PFQF_FD_ENA, PFQF_FD_ENA_FD_ENA_M);
6401 if (!rd32(hw, PFQF_FD_SIZE)) {
6402 u16 unused, guar, b_effort;
6403
6404 guar = hw->func_caps.fd_fltr_guar;
6405 b_effort = hw->func_caps.fd_fltr_best_effort;
6406
6407
6408 ice_alloc_fd_guar_item(hw, &unused, guar);
6409
6410 ice_alloc_fd_shrd_item(hw, &unused, b_effort);
6411 }
6412 }
6413
6414 if (test_bit(ICE_FLAG_DCB_ENA, pf->flags))
6415 ice_dcb_rebuild(pf);
6416
6417
6418
6419
6420
6421 if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags))
6422 ice_ptp_init(pf);
6423
6424
6425 err = ice_vsi_rebuild_by_type(pf, ICE_VSI_PF);
6426 if (err) {
6427 dev_err(dev, "PF VSI rebuild failed: %d\n", err);
6428 goto err_vsi_rebuild;
6429 }
6430
6431
6432 if (test_bit(ICE_FLAG_FD_ENA, pf->flags)) {
6433 err = ice_vsi_rebuild_by_type(pf, ICE_VSI_CTRL);
6434 if (err) {
6435 dev_err(dev, "control VSI rebuild failed: %d\n", err);
6436 goto err_vsi_rebuild;
6437 }
6438
6439
6440 if (hw->fdir_prof)
6441 ice_fdir_replay_flows(hw);
6442
6443
6444 ice_fdir_replay_fltrs(pf);
6445
6446 ice_rebuild_arfs(pf);
6447 }
6448
6449 ice_update_pf_netdev_link(pf);
6450
6451
6452 ret = ice_send_version(pf);
6453 if (ret) {
6454 dev_err(dev, "Rebuild failed due to error sending driver version: %s\n",
6455 ice_stat_str(ret));
6456 goto err_vsi_rebuild;
6457 }
6458
6459 ice_replay_post(hw);
6460
6461
6462 clear_bit(ICE_RESET_FAILED, pf->state);
6463
6464 ice_plug_aux_dev(pf);
6465 return;
6466
6467err_vsi_rebuild:
6468err_sched_init_port:
6469 ice_sched_cleanup_all(hw);
6470err_init_ctrlq:
6471 ice_shutdown_all_ctrlq(hw);
6472 set_bit(ICE_RESET_FAILED, pf->state);
6473clear_recovery:
6474
6475 set_bit(ICE_NEEDS_RESTART, pf->state);
6476 dev_err(dev, "Rebuild failed, unload and reload driver\n");
6477}
6478
6479
6480
6481
6482
6483static int ice_max_xdp_frame_size(struct ice_vsi *vsi)
6484{
6485 if (PAGE_SIZE >= 8192 || test_bit(ICE_FLAG_LEGACY_RX, vsi->back->flags))
6486 return ICE_RXBUF_2048 - XDP_PACKET_HEADROOM;
6487 else
6488 return ICE_RXBUF_3072;
6489}
6490
6491
6492
6493
6494
6495
6496
6497
6498static int ice_change_mtu(struct net_device *netdev, int new_mtu)
6499{
6500 struct ice_netdev_priv *np = netdev_priv(netdev);
6501 struct ice_vsi *vsi = np->vsi;
6502 struct ice_pf *pf = vsi->back;
6503 struct iidc_event *event;
6504 u8 count = 0;
6505 int err = 0;
6506
6507 if (new_mtu == (int)netdev->mtu) {
6508 netdev_warn(netdev, "MTU is already %u\n", netdev->mtu);
6509 return 0;
6510 }
6511
6512 if (ice_is_xdp_ena_vsi(vsi)) {
6513 int frame_size = ice_max_xdp_frame_size(vsi);
6514
6515 if (new_mtu + ICE_ETH_PKT_HDR_PAD > frame_size) {
6516 netdev_err(netdev, "max MTU for XDP usage is %d\n",
6517 frame_size - ICE_ETH_PKT_HDR_PAD);
6518 return -EINVAL;
6519 }
6520 }
6521
6522
6523 do {
6524 if (ice_is_reset_in_progress(pf->state)) {
6525 count++;
6526 usleep_range(1000, 2000);
6527 } else {
6528 break;
6529 }
6530
6531 } while (count < 100);
6532
6533 if (count == 100) {
6534 netdev_err(netdev, "can't change MTU. Device is busy\n");
6535 return -EBUSY;
6536 }
6537
6538 event = kzalloc(sizeof(*event), GFP_KERNEL);
6539 if (!event)
6540 return -ENOMEM;
6541
6542 set_bit(IIDC_EVENT_BEFORE_MTU_CHANGE, event->type);
6543 ice_send_event_to_aux(pf, event);
6544 clear_bit(IIDC_EVENT_BEFORE_MTU_CHANGE, event->type);
6545
6546 netdev->mtu = (unsigned int)new_mtu;
6547
6548
6549 if (!test_and_set_bit(ICE_VSI_DOWN, vsi->state)) {
6550 err = ice_down(vsi);
6551 if (err) {
6552 netdev_err(netdev, "change MTU if_down err %d\n", err);
6553 goto event_after;
6554 }
6555
6556 err = ice_up(vsi);
6557 if (err) {
6558 netdev_err(netdev, "change MTU if_up err %d\n", err);
6559 goto event_after;
6560 }
6561 }
6562
6563 netdev_dbg(netdev, "changed MTU to %d\n", new_mtu);
6564event_after:
6565 set_bit(IIDC_EVENT_AFTER_MTU_CHANGE, event->type);
6566 ice_send_event_to_aux(pf, event);
6567 kfree(event);
6568
6569 return err;
6570}
6571
6572
6573
6574
6575
6576
6577
6578static int ice_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6579{
6580 struct ice_netdev_priv *np = netdev_priv(netdev);
6581 struct ice_pf *pf = np->vsi->back;
6582
6583 switch (cmd) {
6584 case SIOCGHWTSTAMP:
6585 return ice_ptp_get_ts_config(pf, ifr);
6586 case SIOCSHWTSTAMP:
6587 return ice_ptp_set_ts_config(pf, ifr);
6588 default:
6589 return -EOPNOTSUPP;
6590 }
6591}
6592
6593
6594
6595
6596
6597const char *ice_aq_str(enum ice_aq_err aq_err)
6598{
6599 switch (aq_err) {
6600 case ICE_AQ_RC_OK:
6601 return "OK";
6602 case ICE_AQ_RC_EPERM:
6603 return "ICE_AQ_RC_EPERM";
6604 case ICE_AQ_RC_ENOENT:
6605 return "ICE_AQ_RC_ENOENT";
6606 case ICE_AQ_RC_ENOMEM:
6607 return "ICE_AQ_RC_ENOMEM";
6608 case ICE_AQ_RC_EBUSY:
6609 return "ICE_AQ_RC_EBUSY";
6610 case ICE_AQ_RC_EEXIST:
6611 return "ICE_AQ_RC_EEXIST";
6612 case ICE_AQ_RC_EINVAL:
6613 return "ICE_AQ_RC_EINVAL";
6614 case ICE_AQ_RC_ENOSPC:
6615 return "ICE_AQ_RC_ENOSPC";
6616 case ICE_AQ_RC_ENOSYS:
6617 return "ICE_AQ_RC_ENOSYS";
6618 case ICE_AQ_RC_EMODE:
6619 return "ICE_AQ_RC_EMODE";
6620 case ICE_AQ_RC_ENOSEC:
6621 return "ICE_AQ_RC_ENOSEC";
6622 case ICE_AQ_RC_EBADSIG:
6623 return "ICE_AQ_RC_EBADSIG";
6624 case ICE_AQ_RC_ESVN:
6625 return "ICE_AQ_RC_ESVN";
6626 case ICE_AQ_RC_EBADMAN:
6627 return "ICE_AQ_RC_EBADMAN";
6628 case ICE_AQ_RC_EBADBUF:
6629 return "ICE_AQ_RC_EBADBUF";
6630 }
6631
6632 return "ICE_AQ_RC_UNKNOWN";
6633}
6634
6635
6636
6637
6638
6639const char *ice_stat_str(enum ice_status stat_err)
6640{
6641 switch (stat_err) {
6642 case ICE_SUCCESS:
6643 return "OK";
6644 case ICE_ERR_PARAM:
6645 return "ICE_ERR_PARAM";
6646 case ICE_ERR_NOT_IMPL:
6647 return "ICE_ERR_NOT_IMPL";
6648 case ICE_ERR_NOT_READY:
6649 return "ICE_ERR_NOT_READY";
6650 case ICE_ERR_NOT_SUPPORTED:
6651 return "ICE_ERR_NOT_SUPPORTED";
6652 case ICE_ERR_BAD_PTR:
6653 return "ICE_ERR_BAD_PTR";
6654 case ICE_ERR_INVAL_SIZE:
6655 return "ICE_ERR_INVAL_SIZE";
6656 case ICE_ERR_DEVICE_NOT_SUPPORTED:
6657 return "ICE_ERR_DEVICE_NOT_SUPPORTED";
6658 case ICE_ERR_RESET_FAILED:
6659 return "ICE_ERR_RESET_FAILED";
6660 case ICE_ERR_FW_API_VER:
6661 return "ICE_ERR_FW_API_VER";
6662 case ICE_ERR_NO_MEMORY:
6663 return "ICE_ERR_NO_MEMORY";
6664 case ICE_ERR_CFG:
6665 return "ICE_ERR_CFG";
6666 case ICE_ERR_OUT_OF_RANGE:
6667 return "ICE_ERR_OUT_OF_RANGE";
6668 case ICE_ERR_ALREADY_EXISTS:
6669 return "ICE_ERR_ALREADY_EXISTS";
6670 case ICE_ERR_NVM:
6671 return "ICE_ERR_NVM";
6672 case ICE_ERR_NVM_CHECKSUM:
6673 return "ICE_ERR_NVM_CHECKSUM";
6674 case ICE_ERR_BUF_TOO_SHORT:
6675 return "ICE_ERR_BUF_TOO_SHORT";
6676 case ICE_ERR_NVM_BLANK_MODE:
6677 return "ICE_ERR_NVM_BLANK_MODE";
6678 case ICE_ERR_IN_USE:
6679 return "ICE_ERR_IN_USE";
6680 case ICE_ERR_MAX_LIMIT:
6681 return "ICE_ERR_MAX_LIMIT";
6682 case ICE_ERR_RESET_ONGOING:
6683 return "ICE_ERR_RESET_ONGOING";
6684 case ICE_ERR_HW_TABLE:
6685 return "ICE_ERR_HW_TABLE";
6686 case ICE_ERR_DOES_NOT_EXIST:
6687 return "ICE_ERR_DOES_NOT_EXIST";
6688 case ICE_ERR_FW_DDP_MISMATCH:
6689 return "ICE_ERR_FW_DDP_MISMATCH";
6690 case ICE_ERR_AQ_ERROR:
6691 return "ICE_ERR_AQ_ERROR";
6692 case ICE_ERR_AQ_TIMEOUT:
6693 return "ICE_ERR_AQ_TIMEOUT";
6694 case ICE_ERR_AQ_FULL:
6695 return "ICE_ERR_AQ_FULL";
6696 case ICE_ERR_AQ_NO_WORK:
6697 return "ICE_ERR_AQ_NO_WORK";
6698 case ICE_ERR_AQ_EMPTY:
6699 return "ICE_ERR_AQ_EMPTY";
6700 case ICE_ERR_AQ_FW_CRITICAL:
6701 return "ICE_ERR_AQ_FW_CRITICAL";
6702 }
6703
6704 return "ICE_ERR_UNKNOWN";
6705}
6706
6707
6708
6709
6710
6711
6712
6713
6714
6715int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size)
6716{
6717 struct ice_aq_get_set_rss_lut_params params = {};
6718 struct ice_hw *hw = &vsi->back->hw;
6719 enum ice_status status;
6720
6721 if (!lut)
6722 return -EINVAL;
6723
6724 params.vsi_handle = vsi->idx;
6725 params.lut_size = lut_size;
6726 params.lut_type = vsi->rss_lut_type;
6727 params.lut = lut;
6728
6729 status = ice_aq_set_rss_lut(hw, ¶ms);
6730 if (status) {
6731 dev_err(ice_pf_to_dev(vsi->back), "Cannot set RSS lut, err %s aq_err %s\n",
6732 ice_stat_str(status),
6733 ice_aq_str(hw->adminq.sq_last_status));
6734 return -EIO;
6735 }
6736
6737 return 0;
6738}
6739
6740
6741
6742
6743
6744
6745
6746
6747int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed)
6748{
6749 struct ice_hw *hw = &vsi->back->hw;
6750 enum ice_status status;
6751
6752 if (!seed)
6753 return -EINVAL;
6754
6755 status = ice_aq_set_rss_key(hw, vsi->idx, (struct ice_aqc_get_set_rss_keys *)seed);
6756 if (status) {
6757 dev_err(ice_pf_to_dev(vsi->back), "Cannot set RSS key, err %s aq_err %s\n",
6758 ice_stat_str(status),
6759 ice_aq_str(hw->adminq.sq_last_status));
6760 return -EIO;
6761 }
6762
6763 return 0;
6764}
6765
6766
6767
6768
6769
6770
6771
6772
6773
6774int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size)
6775{
6776 struct ice_aq_get_set_rss_lut_params params = {};
6777 struct ice_hw *hw = &vsi->back->hw;
6778 enum ice_status status;
6779
6780 if (!lut)
6781 return -EINVAL;
6782
6783 params.vsi_handle = vsi->idx;
6784 params.lut_size = lut_size;
6785 params.lut_type = vsi->rss_lut_type;
6786 params.lut = lut;
6787
6788 status = ice_aq_get_rss_lut(hw, ¶ms);
6789 if (status) {
6790 dev_err(ice_pf_to_dev(vsi->back), "Cannot get RSS lut, err %s aq_err %s\n",
6791 ice_stat_str(status),
6792 ice_aq_str(hw->adminq.sq_last_status));
6793 return -EIO;
6794 }
6795
6796 return 0;
6797}
6798
6799
6800
6801
6802
6803
6804
6805
6806int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed)
6807{
6808 struct ice_hw *hw = &vsi->back->hw;
6809 enum ice_status status;
6810
6811 if (!seed)
6812 return -EINVAL;
6813
6814 status = ice_aq_get_rss_key(hw, vsi->idx, (struct ice_aqc_get_set_rss_keys *)seed);
6815 if (status) {
6816 dev_err(ice_pf_to_dev(vsi->back), "Cannot get RSS key, err %s aq_err %s\n",
6817 ice_stat_str(status),
6818 ice_aq_str(hw->adminq.sq_last_status));
6819 return -EIO;
6820 }
6821
6822 return 0;
6823}
6824
6825
6826
6827
6828
6829
6830
6831
6832
6833
6834
6835
6836static int
6837ice_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
6838 struct net_device *dev, u32 filter_mask, int nlflags)
6839{
6840 struct ice_netdev_priv *np = netdev_priv(dev);
6841 struct ice_vsi *vsi = np->vsi;
6842 struct ice_pf *pf = vsi->back;
6843 u16 bmode;
6844
6845 bmode = pf->first_sw->bridge_mode;
6846
6847 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, bmode, 0, 0, nlflags,
6848 filter_mask, NULL);
6849}
6850
6851
6852
6853
6854
6855
6856
6857
6858static int ice_vsi_update_bridge_mode(struct ice_vsi *vsi, u16 bmode)
6859{
6860 struct ice_aqc_vsi_props *vsi_props;
6861 struct ice_hw *hw = &vsi->back->hw;
6862 struct ice_vsi_ctx *ctxt;
6863 enum ice_status status;
6864 int ret = 0;
6865
6866 vsi_props = &vsi->info;
6867
6868 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
6869 if (!ctxt)
6870 return -ENOMEM;
6871
6872 ctxt->info = vsi->info;
6873
6874 if (bmode == BRIDGE_MODE_VEB)
6875
6876 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
6877 else
6878
6879 ctxt->info.sw_flags &= ~ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
6880 ctxt->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SW_VALID);
6881
6882 status = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
6883 if (status) {
6884 dev_err(ice_pf_to_dev(vsi->back), "update VSI for bridge mode failed, bmode = %d err %s aq_err %s\n",
6885 bmode, ice_stat_str(status),
6886 ice_aq_str(hw->adminq.sq_last_status));
6887 ret = -EIO;
6888 goto out;
6889 }
6890
6891 vsi_props->sw_flags = ctxt->info.sw_flags;
6892
6893out:
6894 kfree(ctxt);
6895 return ret;
6896}
6897
6898
6899
6900
6901
6902
6903
6904
6905
6906
6907
6908
6909
6910static int
6911ice_bridge_setlink(struct net_device *dev, struct nlmsghdr *nlh,
6912 u16 __always_unused flags,
6913 struct netlink_ext_ack __always_unused *extack)
6914{
6915 struct ice_netdev_priv *np = netdev_priv(dev);
6916 struct ice_pf *pf = np->vsi->back;
6917 struct nlattr *attr, *br_spec;
6918 struct ice_hw *hw = &pf->hw;
6919 enum ice_status status;
6920 struct ice_sw *pf_sw;
6921 int rem, v, err = 0;
6922
6923 pf_sw = pf->first_sw;
6924
6925 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
6926
6927 nla_for_each_nested(attr, br_spec, rem) {
6928 __u16 mode;
6929
6930 if (nla_type(attr) != IFLA_BRIDGE_MODE)
6931 continue;
6932 mode = nla_get_u16(attr);
6933 if (mode != BRIDGE_MODE_VEPA && mode != BRIDGE_MODE_VEB)
6934 return -EINVAL;
6935
6936 if (mode == pf_sw->bridge_mode)
6937 continue;
6938
6939
6940
6941 ice_for_each_vsi(pf, v) {
6942 if (!pf->vsi[v])
6943 continue;
6944 err = ice_vsi_update_bridge_mode(pf->vsi[v], mode);
6945 if (err)
6946 return err;
6947 }
6948
6949 hw->evb_veb = (mode == BRIDGE_MODE_VEB);
6950
6951
6952
6953 status = ice_update_sw_rule_bridge_mode(hw);
6954 if (status) {
6955 netdev_err(dev, "switch rule update failed, mode = %d err %s aq_err %s\n",
6956 mode, ice_stat_str(status),
6957 ice_aq_str(hw->adminq.sq_last_status));
6958
6959 hw->evb_veb = (pf_sw->bridge_mode == BRIDGE_MODE_VEB);
6960 return -EIO;
6961 }
6962
6963 pf_sw->bridge_mode = mode;
6964 }
6965
6966 return 0;
6967}
6968
6969
6970
6971
6972
6973
6974static void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue)
6975{
6976 struct ice_netdev_priv *np = netdev_priv(netdev);
6977 struct ice_ring *tx_ring = NULL;
6978 struct ice_vsi *vsi = np->vsi;
6979 struct ice_pf *pf = vsi->back;
6980 u32 i;
6981
6982 pf->tx_timeout_count++;
6983
6984
6985
6986
6987
6988 if (ice_is_pfc_causing_hung_q(pf, txqueue)) {
6989 dev_info(ice_pf_to_dev(pf), "Fake Tx hang detected on queue %u, timeout caused by PFC storm\n",
6990 txqueue);
6991 return;
6992 }
6993
6994
6995 for (i = 0; i < vsi->num_txq; i++)
6996 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
6997 if (txqueue == vsi->tx_rings[i]->q_index) {
6998 tx_ring = vsi->tx_rings[i];
6999 break;
7000 }
7001
7002
7003
7004
7005 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ * 20)))
7006 pf->tx_timeout_recovery_level = 1;
7007 else if (time_before(jiffies, (pf->tx_timeout_last_recovery +
7008 netdev->watchdog_timeo)))
7009 return;
7010
7011 if (tx_ring) {
7012 struct ice_hw *hw = &pf->hw;
7013 u32 head, val = 0;
7014
7015 head = (rd32(hw, QTX_COMM_HEAD(vsi->txq_map[txqueue])) &
7016 QTX_COMM_HEAD_HEAD_M) >> QTX_COMM_HEAD_HEAD_S;
7017
7018 val = rd32(hw, GLINT_DYN_CTL(tx_ring->q_vector->reg_idx));
7019
7020 netdev_info(netdev, "tx_timeout: VSI_num: %d, Q %u, NTC: 0x%x, HW_HEAD: 0x%x, NTU: 0x%x, INT: 0x%x\n",
7021 vsi->vsi_num, txqueue, tx_ring->next_to_clean,
7022 head, tx_ring->next_to_use, val);
7023 }
7024
7025 pf->tx_timeout_last_recovery = jiffies;
7026 netdev_info(netdev, "tx_timeout recovery level %d, txqueue %u\n",
7027 pf->tx_timeout_recovery_level, txqueue);
7028
7029 switch (pf->tx_timeout_recovery_level) {
7030 case 1:
7031 set_bit(ICE_PFR_REQ, pf->state);
7032 break;
7033 case 2:
7034 set_bit(ICE_CORER_REQ, pf->state);
7035 break;
7036 case 3:
7037 set_bit(ICE_GLOBR_REQ, pf->state);
7038 break;
7039 default:
7040 netdev_err(netdev, "tx_timeout recovery unsuccessful, device is in unrecoverable state.\n");
7041 set_bit(ICE_DOWN, pf->state);
7042 set_bit(ICE_VSI_NEEDS_RESTART, vsi->state);
7043 set_bit(ICE_SERVICE_DIS, pf->state);
7044 break;
7045 }
7046
7047 ice_service_task_schedule(pf);
7048 pf->tx_timeout_recovery_level++;
7049}
7050
7051
7052
7053
7054
7055
7056
7057
7058
7059
7060
7061
7062
7063int ice_open(struct net_device *netdev)
7064{
7065 struct ice_netdev_priv *np = netdev_priv(netdev);
7066 struct ice_pf *pf = np->vsi->back;
7067
7068 if (ice_is_reset_in_progress(pf->state)) {
7069 netdev_err(netdev, "can't open net device while reset is in progress");
7070 return -EBUSY;
7071 }
7072
7073 return ice_open_internal(netdev);
7074}
7075
7076
7077
7078
7079
7080
7081
7082
7083
7084
7085int ice_open_internal(struct net_device *netdev)
7086{
7087 struct ice_netdev_priv *np = netdev_priv(netdev);
7088 struct ice_vsi *vsi = np->vsi;
7089 struct ice_pf *pf = vsi->back;
7090 struct ice_port_info *pi;
7091 enum ice_status status;
7092 int err;
7093
7094 if (test_bit(ICE_NEEDS_RESTART, pf->state)) {
7095 netdev_err(netdev, "driver needs to be unloaded and reloaded\n");
7096 return -EIO;
7097 }
7098
7099 netif_carrier_off(netdev);
7100
7101 pi = vsi->port_info;
7102 status = ice_update_link_info(pi);
7103 if (status) {
7104 netdev_err(netdev, "Failed to get link info, error %s\n",
7105 ice_stat_str(status));
7106 return -EIO;
7107 }
7108
7109 ice_check_module_power(pf, pi->phy.link_info.link_cfg_err);
7110
7111
7112 if (pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) {
7113 clear_bit(ICE_FLAG_NO_MEDIA, pf->flags);
7114 if (!test_bit(ICE_PHY_INIT_COMPLETE, pf->state)) {
7115 err = ice_init_phy_user_cfg(pi);
7116 if (err) {
7117 netdev_err(netdev, "Failed to initialize PHY settings, error %d\n",
7118 err);
7119 return err;
7120 }
7121 }
7122
7123 err = ice_configure_phy(vsi);
7124 if (err) {
7125 netdev_err(netdev, "Failed to set physical link up, error %d\n",
7126 err);
7127 return err;
7128 }
7129 } else {
7130 set_bit(ICE_FLAG_NO_MEDIA, pf->flags);
7131 ice_set_link(vsi, false);
7132 }
7133
7134 err = ice_vsi_open(vsi);
7135 if (err)
7136 netdev_err(netdev, "Failed to open VSI 0x%04X on switch 0x%04X\n",
7137 vsi->vsi_num, vsi->vsw->sw_id);
7138
7139
7140 udp_tunnel_get_rx_info(netdev);
7141
7142 return err;
7143}
7144
7145
7146
7147
7148
7149
7150
7151
7152
7153
7154
7155int ice_stop(struct net_device *netdev)
7156{
7157 struct ice_netdev_priv *np = netdev_priv(netdev);
7158 struct ice_vsi *vsi = np->vsi;
7159 struct ice_pf *pf = vsi->back;
7160
7161 if (ice_is_reset_in_progress(pf->state)) {
7162 netdev_err(netdev, "can't stop net device while reset is in progress");
7163 return -EBUSY;
7164 }
7165
7166 ice_vsi_close(vsi);
7167
7168 return 0;
7169}
7170
7171
7172
7173
7174
7175
7176
7177static netdev_features_t
7178ice_features_check(struct sk_buff *skb,
7179 struct net_device __always_unused *netdev,
7180 netdev_features_t features)
7181{
7182 size_t len;
7183
7184
7185
7186
7187
7188 if (skb->ip_summed != CHECKSUM_PARTIAL)
7189 return features;
7190
7191
7192
7193
7194 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
7195 features &= ~NETIF_F_GSO_MASK;
7196
7197 len = skb_network_header(skb) - skb->data;
7198 if (len > ICE_TXD_MACLEN_MAX || len & 0x1)
7199 goto out_rm_features;
7200
7201 len = skb_transport_header(skb) - skb_network_header(skb);
7202 if (len > ICE_TXD_IPLEN_MAX || len & 0x1)
7203 goto out_rm_features;
7204
7205 if (skb->encapsulation) {
7206 len = skb_inner_network_header(skb) - skb_transport_header(skb);
7207 if (len > ICE_TXD_L4LEN_MAX || len & 0x1)
7208 goto out_rm_features;
7209
7210 len = skb_inner_transport_header(skb) -
7211 skb_inner_network_header(skb);
7212 if (len > ICE_TXD_IPLEN_MAX || len & 0x1)
7213 goto out_rm_features;
7214 }
7215
7216 return features;
7217out_rm_features:
7218 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
7219}
7220
7221static const struct net_device_ops ice_netdev_safe_mode_ops = {
7222 .ndo_open = ice_open,
7223 .ndo_stop = ice_stop,
7224 .ndo_start_xmit = ice_start_xmit,
7225 .ndo_set_mac_address = ice_set_mac_address,
7226 .ndo_validate_addr = eth_validate_addr,
7227 .ndo_change_mtu = ice_change_mtu,
7228 .ndo_get_stats64 = ice_get_stats64,
7229 .ndo_tx_timeout = ice_tx_timeout,
7230 .ndo_bpf = ice_xdp_safe_mode,
7231};
7232
7233static const struct net_device_ops ice_netdev_ops = {
7234 .ndo_open = ice_open,
7235 .ndo_stop = ice_stop,
7236 .ndo_start_xmit = ice_start_xmit,
7237 .ndo_features_check = ice_features_check,
7238 .ndo_set_rx_mode = ice_set_rx_mode,
7239 .ndo_set_mac_address = ice_set_mac_address,
7240 .ndo_validate_addr = eth_validate_addr,
7241 .ndo_change_mtu = ice_change_mtu,
7242 .ndo_get_stats64 = ice_get_stats64,
7243 .ndo_set_tx_maxrate = ice_set_tx_maxrate,
7244 .ndo_do_ioctl = ice_do_ioctl,
7245 .ndo_set_vf_spoofchk = ice_set_vf_spoofchk,
7246 .ndo_set_vf_mac = ice_set_vf_mac,
7247 .ndo_get_vf_config = ice_get_vf_cfg,
7248 .ndo_set_vf_trust = ice_set_vf_trust,
7249 .ndo_set_vf_vlan = ice_set_vf_port_vlan,
7250 .ndo_set_vf_link_state = ice_set_vf_link_state,
7251 .ndo_get_vf_stats = ice_get_vf_stats,
7252 .ndo_vlan_rx_add_vid = ice_vlan_rx_add_vid,
7253 .ndo_vlan_rx_kill_vid = ice_vlan_rx_kill_vid,
7254 .ndo_set_features = ice_set_features,
7255 .ndo_bridge_getlink = ice_bridge_getlink,
7256 .ndo_bridge_setlink = ice_bridge_setlink,
7257 .ndo_fdb_add = ice_fdb_add,
7258 .ndo_fdb_del = ice_fdb_del,
7259#ifdef CONFIG_RFS_ACCEL
7260 .ndo_rx_flow_steer = ice_rx_flow_steer,
7261#endif
7262 .ndo_tx_timeout = ice_tx_timeout,
7263 .ndo_bpf = ice_xdp,
7264 .ndo_xdp_xmit = ice_xdp_xmit,
7265 .ndo_xsk_wakeup = ice_xsk_wakeup,
7266};
7267