LXR linux/drivers/net/ethernet/brocade/bna/bfi.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Linux network driver for QLogic BR-series Converged Network Adapter.
   4 */
   5/*
   6 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
   7 * Copyright (c) 2014-2015 QLogic Corporation
   8 * All rights reserved
   9 * www.qlogic.com
  10 */
  11#ifndef __BFI_H__
  12#define __BFI_H__
  13
  14#include "bfa_defs.h"
  15
  16/* BFI FW image type */
  17#define BFI_FLASH_CHUNK_SZ                      256     /*!< Flash chunk size */
  18#define BFI_FLASH_CHUNK_SZ_WORDS        (BFI_FLASH_CHUNK_SZ/sizeof(u32))
  19#define BFI_FLASH_IMAGE_SZ              0x100000
  20
  21/* Msg header common to all msgs */
  22struct bfi_mhdr {
  23        u8              msg_class;      /*!< @ref enum bfi_mclass           */
  24        u8              msg_id;         /*!< msg opcode with in the class   */
  25        union {
  26                struct {
  27                        u8      qid;
  28                        u8      fn_lpu; /*!< msg destination                */
  29                } __packed h2i;
  30                u16     i2htok; /*!< token in msgs to host          */
  31        } __packed mtag;
  32} __packed;
  33
  34#define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
  35#define bfi_mhdr_2_fn(_mh)      ((_mh)->mtag.h2i.fn_lpu >> 1)
  36#define bfi_mhdr_2_qid(_mh)     ((_mh)->mtag.h2i.qid)
  37
  38#define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do {                \
  39        (_mh).msg_class                 = (_mc);                \
  40        (_mh).msg_id                    = (_op);                \
  41        (_mh).mtag.h2i.fn_lpu   = (_fn_lpu);                    \
  42} while (0)
  43
  44#define bfi_i2h_set(_mh, _mc, _op, _i2htok) do {                \
  45        (_mh).msg_class                 = (_mc);                \
  46        (_mh).msg_id                    = (_op);                \
  47        (_mh).mtag.i2htok               = (_i2htok);            \
  48} while (0)
  49
  50/*
  51 * Message opcodes: 0-127 to firmware, 128-255 to host
  52 */
  53#define BFI_I2H_OPCODE_BASE     128
  54#define BFA_I2HM(_x)                    ((_x) + BFI_I2H_OPCODE_BASE)
  55
  56/****************************************************************************
  57 *
  58 * Scatter Gather Element and Page definition
  59 *
  60 ****************************************************************************
  61 */
  62
  63/* DMA addresses */
  64union bfi_addr_u {
  65        struct {
  66                u32     addr_lo;
  67                u32     addr_hi;
  68        } __packed a32;
  69} __packed;
  70
  71/* Generic DMA addr-len pair. */
  72struct bfi_alen {
  73        union bfi_addr_u        al_addr;        /* DMA addr of buffer   */
  74        u32                     al_len;         /* length of buffer */
  75} __packed;
  76
  77/*
  78 * Large Message structure - 128 Bytes size Msgs
  79 */
  80#define BFI_LMSG_SZ             128
  81#define BFI_LMSG_PL_WSZ \
  82                        ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4)
  83
  84/* Mailbox message structure */
  85#define BFI_MBMSG_SZ            7
  86struct bfi_mbmsg {
  87        struct bfi_mhdr mh;
  88        u32             pl[BFI_MBMSG_SZ];
  89} __packed;
  90
  91/* Supported PCI function class codes (personality) */
  92enum bfi_pcifn_class {
  93        BFI_PCIFN_CLASS_FC      = 0x0c04,
  94        BFI_PCIFN_CLASS_ETH     = 0x0200,
  95};
  96
  97/* Message Classes */
  98enum bfi_mclass {
  99        BFI_MC_IOC              = 1,    /*!< IO Controller (IOC)            */
 100        BFI_MC_DIAG             = 2,    /*!< Diagnostic Msgs                */
 101        BFI_MC_FLASH            = 3,    /*!< Flash message class            */
 102        BFI_MC_CEE              = 4,    /*!< CEE                            */
 103        BFI_MC_FCPORT           = 5,    /*!< FC port                        */
 104        BFI_MC_IOCFC            = 6,    /*!< FC - IO Controller (IOC)       */
 105        BFI_MC_LL               = 7,    /*!< Link Layer                     */
 106        BFI_MC_UF               = 8,    /*!< Unsolicited frame receive      */
 107        BFI_MC_FCXP             = 9,    /*!< FC Transport                   */
 108        BFI_MC_LPS              = 10,   /*!< lport fc login services        */
 109        BFI_MC_RPORT            = 11,   /*!< Remote port                    */
 110        BFI_MC_ITNIM            = 12,   /*!< I-T nexus (Initiator mode)     */
 111        BFI_MC_IOIM_READ        = 13,   /*!< read IO (Initiator mode)       */
 112        BFI_MC_IOIM_WRITE       = 14,   /*!< write IO (Initiator mode)      */
 113        BFI_MC_IOIM_IO          = 15,   /*!< IO (Initiator mode)            */
 114        BFI_MC_IOIM             = 16,   /*!< IO (Initiator mode)            */
 115        BFI_MC_IOIM_IOCOM       = 17,   /*!< good IO completion             */
 116        BFI_MC_TSKIM            = 18,   /*!< Initiator Task management      */
 117        BFI_MC_SBOOT            = 19,   /*!< SAN boot services              */
 118        BFI_MC_IPFC             = 20,   /*!< IP over FC Msgs                */
 119        BFI_MC_PORT             = 21,   /*!< Physical port                  */
 120        BFI_MC_SFP              = 22,   /*!< SFP module                     */
 121        BFI_MC_MSGQ             = 23,   /*!< MSGQ                           */
 122        BFI_MC_ENET             = 24,   /*!< ENET commands/responses        */
 123        BFI_MC_PHY              = 25,   /*!< External PHY message class     */
 124        BFI_MC_NBOOT            = 26,   /*!< Network Boot                   */
 125        BFI_MC_TIO_READ         = 27,   /*!< read IO (Target mode)          */
 126        BFI_MC_TIO_WRITE        = 28,   /*!< write IO (Target mode)         */
 127        BFI_MC_TIO_DATA_XFERED  = 29,   /*!< ds transferred (target mode)   */
 128        BFI_MC_TIO_IO           = 30,   /*!< IO (Target mode)               */
 129        BFI_MC_TIO              = 31,   /*!< IO (target mode)               */
 130        BFI_MC_MFG              = 32,   /*!< MFG/ASIC block commands        */
 131        BFI_MC_EDMA             = 33,   /*!< EDMA copy commands             */
 132        BFI_MC_MAX              = 34
 133};
 134
 135#define BFI_IOC_MSGLEN_MAX      32      /* 32 bytes */
 136
 137#define BFI_FWBOOT_ENV_OS               0
 138
 139/*----------------------------------------------------------------------
 140 *                              IOC
 141 *----------------------------------------------------------------------
 142 */
 143
 144/* Different asic generations */
 145enum bfi_asic_gen {
 146        BFI_ASIC_GEN_CB         = 1,
 147        BFI_ASIC_GEN_CT         = 2,
 148        BFI_ASIC_GEN_CT2        = 3,
 149};
 150
 151enum bfi_asic_mode {
 152        BFI_ASIC_MODE_FC        = 1,    /* FC up to 8G speed            */
 153        BFI_ASIC_MODE_FC16      = 2,    /* FC up to 16G speed           */
 154        BFI_ASIC_MODE_ETH       = 3,    /* Ethernet ports               */
 155        BFI_ASIC_MODE_COMBO     = 4,    /* FC 16G and Ethernet 10G port */
 156};
 157
 158enum bfi_ioc_h2i_msgs {
 159        BFI_IOC_H2I_ENABLE_REQ          = 1,
 160        BFI_IOC_H2I_DISABLE_REQ         = 2,
 161        BFI_IOC_H2I_GETATTR_REQ         = 3,
 162        BFI_IOC_H2I_DBG_SYNC            = 4,
 163        BFI_IOC_H2I_DBG_DUMP            = 5,
 164};
 165
 166enum bfi_ioc_i2h_msgs {
 167        BFI_IOC_I2H_ENABLE_REPLY        = BFA_I2HM(1),
 168        BFI_IOC_I2H_DISABLE_REPLY       = BFA_I2HM(2),
 169        BFI_IOC_I2H_GETATTR_REPLY       = BFA_I2HM(3),
 170        BFI_IOC_I2H_HBEAT               = BFA_I2HM(4),
 171};
 172
 173/* BFI_IOC_H2I_GETATTR_REQ message */
 174struct bfi_ioc_getattr_req {
 175        struct bfi_mhdr mh;
 176        union bfi_addr_u        attr_addr;
 177} __packed;
 178
 179struct bfi_ioc_attr {
 180        u64             mfg_pwwn;       /*!< Mfg port wwn          */
 181        u64             mfg_nwwn;       /*!< Mfg node wwn          */
 182        u8              mfg_mac[ETH_ALEN]; /*!< Mfg mac            */
 183        u8              port_mode;      /* enum bfi_port_mode      */
 184        u8              rsvd_a;
 185        u64             pwwn;
 186        u64             nwwn;
 187        u8              mac[ETH_ALEN];  /*!< PBC or Mfg mac        */
 188        u16     rsvd_b;
 189        u8              fcoe_mac[ETH_ALEN];
 190        u16     rsvd_c;
 191        char            brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
 192        u8              pcie_gen;
 193        u8              pcie_lanes_orig;
 194        u8              pcie_lanes;
 195        u8              rx_bbcredit;    /*!< receive buffer credits */
 196        u32     adapter_prop;   /*!< adapter properties     */
 197        u16     maxfrsize;      /*!< max receive frame size */
 198        char            asic_rev;
 199        u8              rsvd_d;
 200        char            fw_version[BFA_VERSION_LEN];
 201        char            optrom_version[BFA_VERSION_LEN];
 202        struct bfa_mfg_vpd vpd;
 203        u32     card_type;      /*!< card type                  */
 204} __packed;
 205
 206/* BFI_IOC_I2H_GETATTR_REPLY message */
 207struct bfi_ioc_getattr_reply {
 208        struct bfi_mhdr mh;     /*!< Common msg header          */
 209        u8                      status; /*!< cfg reply status           */
 210        u8                      rsvd[3];
 211} __packed;
 212
 213/* Firmware memory page offsets */
 214#define BFI_IOC_SMEM_PG0_CB     (0x40)
 215#define BFI_IOC_SMEM_PG0_CT     (0x180)
 216
 217/* Firmware statistic offset */
 218#define BFI_IOC_FWSTATS_OFF     (0x6B40)
 219#define BFI_IOC_FWSTATS_SZ      (4096)
 220
 221/* Firmware trace offset */
 222#define BFI_IOC_TRC_OFF         (0x4b00)
 223#define BFI_IOC_TRC_ENTS        256
 224#define BFI_IOC_TRC_ENT_SZ      16
 225#define BFI_IOC_TRC_HDR_SZ      32
 226
 227#define BFI_IOC_FW_SIGNATURE    (0xbfadbfad)
 228#define BFI_IOC_FW_INV_SIGN     (0xdeaddead)
 229#define BFI_IOC_MD5SUM_SZ       4
 230
 231struct bfi_ioc_fwver {
 232#ifdef __BIG_ENDIAN
 233        u8 patch;
 234        u8 maint;
 235        u8 minor;
 236        u8 major;
 237        u8 rsvd[2];
 238        u8 build;
 239        u8 phase;
 240#else
 241        u8 major;
 242        u8 minor;
 243        u8 maint;
 244        u8 patch;
 245        u8 phase;
 246        u8 build;
 247        u8 rsvd[2];
 248#endif
 249} __packed;
 250
 251struct bfi_ioc_image_hdr {
 252        u32     signature;      /*!< constant signature */
 253        u8      asic_gen;       /*!< asic generation */
 254        u8      asic_mode;
 255        u8      port0_mode;     /*!< device mode for port 0 */
 256        u8      port1_mode;     /*!< device mode for port 1 */
 257        u32     exec;           /*!< exec vector        */
 258        u32     bootenv;        /*!< firmware boot env */
 259        u32     rsvd_b[2];
 260        struct bfi_ioc_fwver fwver;
 261        u32     md5sum[BFI_IOC_MD5SUM_SZ];
 262} __packed;
 263
 264enum bfi_ioc_img_ver_cmp {
 265        BFI_IOC_IMG_VER_INCOMP,
 266        BFI_IOC_IMG_VER_OLD,
 267        BFI_IOC_IMG_VER_SAME,
 268        BFI_IOC_IMG_VER_BETTER
 269};
 270
 271#define BFI_FWBOOT_DEVMODE_OFF          4
 272#define BFI_FWBOOT_TYPE_OFF             8
 273#define BFI_FWBOOT_ENV_OFF              12
 274#define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
 275        (((u32)(__asic_gen)) << 24 |    \
 276         ((u32)(__asic_mode)) << 16 |   \
 277         ((u32)(__p0_mode)) << 8 |      \
 278         ((u32)(__p1_mode)))
 279
 280enum bfi_fwboot_type {
 281        BFI_FWBOOT_TYPE_NORMAL  = 0,
 282        BFI_FWBOOT_TYPE_FLASH   = 1,
 283        BFI_FWBOOT_TYPE_MEMTEST = 2,
 284};
 285
 286enum bfi_port_mode {
 287        BFI_PORT_MODE_FC        = 1,
 288        BFI_PORT_MODE_ETH       = 2,
 289};
 290
 291struct bfi_ioc_hbeat {
 292        struct bfi_mhdr mh;             /*!< common msg header          */
 293        u32        hb_count;    /*!< current heart beat count   */
 294} __packed;
 295
 296/* IOC hardware/firmware state */
 297enum bfi_ioc_state {
 298        BFI_IOC_UNINIT          = 0,    /*!< not initialized                 */
 299        BFI_IOC_INITING         = 1,    /*!< h/w is being initialized        */
 300        BFI_IOC_HWINIT          = 2,    /*!< h/w is initialized              */
 301        BFI_IOC_CFG             = 3,    /*!< IOC configuration in progress   */
 302        BFI_IOC_OP              = 4,    /*!< IOC is operational              */
 303        BFI_IOC_DISABLING       = 5,    /*!< IOC is being disabled           */
 304        BFI_IOC_DISABLED        = 6,    /*!< IOC is disabled                 */
 305        BFI_IOC_CFG_DISABLED    = 7,    /*!< IOC is being disabled;transient */
 306        BFI_IOC_FAIL            = 8,    /*!< IOC heart-beat failure          */
 307        BFI_IOC_MEMTEST         = 9,    /*!< IOC is doing memtest            */
 308};
 309
 310enum {
 311        BFI_ADAPTER_TYPE_FC     = 0x01,         /*!< FC adapters           */
 312        BFI_ADAPTER_TYPE_MK     = 0x0f0000,     /*!< adapter type mask     */
 313        BFI_ADAPTER_TYPE_SH     = 16,           /*!< adapter type shift    */
 314        BFI_ADAPTER_NPORTS_MK   = 0xff00,       /*!< number of ports mask  */
 315        BFI_ADAPTER_NPORTS_SH   = 8,            /*!< number of ports shift */
 316        BFI_ADAPTER_SPEED_MK    = 0xff,         /*!< adapter speed mask    */
 317        BFI_ADAPTER_SPEED_SH    = 0,            /*!< adapter speed shift   */
 318        BFI_ADAPTER_PROTO       = 0x100000,     /*!< prototype adapaters   */
 319        BFI_ADAPTER_TTV         = 0x200000,     /*!< TTV debug capable     */
 320        BFI_ADAPTER_UNSUPP      = 0x400000,     /*!< unknown adapter type  */
 321};
 322
 323#define BFI_ADAPTER_GETP(__prop, __adap_prop)                   \
 324        (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >>     \
 325                BFI_ADAPTER_ ## __prop ## _SH)
 326#define BFI_ADAPTER_SETP(__prop, __val)                         \
 327        ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
 328#define BFI_ADAPTER_IS_SPECIAL(__adap_type)                     \
 329        ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
 330                        BFI_ADAPTER_UNSUPP))
 331
 332/* BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages */
 333struct bfi_ioc_ctrl_req {
 334        struct bfi_mhdr mh;
 335        u16                     clscode;
 336        u16                     rsvd;
 337        u32             tv_sec;
 338} __packed;
 339
 340/* BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages */
 341struct bfi_ioc_ctrl_reply {
 342        struct bfi_mhdr mh;                     /*!< Common msg header     */
 343        u8                      status;         /*!< enable/disable status */
 344        u8                      port_mode;      /*!< enum bfa_mode */
 345        u8                      cap_bm;         /*!< capability bit mask */
 346        u8                      rsvd;
 347} __packed;
 348
 349#define BFI_IOC_MSGSZ   8
 350/* H2I Messages */
 351union bfi_ioc_h2i_msg_u {
 352        struct bfi_mhdr mh;
 353        struct bfi_ioc_ctrl_req enable_req;
 354        struct bfi_ioc_ctrl_req disable_req;
 355        struct bfi_ioc_getattr_req getattr_req;
 356        u32                     mboxmsg[BFI_IOC_MSGSZ];
 357} __packed;
 358
 359/* I2H Messages */
 360union bfi_ioc_i2h_msg_u {
 361        struct bfi_mhdr mh;
 362        struct bfi_ioc_ctrl_reply fw_event;
 363        u32                     mboxmsg[BFI_IOC_MSGSZ];
 364} __packed;
 365
 366/*----------------------------------------------------------------------
 367 *                              MSGQ
 368 *----------------------------------------------------------------------
 369 */
 370
 371enum bfi_msgq_h2i_msgs {
 372        BFI_MSGQ_H2I_INIT_REQ      = 1,
 373        BFI_MSGQ_H2I_DOORBELL_PI        = 2,
 374        BFI_MSGQ_H2I_DOORBELL_CI        = 3,
 375        BFI_MSGQ_H2I_CMDQ_COPY_RSP      = 4,
 376};
 377
 378enum bfi_msgq_i2h_msgs {
 379        BFI_MSGQ_I2H_INIT_RSP      = BFA_I2HM(BFI_MSGQ_H2I_INIT_REQ),
 380        BFI_MSGQ_I2H_DOORBELL_PI        = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_PI),
 381        BFI_MSGQ_I2H_DOORBELL_CI        = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_CI),
 382        BFI_MSGQ_I2H_CMDQ_COPY_REQ      = BFA_I2HM(BFI_MSGQ_H2I_CMDQ_COPY_RSP),
 383};
 384
 385/* Messages(commands/responsed/AENS will have the following header */
 386struct bfi_msgq_mhdr {
 387        u8      msg_class;
 388        u8      msg_id;
 389        u16     msg_token;
 390        u16     num_entries;
 391        u8      enet_id;
 392        u8      rsvd;
 393} __packed;
 394
 395#define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do {  \
 396        (_mh).msg_class  = (_mc);       \
 397        (_mh).msg_id        = (_mid);       \
 398        (_mh).msg_token  = (_tok);       \
 399        (_mh).enet_id      = (_enet_id);   \
 400} while (0)
 401
 402/*
 403 * Mailbox  for messaging interface
 404 */
 405#define BFI_MSGQ_CMD_ENTRY_SIZE  (64)    /* TBD */
 406#define BFI_MSGQ_RSP_ENTRY_SIZE  (64)    /* TBD */
 407
 408#define bfi_msgq_num_cmd_entries(_size)                          \
 409        (((_size) + BFI_MSGQ_CMD_ENTRY_SIZE - 1) / BFI_MSGQ_CMD_ENTRY_SIZE)
 410
 411struct bfi_msgq {
 412        union bfi_addr_u addr;
 413        u16 q_depth;     /* Total num of entries in the queue */
 414        u8 rsvd[2];
 415} __packed;
 416
 417/* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
 418struct bfi_msgq_cfg_req {
 419        struct bfi_mhdr mh;
 420        struct bfi_msgq cmdq;
 421        struct bfi_msgq rspq;
 422} __packed;
 423
 424/* BFI_ENET_MSGQ_CFG_RSP */
 425struct bfi_msgq_cfg_rsp {
 426        struct bfi_mhdr mh;
 427        u8 cmd_status;
 428        u8 rsvd[3];
 429} __packed;
 430
 431/* BFI_MSGQ_H2I_DOORBELL */
 432struct bfi_msgq_h2i_db {
 433        struct bfi_mhdr mh;
 434        union {
 435                u16 cmdq_pi;
 436                u16 rspq_ci;
 437        } __packed idx;
 438} __packed;
 439
 440/* BFI_MSGQ_I2H_DOORBELL */
 441struct bfi_msgq_i2h_db {
 442        struct bfi_mhdr mh;
 443        union {
 444                u16 rspq_pi;
 445                u16 cmdq_ci;
 446        } __packed idx;
 447} __packed;
 448
 449#define BFI_CMD_COPY_SZ 28
 450
 451/* BFI_MSGQ_H2I_CMD_COPY_RSP */
 452struct bfi_msgq_h2i_cmdq_copy_rsp {
 453        struct bfi_mhdr mh;
 454        u8            data[BFI_CMD_COPY_SZ];
 455} __packed;
 456
 457/* BFI_MSGQ_I2H_CMD_COPY_REQ */
 458struct bfi_msgq_i2h_cmdq_copy_req {
 459        struct bfi_mhdr mh;
 460        u16     offset;
 461        u16     len;
 462} __packed;
 463
 464/*
 465 *      FLASH module specific
 466 */
 467enum bfi_flash_h2i_msgs {
 468        BFI_FLASH_H2I_QUERY_REQ = 1,
 469        BFI_FLASH_H2I_ERASE_REQ = 2,
 470        BFI_FLASH_H2I_WRITE_REQ = 3,
 471        BFI_FLASH_H2I_READ_REQ = 4,
 472        BFI_FLASH_H2I_BOOT_VER_REQ = 5,
 473};
 474
 475enum bfi_flash_i2h_msgs {
 476        BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
 477        BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
 478        BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
 479        BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
 480        BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
 481        BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
 482};
 483
 484/*
 485 * Flash query request
 486 */
 487struct bfi_flash_query_req {
 488        struct bfi_mhdr mh;   /* Common msg header */
 489        struct bfi_alen alen;
 490} __packed;
 491
 492/*
 493 * Flash write request
 494 */
 495struct bfi_flash_write_req {
 496        struct bfi_mhdr mh;     /* Common msg header */
 497        struct bfi_alen alen;
 498        u32     type;   /* partition type */
 499        u8      instance; /* partition instance */
 500        u8      last;
 501        u8      rsv[2];
 502        u32     offset;
 503        u32     length;
 504} __packed;
 505
 506/*
 507 * Flash read request
 508 */
 509struct bfi_flash_read_req {
 510        struct bfi_mhdr mh;     /* Common msg header */
 511        u32     type;           /* partition type */
 512        u8      instance;       /* partition instance */
 513        u8      rsv[3];
 514        u32     offset;
 515        u32     length;
 516        struct bfi_alen alen;
 517} __packed;
 518
 519/*
 520 * Flash query response
 521 */
 522struct bfi_flash_query_rsp {
 523        struct bfi_mhdr mh;     /* Common msg header */
 524        u32     status;
 525} __packed;
 526
 527/*
 528 * Flash read response
 529 */
 530struct bfi_flash_read_rsp {
 531        struct bfi_mhdr mh;     /* Common msg header */
 532        u32     type;           /* partition type */
 533        u8      instance;       /* partition instance */
 534        u8      rsv[3];
 535        u32     status;
 536        u32     length;
 537} __packed;
 538
 539/*
 540 * Flash write response
 541 */
 542struct bfi_flash_write_rsp {
 543        struct bfi_mhdr mh;     /* Common msg header */
 544        u32     type;           /* partition type */
 545        u8      instance;       /* partition instance */
 546        u8      rsv[3];
 547        u32     status;
 548        u32     length;
 549} __packed;
 550
 551#endif /* __BFI_H__ */
 552