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8#define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
9
10#include <linux/bug.h>
11#include <linux/clk.h>
12#include <linux/device.h>
13#include <linux/errno.h>
14#include <linux/interrupt.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/module.h>
18#include <linux/of.h>
19#include <linux/types.h>
20#include <linux/platform_device.h>
21#include <linux/pm_runtime.h>
22#include <linux/slab.h>
23#include <linux/videodev2.h>
24
25#include <media/v4l2-device.h>
26#include <media/v4l2-ioctl.h>
27#include <media/v4l2-mem2mem.h>
28#include <media/v4l2-rect.h>
29#include <media/videobuf2-v4l2.h>
30#include <media/videobuf2-dma-contig.h>
31#include <media/drv-intf/exynos-fimc.h>
32
33#include "common.h"
34#include "fimc-core.h"
35#include "fimc-lite.h"
36#include "fimc-lite-reg.h"
37
38static int debug;
39module_param(debug, int, 0644);
40
41static const struct fimc_fmt fimc_lite_formats[] = {
42 {
43 .fourcc = V4L2_PIX_FMT_YUYV,
44 .colorspace = V4L2_COLORSPACE_JPEG,
45 .depth = { 16 },
46 .color = FIMC_FMT_YCBYCR422,
47 .memplanes = 1,
48 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
49 .flags = FMT_FLAGS_YUV,
50 }, {
51 .fourcc = V4L2_PIX_FMT_UYVY,
52 .colorspace = V4L2_COLORSPACE_JPEG,
53 .depth = { 16 },
54 .color = FIMC_FMT_CBYCRY422,
55 .memplanes = 1,
56 .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
57 .flags = FMT_FLAGS_YUV,
58 }, {
59 .fourcc = V4L2_PIX_FMT_VYUY,
60 .colorspace = V4L2_COLORSPACE_JPEG,
61 .depth = { 16 },
62 .color = FIMC_FMT_CRYCBY422,
63 .memplanes = 1,
64 .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8,
65 .flags = FMT_FLAGS_YUV,
66 }, {
67 .fourcc = V4L2_PIX_FMT_YVYU,
68 .colorspace = V4L2_COLORSPACE_JPEG,
69 .depth = { 16 },
70 .color = FIMC_FMT_YCRYCB422,
71 .memplanes = 1,
72 .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8,
73 .flags = FMT_FLAGS_YUV,
74 }, {
75 .fourcc = V4L2_PIX_FMT_SGRBG8,
76 .colorspace = V4L2_COLORSPACE_SRGB,
77 .depth = { 8 },
78 .color = FIMC_FMT_RAW8,
79 .memplanes = 1,
80 .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
81 .flags = FMT_FLAGS_RAW_BAYER,
82 }, {
83 .fourcc = V4L2_PIX_FMT_SGRBG10,
84 .colorspace = V4L2_COLORSPACE_SRGB,
85 .depth = { 16 },
86 .color = FIMC_FMT_RAW10,
87 .memplanes = 1,
88 .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,
89 .flags = FMT_FLAGS_RAW_BAYER,
90 }, {
91 .fourcc = V4L2_PIX_FMT_SGRBG12,
92 .colorspace = V4L2_COLORSPACE_SRGB,
93 .depth = { 16 },
94 .color = FIMC_FMT_RAW12,
95 .memplanes = 1,
96 .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12,
97 .flags = FMT_FLAGS_RAW_BAYER,
98 },
99};
100
101
102
103
104
105
106
107
108static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
109 const u32 *mbus_code, unsigned int mask, int index)
110{
111 const struct fimc_fmt *fmt, *def_fmt = NULL;
112 unsigned int i;
113 int id = 0;
114
115 if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
116 return NULL;
117
118 for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
119 fmt = &fimc_lite_formats[i];
120 if (mask && !(fmt->flags & mask))
121 continue;
122 if (pixelformat && fmt->fourcc == *pixelformat)
123 return fmt;
124 if (mbus_code && fmt->mbus_code == *mbus_code)
125 return fmt;
126 if (index == id)
127 def_fmt = fmt;
128 id++;
129 }
130 return def_fmt;
131}
132
133static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
134{
135 struct fimc_source_info *si;
136 unsigned long flags;
137
138 if (fimc->sensor == NULL)
139 return -ENXIO;
140
141 if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
142 return -EINVAL;
143
144
145 si = v4l2_get_subdev_hostdata(fimc->sensor);
146 if (!si)
147 return -EINVAL;
148
149 spin_lock_irqsave(&fimc->slock, flags);
150
151 flite_hw_set_camera_bus(fimc, si);
152 flite_hw_set_source_format(fimc, &fimc->inp_frame);
153 flite_hw_set_window_offset(fimc, &fimc->inp_frame);
154 flite_hw_set_dma_buf_mask(fimc, 0);
155 flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
156 flite_hw_set_interrupt_mask(fimc);
157 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
158
159 if (debug > 0)
160 flite_hw_dump_regs(fimc, __func__);
161
162 spin_unlock_irqrestore(&fimc->slock, flags);
163 return 0;
164}
165
166
167
168
169
170
171
172
173
174static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
175{
176 struct flite_buffer *buf;
177 unsigned long flags;
178 bool streaming;
179
180 spin_lock_irqsave(&fimc->slock, flags);
181 streaming = fimc->state & (1 << ST_SENSOR_STREAM);
182
183 fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
184 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
185 if (suspend)
186 fimc->state |= (1 << ST_FLITE_SUSPENDED);
187 else
188 fimc->state &= ~(1 << ST_FLITE_PENDING |
189 1 << ST_FLITE_SUSPENDED);
190
191
192 while (!suspend && !list_empty(&fimc->pending_buf_q)) {
193 buf = fimc_lite_pending_queue_pop(fimc);
194 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
195 }
196
197 while (!list_empty(&fimc->active_buf_q)) {
198 buf = fimc_lite_active_queue_pop(fimc);
199 if (suspend)
200 fimc_lite_pending_queue_add(fimc, buf);
201 else
202 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
203 }
204
205 spin_unlock_irqrestore(&fimc->slock, flags);
206
207 flite_hw_reset(fimc);
208
209 if (!streaming)
210 return 0;
211
212 return fimc_pipeline_call(&fimc->ve, set_stream, 0);
213}
214
215static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
216{
217 unsigned long flags;
218
219 if (!fimc_lite_active(fimc))
220 return 0;
221
222 spin_lock_irqsave(&fimc->slock, flags);
223 set_bit(ST_FLITE_OFF, &fimc->state);
224 flite_hw_capture_stop(fimc);
225 spin_unlock_irqrestore(&fimc->slock, flags);
226
227 wait_event_timeout(fimc->irq_queue,
228 !test_bit(ST_FLITE_OFF, &fimc->state),
229 (2*HZ/10));
230
231 return fimc_lite_reinit(fimc, suspend);
232}
233
234
235static void fimc_lite_config_update(struct fimc_lite *fimc)
236{
237 flite_hw_set_window_offset(fimc, &fimc->inp_frame);
238 flite_hw_set_dma_window(fimc, &fimc->out_frame);
239 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
240 clear_bit(ST_FLITE_CONFIG, &fimc->state);
241}
242
243static irqreturn_t flite_irq_handler(int irq, void *priv)
244{
245 struct fimc_lite *fimc = priv;
246 struct flite_buffer *vbuf;
247 unsigned long flags;
248 u32 intsrc;
249
250 spin_lock_irqsave(&fimc->slock, flags);
251
252 intsrc = flite_hw_get_interrupt_source(fimc);
253 flite_hw_clear_pending_irq(fimc);
254
255 if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
256 wake_up(&fimc->irq_queue);
257 goto done;
258 }
259
260 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
261 clear_bit(ST_FLITE_RUN, &fimc->state);
262 fimc->events.data_overflow++;
263 }
264
265 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
266 flite_hw_clear_last_capture_end(fimc);
267 clear_bit(ST_FLITE_STREAM, &fimc->state);
268 wake_up(&fimc->irq_queue);
269 }
270
271 if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
272 goto done;
273
274 if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
275 test_bit(ST_FLITE_RUN, &fimc->state) &&
276 !list_empty(&fimc->pending_buf_q)) {
277 vbuf = fimc_lite_pending_queue_pop(fimc);
278 flite_hw_set_dma_buffer(fimc, vbuf);
279 fimc_lite_active_queue_add(fimc, vbuf);
280 }
281
282 if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMEND) &&
283 test_bit(ST_FLITE_RUN, &fimc->state) &&
284 !list_empty(&fimc->active_buf_q)) {
285 vbuf = fimc_lite_active_queue_pop(fimc);
286 vbuf->vb.vb2_buf.timestamp = ktime_get_ns();
287 vbuf->vb.sequence = fimc->frame_count++;
288 flite_hw_mask_dma_buffer(fimc, vbuf->index);
289 vb2_buffer_done(&vbuf->vb.vb2_buf, VB2_BUF_STATE_DONE);
290 }
291
292 if (test_bit(ST_FLITE_CONFIG, &fimc->state))
293 fimc_lite_config_update(fimc);
294
295 if (list_empty(&fimc->pending_buf_q)) {
296 flite_hw_capture_stop(fimc);
297 clear_bit(ST_FLITE_STREAM, &fimc->state);
298 }
299done:
300 set_bit(ST_FLITE_RUN, &fimc->state);
301 spin_unlock_irqrestore(&fimc->slock, flags);
302 return IRQ_HANDLED;
303}
304
305static int start_streaming(struct vb2_queue *q, unsigned int count)
306{
307 struct fimc_lite *fimc = q->drv_priv;
308 unsigned long flags;
309 int ret;
310
311 spin_lock_irqsave(&fimc->slock, flags);
312
313 fimc->buf_index = 0;
314 fimc->frame_count = 0;
315
316 spin_unlock_irqrestore(&fimc->slock, flags);
317
318 ret = fimc_lite_hw_init(fimc, false);
319 if (ret) {
320 fimc_lite_reinit(fimc, false);
321 return ret;
322 }
323
324 set_bit(ST_FLITE_PENDING, &fimc->state);
325
326 if (!list_empty(&fimc->active_buf_q) &&
327 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
328 flite_hw_capture_start(fimc);
329
330 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
331 fimc_pipeline_call(&fimc->ve, set_stream, 1);
332 }
333 if (debug > 0)
334 flite_hw_dump_regs(fimc, __func__);
335
336 return 0;
337}
338
339static void stop_streaming(struct vb2_queue *q)
340{
341 struct fimc_lite *fimc = q->drv_priv;
342
343 if (!fimc_lite_active(fimc))
344 return;
345
346 fimc_lite_stop_capture(fimc, false);
347}
348
349static int queue_setup(struct vb2_queue *vq,
350 unsigned int *num_buffers, unsigned int *num_planes,
351 unsigned int sizes[], struct device *alloc_devs[])
352{
353 struct fimc_lite *fimc = vq->drv_priv;
354 struct flite_frame *frame = &fimc->out_frame;
355 const struct fimc_fmt *fmt = frame->fmt;
356 unsigned long wh = frame->f_width * frame->f_height;
357 int i;
358
359 if (fmt == NULL)
360 return -EINVAL;
361
362 if (*num_planes) {
363 if (*num_planes != fmt->memplanes)
364 return -EINVAL;
365 for (i = 0; i < *num_planes; i++)
366 if (sizes[i] < (wh * fmt->depth[i]) / 8)
367 return -EINVAL;
368 return 0;
369 }
370
371 *num_planes = fmt->memplanes;
372
373 for (i = 0; i < fmt->memplanes; i++)
374 sizes[i] = (wh * fmt->depth[i]) / 8;
375
376 return 0;
377}
378
379static int buffer_prepare(struct vb2_buffer *vb)
380{
381 struct vb2_queue *vq = vb->vb2_queue;
382 struct fimc_lite *fimc = vq->drv_priv;
383 int i;
384
385 if (fimc->out_frame.fmt == NULL)
386 return -EINVAL;
387
388 for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
389 unsigned long size = fimc->payload[i];
390
391 if (vb2_plane_size(vb, i) < size) {
392 v4l2_err(&fimc->ve.vdev,
393 "User buffer too small (%ld < %ld)\n",
394 vb2_plane_size(vb, i), size);
395 return -EINVAL;
396 }
397 vb2_set_plane_payload(vb, i, size);
398 }
399
400 return 0;
401}
402
403static void buffer_queue(struct vb2_buffer *vb)
404{
405 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
406 struct flite_buffer *buf
407 = container_of(vbuf, struct flite_buffer, vb);
408 struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
409 unsigned long flags;
410
411 spin_lock_irqsave(&fimc->slock, flags);
412 buf->addr = vb2_dma_contig_plane_dma_addr(vb, 0);
413
414 buf->index = fimc->buf_index++;
415 if (fimc->buf_index >= fimc->reqbufs_count)
416 fimc->buf_index = 0;
417
418 if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
419 !test_bit(ST_FLITE_STREAM, &fimc->state) &&
420 list_empty(&fimc->active_buf_q)) {
421 flite_hw_set_dma_buffer(fimc, buf);
422 fimc_lite_active_queue_add(fimc, buf);
423 } else {
424 fimc_lite_pending_queue_add(fimc, buf);
425 }
426
427 if (vb2_is_streaming(&fimc->vb_queue) &&
428 !list_empty(&fimc->pending_buf_q) &&
429 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
430 flite_hw_capture_start(fimc);
431 spin_unlock_irqrestore(&fimc->slock, flags);
432
433 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
434 fimc_pipeline_call(&fimc->ve, set_stream, 1);
435 return;
436 }
437 spin_unlock_irqrestore(&fimc->slock, flags);
438}
439
440static const struct vb2_ops fimc_lite_qops = {
441 .queue_setup = queue_setup,
442 .buf_prepare = buffer_prepare,
443 .buf_queue = buffer_queue,
444 .wait_prepare = vb2_ops_wait_prepare,
445 .wait_finish = vb2_ops_wait_finish,
446 .start_streaming = start_streaming,
447 .stop_streaming = stop_streaming,
448};
449
450static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
451{
452 unsigned long flags;
453
454 spin_lock_irqsave(&fimc->slock, flags);
455 memset(&fimc->events, 0, sizeof(fimc->events));
456 spin_unlock_irqrestore(&fimc->slock, flags);
457}
458
459static int fimc_lite_open(struct file *file)
460{
461 struct fimc_lite *fimc = video_drvdata(file);
462 struct media_entity *me = &fimc->ve.vdev.entity;
463 int ret;
464
465 mutex_lock(&fimc->lock);
466 if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
467 ret = -EBUSY;
468 goto unlock;
469 }
470
471 set_bit(ST_FLITE_IN_USE, &fimc->state);
472 ret = pm_runtime_resume_and_get(&fimc->pdev->dev);
473 if (ret < 0)
474 goto err_in_use;
475
476 ret = v4l2_fh_open(file);
477 if (ret < 0)
478 goto err_pm;
479
480 if (!v4l2_fh_is_singular_file(file) ||
481 atomic_read(&fimc->out_path) != FIMC_IO_DMA)
482 goto unlock;
483
484 mutex_lock(&me->graph_obj.mdev->graph_mutex);
485
486 ret = fimc_pipeline_call(&fimc->ve, open, me, true);
487
488
489 if (ret == 0)
490 me->use_count++;
491
492 mutex_unlock(&me->graph_obj.mdev->graph_mutex);
493
494 if (!ret) {
495 fimc_lite_clear_event_counters(fimc);
496 goto unlock;
497 }
498
499 v4l2_fh_release(file);
500err_pm:
501 pm_runtime_put_sync(&fimc->pdev->dev);
502err_in_use:
503 clear_bit(ST_FLITE_IN_USE, &fimc->state);
504unlock:
505 mutex_unlock(&fimc->lock);
506 return ret;
507}
508
509static int fimc_lite_release(struct file *file)
510{
511 struct fimc_lite *fimc = video_drvdata(file);
512 struct media_entity *entity = &fimc->ve.vdev.entity;
513
514 mutex_lock(&fimc->lock);
515
516 if (v4l2_fh_is_singular_file(file) &&
517 atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
518 if (fimc->streaming) {
519 media_pipeline_stop(entity);
520 fimc->streaming = false;
521 }
522 fimc_lite_stop_capture(fimc, false);
523 fimc_pipeline_call(&fimc->ve, close);
524 clear_bit(ST_FLITE_IN_USE, &fimc->state);
525
526 mutex_lock(&entity->graph_obj.mdev->graph_mutex);
527 entity->use_count--;
528 mutex_unlock(&entity->graph_obj.mdev->graph_mutex);
529 }
530
531 _vb2_fop_release(file, NULL);
532 pm_runtime_put(&fimc->pdev->dev);
533 clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
534
535 mutex_unlock(&fimc->lock);
536 return 0;
537}
538
539static const struct v4l2_file_operations fimc_lite_fops = {
540 .owner = THIS_MODULE,
541 .open = fimc_lite_open,
542 .release = fimc_lite_release,
543 .poll = vb2_fop_poll,
544 .unlocked_ioctl = video_ioctl2,
545 .mmap = vb2_fop_mmap,
546};
547
548
549
550
551
552static const struct fimc_fmt *fimc_lite_subdev_try_fmt(struct fimc_lite *fimc,
553 struct v4l2_subdev_state *sd_state,
554 struct v4l2_subdev_format *format)
555{
556 struct flite_drvdata *dd = fimc->dd;
557 struct v4l2_mbus_framefmt *mf = &format->format;
558 const struct fimc_fmt *fmt = NULL;
559
560 if (format->pad == FLITE_SD_PAD_SINK) {
561 v4l_bound_align_image(&mf->width, 8, dd->max_width,
562 ffs(dd->out_width_align) - 1,
563 &mf->height, 0, dd->max_height, 0, 0);
564
565 fmt = fimc_lite_find_format(NULL, &mf->code, 0, 0);
566 if (WARN_ON(!fmt))
567 return NULL;
568
569 mf->colorspace = fmt->colorspace;
570 mf->code = fmt->mbus_code;
571 } else {
572 struct flite_frame *sink = &fimc->inp_frame;
573 struct v4l2_mbus_framefmt *sink_fmt;
574 struct v4l2_rect *rect;
575
576 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
577 sink_fmt = v4l2_subdev_get_try_format(&fimc->subdev,
578 sd_state,
579 FLITE_SD_PAD_SINK);
580
581 mf->code = sink_fmt->code;
582 mf->colorspace = sink_fmt->colorspace;
583
584 rect = v4l2_subdev_get_try_crop(&fimc->subdev,
585 sd_state,
586 FLITE_SD_PAD_SINK);
587 } else {
588 mf->code = sink->fmt->mbus_code;
589 mf->colorspace = sink->fmt->colorspace;
590 rect = &sink->rect;
591 }
592
593
594 mf->width = rect->width;
595 mf->height = rect->height;
596 }
597
598 mf->field = V4L2_FIELD_NONE;
599
600 v4l2_dbg(1, debug, &fimc->subdev, "code: %#x (%d), %dx%d\n",
601 mf->code, mf->colorspace, mf->width, mf->height);
602
603 return fmt;
604}
605
606static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
607{
608 struct flite_frame *frame = &fimc->inp_frame;
609
610 v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
611 &r->height, 0, frame->f_height, 0, 0);
612
613
614 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
615 r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
616 r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
617
618 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
619 r->left, r->top, r->width, r->height,
620 frame->f_width, frame->f_height);
621}
622
623static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
624{
625 struct flite_frame *frame = &fimc->out_frame;
626 struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
627
628
629
630 r->width = crop_rect->width;
631 r->height = crop_rect->height;
632
633
634 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
635 r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
636 r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
637
638 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
639 r->left, r->top, r->width, r->height,
640 frame->f_width, frame->f_height);
641}
642
643
644
645
646static int fimc_lite_querycap(struct file *file, void *priv,
647 struct v4l2_capability *cap)
648{
649 struct fimc_lite *fimc = video_drvdata(file);
650
651 strscpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
652 strscpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card));
653 snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
654 dev_name(&fimc->pdev->dev));
655 return 0;
656}
657
658static int fimc_lite_enum_fmt(struct file *file, void *priv,
659 struct v4l2_fmtdesc *f)
660{
661 const struct fimc_fmt *fmt;
662
663 if (f->index >= ARRAY_SIZE(fimc_lite_formats))
664 return -EINVAL;
665
666 fmt = &fimc_lite_formats[f->index];
667 f->pixelformat = fmt->fourcc;
668
669 return 0;
670}
671
672static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
673 struct v4l2_format *f)
674{
675 struct fimc_lite *fimc = video_drvdata(file);
676 struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
677 struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
678 struct flite_frame *frame = &fimc->out_frame;
679 const struct fimc_fmt *fmt = frame->fmt;
680
681 plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
682 plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
683
684 pixm->num_planes = fmt->memplanes;
685 pixm->pixelformat = fmt->fourcc;
686 pixm->width = frame->f_width;
687 pixm->height = frame->f_height;
688 pixm->field = V4L2_FIELD_NONE;
689 pixm->colorspace = fmt->colorspace;
690 return 0;
691}
692
693static int fimc_lite_try_fmt(struct fimc_lite *fimc,
694 struct v4l2_pix_format_mplane *pixm,
695 const struct fimc_fmt **ffmt)
696{
697 u32 bpl = pixm->plane_fmt[0].bytesperline;
698 struct flite_drvdata *dd = fimc->dd;
699 const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
700 const struct fimc_fmt *fmt;
701
702 if (WARN_ON(inp_fmt == NULL))
703 return -EINVAL;
704
705
706
707
708
709 if (inp_fmt->flags & FMT_FLAGS_YUV)
710 fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
711 inp_fmt->flags, 0);
712 else
713 fmt = inp_fmt;
714
715 if (WARN_ON(fmt == NULL))
716 return -EINVAL;
717 if (ffmt)
718 *ffmt = fmt;
719 v4l_bound_align_image(&pixm->width, 8, dd->max_width,
720 ffs(dd->out_width_align) - 1,
721 &pixm->height, 0, dd->max_height, 0, 0);
722
723 if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
724 pixm->plane_fmt[0].bytesperline = (pixm->width *
725 fmt->depth[0]) / 8;
726
727 if (pixm->plane_fmt[0].sizeimage == 0)
728 pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
729 fmt->depth[0]) / 8;
730 pixm->num_planes = fmt->memplanes;
731 pixm->pixelformat = fmt->fourcc;
732 pixm->colorspace = fmt->colorspace;
733 pixm->field = V4L2_FIELD_NONE;
734 return 0;
735}
736
737static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
738 struct v4l2_format *f)
739{
740 struct fimc_lite *fimc = video_drvdata(file);
741 return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
742}
743
744static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
745 struct v4l2_format *f)
746{
747 struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
748 struct fimc_lite *fimc = video_drvdata(file);
749 struct flite_frame *frame = &fimc->out_frame;
750 const struct fimc_fmt *fmt = NULL;
751 int ret;
752
753 if (vb2_is_busy(&fimc->vb_queue))
754 return -EBUSY;
755
756 ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
757 if (ret < 0)
758 return ret;
759
760 frame->fmt = fmt;
761 fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
762 pixm->plane_fmt[0].sizeimage);
763 frame->f_width = pixm->width;
764 frame->f_height = pixm->height;
765
766 return 0;
767}
768
769static int fimc_pipeline_validate(struct fimc_lite *fimc)
770{
771 struct v4l2_subdev *sd = &fimc->subdev;
772 struct v4l2_subdev_format sink_fmt, src_fmt;
773 struct media_pad *pad;
774 int ret;
775
776 while (1) {
777
778 pad = &sd->entity.pads[0];
779 if (!(pad->flags & MEDIA_PAD_FL_SINK))
780 break;
781
782 if (sd == &fimc->subdev) {
783 struct flite_frame *ff = &fimc->out_frame;
784 sink_fmt.format.width = ff->f_width;
785 sink_fmt.format.height = ff->f_height;
786 sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
787 } else {
788 sink_fmt.pad = pad->index;
789 sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
790 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
791 &sink_fmt);
792 if (ret < 0 && ret != -ENOIOCTLCMD)
793 return -EPIPE;
794 }
795
796 pad = media_entity_remote_pad(pad);
797 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
798 break;
799
800 sd = media_entity_to_v4l2_subdev(pad->entity);
801 src_fmt.pad = pad->index;
802 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
803 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
804 if (ret < 0 && ret != -ENOIOCTLCMD)
805 return -EPIPE;
806
807 if (src_fmt.format.width != sink_fmt.format.width ||
808 src_fmt.format.height != sink_fmt.format.height ||
809 src_fmt.format.code != sink_fmt.format.code)
810 return -EPIPE;
811 }
812 return 0;
813}
814
815static int fimc_lite_streamon(struct file *file, void *priv,
816 enum v4l2_buf_type type)
817{
818 struct fimc_lite *fimc = video_drvdata(file);
819 struct media_entity *entity = &fimc->ve.vdev.entity;
820 int ret;
821
822 if (fimc_lite_active(fimc))
823 return -EBUSY;
824
825 ret = media_pipeline_start(entity, &fimc->ve.pipe->mp);
826 if (ret < 0)
827 return ret;
828
829 ret = fimc_pipeline_validate(fimc);
830 if (ret < 0)
831 goto err_p_stop;
832
833 fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity);
834
835 ret = vb2_ioctl_streamon(file, priv, type);
836 if (!ret) {
837 fimc->streaming = true;
838 return ret;
839 }
840
841err_p_stop:
842 media_pipeline_stop(entity);
843 return 0;
844}
845
846static int fimc_lite_streamoff(struct file *file, void *priv,
847 enum v4l2_buf_type type)
848{
849 struct fimc_lite *fimc = video_drvdata(file);
850 int ret;
851
852 ret = vb2_ioctl_streamoff(file, priv, type);
853 if (ret < 0)
854 return ret;
855
856 media_pipeline_stop(&fimc->ve.vdev.entity);
857 fimc->streaming = false;
858 return 0;
859}
860
861static int fimc_lite_reqbufs(struct file *file, void *priv,
862 struct v4l2_requestbuffers *reqbufs)
863{
864 struct fimc_lite *fimc = video_drvdata(file);
865 int ret;
866
867 reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
868 ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
869 if (!ret)
870 fimc->reqbufs_count = reqbufs->count;
871
872 return ret;
873}
874
875static int fimc_lite_g_selection(struct file *file, void *fh,
876 struct v4l2_selection *sel)
877{
878 struct fimc_lite *fimc = video_drvdata(file);
879 struct flite_frame *f = &fimc->out_frame;
880
881 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
882 return -EINVAL;
883
884 switch (sel->target) {
885 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
886 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
887 sel->r.left = 0;
888 sel->r.top = 0;
889 sel->r.width = f->f_width;
890 sel->r.height = f->f_height;
891 return 0;
892
893 case V4L2_SEL_TGT_COMPOSE:
894 sel->r = f->rect;
895 return 0;
896 }
897
898 return -EINVAL;
899}
900
901static int fimc_lite_s_selection(struct file *file, void *fh,
902 struct v4l2_selection *sel)
903{
904 struct fimc_lite *fimc = video_drvdata(file);
905 struct flite_frame *f = &fimc->out_frame;
906 struct v4l2_rect rect = sel->r;
907 unsigned long flags;
908
909 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
910 sel->target != V4L2_SEL_TGT_COMPOSE)
911 return -EINVAL;
912
913 fimc_lite_try_compose(fimc, &rect);
914
915 if ((sel->flags & V4L2_SEL_FLAG_LE) &&
916 !v4l2_rect_enclosed(&rect, &sel->r))
917 return -ERANGE;
918
919 if ((sel->flags & V4L2_SEL_FLAG_GE) &&
920 !v4l2_rect_enclosed(&sel->r, &rect))
921 return -ERANGE;
922
923 sel->r = rect;
924 spin_lock_irqsave(&fimc->slock, flags);
925 f->rect = rect;
926 set_bit(ST_FLITE_CONFIG, &fimc->state);
927 spin_unlock_irqrestore(&fimc->slock, flags);
928
929 return 0;
930}
931
932static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
933 .vidioc_querycap = fimc_lite_querycap,
934 .vidioc_enum_fmt_vid_cap = fimc_lite_enum_fmt,
935 .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
936 .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
937 .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
938 .vidioc_g_selection = fimc_lite_g_selection,
939 .vidioc_s_selection = fimc_lite_s_selection,
940 .vidioc_reqbufs = fimc_lite_reqbufs,
941 .vidioc_querybuf = vb2_ioctl_querybuf,
942 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
943 .vidioc_create_bufs = vb2_ioctl_create_bufs,
944 .vidioc_qbuf = vb2_ioctl_qbuf,
945 .vidioc_dqbuf = vb2_ioctl_dqbuf,
946 .vidioc_streamon = fimc_lite_streamon,
947 .vidioc_streamoff = fimc_lite_streamoff,
948};
949
950
951static int fimc_lite_link_setup(struct media_entity *entity,
952 const struct media_pad *local,
953 const struct media_pad *remote, u32 flags)
954{
955 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
956 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
957 int ret = 0;
958
959 if (WARN_ON(fimc == NULL))
960 return 0;
961
962 v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
963 __func__, remote->entity->name, local->entity->name,
964 flags, fimc->source_subdev_grp_id);
965
966 switch (local->index) {
967 case FLITE_SD_PAD_SINK:
968 if (flags & MEDIA_LNK_FL_ENABLED) {
969 if (fimc->source_subdev_grp_id == 0)
970 fimc->source_subdev_grp_id = sd->grp_id;
971 else
972 ret = -EBUSY;
973 } else {
974 fimc->source_subdev_grp_id = 0;
975 fimc->sensor = NULL;
976 }
977 break;
978
979 case FLITE_SD_PAD_SOURCE_DMA:
980 if (!(flags & MEDIA_LNK_FL_ENABLED))
981 atomic_set(&fimc->out_path, FIMC_IO_NONE);
982 else
983 atomic_set(&fimc->out_path, FIMC_IO_DMA);
984 break;
985
986 case FLITE_SD_PAD_SOURCE_ISP:
987 if (!(flags & MEDIA_LNK_FL_ENABLED))
988 atomic_set(&fimc->out_path, FIMC_IO_NONE);
989 else
990 atomic_set(&fimc->out_path, FIMC_IO_ISP);
991 break;
992
993 default:
994 v4l2_err(sd, "Invalid pad index\n");
995 ret = -EINVAL;
996 }
997 mb();
998
999 return ret;
1000}
1001
1002static const struct media_entity_operations fimc_lite_subdev_media_ops = {
1003 .link_setup = fimc_lite_link_setup,
1004};
1005
1006static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1007 struct v4l2_subdev_state *sd_state,
1008 struct v4l2_subdev_mbus_code_enum *code)
1009{
1010 const struct fimc_fmt *fmt;
1011
1012 fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
1013 if (!fmt)
1014 return -EINVAL;
1015 code->code = fmt->mbus_code;
1016 return 0;
1017}
1018
1019static struct v4l2_mbus_framefmt *__fimc_lite_subdev_get_try_fmt(
1020 struct v4l2_subdev *sd,
1021 struct v4l2_subdev_state *sd_state, unsigned int pad)
1022{
1023 if (pad != FLITE_SD_PAD_SINK)
1024 pad = FLITE_SD_PAD_SOURCE_DMA;
1025
1026 return v4l2_subdev_get_try_format(sd, sd_state, pad);
1027}
1028
1029static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
1030 struct v4l2_subdev_state *sd_state,
1031 struct v4l2_subdev_format *fmt)
1032{
1033 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1034 struct v4l2_mbus_framefmt *mf = &fmt->format;
1035 struct flite_frame *f = &fimc->inp_frame;
1036
1037 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1038 mf = __fimc_lite_subdev_get_try_fmt(sd, sd_state, fmt->pad);
1039 fmt->format = *mf;
1040 return 0;
1041 }
1042
1043 mutex_lock(&fimc->lock);
1044 mf->colorspace = f->fmt->colorspace;
1045 mf->code = f->fmt->mbus_code;
1046
1047 if (fmt->pad == FLITE_SD_PAD_SINK) {
1048
1049 mf->width = f->f_width;
1050 mf->height = f->f_height;
1051 } else {
1052
1053 mf->width = f->rect.width;
1054 mf->height = f->rect.height;
1055 }
1056 mutex_unlock(&fimc->lock);
1057 return 0;
1058}
1059
1060static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
1061 struct v4l2_subdev_state *sd_state,
1062 struct v4l2_subdev_format *fmt)
1063{
1064 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1065 struct v4l2_mbus_framefmt *mf = &fmt->format;
1066 struct flite_frame *sink = &fimc->inp_frame;
1067 struct flite_frame *source = &fimc->out_frame;
1068 const struct fimc_fmt *ffmt;
1069
1070 v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
1071 fmt->pad, mf->code, mf->width, mf->height);
1072
1073 mutex_lock(&fimc->lock);
1074
1075 if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
1076 sd->entity.stream_count > 0) ||
1077 (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
1078 vb2_is_busy(&fimc->vb_queue))) {
1079 mutex_unlock(&fimc->lock);
1080 return -EBUSY;
1081 }
1082
1083 ffmt = fimc_lite_subdev_try_fmt(fimc, sd_state, fmt);
1084
1085 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1086 struct v4l2_mbus_framefmt *src_fmt;
1087
1088 mf = __fimc_lite_subdev_get_try_fmt(sd, sd_state, fmt->pad);
1089 *mf = fmt->format;
1090
1091 if (fmt->pad == FLITE_SD_PAD_SINK) {
1092 unsigned int pad = FLITE_SD_PAD_SOURCE_DMA;
1093 src_fmt = __fimc_lite_subdev_get_try_fmt(sd, sd_state,
1094 pad);
1095 *src_fmt = *mf;
1096 }
1097
1098 mutex_unlock(&fimc->lock);
1099 return 0;
1100 }
1101
1102 if (fmt->pad == FLITE_SD_PAD_SINK) {
1103 sink->f_width = mf->width;
1104 sink->f_height = mf->height;
1105 sink->fmt = ffmt;
1106
1107 sink->rect.width = mf->width;
1108 sink->rect.height = mf->height;
1109 sink->rect.left = 0;
1110 sink->rect.top = 0;
1111
1112 source->rect = sink->rect;
1113 source->f_width = mf->width;
1114 source->f_height = mf->height;
1115 }
1116
1117 mutex_unlock(&fimc->lock);
1118 return 0;
1119}
1120
1121static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
1122 struct v4l2_subdev_state *sd_state,
1123 struct v4l2_subdev_selection *sel)
1124{
1125 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1126 struct flite_frame *f = &fimc->inp_frame;
1127
1128 if ((sel->target != V4L2_SEL_TGT_CROP &&
1129 sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
1130 sel->pad != FLITE_SD_PAD_SINK)
1131 return -EINVAL;
1132
1133 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1134 sel->r = *v4l2_subdev_get_try_crop(sd, sd_state, sel->pad);
1135 return 0;
1136 }
1137
1138 mutex_lock(&fimc->lock);
1139 if (sel->target == V4L2_SEL_TGT_CROP) {
1140 sel->r = f->rect;
1141 } else {
1142 sel->r.left = 0;
1143 sel->r.top = 0;
1144 sel->r.width = f->f_width;
1145 sel->r.height = f->f_height;
1146 }
1147 mutex_unlock(&fimc->lock);
1148
1149 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
1150 __func__, f->rect.left, f->rect.top, f->rect.width,
1151 f->rect.height, f->f_width, f->f_height);
1152
1153 return 0;
1154}
1155
1156static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
1157 struct v4l2_subdev_state *sd_state,
1158 struct v4l2_subdev_selection *sel)
1159{
1160 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1161 struct flite_frame *f = &fimc->inp_frame;
1162 int ret = 0;
1163
1164 if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
1165 return -EINVAL;
1166
1167 mutex_lock(&fimc->lock);
1168 fimc_lite_try_crop(fimc, &sel->r);
1169
1170 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1171 *v4l2_subdev_get_try_crop(sd, sd_state, sel->pad) = sel->r;
1172 } else {
1173 unsigned long flags;
1174 spin_lock_irqsave(&fimc->slock, flags);
1175 f->rect = sel->r;
1176
1177 fimc->out_frame.rect = sel->r;
1178 set_bit(ST_FLITE_CONFIG, &fimc->state);
1179 spin_unlock_irqrestore(&fimc->slock, flags);
1180 }
1181 mutex_unlock(&fimc->lock);
1182
1183 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
1184 __func__, f->rect.left, f->rect.top, f->rect.width,
1185 f->rect.height, f->f_width, f->f_height);
1186
1187 return ret;
1188}
1189
1190static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
1191{
1192 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1193 unsigned long flags;
1194 int ret;
1195
1196
1197
1198
1199
1200
1201
1202
1203 fimc->sensor = fimc_find_remote_sensor(&sd->entity);
1204
1205 if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
1206 return -ENOIOCTLCMD;
1207
1208 mutex_lock(&fimc->lock);
1209 if (on) {
1210 flite_hw_reset(fimc);
1211 ret = fimc_lite_hw_init(fimc, true);
1212 if (!ret) {
1213 spin_lock_irqsave(&fimc->slock, flags);
1214 flite_hw_capture_start(fimc);
1215 spin_unlock_irqrestore(&fimc->slock, flags);
1216 }
1217 } else {
1218 set_bit(ST_FLITE_OFF, &fimc->state);
1219
1220 spin_lock_irqsave(&fimc->slock, flags);
1221 flite_hw_capture_stop(fimc);
1222 spin_unlock_irqrestore(&fimc->slock, flags);
1223
1224 ret = wait_event_timeout(fimc->irq_queue,
1225 !test_bit(ST_FLITE_OFF, &fimc->state),
1226 msecs_to_jiffies(200));
1227 if (ret == 0)
1228 v4l2_err(sd, "s_stream(0) timeout\n");
1229 clear_bit(ST_FLITE_RUN, &fimc->state);
1230 }
1231
1232 mutex_unlock(&fimc->lock);
1233 return ret;
1234}
1235
1236static int fimc_lite_log_status(struct v4l2_subdev *sd)
1237{
1238 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1239
1240 flite_hw_dump_regs(fimc, __func__);
1241 return 0;
1242}
1243
1244static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
1245{
1246 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1247 struct vb2_queue *q = &fimc->vb_queue;
1248 struct video_device *vfd = &fimc->ve.vdev;
1249 int ret;
1250
1251 memset(vfd, 0, sizeof(*vfd));
1252 atomic_set(&fimc->out_path, FIMC_IO_DMA);
1253
1254 snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
1255 fimc->index);
1256
1257 vfd->fops = &fimc_lite_fops;
1258 vfd->ioctl_ops = &fimc_lite_ioctl_ops;
1259 vfd->v4l2_dev = sd->v4l2_dev;
1260 vfd->minor = -1;
1261 vfd->release = video_device_release_empty;
1262 vfd->queue = q;
1263 vfd->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | V4L2_CAP_STREAMING;
1264 fimc->reqbufs_count = 0;
1265
1266 INIT_LIST_HEAD(&fimc->pending_buf_q);
1267 INIT_LIST_HEAD(&fimc->active_buf_q);
1268
1269 memset(q, 0, sizeof(*q));
1270 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1271 q->io_modes = VB2_MMAP | VB2_USERPTR;
1272 q->ops = &fimc_lite_qops;
1273 q->mem_ops = &vb2_dma_contig_memops;
1274 q->buf_struct_size = sizeof(struct flite_buffer);
1275 q->drv_priv = fimc;
1276 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1277 q->lock = &fimc->lock;
1278 q->dev = &fimc->pdev->dev;
1279
1280 ret = vb2_queue_init(q);
1281 if (ret < 0)
1282 return ret;
1283
1284 fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
1285 ret = media_entity_pads_init(&vfd->entity, 1, &fimc->vd_pad);
1286 if (ret < 0)
1287 return ret;
1288
1289 video_set_drvdata(vfd, fimc);
1290 fimc->ve.pipe = v4l2_get_subdev_hostdata(sd);
1291
1292 ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1);
1293 if (ret < 0) {
1294 media_entity_cleanup(&vfd->entity);
1295 fimc->ve.pipe = NULL;
1296 return ret;
1297 }
1298
1299 v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
1300 vfd->name, video_device_node_name(vfd));
1301 return 0;
1302}
1303
1304static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
1305{
1306 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1307
1308 if (fimc == NULL)
1309 return;
1310
1311 mutex_lock(&fimc->lock);
1312
1313 if (video_is_registered(&fimc->ve.vdev)) {
1314 video_unregister_device(&fimc->ve.vdev);
1315 media_entity_cleanup(&fimc->ve.vdev.entity);
1316 fimc->ve.pipe = NULL;
1317 }
1318
1319 mutex_unlock(&fimc->lock);
1320}
1321
1322static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
1323 .registered = fimc_lite_subdev_registered,
1324 .unregistered = fimc_lite_subdev_unregistered,
1325};
1326
1327static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
1328 .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
1329 .get_selection = fimc_lite_subdev_get_selection,
1330 .set_selection = fimc_lite_subdev_set_selection,
1331 .get_fmt = fimc_lite_subdev_get_fmt,
1332 .set_fmt = fimc_lite_subdev_set_fmt,
1333};
1334
1335static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
1336 .s_stream = fimc_lite_subdev_s_stream,
1337};
1338
1339static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
1340 .log_status = fimc_lite_log_status,
1341};
1342
1343static const struct v4l2_subdev_ops fimc_lite_subdev_ops = {
1344 .core = &fimc_lite_core_ops,
1345 .video = &fimc_lite_subdev_video_ops,
1346 .pad = &fimc_lite_subdev_pad_ops,
1347};
1348
1349static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
1350{
1351 struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
1352 ctrl_handler);
1353 set_bit(ST_FLITE_CONFIG, &fimc->state);
1354 return 0;
1355}
1356
1357static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
1358 .s_ctrl = fimc_lite_s_ctrl,
1359};
1360
1361static const struct v4l2_ctrl_config fimc_lite_ctrl = {
1362 .ops = &fimc_lite_ctrl_ops,
1363 .id = V4L2_CTRL_CLASS_USER | 0x1001,
1364 .type = V4L2_CTRL_TYPE_BOOLEAN,
1365 .name = "Test Pattern 640x480",
1366 .step = 1,
1367};
1368
1369static void fimc_lite_set_default_config(struct fimc_lite *fimc)
1370{
1371 struct flite_frame *sink = &fimc->inp_frame;
1372 struct flite_frame *source = &fimc->out_frame;
1373
1374 sink->fmt = &fimc_lite_formats[0];
1375 sink->f_width = FLITE_DEFAULT_WIDTH;
1376 sink->f_height = FLITE_DEFAULT_HEIGHT;
1377
1378 sink->rect.width = FLITE_DEFAULT_WIDTH;
1379 sink->rect.height = FLITE_DEFAULT_HEIGHT;
1380 sink->rect.left = 0;
1381 sink->rect.top = 0;
1382
1383 *source = *sink;
1384}
1385
1386static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
1387{
1388 struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
1389 struct v4l2_subdev *sd = &fimc->subdev;
1390 int ret;
1391
1392 v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
1393 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1394 snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
1395
1396 fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1397 fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
1398 fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
1399 ret = media_entity_pads_init(&sd->entity, FLITE_SD_PADS_NUM,
1400 fimc->subdev_pads);
1401 if (ret)
1402 return ret;
1403
1404 v4l2_ctrl_handler_init(handler, 1);
1405 fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
1406 NULL);
1407 if (handler->error) {
1408 media_entity_cleanup(&sd->entity);
1409 return handler->error;
1410 }
1411
1412 sd->ctrl_handler = handler;
1413 sd->internal_ops = &fimc_lite_subdev_internal_ops;
1414 sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
1415 sd->entity.ops = &fimc_lite_subdev_media_ops;
1416 sd->owner = THIS_MODULE;
1417 v4l2_set_subdevdata(sd, fimc);
1418
1419 return 0;
1420}
1421
1422static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
1423{
1424 struct v4l2_subdev *sd = &fimc->subdev;
1425
1426 v4l2_device_unregister_subdev(sd);
1427 media_entity_cleanup(&sd->entity);
1428 v4l2_ctrl_handler_free(&fimc->ctrl_handler);
1429 v4l2_set_subdevdata(sd, NULL);
1430}
1431
1432static void fimc_lite_clk_put(struct fimc_lite *fimc)
1433{
1434 if (IS_ERR(fimc->clock))
1435 return;
1436
1437 clk_put(fimc->clock);
1438 fimc->clock = ERR_PTR(-EINVAL);
1439}
1440
1441static int fimc_lite_clk_get(struct fimc_lite *fimc)
1442{
1443 fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
1444 return PTR_ERR_OR_ZERO(fimc->clock);
1445}
1446
1447static const struct of_device_id flite_of_match[];
1448
1449static int fimc_lite_probe(struct platform_device *pdev)
1450{
1451 struct flite_drvdata *drv_data = NULL;
1452 struct device *dev = &pdev->dev;
1453 const struct of_device_id *of_id;
1454 struct fimc_lite *fimc;
1455 struct resource *res;
1456 int ret;
1457
1458 if (!dev->of_node)
1459 return -ENODEV;
1460
1461 fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
1462 if (!fimc)
1463 return -ENOMEM;
1464
1465 of_id = of_match_node(flite_of_match, dev->of_node);
1466 if (of_id)
1467 drv_data = (struct flite_drvdata *)of_id->data;
1468 fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
1469
1470 if (!drv_data || fimc->index >= drv_data->num_instances ||
1471 fimc->index < 0) {
1472 dev_err(dev, "Wrong %pOF node alias\n", dev->of_node);
1473 return -EINVAL;
1474 }
1475
1476 fimc->dd = drv_data;
1477 fimc->pdev = pdev;
1478
1479 init_waitqueue_head(&fimc->irq_queue);
1480 spin_lock_init(&fimc->slock);
1481 mutex_init(&fimc->lock);
1482
1483 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1484 fimc->regs = devm_ioremap_resource(dev, res);
1485 if (IS_ERR(fimc->regs))
1486 return PTR_ERR(fimc->regs);
1487
1488 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1489 if (res == NULL) {
1490 dev_err(dev, "Failed to get IRQ resource\n");
1491 return -ENXIO;
1492 }
1493
1494 ret = fimc_lite_clk_get(fimc);
1495 if (ret)
1496 return ret;
1497
1498 ret = devm_request_irq(dev, res->start, flite_irq_handler,
1499 0, dev_name(dev), fimc);
1500 if (ret) {
1501 dev_err(dev, "Failed to install irq (%d)\n", ret);
1502 goto err_clk_put;
1503 }
1504
1505
1506 ret = fimc_lite_create_capture_subdev(fimc);
1507 if (ret)
1508 goto err_clk_put;
1509
1510 platform_set_drvdata(pdev, fimc);
1511 pm_runtime_enable(dev);
1512
1513 if (!pm_runtime_enabled(dev)) {
1514 ret = clk_prepare_enable(fimc->clock);
1515 if (ret < 0)
1516 goto err_sd;
1517 }
1518
1519 vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32));
1520
1521 fimc_lite_set_default_config(fimc);
1522
1523 dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
1524 fimc->index);
1525 return 0;
1526
1527err_sd:
1528 fimc_lite_unregister_capture_subdev(fimc);
1529err_clk_put:
1530 fimc_lite_clk_put(fimc);
1531 return ret;
1532}
1533
1534#ifdef CONFIG_PM
1535static int fimc_lite_runtime_resume(struct device *dev)
1536{
1537 struct fimc_lite *fimc = dev_get_drvdata(dev);
1538
1539 clk_prepare_enable(fimc->clock);
1540 return 0;
1541}
1542
1543static int fimc_lite_runtime_suspend(struct device *dev)
1544{
1545 struct fimc_lite *fimc = dev_get_drvdata(dev);
1546
1547 clk_disable_unprepare(fimc->clock);
1548 return 0;
1549}
1550#endif
1551
1552#ifdef CONFIG_PM_SLEEP
1553static int fimc_lite_resume(struct device *dev)
1554{
1555 struct fimc_lite *fimc = dev_get_drvdata(dev);
1556 struct flite_buffer *buf;
1557 unsigned long flags;
1558 int i;
1559
1560 spin_lock_irqsave(&fimc->slock, flags);
1561 if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
1562 !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
1563 spin_unlock_irqrestore(&fimc->slock, flags);
1564 return 0;
1565 }
1566 flite_hw_reset(fimc);
1567 spin_unlock_irqrestore(&fimc->slock, flags);
1568
1569 if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
1570 return 0;
1571
1572 INIT_LIST_HEAD(&fimc->active_buf_q);
1573 fimc_pipeline_call(&fimc->ve, open,
1574 &fimc->ve.vdev.entity, false);
1575 fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
1576 clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
1577
1578 for (i = 0; i < fimc->reqbufs_count; i++) {
1579 if (list_empty(&fimc->pending_buf_q))
1580 break;
1581 buf = fimc_lite_pending_queue_pop(fimc);
1582 buffer_queue(&buf->vb.vb2_buf);
1583 }
1584 return 0;
1585}
1586
1587static int fimc_lite_suspend(struct device *dev)
1588{
1589 struct fimc_lite *fimc = dev_get_drvdata(dev);
1590 bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
1591 int ret;
1592
1593 if (test_and_set_bit(ST_LPM, &fimc->state))
1594 return 0;
1595
1596 ret = fimc_lite_stop_capture(fimc, suspend);
1597 if (ret < 0 || !fimc_lite_active(fimc))
1598 return ret;
1599
1600 return fimc_pipeline_call(&fimc->ve, close);
1601}
1602#endif
1603
1604static int fimc_lite_remove(struct platform_device *pdev)
1605{
1606 struct fimc_lite *fimc = platform_get_drvdata(pdev);
1607 struct device *dev = &pdev->dev;
1608
1609 if (!pm_runtime_enabled(dev))
1610 clk_disable_unprepare(fimc->clock);
1611
1612 pm_runtime_disable(dev);
1613 pm_runtime_set_suspended(dev);
1614 fimc_lite_unregister_capture_subdev(fimc);
1615 vb2_dma_contig_clear_max_seg_size(dev);
1616 fimc_lite_clk_put(fimc);
1617
1618 dev_info(dev, "Driver unloaded\n");
1619 return 0;
1620}
1621
1622static const struct dev_pm_ops fimc_lite_pm_ops = {
1623 SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
1624 SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
1625 NULL)
1626};
1627
1628
1629static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
1630 .max_width = 8192,
1631 .max_height = 8192,
1632 .out_width_align = 8,
1633 .win_hor_offs_align = 2,
1634 .out_hor_offs_align = 8,
1635 .max_dma_bufs = 1,
1636 .num_instances = 2,
1637};
1638
1639
1640static struct flite_drvdata fimc_lite_drvdata_exynos5 = {
1641 .max_width = 8192,
1642 .max_height = 8192,
1643 .out_width_align = 8,
1644 .win_hor_offs_align = 2,
1645 .out_hor_offs_align = 8,
1646 .max_dma_bufs = 32,
1647 .num_instances = 3,
1648};
1649
1650static const struct of_device_id flite_of_match[] = {
1651 {
1652 .compatible = "samsung,exynos4212-fimc-lite",
1653 .data = &fimc_lite_drvdata_exynos4,
1654 },
1655 {
1656 .compatible = "samsung,exynos5250-fimc-lite",
1657 .data = &fimc_lite_drvdata_exynos5,
1658 },
1659 { },
1660};
1661MODULE_DEVICE_TABLE(of, flite_of_match);
1662
1663static struct platform_driver fimc_lite_driver = {
1664 .probe = fimc_lite_probe,
1665 .remove = fimc_lite_remove,
1666 .driver = {
1667 .of_match_table = flite_of_match,
1668 .name = FIMC_LITE_DRV_NAME,
1669 .pm = &fimc_lite_pm_ops,
1670 }
1671};
1672module_platform_driver(fimc_lite_driver);
1673MODULE_LICENSE("GPL");
1674MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);
1675
