linux/drivers/iio/adc/adi-axi-adc.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Analog Devices Generic AXI ADC IP core
   4 * Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
   5 *
   6 * Copyright 2012-2020 Analog Devices Inc.
   7 */
   8
   9#include <linux/bitfield.h>
  10#include <linux/clk.h>
  11#include <linux/io.h>
  12#include <linux/delay.h>
  13#include <linux/module.h>
  14#include <linux/of_device.h>
  15#include <linux/platform_device.h>
  16#include <linux/slab.h>
  17
  18#include <linux/iio/iio.h>
  19#include <linux/iio/sysfs.h>
  20#include <linux/iio/buffer.h>
  21#include <linux/iio/buffer-dmaengine.h>
  22
  23#include <linux/fpga/adi-axi-common.h>
  24#include <linux/iio/adc/adi-axi-adc.h>
  25
  26/*
  27 * Register definitions:
  28 *   https://wiki.analog.com/resources/fpga/docs/axi_adc_ip#register_map
  29 */
  30
  31/* ADC controls */
  32
  33#define ADI_AXI_REG_RSTN                        0x0040
  34#define   ADI_AXI_REG_RSTN_CE_N                 BIT(2)
  35#define   ADI_AXI_REG_RSTN_MMCM_RSTN            BIT(1)
  36#define   ADI_AXI_REG_RSTN_RSTN                 BIT(0)
  37
  38/* ADC Channel controls */
  39
  40#define ADI_AXI_REG_CHAN_CTRL(c)                (0x0400 + (c) * 0x40)
  41#define   ADI_AXI_REG_CHAN_CTRL_LB_OWR          BIT(11)
  42#define   ADI_AXI_REG_CHAN_CTRL_PN_SEL_OWR      BIT(10)
  43#define   ADI_AXI_REG_CHAN_CTRL_IQCOR_EN        BIT(9)
  44#define   ADI_AXI_REG_CHAN_CTRL_DCFILT_EN       BIT(8)
  45#define   ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT     BIT(6)
  46#define   ADI_AXI_REG_CHAN_CTRL_FMT_TYPE        BIT(5)
  47#define   ADI_AXI_REG_CHAN_CTRL_FMT_EN          BIT(4)
  48#define   ADI_AXI_REG_CHAN_CTRL_PN_TYPE_OWR     BIT(1)
  49#define   ADI_AXI_REG_CHAN_CTRL_ENABLE          BIT(0)
  50
  51#define ADI_AXI_REG_CHAN_CTRL_DEFAULTS          \
  52        (ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT |    \
  53         ADI_AXI_REG_CHAN_CTRL_FMT_EN |         \
  54         ADI_AXI_REG_CHAN_CTRL_ENABLE)
  55
  56struct adi_axi_adc_core_info {
  57        unsigned int                            version;
  58};
  59
  60struct adi_axi_adc_state {
  61        struct mutex                            lock;
  62
  63        struct adi_axi_adc_client               *client;
  64        void __iomem                            *regs;
  65};
  66
  67struct adi_axi_adc_client {
  68        struct list_head                        entry;
  69        struct adi_axi_adc_conv                 conv;
  70        struct adi_axi_adc_state                *state;
  71        struct device                           *dev;
  72        const struct adi_axi_adc_core_info      *info;
  73};
  74
  75static LIST_HEAD(registered_clients);
  76static DEFINE_MUTEX(registered_clients_lock);
  77
  78static struct adi_axi_adc_client *conv_to_client(struct adi_axi_adc_conv *conv)
  79{
  80        return container_of(conv, struct adi_axi_adc_client, conv);
  81}
  82
  83void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv)
  84{
  85        struct adi_axi_adc_client *cl = conv_to_client(conv);
  86
  87        return (char *)cl + ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN);
  88}
  89EXPORT_SYMBOL_GPL(adi_axi_adc_conv_priv);
  90
  91static void adi_axi_adc_write(struct adi_axi_adc_state *st,
  92                              unsigned int reg,
  93                              unsigned int val)
  94{
  95        iowrite32(val, st->regs + reg);
  96}
  97
  98static unsigned int adi_axi_adc_read(struct adi_axi_adc_state *st,
  99                                     unsigned int reg)
 100{
 101        return ioread32(st->regs + reg);
 102}
 103
 104static int adi_axi_adc_config_dma_buffer(struct device *dev,
 105                                         struct iio_dev *indio_dev)
 106{
 107        const char *dma_name;
 108
 109        if (!device_property_present(dev, "dmas"))
 110                return 0;
 111
 112        if (device_property_read_string(dev, "dma-names", &dma_name))
 113                dma_name = "rx";
 114
 115        return devm_iio_dmaengine_buffer_setup(indio_dev->dev.parent,
 116                                               indio_dev, dma_name);
 117}
 118
 119static int adi_axi_adc_read_raw(struct iio_dev *indio_dev,
 120                                struct iio_chan_spec const *chan,
 121                                int *val, int *val2, long mask)
 122{
 123        struct adi_axi_adc_state *st = iio_priv(indio_dev);
 124        struct adi_axi_adc_conv *conv = &st->client->conv;
 125
 126        if (!conv->read_raw)
 127                return -EOPNOTSUPP;
 128
 129        return conv->read_raw(conv, chan, val, val2, mask);
 130}
 131
 132static int adi_axi_adc_write_raw(struct iio_dev *indio_dev,
 133                                 struct iio_chan_spec const *chan,
 134                                 int val, int val2, long mask)
 135{
 136        struct adi_axi_adc_state *st = iio_priv(indio_dev);
 137        struct adi_axi_adc_conv *conv = &st->client->conv;
 138
 139        if (!conv->write_raw)
 140                return -EOPNOTSUPP;
 141
 142        return conv->write_raw(conv, chan, val, val2, mask);
 143}
 144
 145static int adi_axi_adc_update_scan_mode(struct iio_dev *indio_dev,
 146                                        const unsigned long *scan_mask)
 147{
 148        struct adi_axi_adc_state *st = iio_priv(indio_dev);
 149        struct adi_axi_adc_conv *conv = &st->client->conv;
 150        unsigned int i, ctrl;
 151
 152        for (i = 0; i < conv->chip_info->num_channels; i++) {
 153                ctrl = adi_axi_adc_read(st, ADI_AXI_REG_CHAN_CTRL(i));
 154
 155                if (test_bit(i, scan_mask))
 156                        ctrl |= ADI_AXI_REG_CHAN_CTRL_ENABLE;
 157                else
 158                        ctrl &= ~ADI_AXI_REG_CHAN_CTRL_ENABLE;
 159
 160                adi_axi_adc_write(st, ADI_AXI_REG_CHAN_CTRL(i), ctrl);
 161        }
 162
 163        return 0;
 164}
 165
 166static struct adi_axi_adc_conv *adi_axi_adc_conv_register(struct device *dev,
 167                                                          size_t sizeof_priv)
 168{
 169        struct adi_axi_adc_client *cl;
 170        size_t alloc_size;
 171
 172        alloc_size = ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN);
 173        if (sizeof_priv)
 174                alloc_size += ALIGN(sizeof_priv, IIO_ALIGN);
 175
 176        cl = kzalloc(alloc_size, GFP_KERNEL);
 177        if (!cl)
 178                return ERR_PTR(-ENOMEM);
 179
 180        mutex_lock(&registered_clients_lock);
 181
 182        cl->dev = get_device(dev);
 183
 184        list_add_tail(&cl->entry, &registered_clients);
 185
 186        mutex_unlock(&registered_clients_lock);
 187
 188        return &cl->conv;
 189}
 190
 191static void adi_axi_adc_conv_unregister(struct adi_axi_adc_conv *conv)
 192{
 193        struct adi_axi_adc_client *cl = conv_to_client(conv);
 194
 195        mutex_lock(&registered_clients_lock);
 196
 197        list_del(&cl->entry);
 198        put_device(cl->dev);
 199
 200        mutex_unlock(&registered_clients_lock);
 201
 202        kfree(cl);
 203}
 204
 205static void devm_adi_axi_adc_conv_release(void *conv)
 206{
 207        adi_axi_adc_conv_unregister(conv);
 208}
 209
 210struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev,
 211                                                        size_t sizeof_priv)
 212{
 213        struct adi_axi_adc_conv *conv;
 214        int ret;
 215
 216        conv = adi_axi_adc_conv_register(dev, sizeof_priv);
 217        if (IS_ERR(conv))
 218                return conv;
 219
 220        ret = devm_add_action_or_reset(dev, devm_adi_axi_adc_conv_release,
 221                                       conv);
 222        if (ret)
 223                return ERR_PTR(ret);
 224
 225        return conv;
 226}
 227EXPORT_SYMBOL_GPL(devm_adi_axi_adc_conv_register);
 228
 229static ssize_t in_voltage_scale_available_show(struct device *dev,
 230                                               struct device_attribute *attr,
 231                                               char *buf)
 232{
 233        struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 234        struct adi_axi_adc_state *st = iio_priv(indio_dev);
 235        struct adi_axi_adc_conv *conv = &st->client->conv;
 236        size_t len = 0;
 237        int i;
 238
 239        for (i = 0; i < conv->chip_info->num_scales; i++) {
 240                const unsigned int *s = conv->chip_info->scale_table[i];
 241
 242                len += scnprintf(buf + len, PAGE_SIZE - len,
 243                                 "%u.%06u ", s[0], s[1]);
 244        }
 245        buf[len - 1] = '\n';
 246
 247        return len;
 248}
 249
 250static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0);
 251
 252enum {
 253        ADI_AXI_ATTR_SCALE_AVAIL,
 254};
 255
 256#define ADI_AXI_ATTR(_en_, _file_)                      \
 257        [ADI_AXI_ATTR_##_en_] = &iio_dev_attr_##_file_.dev_attr.attr
 258
 259static struct attribute *adi_axi_adc_attributes[] = {
 260        ADI_AXI_ATTR(SCALE_AVAIL, in_voltage_scale_available),
 261        NULL
 262};
 263
 264static umode_t axi_adc_attr_is_visible(struct kobject *kobj,
 265                                       struct attribute *attr, int n)
 266{
 267        struct device *dev = kobj_to_dev(kobj);
 268        struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 269        struct adi_axi_adc_state *st = iio_priv(indio_dev);
 270        struct adi_axi_adc_conv *conv = &st->client->conv;
 271
 272        switch (n) {
 273        case ADI_AXI_ATTR_SCALE_AVAIL:
 274                if (!conv->chip_info->num_scales)
 275                        return 0;
 276                return attr->mode;
 277        default:
 278                return attr->mode;
 279        }
 280}
 281
 282static const struct attribute_group adi_axi_adc_attribute_group = {
 283        .attrs = adi_axi_adc_attributes,
 284        .is_visible = axi_adc_attr_is_visible,
 285};
 286
 287static const struct iio_info adi_axi_adc_info = {
 288        .read_raw = &adi_axi_adc_read_raw,
 289        .write_raw = &adi_axi_adc_write_raw,
 290        .attrs = &adi_axi_adc_attribute_group,
 291        .update_scan_mode = &adi_axi_adc_update_scan_mode,
 292};
 293
 294static const struct adi_axi_adc_core_info adi_axi_adc_10_0_a_info = {
 295        .version = ADI_AXI_PCORE_VER(10, 0, 'a'),
 296};
 297
 298static struct adi_axi_adc_client *adi_axi_adc_attach_client(struct device *dev)
 299{
 300        const struct adi_axi_adc_core_info *info;
 301        struct adi_axi_adc_client *cl;
 302        struct device_node *cln;
 303
 304        info = of_device_get_match_data(dev);
 305        if (!info)
 306                return ERR_PTR(-ENODEV);
 307
 308        cln = of_parse_phandle(dev->of_node, "adi,adc-dev", 0);
 309        if (!cln) {
 310                dev_err(dev, "No 'adi,adc-dev' node defined\n");
 311                return ERR_PTR(-ENODEV);
 312        }
 313
 314        mutex_lock(&registered_clients_lock);
 315
 316        list_for_each_entry(cl, &registered_clients, entry) {
 317                if (!cl->dev)
 318                        continue;
 319
 320                if (cl->dev->of_node != cln)
 321                        continue;
 322
 323                if (!try_module_get(cl->dev->driver->owner)) {
 324                        mutex_unlock(&registered_clients_lock);
 325                        return ERR_PTR(-ENODEV);
 326                }
 327
 328                get_device(cl->dev);
 329                cl->info = info;
 330                mutex_unlock(&registered_clients_lock);
 331                return cl;
 332        }
 333
 334        mutex_unlock(&registered_clients_lock);
 335
 336        return ERR_PTR(-EPROBE_DEFER);
 337}
 338
 339static int adi_axi_adc_setup_channels(struct device *dev,
 340                                      struct adi_axi_adc_state *st)
 341{
 342        struct adi_axi_adc_conv *conv = &st->client->conv;
 343        int i, ret;
 344
 345        if (conv->preenable_setup) {
 346                ret = conv->preenable_setup(conv);
 347                if (ret)
 348                        return ret;
 349        }
 350
 351        for (i = 0; i < conv->chip_info->num_channels; i++) {
 352                adi_axi_adc_write(st, ADI_AXI_REG_CHAN_CTRL(i),
 353                                  ADI_AXI_REG_CHAN_CTRL_DEFAULTS);
 354        }
 355
 356        return 0;
 357}
 358
 359static void axi_adc_reset(struct adi_axi_adc_state *st)
 360{
 361        adi_axi_adc_write(st, ADI_AXI_REG_RSTN, 0);
 362        mdelay(10);
 363        adi_axi_adc_write(st, ADI_AXI_REG_RSTN, ADI_AXI_REG_RSTN_MMCM_RSTN);
 364        mdelay(10);
 365        adi_axi_adc_write(st, ADI_AXI_REG_RSTN,
 366                          ADI_AXI_REG_RSTN_RSTN | ADI_AXI_REG_RSTN_MMCM_RSTN);
 367}
 368
 369static void adi_axi_adc_cleanup(void *data)
 370{
 371        struct adi_axi_adc_client *cl = data;
 372
 373        put_device(cl->dev);
 374        module_put(cl->dev->driver->owner);
 375}
 376
 377static int adi_axi_adc_probe(struct platform_device *pdev)
 378{
 379        struct adi_axi_adc_conv *conv;
 380        struct iio_dev *indio_dev;
 381        struct adi_axi_adc_client *cl;
 382        struct adi_axi_adc_state *st;
 383        unsigned int ver;
 384        int ret;
 385
 386        cl = adi_axi_adc_attach_client(&pdev->dev);
 387        if (IS_ERR(cl))
 388                return PTR_ERR(cl);
 389
 390        ret = devm_add_action_or_reset(&pdev->dev, adi_axi_adc_cleanup, cl);
 391        if (ret)
 392                return ret;
 393
 394        indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st));
 395        if (indio_dev == NULL)
 396                return -ENOMEM;
 397
 398        st = iio_priv(indio_dev);
 399        st->client = cl;
 400        cl->state = st;
 401        mutex_init(&st->lock);
 402
 403        st->regs = devm_platform_ioremap_resource(pdev, 0);
 404        if (IS_ERR(st->regs))
 405                return PTR_ERR(st->regs);
 406
 407        conv = &st->client->conv;
 408
 409        axi_adc_reset(st);
 410
 411        ver = adi_axi_adc_read(st, ADI_AXI_REG_VERSION);
 412
 413        if (cl->info->version > ver) {
 414                dev_err(&pdev->dev,
 415                        "IP core version is too old. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n",
 416                        ADI_AXI_PCORE_VER_MAJOR(cl->info->version),
 417                        ADI_AXI_PCORE_VER_MINOR(cl->info->version),
 418                        ADI_AXI_PCORE_VER_PATCH(cl->info->version),
 419                        ADI_AXI_PCORE_VER_MAJOR(ver),
 420                        ADI_AXI_PCORE_VER_MINOR(ver),
 421                        ADI_AXI_PCORE_VER_PATCH(ver));
 422                return -ENODEV;
 423        }
 424
 425        indio_dev->info = &adi_axi_adc_info;
 426        indio_dev->name = "adi-axi-adc";
 427        indio_dev->modes = INDIO_DIRECT_MODE;
 428        indio_dev->num_channels = conv->chip_info->num_channels;
 429        indio_dev->channels = conv->chip_info->channels;
 430
 431        ret = adi_axi_adc_config_dma_buffer(&pdev->dev, indio_dev);
 432        if (ret)
 433                return ret;
 434
 435        ret = adi_axi_adc_setup_channels(&pdev->dev, st);
 436        if (ret)
 437                return ret;
 438
 439        ret = devm_iio_device_register(&pdev->dev, indio_dev);
 440        if (ret)
 441                return ret;
 442
 443        dev_info(&pdev->dev, "AXI ADC IP core (%d.%.2d.%c) probed\n",
 444                 ADI_AXI_PCORE_VER_MAJOR(ver),
 445                 ADI_AXI_PCORE_VER_MINOR(ver),
 446                 ADI_AXI_PCORE_VER_PATCH(ver));
 447
 448        return 0;
 449}
 450
 451/* Match table for of_platform binding */
 452static const struct of_device_id adi_axi_adc_of_match[] = {
 453        { .compatible = "adi,axi-adc-10.0.a", .data = &adi_axi_adc_10_0_a_info },
 454        { /* end of list */ }
 455};
 456MODULE_DEVICE_TABLE(of, adi_axi_adc_of_match);
 457
 458static struct platform_driver adi_axi_adc_driver = {
 459        .driver = {
 460                .name = KBUILD_MODNAME,
 461                .of_match_table = adi_axi_adc_of_match,
 462        },
 463        .probe = adi_axi_adc_probe,
 464};
 465module_platform_driver(adi_axi_adc_driver);
 466
 467MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
 468MODULE_DESCRIPTION("Analog Devices Generic AXI ADC IP core driver");
 469MODULE_LICENSE("GPL v2");
 470