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28#include <linux/dmapool.h>
29#include <linux/pci.h>
30
31#include <drm/ttm/ttm_bo_api.h>
32
33#include "vmwgfx_drv.h"
34
35
36
37
38
39#define VMW_CMDBUF_INLINE_ALIGN 64
40#define VMW_CMDBUF_INLINE_SIZE \
41 (1024 - ALIGN(sizeof(SVGACBHeader), VMW_CMDBUF_INLINE_ALIGN))
42
43
44
45
46
47
48
49
50
51
52
53struct vmw_cmdbuf_context {
54 struct list_head submitted;
55 struct list_head hw_submitted;
56 struct list_head preempted;
57 unsigned num_hw_submitted;
58 bool block_submission;
59};
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108
109
110struct vmw_cmdbuf_man {
111 struct mutex cur_mutex;
112 struct mutex space_mutex;
113 struct mutex error_mutex;
114 struct work_struct work;
115 struct vmw_private *dev_priv;
116 struct vmw_cmdbuf_context ctx[SVGA_CB_CONTEXT_MAX];
117 struct list_head error;
118 struct drm_mm mm;
119 struct ttm_buffer_object *cmd_space;
120 struct ttm_bo_kmap_obj map_obj;
121 u8 *map;
122 struct vmw_cmdbuf_header *cur;
123 size_t cur_pos;
124 size_t default_size;
125 unsigned max_hw_submitted;
126 spinlock_t lock;
127 struct dma_pool *headers;
128 struct dma_pool *dheaders;
129 wait_queue_head_t alloc_queue;
130 wait_queue_head_t idle_queue;
131 bool irq_on;
132 bool using_mob;
133 bool has_pool;
134 dma_addr_t handle;
135 size_t size;
136 u32 num_contexts;
137};
138
139
140
141
142
143
144
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148
149
150
151
152
153
154struct vmw_cmdbuf_header {
155 struct vmw_cmdbuf_man *man;
156 SVGACBHeader *cb_header;
157 SVGACBContext cb_context;
158 struct list_head list;
159 struct drm_mm_node node;
160 dma_addr_t handle;
161 u8 *cmd;
162 size_t size;
163 size_t reserved;
164 bool inline_space;
165};
166
167
168
169
170
171
172
173
174struct vmw_cmdbuf_dheader {
175 SVGACBHeader cb_header;
176 u8 cmd[VMW_CMDBUF_INLINE_SIZE] __aligned(VMW_CMDBUF_INLINE_ALIGN);
177};
178
179
180
181
182
183
184
185
186struct vmw_cmdbuf_alloc_info {
187 size_t page_size;
188 struct drm_mm_node *node;
189 bool done;
190};
191
192
193#define for_each_cmdbuf_ctx(_man, _i, _ctx) \
194 for (_i = 0, _ctx = &(_man)->ctx[0]; (_i) < (_man)->num_contexts; \
195 ++(_i), ++(_ctx))
196
197static int vmw_cmdbuf_startstop(struct vmw_cmdbuf_man *man, u32 context,
198 bool enable);
199static int vmw_cmdbuf_preempt(struct vmw_cmdbuf_man *man, u32 context);
200
201
202
203
204
205
206
207static int vmw_cmdbuf_cur_lock(struct vmw_cmdbuf_man *man, bool interruptible)
208{
209 if (interruptible) {
210 if (mutex_lock_interruptible(&man->cur_mutex))
211 return -ERESTARTSYS;
212 } else {
213 mutex_lock(&man->cur_mutex);
214 }
215
216 return 0;
217}
218
219
220
221
222
223
224static void vmw_cmdbuf_cur_unlock(struct vmw_cmdbuf_man *man)
225{
226 mutex_unlock(&man->cur_mutex);
227}
228
229
230
231
232
233
234
235
236static void vmw_cmdbuf_header_inline_free(struct vmw_cmdbuf_header *header)
237{
238 struct vmw_cmdbuf_dheader *dheader;
239
240 if (WARN_ON_ONCE(!header->inline_space))
241 return;
242
243 dheader = container_of(header->cb_header, struct vmw_cmdbuf_dheader,
244 cb_header);
245 dma_pool_free(header->man->dheaders, dheader, header->handle);
246 kfree(header);
247}
248
249
250
251
252
253
254
255
256
257static void __vmw_cmdbuf_header_free(struct vmw_cmdbuf_header *header)
258{
259 struct vmw_cmdbuf_man *man = header->man;
260
261 lockdep_assert_held_once(&man->lock);
262
263 if (header->inline_space) {
264 vmw_cmdbuf_header_inline_free(header);
265 return;
266 }
267
268 drm_mm_remove_node(&header->node);
269 wake_up_all(&man->alloc_queue);
270 if (header->cb_header)
271 dma_pool_free(man->headers, header->cb_header,
272 header->handle);
273 kfree(header);
274}
275
276
277
278
279
280
281
282void vmw_cmdbuf_header_free(struct vmw_cmdbuf_header *header)
283{
284 struct vmw_cmdbuf_man *man = header->man;
285
286
287 if (header->inline_space) {
288 vmw_cmdbuf_header_inline_free(header);
289 return;
290 }
291 spin_lock(&man->lock);
292 __vmw_cmdbuf_header_free(header);
293 spin_unlock(&man->lock);
294}
295
296
297
298
299
300
301
302static int vmw_cmdbuf_header_submit(struct vmw_cmdbuf_header *header)
303{
304 struct vmw_cmdbuf_man *man = header->man;
305 u32 val;
306
307 val = upper_32_bits(header->handle);
308 vmw_write(man->dev_priv, SVGA_REG_COMMAND_HIGH, val);
309
310 val = lower_32_bits(header->handle);
311 val |= header->cb_context & SVGA_CB_CONTEXT_MASK;
312 vmw_write(man->dev_priv, SVGA_REG_COMMAND_LOW, val);
313
314 return header->cb_header->status;
315}
316
317
318
319
320
321
322static void vmw_cmdbuf_ctx_init(struct vmw_cmdbuf_context *ctx)
323{
324 INIT_LIST_HEAD(&ctx->hw_submitted);
325 INIT_LIST_HEAD(&ctx->submitted);
326 INIT_LIST_HEAD(&ctx->preempted);
327 ctx->num_hw_submitted = 0;
328}
329
330
331
332
333
334
335
336
337
338
339
340static void vmw_cmdbuf_ctx_submit(struct vmw_cmdbuf_man *man,
341 struct vmw_cmdbuf_context *ctx)
342{
343 while (ctx->num_hw_submitted < man->max_hw_submitted &&
344 !list_empty(&ctx->submitted) &&
345 !ctx->block_submission) {
346 struct vmw_cmdbuf_header *entry;
347 SVGACBStatus status;
348
349 entry = list_first_entry(&ctx->submitted,
350 struct vmw_cmdbuf_header,
351 list);
352
353 status = vmw_cmdbuf_header_submit(entry);
354
355
356 if (WARN_ON_ONCE(status == SVGA_CB_STATUS_QUEUE_FULL)) {
357 entry->cb_header->status = SVGA_CB_STATUS_NONE;
358 break;
359 }
360
361 list_del(&entry->list);
362 list_add_tail(&entry->list, &ctx->hw_submitted);
363 ctx->num_hw_submitted++;
364 }
365
366}
367
368
369
370
371
372
373
374
375
376
377
378
379static void vmw_cmdbuf_ctx_process(struct vmw_cmdbuf_man *man,
380 struct vmw_cmdbuf_context *ctx,
381 int *notempty)
382{
383 struct vmw_cmdbuf_header *entry, *next;
384
385 vmw_cmdbuf_ctx_submit(man, ctx);
386
387 list_for_each_entry_safe(entry, next, &ctx->hw_submitted, list) {
388 SVGACBStatus status = entry->cb_header->status;
389
390 if (status == SVGA_CB_STATUS_NONE)
391 break;
392
393 list_del(&entry->list);
394 wake_up_all(&man->idle_queue);
395 ctx->num_hw_submitted--;
396 switch (status) {
397 case SVGA_CB_STATUS_COMPLETED:
398 __vmw_cmdbuf_header_free(entry);
399 break;
400 case SVGA_CB_STATUS_COMMAND_ERROR:
401 WARN_ONCE(true, "Command buffer error.\n");
402 entry->cb_header->status = SVGA_CB_STATUS_NONE;
403 list_add_tail(&entry->list, &man->error);
404 schedule_work(&man->work);
405 break;
406 case SVGA_CB_STATUS_PREEMPTED:
407 entry->cb_header->status = SVGA_CB_STATUS_NONE;
408 list_add_tail(&entry->list, &ctx->preempted);
409 break;
410 case SVGA_CB_STATUS_CB_HEADER_ERROR:
411 WARN_ONCE(true, "Command buffer header error.\n");
412 __vmw_cmdbuf_header_free(entry);
413 break;
414 default:
415 WARN_ONCE(true, "Undefined command buffer status.\n");
416 __vmw_cmdbuf_header_free(entry);
417 break;
418 }
419 }
420
421 vmw_cmdbuf_ctx_submit(man, ctx);
422 if (!list_empty(&ctx->submitted))
423 (*notempty)++;
424}
425
426
427
428
429
430
431
432
433
434
435
436static void vmw_cmdbuf_man_process(struct vmw_cmdbuf_man *man)
437{
438 int notempty;
439 struct vmw_cmdbuf_context *ctx;
440 int i;
441
442retry:
443 notempty = 0;
444 for_each_cmdbuf_ctx(man, i, ctx)
445 vmw_cmdbuf_ctx_process(man, ctx, ¬empty);
446
447 if (man->irq_on && !notempty) {
448 vmw_generic_waiter_remove(man->dev_priv,
449 SVGA_IRQFLAG_COMMAND_BUFFER,
450 &man->dev_priv->cmdbuf_waiters);
451 man->irq_on = false;
452 } else if (!man->irq_on && notempty) {
453 vmw_generic_waiter_add(man->dev_priv,
454 SVGA_IRQFLAG_COMMAND_BUFFER,
455 &man->dev_priv->cmdbuf_waiters);
456 man->irq_on = true;
457
458
459 goto retry;
460 }
461}
462
463
464
465
466
467
468
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470
471
472
473
474
475
476static void vmw_cmdbuf_ctx_add(struct vmw_cmdbuf_man *man,
477 struct vmw_cmdbuf_header *header,
478 SVGACBContext cb_context)
479{
480 if (!(header->cb_header->flags & SVGA_CB_FLAG_DX_CONTEXT))
481 header->cb_header->dxContext = 0;
482 header->cb_context = cb_context;
483 list_add_tail(&header->list, &man->ctx[cb_context].submitted);
484
485 vmw_cmdbuf_man_process(man);
486}
487
488
489
490
491
492
493
494
495
496
497
498void vmw_cmdbuf_irqthread(struct vmw_cmdbuf_man *man)
499{
500 spin_lock(&man->lock);
501 vmw_cmdbuf_man_process(man);
502 spin_unlock(&man->lock);
503}
504
505
506
507
508
509
510
511
512
513
514static void vmw_cmdbuf_work_func(struct work_struct *work)
515{
516 struct vmw_cmdbuf_man *man =
517 container_of(work, struct vmw_cmdbuf_man, work);
518 struct vmw_cmdbuf_header *entry, *next;
519 uint32_t dummy;
520 bool send_fence = false;
521 struct list_head restart_head[SVGA_CB_CONTEXT_MAX];
522 int i;
523 struct vmw_cmdbuf_context *ctx;
524 bool global_block = false;
525
526 for_each_cmdbuf_ctx(man, i, ctx)
527 INIT_LIST_HEAD(&restart_head[i]);
528
529 mutex_lock(&man->error_mutex);
530 spin_lock(&man->lock);
531 list_for_each_entry_safe(entry, next, &man->error, list) {
532 SVGACBHeader *cb_hdr = entry->cb_header;
533 SVGA3dCmdHeader *header = (SVGA3dCmdHeader *)
534 (entry->cmd + cb_hdr->errorOffset);
535 u32 error_cmd_size, new_start_offset;
536 const char *cmd_name;
537
538 list_del_init(&entry->list);
539 global_block = true;
540
541 if (!vmw_cmd_describe(header, &error_cmd_size, &cmd_name)) {
542 VMW_DEBUG_USER("Unknown command causing device error.\n");
543 VMW_DEBUG_USER("Command buffer offset is %lu\n",
544 (unsigned long) cb_hdr->errorOffset);
545 __vmw_cmdbuf_header_free(entry);
546 send_fence = true;
547 continue;
548 }
549
550 VMW_DEBUG_USER("Command \"%s\" causing device error.\n",
551 cmd_name);
552 VMW_DEBUG_USER("Command buffer offset is %lu\n",
553 (unsigned long) cb_hdr->errorOffset);
554 VMW_DEBUG_USER("Command size is %lu\n",
555 (unsigned long) error_cmd_size);
556
557 new_start_offset = cb_hdr->errorOffset + error_cmd_size;
558
559 if (new_start_offset >= cb_hdr->length) {
560 __vmw_cmdbuf_header_free(entry);
561 send_fence = true;
562 continue;
563 }
564
565 if (man->using_mob)
566 cb_hdr->ptr.mob.mobOffset += new_start_offset;
567 else
568 cb_hdr->ptr.pa += (u64) new_start_offset;
569
570 entry->cmd += new_start_offset;
571 cb_hdr->length -= new_start_offset;
572 cb_hdr->errorOffset = 0;
573 cb_hdr->offset = 0;
574
575 list_add_tail(&entry->list, &restart_head[entry->cb_context]);
576 }
577
578 for_each_cmdbuf_ctx(man, i, ctx)
579 man->ctx[i].block_submission = true;
580
581 spin_unlock(&man->lock);
582
583
584 if (global_block && vmw_cmdbuf_preempt(man, 0))
585 DRM_ERROR("Failed preempting command buffer contexts\n");
586
587 spin_lock(&man->lock);
588 for_each_cmdbuf_ctx(man, i, ctx) {
589
590 vmw_cmdbuf_ctx_process(man, ctx, &dummy);
591
592
593
594
595
596 list_splice_init(&ctx->preempted, restart_head[i].prev);
597
598
599
600
601
602
603 ctx->block_submission = false;
604 list_splice_init(&restart_head[i], &ctx->submitted);
605 }
606
607 vmw_cmdbuf_man_process(man);
608 spin_unlock(&man->lock);
609
610 if (global_block && vmw_cmdbuf_startstop(man, 0, true))
611 DRM_ERROR("Failed restarting command buffer contexts\n");
612
613
614 if (send_fence) {
615 vmw_cmd_send_fence(man->dev_priv, &dummy);
616 wake_up_all(&man->idle_queue);
617 }
618
619 mutex_unlock(&man->error_mutex);
620}
621
622
623
624
625
626
627
628
629static bool vmw_cmdbuf_man_idle(struct vmw_cmdbuf_man *man,
630 bool check_preempted)
631{
632 struct vmw_cmdbuf_context *ctx;
633 bool idle = false;
634 int i;
635
636 spin_lock(&man->lock);
637 vmw_cmdbuf_man_process(man);
638 for_each_cmdbuf_ctx(man, i, ctx) {
639 if (!list_empty(&ctx->submitted) ||
640 !list_empty(&ctx->hw_submitted) ||
641 (check_preempted && !list_empty(&ctx->preempted)))
642 goto out_unlock;
643 }
644
645 idle = list_empty(&man->error);
646
647out_unlock:
648 spin_unlock(&man->lock);
649
650 return idle;
651}
652
653
654
655
656
657
658
659
660
661
662static void __vmw_cmdbuf_cur_flush(struct vmw_cmdbuf_man *man)
663{
664 struct vmw_cmdbuf_header *cur = man->cur;
665
666 lockdep_assert_held_once(&man->cur_mutex);
667
668 if (!cur)
669 return;
670
671 spin_lock(&man->lock);
672 if (man->cur_pos == 0) {
673 __vmw_cmdbuf_header_free(cur);
674 goto out_unlock;
675 }
676
677 man->cur->cb_header->length = man->cur_pos;
678 vmw_cmdbuf_ctx_add(man, man->cur, SVGA_CB_CONTEXT_0);
679out_unlock:
680 spin_unlock(&man->lock);
681 man->cur = NULL;
682 man->cur_pos = 0;
683}
684
685
686
687
688
689
690
691
692
693
694
695int vmw_cmdbuf_cur_flush(struct vmw_cmdbuf_man *man,
696 bool interruptible)
697{
698 int ret = vmw_cmdbuf_cur_lock(man, interruptible);
699
700 if (ret)
701 return ret;
702
703 __vmw_cmdbuf_cur_flush(man);
704 vmw_cmdbuf_cur_unlock(man);
705
706 return 0;
707}
708
709
710
711
712
713
714
715
716
717
718
719
720int vmw_cmdbuf_idle(struct vmw_cmdbuf_man *man, bool interruptible,
721 unsigned long timeout)
722{
723 int ret;
724
725 ret = vmw_cmdbuf_cur_flush(man, interruptible);
726 vmw_generic_waiter_add(man->dev_priv,
727 SVGA_IRQFLAG_COMMAND_BUFFER,
728 &man->dev_priv->cmdbuf_waiters);
729
730 if (interruptible) {
731 ret = wait_event_interruptible_timeout
732 (man->idle_queue, vmw_cmdbuf_man_idle(man, true),
733 timeout);
734 } else {
735 ret = wait_event_timeout
736 (man->idle_queue, vmw_cmdbuf_man_idle(man, true),
737 timeout);
738 }
739 vmw_generic_waiter_remove(man->dev_priv,
740 SVGA_IRQFLAG_COMMAND_BUFFER,
741 &man->dev_priv->cmdbuf_waiters);
742 if (ret == 0) {
743 if (!vmw_cmdbuf_man_idle(man, true))
744 ret = -EBUSY;
745 else
746 ret = 0;
747 }
748 if (ret > 0)
749 ret = 0;
750
751 return ret;
752}
753
754
755
756
757
758
759
760
761
762
763
764static bool vmw_cmdbuf_try_alloc(struct vmw_cmdbuf_man *man,
765 struct vmw_cmdbuf_alloc_info *info)
766{
767 int ret;
768
769 if (info->done)
770 return true;
771
772 memset(info->node, 0, sizeof(*info->node));
773 spin_lock(&man->lock);
774 ret = drm_mm_insert_node(&man->mm, info->node, info->page_size);
775 if (ret) {
776 vmw_cmdbuf_man_process(man);
777 ret = drm_mm_insert_node(&man->mm, info->node, info->page_size);
778 }
779
780 spin_unlock(&man->lock);
781 info->done = !ret;
782
783 return info->done;
784}
785
786
787
788
789
790
791
792
793
794
795
796
797
798static int vmw_cmdbuf_alloc_space(struct vmw_cmdbuf_man *man,
799 struct drm_mm_node *node,
800 size_t size,
801 bool interruptible)
802{
803 struct vmw_cmdbuf_alloc_info info;
804
805 info.page_size = PAGE_ALIGN(size) >> PAGE_SHIFT;
806 info.node = node;
807 info.done = false;
808
809
810
811
812
813 if (interruptible) {
814 if (mutex_lock_interruptible(&man->space_mutex))
815 return -ERESTARTSYS;
816 } else {
817 mutex_lock(&man->space_mutex);
818 }
819
820
821 if (vmw_cmdbuf_try_alloc(man, &info))
822 goto out_unlock;
823
824 vmw_generic_waiter_add(man->dev_priv,
825 SVGA_IRQFLAG_COMMAND_BUFFER,
826 &man->dev_priv->cmdbuf_waiters);
827
828 if (interruptible) {
829 int ret;
830
831 ret = wait_event_interruptible
832 (man->alloc_queue, vmw_cmdbuf_try_alloc(man, &info));
833 if (ret) {
834 vmw_generic_waiter_remove
835 (man->dev_priv, SVGA_IRQFLAG_COMMAND_BUFFER,
836 &man->dev_priv->cmdbuf_waiters);
837 mutex_unlock(&man->space_mutex);
838 return ret;
839 }
840 } else {
841 wait_event(man->alloc_queue, vmw_cmdbuf_try_alloc(man, &info));
842 }
843 vmw_generic_waiter_remove(man->dev_priv,
844 SVGA_IRQFLAG_COMMAND_BUFFER,
845 &man->dev_priv->cmdbuf_waiters);
846
847out_unlock:
848 mutex_unlock(&man->space_mutex);
849
850 return 0;
851}
852
853
854
855
856
857
858
859
860
861
862static int vmw_cmdbuf_space_pool(struct vmw_cmdbuf_man *man,
863 struct vmw_cmdbuf_header *header,
864 size_t size,
865 bool interruptible)
866{
867 SVGACBHeader *cb_hdr;
868 size_t offset;
869 int ret;
870
871 if (!man->has_pool)
872 return -ENOMEM;
873
874 ret = vmw_cmdbuf_alloc_space(man, &header->node, size, interruptible);
875
876 if (ret)
877 return ret;
878
879 header->cb_header = dma_pool_zalloc(man->headers, GFP_KERNEL,
880 &header->handle);
881 if (!header->cb_header) {
882 ret = -ENOMEM;
883 goto out_no_cb_header;
884 }
885
886 header->size = header->node.size << PAGE_SHIFT;
887 cb_hdr = header->cb_header;
888 offset = header->node.start << PAGE_SHIFT;
889 header->cmd = man->map + offset;
890 if (man->using_mob) {
891 cb_hdr->flags = SVGA_CB_FLAG_MOB;
892 cb_hdr->ptr.mob.mobid = man->cmd_space->resource->start;
893 cb_hdr->ptr.mob.mobOffset = offset;
894 } else {
895 cb_hdr->ptr.pa = (u64)man->handle + (u64)offset;
896 }
897
898 return 0;
899
900out_no_cb_header:
901 spin_lock(&man->lock);
902 drm_mm_remove_node(&header->node);
903 spin_unlock(&man->lock);
904
905 return ret;
906}
907
908
909
910
911
912
913
914
915
916static int vmw_cmdbuf_space_inline(struct vmw_cmdbuf_man *man,
917 struct vmw_cmdbuf_header *header,
918 int size)
919{
920 struct vmw_cmdbuf_dheader *dheader;
921 SVGACBHeader *cb_hdr;
922
923 if (WARN_ON_ONCE(size > VMW_CMDBUF_INLINE_SIZE))
924 return -ENOMEM;
925
926 dheader = dma_pool_zalloc(man->dheaders, GFP_KERNEL,
927 &header->handle);
928 if (!dheader)
929 return -ENOMEM;
930
931 header->inline_space = true;
932 header->size = VMW_CMDBUF_INLINE_SIZE;
933 cb_hdr = &dheader->cb_header;
934 header->cb_header = cb_hdr;
935 header->cmd = dheader->cmd;
936 cb_hdr->status = SVGA_CB_STATUS_NONE;
937 cb_hdr->flags = SVGA_CB_FLAG_NONE;
938 cb_hdr->ptr.pa = (u64)header->handle +
939 (u64)offsetof(struct vmw_cmdbuf_dheader, cmd);
940
941 return 0;
942}
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957void *vmw_cmdbuf_alloc(struct vmw_cmdbuf_man *man,
958 size_t size, bool interruptible,
959 struct vmw_cmdbuf_header **p_header)
960{
961 struct vmw_cmdbuf_header *header;
962 int ret = 0;
963
964 *p_header = NULL;
965
966 header = kzalloc(sizeof(*header), GFP_KERNEL);
967 if (!header)
968 return ERR_PTR(-ENOMEM);
969
970 if (size <= VMW_CMDBUF_INLINE_SIZE)
971 ret = vmw_cmdbuf_space_inline(man, header, size);
972 else
973 ret = vmw_cmdbuf_space_pool(man, header, size, interruptible);
974
975 if (ret) {
976 kfree(header);
977 return ERR_PTR(ret);
978 }
979
980 header->man = man;
981 INIT_LIST_HEAD(&header->list);
982 header->cb_header->status = SVGA_CB_STATUS_NONE;
983 *p_header = header;
984
985 return header->cmd;
986}
987
988
989
990
991
992
993
994
995
996
997
998
999
1000static void *vmw_cmdbuf_reserve_cur(struct vmw_cmdbuf_man *man,
1001 size_t size,
1002 int ctx_id,
1003 bool interruptible)
1004{
1005 struct vmw_cmdbuf_header *cur;
1006 void *ret;
1007
1008 if (vmw_cmdbuf_cur_lock(man, interruptible))
1009 return ERR_PTR(-ERESTARTSYS);
1010
1011 cur = man->cur;
1012 if (cur && (size + man->cur_pos > cur->size ||
1013 ((cur->cb_header->flags & SVGA_CB_FLAG_DX_CONTEXT) &&
1014 ctx_id != cur->cb_header->dxContext)))
1015 __vmw_cmdbuf_cur_flush(man);
1016
1017 if (!man->cur) {
1018 ret = vmw_cmdbuf_alloc(man,
1019 max_t(size_t, size, man->default_size),
1020 interruptible, &man->cur);
1021 if (IS_ERR(ret)) {
1022 vmw_cmdbuf_cur_unlock(man);
1023 return ret;
1024 }
1025
1026 cur = man->cur;
1027 }
1028
1029 if (ctx_id != SVGA3D_INVALID_ID) {
1030 cur->cb_header->flags |= SVGA_CB_FLAG_DX_CONTEXT;
1031 cur->cb_header->dxContext = ctx_id;
1032 }
1033
1034 cur->reserved = size;
1035
1036 return (void *) (man->cur->cmd + man->cur_pos);
1037}
1038
1039
1040
1041
1042
1043
1044
1045
1046static void vmw_cmdbuf_commit_cur(struct vmw_cmdbuf_man *man,
1047 size_t size, bool flush)
1048{
1049 struct vmw_cmdbuf_header *cur = man->cur;
1050
1051 lockdep_assert_held_once(&man->cur_mutex);
1052
1053 WARN_ON(size > cur->reserved);
1054 man->cur_pos += size;
1055 if (!size)
1056 cur->cb_header->flags &= ~SVGA_CB_FLAG_DX_CONTEXT;
1057 if (flush)
1058 __vmw_cmdbuf_cur_flush(man);
1059 vmw_cmdbuf_cur_unlock(man);
1060}
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075void *vmw_cmdbuf_reserve(struct vmw_cmdbuf_man *man, size_t size,
1076 int ctx_id, bool interruptible,
1077 struct vmw_cmdbuf_header *header)
1078{
1079 if (!header)
1080 return vmw_cmdbuf_reserve_cur(man, size, ctx_id, interruptible);
1081
1082 if (size > header->size)
1083 return ERR_PTR(-EINVAL);
1084
1085 if (ctx_id != SVGA3D_INVALID_ID) {
1086 header->cb_header->flags |= SVGA_CB_FLAG_DX_CONTEXT;
1087 header->cb_header->dxContext = ctx_id;
1088 }
1089
1090 header->reserved = size;
1091 return header->cmd;
1092}
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103void vmw_cmdbuf_commit(struct vmw_cmdbuf_man *man, size_t size,
1104 struct vmw_cmdbuf_header *header, bool flush)
1105{
1106 if (!header) {
1107 vmw_cmdbuf_commit_cur(man, size, flush);
1108 return;
1109 }
1110
1111 (void) vmw_cmdbuf_cur_lock(man, false);
1112 __vmw_cmdbuf_cur_flush(man);
1113 WARN_ON(size > header->reserved);
1114 man->cur = header;
1115 man->cur_pos = size;
1116 if (!size)
1117 header->cb_header->flags &= ~SVGA_CB_FLAG_DX_CONTEXT;
1118 if (flush)
1119 __vmw_cmdbuf_cur_flush(man);
1120 vmw_cmdbuf_cur_unlock(man);
1121}
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133static int vmw_cmdbuf_send_device_command(struct vmw_cmdbuf_man *man,
1134 const void *command,
1135 size_t size)
1136{
1137 struct vmw_cmdbuf_header *header;
1138 int status;
1139 void *cmd = vmw_cmdbuf_alloc(man, size, false, &header);
1140
1141 if (IS_ERR(cmd))
1142 return PTR_ERR(cmd);
1143
1144 memcpy(cmd, command, size);
1145 header->cb_header->length = size;
1146 header->cb_context = SVGA_CB_CONTEXT_DEVICE;
1147 spin_lock(&man->lock);
1148 status = vmw_cmdbuf_header_submit(header);
1149 spin_unlock(&man->lock);
1150 vmw_cmdbuf_header_free(header);
1151
1152 if (status != SVGA_CB_STATUS_COMPLETED) {
1153 DRM_ERROR("Device context command failed with status %d\n",
1154 status);
1155 return -EINVAL;
1156 }
1157
1158 return 0;
1159}
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170static int vmw_cmdbuf_preempt(struct vmw_cmdbuf_man *man, u32 context)
1171{
1172 struct {
1173 uint32 id;
1174 SVGADCCmdPreempt body;
1175 } __packed cmd;
1176
1177 cmd.id = SVGA_DC_CMD_PREEMPT;
1178 cmd.body.context = SVGA_CB_CONTEXT_0 + context;
1179 cmd.body.ignoreIDZero = 0;
1180
1181 return vmw_cmdbuf_send_device_command(man, &cmd, sizeof(cmd));
1182}
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195static int vmw_cmdbuf_startstop(struct vmw_cmdbuf_man *man, u32 context,
1196 bool enable)
1197{
1198 struct {
1199 uint32 id;
1200 SVGADCCmdStartStop body;
1201 } __packed cmd;
1202
1203 cmd.id = SVGA_DC_CMD_START_STOP_CONTEXT;
1204 cmd.body.enable = (enable) ? 1 : 0;
1205 cmd.body.context = SVGA_CB_CONTEXT_0 + context;
1206
1207 return vmw_cmdbuf_send_device_command(man, &cmd, sizeof(cmd));
1208}
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222int vmw_cmdbuf_set_pool_size(struct vmw_cmdbuf_man *man, size_t size)
1223{
1224 struct vmw_private *dev_priv = man->dev_priv;
1225 bool dummy;
1226 int ret;
1227
1228 if (man->has_pool)
1229 return -EINVAL;
1230
1231
1232 size = PAGE_ALIGN(size);
1233 man->map = dma_alloc_coherent(dev_priv->drm.dev, size,
1234 &man->handle, GFP_KERNEL);
1235 if (man->map) {
1236 man->using_mob = false;
1237 } else {
1238
1239
1240
1241
1242
1243
1244 if (!(dev_priv->capabilities & SVGA_CAP_DX) ||
1245 !dev_priv->has_mob)
1246 return -ENOMEM;
1247
1248 ret = vmw_bo_create_kernel(dev_priv, size,
1249 &vmw_mob_placement,
1250 &man->cmd_space);
1251 if (ret)
1252 return ret;
1253
1254 man->using_mob = true;
1255 ret = ttm_bo_kmap(man->cmd_space, 0, size >> PAGE_SHIFT,
1256 &man->map_obj);
1257 if (ret)
1258 goto out_no_map;
1259
1260 man->map = ttm_kmap_obj_virtual(&man->map_obj, &dummy);
1261 }
1262
1263 man->size = size;
1264 drm_mm_init(&man->mm, 0, size >> PAGE_SHIFT);
1265
1266 man->has_pool = true;
1267
1268
1269
1270
1271
1272
1273
1274 man->default_size = VMW_CMDBUF_INLINE_SIZE;
1275 DRM_INFO("Using command buffers with %s pool.\n",
1276 (man->using_mob) ? "MOB" : "DMA");
1277
1278 return 0;
1279
1280out_no_map:
1281 if (man->using_mob) {
1282 ttm_bo_put(man->cmd_space);
1283 man->cmd_space = NULL;
1284 }
1285
1286 return ret;
1287}
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299struct vmw_cmdbuf_man *vmw_cmdbuf_man_create(struct vmw_private *dev_priv)
1300{
1301 struct vmw_cmdbuf_man *man;
1302 struct vmw_cmdbuf_context *ctx;
1303 unsigned int i;
1304 int ret;
1305
1306 if (!(dev_priv->capabilities & SVGA_CAP_COMMAND_BUFFERS))
1307 return ERR_PTR(-ENOSYS);
1308
1309 man = kzalloc(sizeof(*man), GFP_KERNEL);
1310 if (!man)
1311 return ERR_PTR(-ENOMEM);
1312
1313 man->num_contexts = (dev_priv->capabilities & SVGA_CAP_HP_CMD_QUEUE) ?
1314 2 : 1;
1315 man->headers = dma_pool_create("vmwgfx cmdbuf",
1316 dev_priv->drm.dev,
1317 sizeof(SVGACBHeader),
1318 64, PAGE_SIZE);
1319 if (!man->headers) {
1320 ret = -ENOMEM;
1321 goto out_no_pool;
1322 }
1323
1324 man->dheaders = dma_pool_create("vmwgfx inline cmdbuf",
1325 dev_priv->drm.dev,
1326 sizeof(struct vmw_cmdbuf_dheader),
1327 64, PAGE_SIZE);
1328 if (!man->dheaders) {
1329 ret = -ENOMEM;
1330 goto out_no_dpool;
1331 }
1332
1333 for_each_cmdbuf_ctx(man, i, ctx)
1334 vmw_cmdbuf_ctx_init(ctx);
1335
1336 INIT_LIST_HEAD(&man->error);
1337 spin_lock_init(&man->lock);
1338 mutex_init(&man->cur_mutex);
1339 mutex_init(&man->space_mutex);
1340 mutex_init(&man->error_mutex);
1341 man->default_size = VMW_CMDBUF_INLINE_SIZE;
1342 init_waitqueue_head(&man->alloc_queue);
1343 init_waitqueue_head(&man->idle_queue);
1344 man->dev_priv = dev_priv;
1345 man->max_hw_submitted = SVGA_CB_MAX_QUEUED_PER_CONTEXT - 1;
1346 INIT_WORK(&man->work, &vmw_cmdbuf_work_func);
1347 vmw_generic_waiter_add(dev_priv, SVGA_IRQFLAG_ERROR,
1348 &dev_priv->error_waiters);
1349 ret = vmw_cmdbuf_startstop(man, 0, true);
1350 if (ret) {
1351 DRM_ERROR("Failed starting command buffer contexts\n");
1352 vmw_cmdbuf_man_destroy(man);
1353 return ERR_PTR(ret);
1354 }
1355
1356 return man;
1357
1358out_no_dpool:
1359 dma_pool_destroy(man->headers);
1360out_no_pool:
1361 kfree(man);
1362
1363 return ERR_PTR(ret);
1364}
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377void vmw_cmdbuf_remove_pool(struct vmw_cmdbuf_man *man)
1378{
1379 if (!man->has_pool)
1380 return;
1381
1382 man->has_pool = false;
1383 man->default_size = VMW_CMDBUF_INLINE_SIZE;
1384 (void) vmw_cmdbuf_idle(man, false, 10*HZ);
1385 if (man->using_mob) {
1386 (void) ttm_bo_kunmap(&man->map_obj);
1387 ttm_bo_put(man->cmd_space);
1388 man->cmd_space = NULL;
1389 } else {
1390 dma_free_coherent(man->dev_priv->drm.dev,
1391 man->size, man->map, man->handle);
1392 }
1393}
1394
1395
1396
1397
1398
1399
1400
1401
1402void vmw_cmdbuf_man_destroy(struct vmw_cmdbuf_man *man)
1403{
1404 WARN_ON_ONCE(man->has_pool);
1405 (void) vmw_cmdbuf_idle(man, false, 10*HZ);
1406
1407 if (vmw_cmdbuf_startstop(man, 0, false))
1408 DRM_ERROR("Failed stopping command buffer contexts.\n");
1409
1410 vmw_generic_waiter_remove(man->dev_priv, SVGA_IRQFLAG_ERROR,
1411 &man->dev_priv->error_waiters);
1412 (void) cancel_work_sync(&man->work);
1413 dma_pool_destroy(man->dheaders);
1414 dma_pool_destroy(man->headers);
1415 mutex_destroy(&man->cur_mutex);
1416 mutex_destroy(&man->space_mutex);
1417 mutex_destroy(&man->error_mutex);
1418 kfree(man);
1419}
1420