linux/drivers/counter/104-quad-8.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Counter driver for the ACCES 104-QUAD-8
   4 * Copyright (C) 2016 William Breathitt Gray
   5 *
   6 * This driver supports the ACCES 104-QUAD-8 and ACCES 104-QUAD-4.
   7 */
   8#include <linux/bitops.h>
   9#include <linux/counter.h>
  10#include <linux/device.h>
  11#include <linux/errno.h>
  12#include <linux/io.h>
  13#include <linux/ioport.h>
  14#include <linux/isa.h>
  15#include <linux/kernel.h>
  16#include <linux/module.h>
  17#include <linux/moduleparam.h>
  18#include <linux/types.h>
  19
  20#define QUAD8_EXTENT 32
  21
  22static unsigned int base[max_num_isa_dev(QUAD8_EXTENT)];
  23static unsigned int num_quad8;
  24module_param_hw_array(base, uint, ioport, &num_quad8, 0);
  25MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses");
  26
  27#define QUAD8_NUM_COUNTERS 8
  28
  29/**
  30 * struct quad8 - device private data structure
  31 * @counter:            instance of the counter_device
  32 * @fck_prescaler:      array of filter clock prescaler configurations
  33 * @preset:             array of preset values
  34 * @count_mode:         array of count mode configurations
  35 * @quadrature_mode:    array of quadrature mode configurations
  36 * @quadrature_scale:   array of quadrature mode scale configurations
  37 * @ab_enable:          array of A and B inputs enable configurations
  38 * @preset_enable:      array of set_to_preset_on_index attribute configurations
  39 * @synchronous_mode:   array of index function synchronous mode configurations
  40 * @index_polarity:     array of index function polarity configurations
  41 * @cable_fault_enable: differential encoder cable status enable configurations
  42 * @base:               base port address of the device
  43 */
  44struct quad8 {
  45        struct mutex lock;
  46        struct counter_device counter;
  47        unsigned int fck_prescaler[QUAD8_NUM_COUNTERS];
  48        unsigned int preset[QUAD8_NUM_COUNTERS];
  49        unsigned int count_mode[QUAD8_NUM_COUNTERS];
  50        unsigned int quadrature_mode[QUAD8_NUM_COUNTERS];
  51        unsigned int quadrature_scale[QUAD8_NUM_COUNTERS];
  52        unsigned int ab_enable[QUAD8_NUM_COUNTERS];
  53        unsigned int preset_enable[QUAD8_NUM_COUNTERS];
  54        unsigned int synchronous_mode[QUAD8_NUM_COUNTERS];
  55        unsigned int index_polarity[QUAD8_NUM_COUNTERS];
  56        unsigned int cable_fault_enable;
  57        unsigned int base;
  58};
  59
  60#define QUAD8_REG_CHAN_OP 0x11
  61#define QUAD8_REG_INDEX_INPUT_LEVELS 0x16
  62#define QUAD8_DIFF_ENCODER_CABLE_STATUS 0x17
  63/* Borrow Toggle flip-flop */
  64#define QUAD8_FLAG_BT BIT(0)
  65/* Carry Toggle flip-flop */
  66#define QUAD8_FLAG_CT BIT(1)
  67/* Error flag */
  68#define QUAD8_FLAG_E BIT(4)
  69/* Up/Down flag */
  70#define QUAD8_FLAG_UD BIT(5)
  71/* Reset and Load Signal Decoders */
  72#define QUAD8_CTR_RLD 0x00
  73/* Counter Mode Register */
  74#define QUAD8_CTR_CMR 0x20
  75/* Input / Output Control Register */
  76#define QUAD8_CTR_IOR 0x40
  77/* Index Control Register */
  78#define QUAD8_CTR_IDR 0x60
  79/* Reset Byte Pointer (three byte data pointer) */
  80#define QUAD8_RLD_RESET_BP 0x01
  81/* Reset Counter */
  82#define QUAD8_RLD_RESET_CNTR 0x02
  83/* Reset Borrow Toggle, Carry Toggle, Compare Toggle, and Sign flags */
  84#define QUAD8_RLD_RESET_FLAGS 0x04
  85/* Reset Error flag */
  86#define QUAD8_RLD_RESET_E 0x06
  87/* Preset Register to Counter */
  88#define QUAD8_RLD_PRESET_CNTR 0x08
  89/* Transfer Counter to Output Latch */
  90#define QUAD8_RLD_CNTR_OUT 0x10
  91/* Transfer Preset Register LSB to FCK Prescaler */
  92#define QUAD8_RLD_PRESET_PSC 0x18
  93#define QUAD8_CHAN_OP_ENABLE_COUNTERS 0x00
  94#define QUAD8_CHAN_OP_RESET_COUNTERS 0x01
  95#define QUAD8_CMR_QUADRATURE_X1 0x08
  96#define QUAD8_CMR_QUADRATURE_X2 0x10
  97#define QUAD8_CMR_QUADRATURE_X4 0x18
  98
  99static int quad8_signal_read(struct counter_device *counter,
 100        struct counter_signal *signal, enum counter_signal_value *val)
 101{
 102        const struct quad8 *const priv = counter->priv;
 103        unsigned int state;
 104
 105        /* Only Index signal levels can be read */
 106        if (signal->id < 16)
 107                return -EINVAL;
 108
 109        state = inb(priv->base + QUAD8_REG_INDEX_INPUT_LEVELS)
 110                & BIT(signal->id - 16);
 111
 112        *val = (state) ? COUNTER_SIGNAL_HIGH : COUNTER_SIGNAL_LOW;
 113
 114        return 0;
 115}
 116
 117static int quad8_count_read(struct counter_device *counter,
 118        struct counter_count *count, unsigned long *val)
 119{
 120        struct quad8 *const priv = counter->priv;
 121        const int base_offset = priv->base + 2 * count->id;
 122        unsigned int flags;
 123        unsigned int borrow;
 124        unsigned int carry;
 125        int i;
 126
 127        flags = inb(base_offset + 1);
 128        borrow = flags & QUAD8_FLAG_BT;
 129        carry = !!(flags & QUAD8_FLAG_CT);
 130
 131        /* Borrow XOR Carry effectively doubles count range */
 132        *val = (unsigned long)(borrow ^ carry) << 24;
 133
 134        mutex_lock(&priv->lock);
 135
 136        /* Reset Byte Pointer; transfer Counter to Output Latch */
 137        outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_CNTR_OUT,
 138             base_offset + 1);
 139
 140        for (i = 0; i < 3; i++)
 141                *val |= (unsigned long)inb(base_offset) << (8 * i);
 142
 143        mutex_unlock(&priv->lock);
 144
 145        return 0;
 146}
 147
 148static int quad8_count_write(struct counter_device *counter,
 149        struct counter_count *count, unsigned long val)
 150{
 151        struct quad8 *const priv = counter->priv;
 152        const int base_offset = priv->base + 2 * count->id;
 153        int i;
 154
 155        /* Only 24-bit values are supported */
 156        if (val > 0xFFFFFF)
 157                return -EINVAL;
 158
 159        mutex_lock(&priv->lock);
 160
 161        /* Reset Byte Pointer */
 162        outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
 163
 164        /* Counter can only be set via Preset Register */
 165        for (i = 0; i < 3; i++)
 166                outb(val >> (8 * i), base_offset);
 167
 168        /* Transfer Preset Register to Counter */
 169        outb(QUAD8_CTR_RLD | QUAD8_RLD_PRESET_CNTR, base_offset + 1);
 170
 171        /* Reset Byte Pointer */
 172        outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
 173
 174        /* Set Preset Register back to original value */
 175        val = priv->preset[count->id];
 176        for (i = 0; i < 3; i++)
 177                outb(val >> (8 * i), base_offset);
 178
 179        /* Reset Borrow, Carry, Compare, and Sign flags */
 180        outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_FLAGS, base_offset + 1);
 181        /* Reset Error flag */
 182        outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_E, base_offset + 1);
 183
 184        mutex_unlock(&priv->lock);
 185
 186        return 0;
 187}
 188
 189enum quad8_count_function {
 190        QUAD8_COUNT_FUNCTION_PULSE_DIRECTION = 0,
 191        QUAD8_COUNT_FUNCTION_QUADRATURE_X1,
 192        QUAD8_COUNT_FUNCTION_QUADRATURE_X2,
 193        QUAD8_COUNT_FUNCTION_QUADRATURE_X4
 194};
 195
 196static const enum counter_count_function quad8_count_functions_list[] = {
 197        [QUAD8_COUNT_FUNCTION_PULSE_DIRECTION] = COUNTER_COUNT_FUNCTION_PULSE_DIRECTION,
 198        [QUAD8_COUNT_FUNCTION_QUADRATURE_X1] = COUNTER_COUNT_FUNCTION_QUADRATURE_X1_A,
 199        [QUAD8_COUNT_FUNCTION_QUADRATURE_X2] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_A,
 200        [QUAD8_COUNT_FUNCTION_QUADRATURE_X4] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4
 201};
 202
 203static int quad8_function_get(struct counter_device *counter,
 204        struct counter_count *count, size_t *function)
 205{
 206        struct quad8 *const priv = counter->priv;
 207        const int id = count->id;
 208
 209        mutex_lock(&priv->lock);
 210
 211        if (priv->quadrature_mode[id])
 212                switch (priv->quadrature_scale[id]) {
 213                case 0:
 214                        *function = QUAD8_COUNT_FUNCTION_QUADRATURE_X1;
 215                        break;
 216                case 1:
 217                        *function = QUAD8_COUNT_FUNCTION_QUADRATURE_X2;
 218                        break;
 219                case 2:
 220                        *function = QUAD8_COUNT_FUNCTION_QUADRATURE_X4;
 221                        break;
 222                }
 223        else
 224                *function = QUAD8_COUNT_FUNCTION_PULSE_DIRECTION;
 225
 226        mutex_unlock(&priv->lock);
 227
 228        return 0;
 229}
 230
 231static int quad8_function_set(struct counter_device *counter,
 232        struct counter_count *count, size_t function)
 233{
 234        struct quad8 *const priv = counter->priv;
 235        const int id = count->id;
 236        unsigned int *const quadrature_mode = priv->quadrature_mode + id;
 237        unsigned int *const scale = priv->quadrature_scale + id;
 238        unsigned int *const synchronous_mode = priv->synchronous_mode + id;
 239        const int base_offset = priv->base + 2 * id + 1;
 240        unsigned int mode_cfg;
 241        unsigned int idr_cfg;
 242
 243        mutex_lock(&priv->lock);
 244
 245        mode_cfg = priv->count_mode[id] << 1;
 246        idr_cfg = priv->index_polarity[id] << 1;
 247
 248        if (function == QUAD8_COUNT_FUNCTION_PULSE_DIRECTION) {
 249                *quadrature_mode = 0;
 250
 251                /* Quadrature scaling only available in quadrature mode */
 252                *scale = 0;
 253
 254                /* Synchronous function not supported in non-quadrature mode */
 255                if (*synchronous_mode) {
 256                        *synchronous_mode = 0;
 257                        /* Disable synchronous function mode */
 258                        outb(QUAD8_CTR_IDR | idr_cfg, base_offset);
 259                }
 260        } else {
 261                *quadrature_mode = 1;
 262
 263                switch (function) {
 264                case QUAD8_COUNT_FUNCTION_QUADRATURE_X1:
 265                        *scale = 0;
 266                        mode_cfg |= QUAD8_CMR_QUADRATURE_X1;
 267                        break;
 268                case QUAD8_COUNT_FUNCTION_QUADRATURE_X2:
 269                        *scale = 1;
 270                        mode_cfg |= QUAD8_CMR_QUADRATURE_X2;
 271                        break;
 272                case QUAD8_COUNT_FUNCTION_QUADRATURE_X4:
 273                        *scale = 2;
 274                        mode_cfg |= QUAD8_CMR_QUADRATURE_X4;
 275                        break;
 276                }
 277        }
 278
 279        /* Load mode configuration to Counter Mode Register */
 280        outb(QUAD8_CTR_CMR | mode_cfg, base_offset);
 281
 282        mutex_unlock(&priv->lock);
 283
 284        return 0;
 285}
 286
 287static void quad8_direction_get(struct counter_device *counter,
 288        struct counter_count *count, enum counter_count_direction *direction)
 289{
 290        const struct quad8 *const priv = counter->priv;
 291        unsigned int ud_flag;
 292        const unsigned int flag_addr = priv->base + 2 * count->id + 1;
 293
 294        /* U/D flag: nonzero = up, zero = down */
 295        ud_flag = inb(flag_addr) & QUAD8_FLAG_UD;
 296
 297        *direction = (ud_flag) ? COUNTER_COUNT_DIRECTION_FORWARD :
 298                COUNTER_COUNT_DIRECTION_BACKWARD;
 299}
 300
 301enum quad8_synapse_action {
 302        QUAD8_SYNAPSE_ACTION_NONE = 0,
 303        QUAD8_SYNAPSE_ACTION_RISING_EDGE,
 304        QUAD8_SYNAPSE_ACTION_FALLING_EDGE,
 305        QUAD8_SYNAPSE_ACTION_BOTH_EDGES
 306};
 307
 308static const enum counter_synapse_action quad8_index_actions_list[] = {
 309        [QUAD8_SYNAPSE_ACTION_NONE] = COUNTER_SYNAPSE_ACTION_NONE,
 310        [QUAD8_SYNAPSE_ACTION_RISING_EDGE] = COUNTER_SYNAPSE_ACTION_RISING_EDGE
 311};
 312
 313static const enum counter_synapse_action quad8_synapse_actions_list[] = {
 314        [QUAD8_SYNAPSE_ACTION_NONE] = COUNTER_SYNAPSE_ACTION_NONE,
 315        [QUAD8_SYNAPSE_ACTION_RISING_EDGE] = COUNTER_SYNAPSE_ACTION_RISING_EDGE,
 316        [QUAD8_SYNAPSE_ACTION_FALLING_EDGE] = COUNTER_SYNAPSE_ACTION_FALLING_EDGE,
 317        [QUAD8_SYNAPSE_ACTION_BOTH_EDGES] = COUNTER_SYNAPSE_ACTION_BOTH_EDGES
 318};
 319
 320static int quad8_action_get(struct counter_device *counter,
 321        struct counter_count *count, struct counter_synapse *synapse,
 322        size_t *action)
 323{
 324        struct quad8 *const priv = counter->priv;
 325        int err;
 326        size_t function = 0;
 327        const size_t signal_a_id = count->synapses[0].signal->id;
 328        enum counter_count_direction direction;
 329
 330        /* Handle Index signals */
 331        if (synapse->signal->id >= 16) {
 332                if (priv->preset_enable[count->id])
 333                        *action = QUAD8_SYNAPSE_ACTION_RISING_EDGE;
 334                else
 335                        *action = QUAD8_SYNAPSE_ACTION_NONE;
 336
 337                return 0;
 338        }
 339
 340        err = quad8_function_get(counter, count, &function);
 341        if (err)
 342                return err;
 343
 344        /* Default action mode */
 345        *action = QUAD8_SYNAPSE_ACTION_NONE;
 346
 347        /* Determine action mode based on current count function mode */
 348        switch (function) {
 349        case QUAD8_COUNT_FUNCTION_PULSE_DIRECTION:
 350                if (synapse->signal->id == signal_a_id)
 351                        *action = QUAD8_SYNAPSE_ACTION_RISING_EDGE;
 352                break;
 353        case QUAD8_COUNT_FUNCTION_QUADRATURE_X1:
 354                if (synapse->signal->id == signal_a_id) {
 355                        quad8_direction_get(counter, count, &direction);
 356
 357                        if (direction == COUNTER_COUNT_DIRECTION_FORWARD)
 358                                *action = QUAD8_SYNAPSE_ACTION_RISING_EDGE;
 359                        else
 360                                *action = QUAD8_SYNAPSE_ACTION_FALLING_EDGE;
 361                }
 362                break;
 363        case QUAD8_COUNT_FUNCTION_QUADRATURE_X2:
 364                if (synapse->signal->id == signal_a_id)
 365                        *action = QUAD8_SYNAPSE_ACTION_BOTH_EDGES;
 366                break;
 367        case QUAD8_COUNT_FUNCTION_QUADRATURE_X4:
 368                *action = QUAD8_SYNAPSE_ACTION_BOTH_EDGES;
 369                break;
 370        }
 371
 372        return 0;
 373}
 374
 375static const struct counter_ops quad8_ops = {
 376        .signal_read = quad8_signal_read,
 377        .count_read = quad8_count_read,
 378        .count_write = quad8_count_write,
 379        .function_get = quad8_function_get,
 380        .function_set = quad8_function_set,
 381        .action_get = quad8_action_get
 382};
 383
 384static const char *const quad8_index_polarity_modes[] = {
 385        "negative",
 386        "positive"
 387};
 388
 389static int quad8_index_polarity_get(struct counter_device *counter,
 390        struct counter_signal *signal, size_t *index_polarity)
 391{
 392        const struct quad8 *const priv = counter->priv;
 393        const size_t channel_id = signal->id - 16;
 394
 395        *index_polarity = priv->index_polarity[channel_id];
 396
 397        return 0;
 398}
 399
 400static int quad8_index_polarity_set(struct counter_device *counter,
 401        struct counter_signal *signal, size_t index_polarity)
 402{
 403        struct quad8 *const priv = counter->priv;
 404        const size_t channel_id = signal->id - 16;
 405        const int base_offset = priv->base + 2 * channel_id + 1;
 406        unsigned int idr_cfg = index_polarity << 1;
 407
 408        mutex_lock(&priv->lock);
 409
 410        idr_cfg |= priv->synchronous_mode[channel_id];
 411
 412        priv->index_polarity[channel_id] = index_polarity;
 413
 414        /* Load Index Control configuration to Index Control Register */
 415        outb(QUAD8_CTR_IDR | idr_cfg, base_offset);
 416
 417        mutex_unlock(&priv->lock);
 418
 419        return 0;
 420}
 421
 422static struct counter_signal_enum_ext quad8_index_pol_enum = {
 423        .items = quad8_index_polarity_modes,
 424        .num_items = ARRAY_SIZE(quad8_index_polarity_modes),
 425        .get = quad8_index_polarity_get,
 426        .set = quad8_index_polarity_set
 427};
 428
 429static const char *const quad8_synchronous_modes[] = {
 430        "non-synchronous",
 431        "synchronous"
 432};
 433
 434static int quad8_synchronous_mode_get(struct counter_device *counter,
 435        struct counter_signal *signal, size_t *synchronous_mode)
 436{
 437        const struct quad8 *const priv = counter->priv;
 438        const size_t channel_id = signal->id - 16;
 439
 440        *synchronous_mode = priv->synchronous_mode[channel_id];
 441
 442        return 0;
 443}
 444
 445static int quad8_synchronous_mode_set(struct counter_device *counter,
 446        struct counter_signal *signal, size_t synchronous_mode)
 447{
 448        struct quad8 *const priv = counter->priv;
 449        const size_t channel_id = signal->id - 16;
 450        const int base_offset = priv->base + 2 * channel_id + 1;
 451        unsigned int idr_cfg = synchronous_mode;
 452
 453        mutex_lock(&priv->lock);
 454
 455        idr_cfg |= priv->index_polarity[channel_id] << 1;
 456
 457        /* Index function must be non-synchronous in non-quadrature mode */
 458        if (synchronous_mode && !priv->quadrature_mode[channel_id]) {
 459                mutex_unlock(&priv->lock);
 460                return -EINVAL;
 461        }
 462
 463        priv->synchronous_mode[channel_id] = synchronous_mode;
 464
 465        /* Load Index Control configuration to Index Control Register */
 466        outb(QUAD8_CTR_IDR | idr_cfg, base_offset);
 467
 468        mutex_unlock(&priv->lock);
 469
 470        return 0;
 471}
 472
 473static struct counter_signal_enum_ext quad8_syn_mode_enum = {
 474        .items = quad8_synchronous_modes,
 475        .num_items = ARRAY_SIZE(quad8_synchronous_modes),
 476        .get = quad8_synchronous_mode_get,
 477        .set = quad8_synchronous_mode_set
 478};
 479
 480static ssize_t quad8_count_floor_read(struct counter_device *counter,
 481        struct counter_count *count, void *private, char *buf)
 482{
 483        /* Only a floor of 0 is supported */
 484        return sprintf(buf, "0\n");
 485}
 486
 487static int quad8_count_mode_get(struct counter_device *counter,
 488        struct counter_count *count, size_t *cnt_mode)
 489{
 490        const struct quad8 *const priv = counter->priv;
 491
 492        /* Map 104-QUAD-8 count mode to Generic Counter count mode */
 493        switch (priv->count_mode[count->id]) {
 494        case 0:
 495                *cnt_mode = COUNTER_COUNT_MODE_NORMAL;
 496                break;
 497        case 1:
 498                *cnt_mode = COUNTER_COUNT_MODE_RANGE_LIMIT;
 499                break;
 500        case 2:
 501                *cnt_mode = COUNTER_COUNT_MODE_NON_RECYCLE;
 502                break;
 503        case 3:
 504                *cnt_mode = COUNTER_COUNT_MODE_MODULO_N;
 505                break;
 506        }
 507
 508        return 0;
 509}
 510
 511static int quad8_count_mode_set(struct counter_device *counter,
 512        struct counter_count *count, size_t cnt_mode)
 513{
 514        struct quad8 *const priv = counter->priv;
 515        unsigned int mode_cfg;
 516        const int base_offset = priv->base + 2 * count->id + 1;
 517
 518        /* Map Generic Counter count mode to 104-QUAD-8 count mode */
 519        switch (cnt_mode) {
 520        case COUNTER_COUNT_MODE_NORMAL:
 521                cnt_mode = 0;
 522                break;
 523        case COUNTER_COUNT_MODE_RANGE_LIMIT:
 524                cnt_mode = 1;
 525                break;
 526        case COUNTER_COUNT_MODE_NON_RECYCLE:
 527                cnt_mode = 2;
 528                break;
 529        case COUNTER_COUNT_MODE_MODULO_N:
 530                cnt_mode = 3;
 531                break;
 532        }
 533
 534        mutex_lock(&priv->lock);
 535
 536        priv->count_mode[count->id] = cnt_mode;
 537
 538        /* Set count mode configuration value */
 539        mode_cfg = cnt_mode << 1;
 540
 541        /* Add quadrature mode configuration */
 542        if (priv->quadrature_mode[count->id])
 543                mode_cfg |= (priv->quadrature_scale[count->id] + 1) << 3;
 544
 545        /* Load mode configuration to Counter Mode Register */
 546        outb(QUAD8_CTR_CMR | mode_cfg, base_offset);
 547
 548        mutex_unlock(&priv->lock);
 549
 550        return 0;
 551}
 552
 553static struct counter_count_enum_ext quad8_cnt_mode_enum = {
 554        .items = counter_count_mode_str,
 555        .num_items = ARRAY_SIZE(counter_count_mode_str),
 556        .get = quad8_count_mode_get,
 557        .set = quad8_count_mode_set
 558};
 559
 560static ssize_t quad8_count_direction_read(struct counter_device *counter,
 561        struct counter_count *count, void *priv, char *buf)
 562{
 563        enum counter_count_direction dir;
 564
 565        quad8_direction_get(counter, count, &dir);
 566
 567        return sprintf(buf, "%s\n", counter_count_direction_str[dir]);
 568}
 569
 570static ssize_t quad8_count_enable_read(struct counter_device *counter,
 571        struct counter_count *count, void *private, char *buf)
 572{
 573        const struct quad8 *const priv = counter->priv;
 574
 575        return sprintf(buf, "%u\n", priv->ab_enable[count->id]);
 576}
 577
 578static ssize_t quad8_count_enable_write(struct counter_device *counter,
 579        struct counter_count *count, void *private, const char *buf, size_t len)
 580{
 581        struct quad8 *const priv = counter->priv;
 582        const int base_offset = priv->base + 2 * count->id;
 583        int err;
 584        bool ab_enable;
 585        unsigned int ior_cfg;
 586
 587        err = kstrtobool(buf, &ab_enable);
 588        if (err)
 589                return err;
 590
 591        mutex_lock(&priv->lock);
 592
 593        priv->ab_enable[count->id] = ab_enable;
 594
 595        ior_cfg = ab_enable | priv->preset_enable[count->id] << 1;
 596
 597        /* Load I/O control configuration */
 598        outb(QUAD8_CTR_IOR | ior_cfg, base_offset + 1);
 599
 600        mutex_unlock(&priv->lock);
 601
 602        return len;
 603}
 604
 605static const char *const quad8_noise_error_states[] = {
 606        "No excessive noise is present at the count inputs",
 607        "Excessive noise is present at the count inputs"
 608};
 609
 610static int quad8_error_noise_get(struct counter_device *counter,
 611        struct counter_count *count, size_t *noise_error)
 612{
 613        const struct quad8 *const priv = counter->priv;
 614        const int base_offset = priv->base + 2 * count->id + 1;
 615
 616        *noise_error = !!(inb(base_offset) & QUAD8_FLAG_E);
 617
 618        return 0;
 619}
 620
 621static struct counter_count_enum_ext quad8_error_noise_enum = {
 622        .items = quad8_noise_error_states,
 623        .num_items = ARRAY_SIZE(quad8_noise_error_states),
 624        .get = quad8_error_noise_get
 625};
 626
 627static ssize_t quad8_count_preset_read(struct counter_device *counter,
 628        struct counter_count *count, void *private, char *buf)
 629{
 630        const struct quad8 *const priv = counter->priv;
 631
 632        return sprintf(buf, "%u\n", priv->preset[count->id]);
 633}
 634
 635static void quad8_preset_register_set(struct quad8 *const priv, const int id,
 636                                      const unsigned int preset)
 637{
 638        const unsigned int base_offset = priv->base + 2 * id;
 639        int i;
 640
 641        priv->preset[id] = preset;
 642
 643        /* Reset Byte Pointer */
 644        outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
 645
 646        /* Set Preset Register */
 647        for (i = 0; i < 3; i++)
 648                outb(preset >> (8 * i), base_offset);
 649}
 650
 651static ssize_t quad8_count_preset_write(struct counter_device *counter,
 652        struct counter_count *count, void *private, const char *buf, size_t len)
 653{
 654        struct quad8 *const priv = counter->priv;
 655        unsigned int preset;
 656        int ret;
 657
 658        ret = kstrtouint(buf, 0, &preset);
 659        if (ret)
 660                return ret;
 661
 662        /* Only 24-bit values are supported */
 663        if (preset > 0xFFFFFF)
 664                return -EINVAL;
 665
 666        mutex_lock(&priv->lock);
 667
 668        quad8_preset_register_set(priv, count->id, preset);
 669
 670        mutex_unlock(&priv->lock);
 671
 672        return len;
 673}
 674
 675static ssize_t quad8_count_ceiling_read(struct counter_device *counter,
 676        struct counter_count *count, void *private, char *buf)
 677{
 678        struct quad8 *const priv = counter->priv;
 679
 680        mutex_lock(&priv->lock);
 681
 682        /* Range Limit and Modulo-N count modes use preset value as ceiling */
 683        switch (priv->count_mode[count->id]) {
 684        case 1:
 685        case 3:
 686                mutex_unlock(&priv->lock);
 687                return sprintf(buf, "%u\n", priv->preset[count->id]);
 688        }
 689
 690        mutex_unlock(&priv->lock);
 691
 692        /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */
 693        return sprintf(buf, "33554431\n");
 694}
 695
 696static ssize_t quad8_count_ceiling_write(struct counter_device *counter,
 697        struct counter_count *count, void *private, const char *buf, size_t len)
 698{
 699        struct quad8 *const priv = counter->priv;
 700        unsigned int ceiling;
 701        int ret;
 702
 703        ret = kstrtouint(buf, 0, &ceiling);
 704        if (ret)
 705                return ret;
 706
 707        /* Only 24-bit values are supported */
 708        if (ceiling > 0xFFFFFF)
 709                return -EINVAL;
 710
 711        mutex_lock(&priv->lock);
 712
 713        /* Range Limit and Modulo-N count modes use preset value as ceiling */
 714        switch (priv->count_mode[count->id]) {
 715        case 1:
 716        case 3:
 717                quad8_preset_register_set(priv, count->id, ceiling);
 718                break;
 719        }
 720
 721        mutex_unlock(&priv->lock);
 722
 723        return len;
 724}
 725
 726static ssize_t quad8_count_preset_enable_read(struct counter_device *counter,
 727        struct counter_count *count, void *private, char *buf)
 728{
 729        const struct quad8 *const priv = counter->priv;
 730
 731        return sprintf(buf, "%u\n", !priv->preset_enable[count->id]);
 732}
 733
 734static ssize_t quad8_count_preset_enable_write(struct counter_device *counter,
 735        struct counter_count *count, void *private, const char *buf, size_t len)
 736{
 737        struct quad8 *const priv = counter->priv;
 738        const int base_offset = priv->base + 2 * count->id + 1;
 739        bool preset_enable;
 740        int ret;
 741        unsigned int ior_cfg;
 742
 743        ret = kstrtobool(buf, &preset_enable);
 744        if (ret)
 745                return ret;
 746
 747        /* Preset enable is active low in Input/Output Control register */
 748        preset_enable = !preset_enable;
 749
 750        mutex_lock(&priv->lock);
 751
 752        priv->preset_enable[count->id] = preset_enable;
 753
 754        ior_cfg = priv->ab_enable[count->id] | (unsigned int)preset_enable << 1;
 755
 756        /* Load I/O control configuration to Input / Output Control Register */
 757        outb(QUAD8_CTR_IOR | ior_cfg, base_offset);
 758
 759        mutex_unlock(&priv->lock);
 760
 761        return len;
 762}
 763
 764static ssize_t quad8_signal_cable_fault_read(struct counter_device *counter,
 765                                             struct counter_signal *signal,
 766                                             void *private, char *buf)
 767{
 768        struct quad8 *const priv = counter->priv;
 769        const size_t channel_id = signal->id / 2;
 770        bool disabled;
 771        unsigned int status;
 772        unsigned int fault;
 773
 774        mutex_lock(&priv->lock);
 775
 776        disabled = !(priv->cable_fault_enable & BIT(channel_id));
 777
 778        if (disabled) {
 779                mutex_unlock(&priv->lock);
 780                return -EINVAL;
 781        }
 782
 783        /* Logic 0 = cable fault */
 784        status = inb(priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS);
 785
 786        mutex_unlock(&priv->lock);
 787
 788        /* Mask respective channel and invert logic */
 789        fault = !(status & BIT(channel_id));
 790
 791        return sprintf(buf, "%u\n", fault);
 792}
 793
 794static ssize_t quad8_signal_cable_fault_enable_read(
 795        struct counter_device *counter, struct counter_signal *signal,
 796        void *private, char *buf)
 797{
 798        const struct quad8 *const priv = counter->priv;
 799        const size_t channel_id = signal->id / 2;
 800        const unsigned int enb = !!(priv->cable_fault_enable & BIT(channel_id));
 801
 802        return sprintf(buf, "%u\n", enb);
 803}
 804
 805static ssize_t quad8_signal_cable_fault_enable_write(
 806        struct counter_device *counter, struct counter_signal *signal,
 807        void *private, const char *buf, size_t len)
 808{
 809        struct quad8 *const priv = counter->priv;
 810        const size_t channel_id = signal->id / 2;
 811        bool enable;
 812        int ret;
 813        unsigned int cable_fault_enable;
 814
 815        ret = kstrtobool(buf, &enable);
 816        if (ret)
 817                return ret;
 818
 819        mutex_lock(&priv->lock);
 820
 821        if (enable)
 822                priv->cable_fault_enable |= BIT(channel_id);
 823        else
 824                priv->cable_fault_enable &= ~BIT(channel_id);
 825
 826        /* Enable is active low in Differential Encoder Cable Status register */
 827        cable_fault_enable = ~priv->cable_fault_enable;
 828
 829        outb(cable_fault_enable, priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS);
 830
 831        mutex_unlock(&priv->lock);
 832
 833        return len;
 834}
 835
 836static ssize_t quad8_signal_fck_prescaler_read(struct counter_device *counter,
 837        struct counter_signal *signal, void *private, char *buf)
 838{
 839        const struct quad8 *const priv = counter->priv;
 840        const size_t channel_id = signal->id / 2;
 841
 842        return sprintf(buf, "%u\n", priv->fck_prescaler[channel_id]);
 843}
 844
 845static ssize_t quad8_signal_fck_prescaler_write(struct counter_device *counter,
 846        struct counter_signal *signal, void *private, const char *buf,
 847        size_t len)
 848{
 849        struct quad8 *const priv = counter->priv;
 850        const size_t channel_id = signal->id / 2;
 851        const int base_offset = priv->base + 2 * channel_id;
 852        u8 prescaler;
 853        int ret;
 854
 855        ret = kstrtou8(buf, 0, &prescaler);
 856        if (ret)
 857                return ret;
 858
 859        mutex_lock(&priv->lock);
 860
 861        priv->fck_prescaler[channel_id] = prescaler;
 862
 863        /* Reset Byte Pointer */
 864        outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
 865
 866        /* Set filter clock factor */
 867        outb(prescaler, base_offset);
 868        outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_PRESET_PSC,
 869             base_offset + 1);
 870
 871        mutex_unlock(&priv->lock);
 872
 873        return len;
 874}
 875
 876static const struct counter_signal_ext quad8_signal_ext[] = {
 877        {
 878                .name = "cable_fault",
 879                .read = quad8_signal_cable_fault_read
 880        },
 881        {
 882                .name = "cable_fault_enable",
 883                .read = quad8_signal_cable_fault_enable_read,
 884                .write = quad8_signal_cable_fault_enable_write
 885        },
 886        {
 887                .name = "filter_clock_prescaler",
 888                .read = quad8_signal_fck_prescaler_read,
 889                .write = quad8_signal_fck_prescaler_write
 890        }
 891};
 892
 893static const struct counter_signal_ext quad8_index_ext[] = {
 894        COUNTER_SIGNAL_ENUM("index_polarity", &quad8_index_pol_enum),
 895        COUNTER_SIGNAL_ENUM_AVAILABLE("index_polarity", &quad8_index_pol_enum),
 896        COUNTER_SIGNAL_ENUM("synchronous_mode", &quad8_syn_mode_enum),
 897        COUNTER_SIGNAL_ENUM_AVAILABLE("synchronous_mode", &quad8_syn_mode_enum)
 898};
 899
 900#define QUAD8_QUAD_SIGNAL(_id, _name) {         \
 901        .id = (_id),                            \
 902        .name = (_name),                        \
 903        .ext = quad8_signal_ext,                \
 904        .num_ext = ARRAY_SIZE(quad8_signal_ext) \
 905}
 906
 907#define QUAD8_INDEX_SIGNAL(_id, _name) {        \
 908        .id = (_id),                            \
 909        .name = (_name),                        \
 910        .ext = quad8_index_ext,                 \
 911        .num_ext = ARRAY_SIZE(quad8_index_ext)  \
 912}
 913
 914static struct counter_signal quad8_signals[] = {
 915        QUAD8_QUAD_SIGNAL(0, "Channel 1 Quadrature A"),
 916        QUAD8_QUAD_SIGNAL(1, "Channel 1 Quadrature B"),
 917        QUAD8_QUAD_SIGNAL(2, "Channel 2 Quadrature A"),
 918        QUAD8_QUAD_SIGNAL(3, "Channel 2 Quadrature B"),
 919        QUAD8_QUAD_SIGNAL(4, "Channel 3 Quadrature A"),
 920        QUAD8_QUAD_SIGNAL(5, "Channel 3 Quadrature B"),
 921        QUAD8_QUAD_SIGNAL(6, "Channel 4 Quadrature A"),
 922        QUAD8_QUAD_SIGNAL(7, "Channel 4 Quadrature B"),
 923        QUAD8_QUAD_SIGNAL(8, "Channel 5 Quadrature A"),
 924        QUAD8_QUAD_SIGNAL(9, "Channel 5 Quadrature B"),
 925        QUAD8_QUAD_SIGNAL(10, "Channel 6 Quadrature A"),
 926        QUAD8_QUAD_SIGNAL(11, "Channel 6 Quadrature B"),
 927        QUAD8_QUAD_SIGNAL(12, "Channel 7 Quadrature A"),
 928        QUAD8_QUAD_SIGNAL(13, "Channel 7 Quadrature B"),
 929        QUAD8_QUAD_SIGNAL(14, "Channel 8 Quadrature A"),
 930        QUAD8_QUAD_SIGNAL(15, "Channel 8 Quadrature B"),
 931        QUAD8_INDEX_SIGNAL(16, "Channel 1 Index"),
 932        QUAD8_INDEX_SIGNAL(17, "Channel 2 Index"),
 933        QUAD8_INDEX_SIGNAL(18, "Channel 3 Index"),
 934        QUAD8_INDEX_SIGNAL(19, "Channel 4 Index"),
 935        QUAD8_INDEX_SIGNAL(20, "Channel 5 Index"),
 936        QUAD8_INDEX_SIGNAL(21, "Channel 6 Index"),
 937        QUAD8_INDEX_SIGNAL(22, "Channel 7 Index"),
 938        QUAD8_INDEX_SIGNAL(23, "Channel 8 Index")
 939};
 940
 941#define QUAD8_COUNT_SYNAPSES(_id) {                                     \
 942        {                                                               \
 943                .actions_list = quad8_synapse_actions_list,             \
 944                .num_actions = ARRAY_SIZE(quad8_synapse_actions_list),  \
 945                .signal = quad8_signals + 2 * (_id)                     \
 946        },                                                              \
 947        {                                                               \
 948                .actions_list = quad8_synapse_actions_list,             \
 949                .num_actions = ARRAY_SIZE(quad8_synapse_actions_list),  \
 950                .signal = quad8_signals + 2 * (_id) + 1                 \
 951        },                                                              \
 952        {                                                               \
 953                .actions_list = quad8_index_actions_list,               \
 954                .num_actions = ARRAY_SIZE(quad8_index_actions_list),    \
 955                .signal = quad8_signals + 2 * (_id) + 16                \
 956        }                                                               \
 957}
 958
 959static struct counter_synapse quad8_count_synapses[][3] = {
 960        QUAD8_COUNT_SYNAPSES(0), QUAD8_COUNT_SYNAPSES(1),
 961        QUAD8_COUNT_SYNAPSES(2), QUAD8_COUNT_SYNAPSES(3),
 962        QUAD8_COUNT_SYNAPSES(4), QUAD8_COUNT_SYNAPSES(5),
 963        QUAD8_COUNT_SYNAPSES(6), QUAD8_COUNT_SYNAPSES(7)
 964};
 965
 966static const struct counter_count_ext quad8_count_ext[] = {
 967        {
 968                .name = "ceiling",
 969                .read = quad8_count_ceiling_read,
 970                .write = quad8_count_ceiling_write
 971        },
 972        {
 973                .name = "floor",
 974                .read = quad8_count_floor_read
 975        },
 976        COUNTER_COUNT_ENUM("count_mode", &quad8_cnt_mode_enum),
 977        COUNTER_COUNT_ENUM_AVAILABLE("count_mode", &quad8_cnt_mode_enum),
 978        {
 979                .name = "direction",
 980                .read = quad8_count_direction_read
 981        },
 982        {
 983                .name = "enable",
 984                .read = quad8_count_enable_read,
 985                .write = quad8_count_enable_write
 986        },
 987        COUNTER_COUNT_ENUM("error_noise", &quad8_error_noise_enum),
 988        COUNTER_COUNT_ENUM_AVAILABLE("error_noise", &quad8_error_noise_enum),
 989        {
 990                .name = "preset",
 991                .read = quad8_count_preset_read,
 992                .write = quad8_count_preset_write
 993        },
 994        {
 995                .name = "preset_enable",
 996                .read = quad8_count_preset_enable_read,
 997                .write = quad8_count_preset_enable_write
 998        }
 999};
1000
1001#define QUAD8_COUNT(_id, _cntname) {                                    \
1002        .id = (_id),                                                    \
1003        .name = (_cntname),                                             \
1004        .functions_list = quad8_count_functions_list,                   \
1005        .num_functions = ARRAY_SIZE(quad8_count_functions_list),        \
1006        .synapses = quad8_count_synapses[(_id)],                        \
1007        .num_synapses = 2,                                              \
1008        .ext = quad8_count_ext,                                         \
1009        .num_ext = ARRAY_SIZE(quad8_count_ext)                          \
1010}
1011
1012static struct counter_count quad8_counts[] = {
1013        QUAD8_COUNT(0, "Channel 1 Count"),
1014        QUAD8_COUNT(1, "Channel 2 Count"),
1015        QUAD8_COUNT(2, "Channel 3 Count"),
1016        QUAD8_COUNT(3, "Channel 4 Count"),
1017        QUAD8_COUNT(4, "Channel 5 Count"),
1018        QUAD8_COUNT(5, "Channel 6 Count"),
1019        QUAD8_COUNT(6, "Channel 7 Count"),
1020        QUAD8_COUNT(7, "Channel 8 Count")
1021};
1022
1023static int quad8_probe(struct device *dev, unsigned int id)
1024{
1025        struct quad8 *priv;
1026        int i, j;
1027        unsigned int base_offset;
1028
1029        if (!devm_request_region(dev, base[id], QUAD8_EXTENT, dev_name(dev))) {
1030                dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
1031                        base[id], base[id] + QUAD8_EXTENT);
1032                return -EBUSY;
1033        }
1034
1035        priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
1036        if (!priv)
1037                return -ENOMEM;
1038
1039        /* Initialize Counter device and driver data */
1040        priv->counter.name = dev_name(dev);
1041        priv->counter.parent = dev;
1042        priv->counter.ops = &quad8_ops;
1043        priv->counter.counts = quad8_counts;
1044        priv->counter.num_counts = ARRAY_SIZE(quad8_counts);
1045        priv->counter.signals = quad8_signals;
1046        priv->counter.num_signals = ARRAY_SIZE(quad8_signals);
1047        priv->counter.priv = priv;
1048        priv->base = base[id];
1049
1050        /* Initialize mutex */
1051        mutex_init(&priv->lock);
1052
1053        /* Reset all counters and disable interrupt function */
1054        outb(QUAD8_CHAN_OP_RESET_COUNTERS, base[id] + QUAD8_REG_CHAN_OP);
1055        /* Set initial configuration for all counters */
1056        for (i = 0; i < QUAD8_NUM_COUNTERS; i++) {
1057                base_offset = base[id] + 2 * i;
1058                /* Reset Byte Pointer */
1059                outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
1060                /* Reset filter clock factor */
1061                outb(0, base_offset);
1062                outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_PRESET_PSC,
1063                     base_offset + 1);
1064                /* Reset Byte Pointer */
1065                outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
1066                /* Reset Preset Register */
1067                for (j = 0; j < 3; j++)
1068                        outb(0x00, base_offset);
1069                /* Reset Borrow, Carry, Compare, and Sign flags */
1070                outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_FLAGS, base_offset + 1);
1071                /* Reset Error flag */
1072                outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_E, base_offset + 1);
1073                /* Binary encoding; Normal count; non-quadrature mode */
1074                outb(QUAD8_CTR_CMR, base_offset + 1);
1075                /* Disable A and B inputs; preset on index; FLG1 as Carry */
1076                outb(QUAD8_CTR_IOR, base_offset + 1);
1077                /* Disable index function; negative index polarity */
1078                outb(QUAD8_CTR_IDR, base_offset + 1);
1079        }
1080        /* Disable Differential Encoder Cable Status for all channels */
1081        outb(0xFF, base[id] + QUAD8_DIFF_ENCODER_CABLE_STATUS);
1082        /* Enable all counters */
1083        outb(QUAD8_CHAN_OP_ENABLE_COUNTERS, base[id] + QUAD8_REG_CHAN_OP);
1084
1085        return devm_counter_register(dev, &priv->counter);
1086}
1087
1088static struct isa_driver quad8_driver = {
1089        .probe = quad8_probe,
1090        .driver = {
1091                .name = "104-quad-8"
1092        }
1093};
1094
1095module_isa_driver(quad8_driver, num_quad8);
1096
1097MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
1098MODULE_DESCRIPTION("ACCES 104-QUAD-8 driver");
1099MODULE_LICENSE("GPL v2");
1100