1
2
3
4#ifndef _ASM_POWERPC_CACHEFLUSH_H
5#define _ASM_POWERPC_CACHEFLUSH_H
6
7#include <linux/mm.h>
8#include <asm/cputable.h>
9#include <asm/cpu_has_feature.h>
10
11
12
13
14
15#define PG_dcache_clean PG_arch_1
16
17#ifdef CONFIG_PPC_BOOK3S_64
18
19
20
21
22
23
24
25static inline void flush_cache_vmap(unsigned long start, unsigned long end)
26{
27 asm volatile("ptesync" ::: "memory");
28}
29#define flush_cache_vmap flush_cache_vmap
30#endif
31
32#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
33
34
35
36
37
38static inline void flush_dcache_page(struct page *page)
39{
40 if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
41 return;
42
43 if (test_bit(PG_dcache_clean, &page->flags))
44 clear_bit(PG_dcache_clean, &page->flags);
45}
46
47void flush_icache_range(unsigned long start, unsigned long stop);
48#define flush_icache_range flush_icache_range
49
50void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
51 unsigned long addr, int len);
52#define flush_icache_user_page flush_icache_user_page
53
54void flush_dcache_icache_page(struct page *page);
55
56
57
58
59
60
61
62
63
64static inline void flush_dcache_range(unsigned long start, unsigned long stop)
65{
66 unsigned long shift = l1_dcache_shift();
67 unsigned long bytes = l1_dcache_bytes();
68 void *addr = (void *)(start & ~(bytes - 1));
69 unsigned long size = stop - (unsigned long)addr + (bytes - 1);
70 unsigned long i;
71
72 if (IS_ENABLED(CONFIG_PPC64))
73 mb();
74
75 for (i = 0; i < size >> shift; i++, addr += bytes)
76 dcbf(addr);
77 mb();
78
79}
80
81
82
83
84
85
86static inline void clean_dcache_range(unsigned long start, unsigned long stop)
87{
88 unsigned long shift = l1_dcache_shift();
89 unsigned long bytes = l1_dcache_bytes();
90 void *addr = (void *)(start & ~(bytes - 1));
91 unsigned long size = stop - (unsigned long)addr + (bytes - 1);
92 unsigned long i;
93
94 for (i = 0; i < size >> shift; i++, addr += bytes)
95 dcbst(addr);
96 mb();
97}
98
99
100
101
102
103
104static inline void invalidate_dcache_range(unsigned long start,
105 unsigned long stop)
106{
107 unsigned long shift = l1_dcache_shift();
108 unsigned long bytes = l1_dcache_bytes();
109 void *addr = (void *)(start & ~(bytes - 1));
110 unsigned long size = stop - (unsigned long)addr + (bytes - 1);
111 unsigned long i;
112
113 for (i = 0; i < size >> shift; i++, addr += bytes)
114 dcbi(addr);
115 mb();
116}
117
118#ifdef CONFIG_4xx
119static inline void flush_instruction_cache(void)
120{
121 iccci((void *)KERNELBASE);
122 isync();
123}
124#else
125void flush_instruction_cache(void);
126#endif
127
128#include <asm-generic/cacheflush.h>
129
130#endif
131