linux/arch/mips/boot/dts/loongson/loongson64c-package.dtsi
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   1// SPDX-License-Identifier: GPL-2.0
   2
   3#include <dt-bindings/interrupt-controller/irq.h>
   4
   5/ {
   6        #address-cells = <2>;
   7        #size-cells = <2>;
   8
   9        cpuintc: interrupt-controller {
  10                #address-cells = <0>;
  11                #interrupt-cells = <1>;
  12                interrupt-controller;
  13                compatible = "mti,cpu-interrupt-controller";
  14        };
  15
  16        package0: bus@1fe00000 {
  17                compatible = "simple-bus";
  18                #address-cells = <2>;
  19                #size-cells = <1>;
  20                ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
  21                        0 0x3ff00000 0 0x3ff00000 0x100000
  22                        /* 3A HT Config Space */
  23                        0xefd 0xfb000000 0xefd 0xfb000000 0x10000000
  24                        /* 3B HT Config Space */
  25                        0x1efd 0xfb000000 0x1efd 0xfb000000 0x10000000>;
  26
  27                liointc: interrupt-controller@3ff01400 {
  28                        compatible = "loongson,liointc-1.0";
  29                        reg = <0 0x3ff01400 0x64>;
  30
  31                        interrupt-controller;
  32                        #interrupt-cells = <2>;
  33
  34                        interrupt-parent = <&cpuintc>;
  35                        interrupts = <2>, <3>;
  36                        interrupt-names = "int0", "int1";
  37
  38                        loongson,parent_int_map = <0xf0ffffff>, /* int0 */
  39                                                <0x0f000000>, /* int1 */
  40                                                <0x00000000>, /* int2 */
  41                                                <0x00000000>; /* int3 */
  42
  43                };
  44
  45                cpu_uart0: serial@1fe001e0 {
  46                        compatible = "ns16550a";
  47                        reg = <0 0x1fe001e0 0x8>;
  48                        clock-frequency = <33000000>;
  49                        interrupt-parent = <&liointc>;
  50                        interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
  51                        no-loopback-test;
  52                };
  53
  54                cpu_uart1: serial@1fe001e8 {
  55                        status = "disabled";
  56                        compatible = "ns16550a";
  57                        reg = <0 0x1fe001e8 0x8>;
  58                        clock-frequency = <33000000>;
  59                        interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
  60                        interrupt-parent = <&liointc>;
  61                        no-loopback-test;
  62                };
  63        };
  64};
  65