linux/arch/mips/boot/dts/ingenic/x1830.dtsi
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   1// SPDX-License-Identifier: GPL-2.0
   2#include <dt-bindings/clock/ingenic,tcu.h>
   3#include <dt-bindings/clock/x1830-cgu.h>
   4#include <dt-bindings/dma/x1830-dma.h>
   5
   6/ {
   7        #address-cells = <1>;
   8        #size-cells = <1>;
   9        compatible = "ingenic,x1830";
  10
  11        cpus {
  12                #address-cells = <1>;
  13                #size-cells = <0>;
  14
  15                cpu0: cpu@0 {
  16                        device_type = "cpu";
  17                        compatible = "ingenic,xburst-fpu2.0-mxu2.0";
  18                        reg = <0>;
  19
  20                        clocks = <&cgu X1830_CLK_CPU>;
  21                        clock-names = "cpu";
  22                };
  23        };
  24
  25        cpuintc: interrupt-controller {
  26                #address-cells = <0>;
  27                #interrupt-cells = <1>;
  28                interrupt-controller;
  29                compatible = "mti,cpu-interrupt-controller";
  30        };
  31
  32        intc: interrupt-controller@10001000 {
  33                compatible = "ingenic,x1830-intc", "ingenic,jz4780-intc";
  34                reg = <0x10001000 0x50>;
  35
  36                interrupt-controller;
  37                #interrupt-cells = <1>;
  38
  39                interrupt-parent = <&cpuintc>;
  40                interrupts = <2>;
  41        };
  42
  43        exclk: ext {
  44                compatible = "fixed-clock";
  45                #clock-cells = <0>;
  46        };
  47
  48        rtclk: rtc {
  49                compatible = "fixed-clock";
  50                #clock-cells = <0>;
  51                clock-frequency = <32768>;
  52        };
  53
  54        cgu: x1830-cgu@10000000 {
  55                compatible = "ingenic,x1830-cgu", "simple-mfd";
  56                reg = <0x10000000 0x100>;
  57                #address-cells = <1>;
  58                #size-cells = <1>;
  59                ranges = <0x0 0x10000000 0x100>;
  60
  61                #clock-cells = <1>;
  62
  63                clocks = <&exclk>, <&rtclk>;
  64                clock-names = "ext", "rtc";
  65
  66                otg_phy: usb-phy@3c {
  67                        compatible = "ingenic,x1830-phy";
  68                        reg = <0x3c 0x10>;
  69
  70                        clocks = <&cgu X1830_CLK_OTGPHY>;
  71
  72                        #phy-cells = <0>;
  73
  74                        status = "disabled";
  75                };
  76
  77                mac_phy_ctrl: mac-phy-ctrl@e8 {
  78                        compatible = "syscon";
  79                        reg = <0xe8 0x4>;
  80                };
  81        };
  82
  83        ost: timer@12000000 {
  84                compatible = "ingenic,x1830-ost", "ingenic,x1000-ost";
  85                reg = <0x12000000 0x3c>;
  86
  87                #clock-cells = <1>;
  88
  89                clocks = <&cgu X1830_CLK_OST>;
  90                clock-names = "ost";
  91
  92                interrupt-parent = <&cpuintc>;
  93                interrupts = <4>;
  94        };
  95
  96        tcu: timer@10002000 {
  97                compatible = "ingenic,x1830-tcu", "ingenic,x1000-tcu", "simple-mfd";
  98                reg = <0x10002000 0x1000>;
  99                #address-cells = <1>;
 100                #size-cells = <1>;
 101                ranges = <0x0 0x10002000 0x1000>;
 102
 103                #clock-cells = <1>;
 104
 105                clocks = <&cgu X1830_CLK_RTCLK>,
 106                         <&cgu X1830_CLK_EXCLK>,
 107                         <&cgu X1830_CLK_PCLK>;
 108                clock-names = "rtc", "ext", "pclk";
 109
 110                interrupt-controller;
 111                #interrupt-cells = <1>;
 112
 113                interrupt-parent = <&intc>;
 114                interrupts = <27 26 25>;
 115
 116                wdt: watchdog@0 {
 117                        compatible = "ingenic,x1830-watchdog", "ingenic,jz4780-watchdog";
 118                        reg = <0x0 0x10>;
 119
 120                        clocks = <&tcu TCU_CLK_WDT>;
 121                        clock-names = "wdt";
 122                };
 123        };
 124
 125        rtc: rtc@10003000 {
 126                compatible = "ingenic,x1830-rtc", "ingenic,jz4780-rtc";
 127                reg = <0x10003000 0x4c>;
 128
 129                interrupt-parent = <&intc>;
 130                interrupts = <32>;
 131
 132                clocks = <&cgu X1830_CLK_RTCLK>;
 133                clock-names = "rtc";
 134        };
 135
 136        pinctrl: pin-controller@10010000 {
 137                compatible = "ingenic,x1830-pinctrl";
 138                reg = <0x10010000 0x800>;
 139                #address-cells = <1>;
 140                #size-cells = <0>;
 141
 142                gpa: gpio@0 {
 143                        compatible = "ingenic,x1830-gpio";
 144                        reg = <0>;
 145
 146                        gpio-controller;
 147                        gpio-ranges = <&pinctrl 0 0 32>;
 148                        #gpio-cells = <2>;
 149
 150                        interrupt-controller;
 151                        #interrupt-cells = <2>;
 152
 153                        interrupt-parent = <&intc>;
 154                        interrupts = <17>;
 155                };
 156
 157                gpb: gpio@1 {
 158                        compatible = "ingenic,x1830-gpio";
 159                        reg = <1>;
 160
 161                        gpio-controller;
 162                        gpio-ranges = <&pinctrl 0 32 32>;
 163                        #gpio-cells = <2>;
 164
 165                        interrupt-controller;
 166                        #interrupt-cells = <2>;
 167
 168                        interrupt-parent = <&intc>;
 169                        interrupts = <16>;
 170                };
 171
 172                gpc: gpio@2 {
 173                        compatible = "ingenic,x1830-gpio";
 174                        reg = <2>;
 175
 176                        gpio-controller;
 177                        gpio-ranges = <&pinctrl 0 64 32>;
 178                        #gpio-cells = <2>;
 179
 180                        interrupt-controller;
 181                        #interrupt-cells = <2>;
 182
 183                        interrupt-parent = <&intc>;
 184                        interrupts = <15>;
 185                };
 186
 187                gpd: gpio@3 {
 188                        compatible = "ingenic,x1830-gpio";
 189                        reg = <3>;
 190
 191                        gpio-controller;
 192                        gpio-ranges = <&pinctrl 0 96 32>;
 193                        #gpio-cells = <2>;
 194
 195                        interrupt-controller;
 196                        #interrupt-cells = <2>;
 197
 198                        interrupt-parent = <&intc>;
 199                        interrupts = <14>;
 200                };
 201        };
 202
 203        uart0: serial@10030000 {
 204                compatible = "ingenic,x1830-uart", "ingenic,x1000-uart";
 205                reg = <0x10030000 0x100>;
 206
 207                interrupt-parent = <&intc>;
 208                interrupts = <51>;
 209
 210                clocks = <&exclk>, <&cgu X1830_CLK_UART0>;
 211                clock-names = "baud", "module";
 212
 213                status = "disabled";
 214        };
 215
 216        uart1: serial@10031000 {
 217                compatible = "ingenic,x1830-uart", "ingenic,x1000-uart";
 218                reg = <0x10031000 0x100>;
 219
 220                interrupt-parent = <&intc>;
 221                interrupts = <50>;
 222
 223                clocks = <&exclk>, <&cgu X1830_CLK_UART1>;
 224                clock-names = "baud", "module";
 225
 226                status = "disabled";
 227        };
 228
 229        i2c0: i2c-controller@10050000 {
 230                compatible = "ingenic,x1830-i2c", "ingenic,x1000-i2c";
 231                reg = <0x10050000 0x1000>;
 232                #address-cells = <1>;
 233                #size-cells = <0>;
 234
 235                interrupt-parent = <&intc>;
 236                interrupts = <60>;
 237
 238                clocks = <&cgu X1830_CLK_SMB0>;
 239
 240                status = "disabled";
 241        };
 242
 243        i2c1: i2c-controller@10051000 {
 244                compatible = "ingenic,x1830-i2c", "ingenic,x1000-i2c";
 245                reg = <0x10051000 0x1000>;
 246                #address-cells = <1>;
 247                #size-cells = <0>;
 248
 249                interrupt-parent = <&intc>;
 250                interrupts = <59>;
 251
 252                clocks = <&cgu X1830_CLK_SMB1>;
 253
 254                status = "disabled";
 255        };
 256
 257        i2c2: i2c-controller@10052000 {
 258                compatible = "ingenic,x1830-i2c", "ingenic,x1000-i2c";
 259                reg = <0x10052000 0x1000>;
 260                #address-cells = <1>;
 261                #size-cells = <0>;
 262
 263                interrupt-parent = <&intc>;
 264                interrupts = <58>;
 265
 266                clocks = <&cgu X1830_CLK_SMB2>;
 267
 268                status = "disabled";
 269        };
 270
 271        dtrng: trng@10072000 {
 272                compatible = "ingenic,x1830-dtrng";
 273                reg = <0x10072000 0xc>;
 274
 275                clocks = <&cgu X1830_CLK_DTRNG>;
 276
 277                status = "disabled";
 278        };
 279
 280        pdma: dma-controller@13420000 {
 281                compatible = "ingenic,x1830-dma";
 282                reg = <0x13420000 0x400>, <0x13421000 0x40>;
 283                #dma-cells = <2>;
 284
 285                interrupt-parent = <&intc>;
 286                interrupts = <10>;
 287
 288                clocks = <&cgu X1830_CLK_PDMA>;
 289        };
 290
 291        msc0: mmc@13450000 {
 292                compatible = "ingenic,x1830-mmc", "ingenic,x1000-mmc";
 293                reg = <0x13450000 0x1000>;
 294
 295                interrupt-parent = <&intc>;
 296                interrupts = <37>;
 297
 298                clocks = <&cgu X1830_CLK_MSC0>;
 299                clock-names = "mmc";
 300
 301                cap-sd-highspeed;
 302                cap-mmc-highspeed;
 303                cap-sdio-irq;
 304
 305                dmas = <&pdma X1830_DMA_MSC0_RX 0xffffffff>,
 306                           <&pdma X1830_DMA_MSC0_TX 0xffffffff>;
 307                dma-names = "rx", "tx";
 308
 309                status = "disabled";
 310        };
 311
 312        msc1: mmc@13460000 {
 313                compatible = "ingenic,x1830-mmc", "ingenic,x1000-mmc";
 314                reg = <0x13460000 0x1000>;
 315
 316                interrupt-parent = <&intc>;
 317                interrupts = <36>;
 318
 319                clocks = <&cgu X1830_CLK_MSC1>;
 320                clock-names = "mmc";
 321
 322                cap-sd-highspeed;
 323                cap-mmc-highspeed;
 324                cap-sdio-irq;
 325
 326                dmas = <&pdma X1830_DMA_MSC1_RX 0xffffffff>,
 327                           <&pdma X1830_DMA_MSC1_TX 0xffffffff>;
 328                dma-names = "rx", "tx";
 329
 330                status = "disabled";
 331        };
 332
 333        mac: ethernet@134b0000 {
 334                compatible = "ingenic,x1830-mac", "snps,dwmac";
 335                reg = <0x134b0000 0x2000>;
 336
 337                interrupt-parent = <&intc>;
 338                interrupts = <55>;
 339                interrupt-names = "macirq";
 340
 341                clocks = <&cgu X1830_CLK_MAC>;
 342                clock-names = "stmmaceth";
 343
 344                mode-reg = <&mac_phy_ctrl>;
 345
 346                status = "disabled";
 347
 348                mdio: mdio {
 349                        compatible = "snps,dwmac-mdio";
 350                        #address-cells = <1>;
 351                        #size-cells = <0>;
 352
 353                        status = "disabled";
 354                };
 355        };
 356
 357        otg: usb@13500000 {
 358                compatible = "ingenic,x1830-otg", "snps,dwc2";
 359                reg = <0x13500000 0x40000>;
 360
 361                interrupt-parent = <&intc>;
 362                interrupts = <21>;
 363
 364                clocks = <&cgu X1830_CLK_OTG>;
 365                clock-names = "otg";
 366
 367                phys = <&otg_phy>;
 368                phy-names = "usb2-phy";
 369
 370                g-rx-fifo-size = <768>;
 371                g-np-tx-fifo-size = <256>;
 372                g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
 373
 374                status = "disabled";
 375        };
 376};
 377