linux/drivers/usb/isp1760/isp1760-core.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Driver for the NXP ISP1760 chip
   4 *
   5 * Copyright 2021 Linaro, Rui Miguel Silva
   6 * Copyright 2014 Laurent Pinchart
   7 * Copyright 2007 Sebastian Siewior
   8 *
   9 * Contacts:
  10 *      Sebastian Siewior <bigeasy@linutronix.de>
  11 *      Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  12 *      Rui Miguel Silva <rui.silva@linaro.org>
  13 */
  14
  15#include <linux/delay.h>
  16#include <linux/gpio/consumer.h>
  17#include <linux/io.h>
  18#include <linux/kernel.h>
  19#include <linux/module.h>
  20#include <linux/regmap.h>
  21#include <linux/slab.h>
  22#include <linux/usb.h>
  23
  24#include "isp1760-core.h"
  25#include "isp1760-hcd.h"
  26#include "isp1760-regs.h"
  27#include "isp1760-udc.h"
  28
  29static int isp1760_init_core(struct isp1760_device *isp)
  30{
  31        struct isp1760_hcd *hcd = &isp->hcd;
  32        struct isp1760_udc *udc = &isp->udc;
  33
  34        /* Low-level chip reset */
  35        if (isp->rst_gpio) {
  36                gpiod_set_value_cansleep(isp->rst_gpio, 1);
  37                msleep(50);
  38                gpiod_set_value_cansleep(isp->rst_gpio, 0);
  39        }
  40
  41        /*
  42         * Reset the host controller, including the CPU interface
  43         * configuration.
  44         */
  45        isp1760_field_set(hcd->fields, SW_RESET_RESET_ALL);
  46        msleep(100);
  47
  48        /* Setup HW Mode Control: This assumes a level active-low interrupt */
  49        if ((isp->devflags & ISP1760_FLAG_ANALOG_OC) && hcd->is_isp1763) {
  50                dev_err(isp->dev, "isp1763 analog overcurrent not available\n");
  51                return -EINVAL;
  52        }
  53
  54        if (isp->devflags & ISP1760_FLAG_BUS_WIDTH_16)
  55                isp1760_field_clear(hcd->fields, HW_DATA_BUS_WIDTH);
  56        if (isp->devflags & ISP1760_FLAG_BUS_WIDTH_8)
  57                isp1760_field_set(hcd->fields, HW_DATA_BUS_WIDTH);
  58        if (isp->devflags & ISP1760_FLAG_ANALOG_OC)
  59                isp1760_field_set(hcd->fields, HW_ANA_DIGI_OC);
  60        if (isp->devflags & ISP1760_FLAG_DACK_POL_HIGH)
  61                isp1760_field_set(hcd->fields, HW_DACK_POL_HIGH);
  62        if (isp->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
  63                isp1760_field_set(hcd->fields, HW_DREQ_POL_HIGH);
  64        if (isp->devflags & ISP1760_FLAG_INTR_POL_HIGH)
  65                isp1760_field_set(hcd->fields, HW_INTR_HIGH_ACT);
  66        if (isp->devflags & ISP1760_FLAG_INTR_EDGE_TRIG)
  67                isp1760_field_set(hcd->fields, HW_INTR_EDGE_TRIG);
  68
  69        /*
  70         * The ISP1761 has a dedicated DC IRQ line but supports sharing the HC
  71         * IRQ line for both the host and device controllers. Hardcode IRQ
  72         * sharing for now and disable the DC interrupts globally to avoid
  73         * spurious interrupts during HCD registration.
  74         */
  75        if (isp->devflags & ISP1760_FLAG_ISP1761) {
  76                isp1760_reg_write(udc->regs, ISP176x_DC_MODE, 0);
  77                isp1760_field_set(hcd->fields, HW_COMN_IRQ);
  78        }
  79
  80        /*
  81         * PORT 1 Control register of the ISP1760 is the OTG control register
  82         * on ISP1761.
  83         *
  84         * TODO: Really support OTG. For now we configure port 1 in device mode
  85         */
  86        if (((isp->devflags & ISP1760_FLAG_ISP1761) ||
  87             (isp->devflags & ISP1760_FLAG_ISP1763)) &&
  88            (isp->devflags & ISP1760_FLAG_PERIPHERAL_EN)) {
  89                isp1760_field_set(hcd->fields, HW_DM_PULLDOWN);
  90                isp1760_field_set(hcd->fields, HW_DP_PULLDOWN);
  91                isp1760_field_set(hcd->fields, HW_OTG_DISABLE);
  92        } else {
  93                isp1760_field_set(hcd->fields, HW_SW_SEL_HC_DC);
  94                isp1760_field_set(hcd->fields, HW_VBUS_DRV);
  95                isp1760_field_set(hcd->fields, HW_SEL_CP_EXT);
  96        }
  97
  98        dev_info(isp->dev, "%s bus width: %u, oc: %s\n",
  99                 hcd->is_isp1763 ? "isp1763" : "isp1760",
 100                 isp->devflags & ISP1760_FLAG_BUS_WIDTH_8 ? 8 :
 101                 isp->devflags & ISP1760_FLAG_BUS_WIDTH_16 ? 16 : 32,
 102                 hcd->is_isp1763 ? "not available" :
 103                 isp->devflags & ISP1760_FLAG_ANALOG_OC ? "analog" : "digital");
 104
 105        return 0;
 106}
 107
 108void isp1760_set_pullup(struct isp1760_device *isp, bool enable)
 109{
 110        struct isp1760_udc *udc = &isp->udc;
 111
 112        if (enable)
 113                isp1760_field_set(udc->fields, HW_DP_PULLUP);
 114        else
 115                isp1760_field_set(udc->fields, HW_DP_PULLUP_CLEAR);
 116}
 117
 118/*
 119 * ISP1760/61:
 120 *
 121 * 60kb divided in:
 122 * - 32 blocks @ 256  bytes
 123 * - 20 blocks @ 1024 bytes
 124 * -  4 blocks @ 8192 bytes
 125 */
 126static const struct isp1760_memory_layout isp176x_memory_conf = {
 127        .blocks[0]              = 32,
 128        .blocks_size[0]         = 256,
 129        .blocks[1]              = 20,
 130        .blocks_size[1]         = 1024,
 131        .blocks[2]              = 4,
 132        .blocks_size[2]         = 8192,
 133
 134        .slot_num               = 32,
 135        .payload_blocks         = 32 + 20 + 4,
 136        .payload_area_size      = 0xf000,
 137};
 138
 139/*
 140 * ISP1763:
 141 *
 142 * 20kb divided in:
 143 * - 8 blocks @ 256  bytes
 144 * - 2 blocks @ 1024 bytes
 145 * - 4 blocks @ 4096 bytes
 146 */
 147static const struct isp1760_memory_layout isp1763_memory_conf = {
 148        .blocks[0]              = 8,
 149        .blocks_size[0]         = 256,
 150        .blocks[1]              = 2,
 151        .blocks_size[1]         = 1024,
 152        .blocks[2]              = 4,
 153        .blocks_size[2]         = 4096,
 154
 155        .slot_num               = 16,
 156        .payload_blocks         = 8 + 2 + 4,
 157        .payload_area_size      = 0x5000,
 158};
 159
 160static const struct regmap_range isp176x_hc_volatile_ranges[] = {
 161        regmap_reg_range(ISP176x_HC_USBCMD, ISP176x_HC_ATL_PTD_LASTPTD),
 162        regmap_reg_range(ISP176x_HC_BUFFER_STATUS, ISP176x_HC_MEMORY),
 163        regmap_reg_range(ISP176x_HC_INTERRUPT, ISP176x_HC_OTG_CTRL_CLEAR),
 164};
 165
 166static const struct regmap_access_table isp176x_hc_volatile_table = {
 167        .yes_ranges     = isp176x_hc_volatile_ranges,
 168        .n_yes_ranges   = ARRAY_SIZE(isp176x_hc_volatile_ranges),
 169};
 170
 171static const struct regmap_config isp1760_hc_regmap_conf = {
 172        .name = "isp1760-hc",
 173        .reg_bits = 16,
 174        .reg_stride = 4,
 175        .val_bits = 32,
 176        .fast_io = true,
 177        .max_register = ISP176x_HC_OTG_CTRL_CLEAR,
 178        .volatile_table = &isp176x_hc_volatile_table,
 179};
 180
 181static const struct reg_field isp1760_hc_reg_fields[] = {
 182        [HCS_PPC]               = REG_FIELD(ISP176x_HC_HCSPARAMS, 4, 4),
 183        [HCS_N_PORTS]           = REG_FIELD(ISP176x_HC_HCSPARAMS, 0, 3),
 184        [HCC_ISOC_CACHE]        = REG_FIELD(ISP176x_HC_HCCPARAMS, 7, 7),
 185        [HCC_ISOC_THRES]        = REG_FIELD(ISP176x_HC_HCCPARAMS, 4, 6),
 186        [CMD_LRESET]            = REG_FIELD(ISP176x_HC_USBCMD, 7, 7),
 187        [CMD_RESET]             = REG_FIELD(ISP176x_HC_USBCMD, 1, 1),
 188        [CMD_RUN]               = REG_FIELD(ISP176x_HC_USBCMD, 0, 0),
 189        [STS_PCD]               = REG_FIELD(ISP176x_HC_USBSTS, 2, 2),
 190        [HC_FRINDEX]            = REG_FIELD(ISP176x_HC_FRINDEX, 0, 13),
 191        [FLAG_CF]               = REG_FIELD(ISP176x_HC_CONFIGFLAG, 0, 0),
 192        [HC_ISO_PTD_DONEMAP]    = REG_FIELD(ISP176x_HC_ISO_PTD_DONEMAP, 0, 31),
 193        [HC_ISO_PTD_SKIPMAP]    = REG_FIELD(ISP176x_HC_ISO_PTD_SKIPMAP, 0, 31),
 194        [HC_ISO_PTD_LASTPTD]    = REG_FIELD(ISP176x_HC_ISO_PTD_LASTPTD, 0, 31),
 195        [HC_INT_PTD_DONEMAP]    = REG_FIELD(ISP176x_HC_INT_PTD_DONEMAP, 0, 31),
 196        [HC_INT_PTD_SKIPMAP]    = REG_FIELD(ISP176x_HC_INT_PTD_SKIPMAP, 0, 31),
 197        [HC_INT_PTD_LASTPTD]    = REG_FIELD(ISP176x_HC_INT_PTD_LASTPTD, 0, 31),
 198        [HC_ATL_PTD_DONEMAP]    = REG_FIELD(ISP176x_HC_ATL_PTD_DONEMAP, 0, 31),
 199        [HC_ATL_PTD_SKIPMAP]    = REG_FIELD(ISP176x_HC_ATL_PTD_SKIPMAP, 0, 31),
 200        [HC_ATL_PTD_LASTPTD]    = REG_FIELD(ISP176x_HC_ATL_PTD_LASTPTD, 0, 31),
 201        [PORT_OWNER]            = REG_FIELD(ISP176x_HC_PORTSC1, 13, 13),
 202        [PORT_POWER]            = REG_FIELD(ISP176x_HC_PORTSC1, 12, 12),
 203        [PORT_LSTATUS]          = REG_FIELD(ISP176x_HC_PORTSC1, 10, 11),
 204        [PORT_RESET]            = REG_FIELD(ISP176x_HC_PORTSC1, 8, 8),
 205        [PORT_SUSPEND]          = REG_FIELD(ISP176x_HC_PORTSC1, 7, 7),
 206        [PORT_RESUME]           = REG_FIELD(ISP176x_HC_PORTSC1, 6, 6),
 207        [PORT_PE]               = REG_FIELD(ISP176x_HC_PORTSC1, 2, 2),
 208        [PORT_CSC]              = REG_FIELD(ISP176x_HC_PORTSC1, 1, 1),
 209        [PORT_CONNECT]          = REG_FIELD(ISP176x_HC_PORTSC1, 0, 0),
 210        [ALL_ATX_RESET]         = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 31, 31),
 211        [HW_ANA_DIGI_OC]        = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 15, 15),
 212        [HW_COMN_IRQ]           = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 10, 10),
 213        [HW_DATA_BUS_WIDTH]     = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 8, 8),
 214        [HW_DACK_POL_HIGH]      = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 6, 6),
 215        [HW_DREQ_POL_HIGH]      = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 5, 5),
 216        [HW_INTR_HIGH_ACT]      = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 2, 2),
 217        [HW_INTR_EDGE_TRIG]     = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 1, 1),
 218        [HW_GLOBAL_INTR_EN]     = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 0, 0),
 219        [HC_CHIP_REV]           = REG_FIELD(ISP176x_HC_CHIP_ID, 16, 31),
 220        [HC_CHIP_ID_HIGH]       = REG_FIELD(ISP176x_HC_CHIP_ID, 8, 15),
 221        [HC_CHIP_ID_LOW]        = REG_FIELD(ISP176x_HC_CHIP_ID, 0, 7),
 222        [HC_SCRATCH]            = REG_FIELD(ISP176x_HC_SCRATCH, 0, 31),
 223        [SW_RESET_RESET_ALL]    = REG_FIELD(ISP176x_HC_RESET, 0, 0),
 224        [ISO_BUF_FILL]          = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 2, 2),
 225        [INT_BUF_FILL]          = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 1, 1),
 226        [ATL_BUF_FILL]          = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 0, 0),
 227        [MEM_BANK_SEL]          = REG_FIELD(ISP176x_HC_MEMORY, 16, 17),
 228        [MEM_START_ADDR]        = REG_FIELD(ISP176x_HC_MEMORY, 0, 15),
 229        [HC_INTERRUPT]          = REG_FIELD(ISP176x_HC_INTERRUPT, 0, 9),
 230        [HC_ATL_IRQ_ENABLE]     = REG_FIELD(ISP176x_HC_INTERRUPT_ENABLE, 8, 8),
 231        [HC_INT_IRQ_ENABLE]     = REG_FIELD(ISP176x_HC_INTERRUPT_ENABLE, 7, 7),
 232        [HC_ISO_IRQ_MASK_OR]    = REG_FIELD(ISP176x_HC_ISO_IRQ_MASK_OR, 0, 31),
 233        [HC_INT_IRQ_MASK_OR]    = REG_FIELD(ISP176x_HC_INT_IRQ_MASK_OR, 0, 31),
 234        [HC_ATL_IRQ_MASK_OR]    = REG_FIELD(ISP176x_HC_ATL_IRQ_MASK_OR, 0, 31),
 235        [HC_ISO_IRQ_MASK_AND]   = REG_FIELD(ISP176x_HC_ISO_IRQ_MASK_AND, 0, 31),
 236        [HC_INT_IRQ_MASK_AND]   = REG_FIELD(ISP176x_HC_INT_IRQ_MASK_AND, 0, 31),
 237        [HC_ATL_IRQ_MASK_AND]   = REG_FIELD(ISP176x_HC_ATL_IRQ_MASK_AND, 0, 31),
 238        [HW_OTG_DISABLE]        = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 10, 10),
 239        [HW_SW_SEL_HC_DC]       = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 7, 7),
 240        [HW_VBUS_DRV]           = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 4, 4),
 241        [HW_SEL_CP_EXT]         = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 3, 3),
 242        [HW_DM_PULLDOWN]        = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 2, 2),
 243        [HW_DP_PULLDOWN]        = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 1, 1),
 244        [HW_DP_PULLUP]          = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 0, 0),
 245        [HW_OTG_DISABLE_CLEAR]  = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 10, 10),
 246        [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 7, 7),
 247        [HW_VBUS_DRV_CLEAR]     = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 4, 4),
 248        [HW_SEL_CP_EXT_CLEAR]   = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 3, 3),
 249        [HW_DM_PULLDOWN_CLEAR]  = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 2, 2),
 250        [HW_DP_PULLDOWN_CLEAR]  = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 1, 1),
 251        [HW_DP_PULLUP_CLEAR]    = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 0, 0),
 252};
 253
 254static const struct reg_field isp1763_hc_reg_fields[] = {
 255        [CMD_LRESET]            = REG_FIELD(ISP1763_HC_USBCMD, 7, 7),
 256        [CMD_RESET]             = REG_FIELD(ISP1763_HC_USBCMD, 1, 1),
 257        [CMD_RUN]               = REG_FIELD(ISP1763_HC_USBCMD, 0, 0),
 258        [STS_PCD]               = REG_FIELD(ISP1763_HC_USBSTS, 2, 2),
 259        [HC_FRINDEX]            = REG_FIELD(ISP1763_HC_FRINDEX, 0, 13),
 260        [FLAG_CF]               = REG_FIELD(ISP1763_HC_CONFIGFLAG, 0, 0),
 261        [HC_ISO_PTD_DONEMAP]    = REG_FIELD(ISP1763_HC_ISO_PTD_DONEMAP, 0, 15),
 262        [HC_ISO_PTD_SKIPMAP]    = REG_FIELD(ISP1763_HC_ISO_PTD_SKIPMAP, 0, 15),
 263        [HC_ISO_PTD_LASTPTD]    = REG_FIELD(ISP1763_HC_ISO_PTD_LASTPTD, 0, 15),
 264        [HC_INT_PTD_DONEMAP]    = REG_FIELD(ISP1763_HC_INT_PTD_DONEMAP, 0, 15),
 265        [HC_INT_PTD_SKIPMAP]    = REG_FIELD(ISP1763_HC_INT_PTD_SKIPMAP, 0, 15),
 266        [HC_INT_PTD_LASTPTD]    = REG_FIELD(ISP1763_HC_INT_PTD_LASTPTD, 0, 15),
 267        [HC_ATL_PTD_DONEMAP]    = REG_FIELD(ISP1763_HC_ATL_PTD_DONEMAP, 0, 15),
 268        [HC_ATL_PTD_SKIPMAP]    = REG_FIELD(ISP1763_HC_ATL_PTD_SKIPMAP, 0, 15),
 269        [HC_ATL_PTD_LASTPTD]    = REG_FIELD(ISP1763_HC_ATL_PTD_LASTPTD, 0, 15),
 270        [PORT_OWNER]            = REG_FIELD(ISP1763_HC_PORTSC1, 13, 13),
 271        [PORT_POWER]            = REG_FIELD(ISP1763_HC_PORTSC1, 12, 12),
 272        [PORT_LSTATUS]          = REG_FIELD(ISP1763_HC_PORTSC1, 10, 11),
 273        [PORT_RESET]            = REG_FIELD(ISP1763_HC_PORTSC1, 8, 8),
 274        [PORT_SUSPEND]          = REG_FIELD(ISP1763_HC_PORTSC1, 7, 7),
 275        [PORT_RESUME]           = REG_FIELD(ISP1763_HC_PORTSC1, 6, 6),
 276        [PORT_PE]               = REG_FIELD(ISP1763_HC_PORTSC1, 2, 2),
 277        [PORT_CSC]              = REG_FIELD(ISP1763_HC_PORTSC1, 1, 1),
 278        [PORT_CONNECT]          = REG_FIELD(ISP1763_HC_PORTSC1, 0, 0),
 279        [HW_DATA_BUS_WIDTH]     = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 4, 4),
 280        [HW_DACK_POL_HIGH]      = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 6, 6),
 281        [HW_DREQ_POL_HIGH]      = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 5, 5),
 282        [HW_INTF_LOCK]          = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 3, 3),
 283        [HW_INTR_HIGH_ACT]      = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 2, 2),
 284        [HW_INTR_EDGE_TRIG]     = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 1, 1),
 285        [HW_GLOBAL_INTR_EN]     = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 0, 0),
 286        [SW_RESET_RESET_ATX]    = REG_FIELD(ISP1763_HC_RESET, 3, 3),
 287        [SW_RESET_RESET_ALL]    = REG_FIELD(ISP1763_HC_RESET, 0, 0),
 288        [HC_CHIP_ID_HIGH]       = REG_FIELD(ISP1763_HC_CHIP_ID, 0, 15),
 289        [HC_CHIP_ID_LOW]        = REG_FIELD(ISP1763_HC_CHIP_REV, 8, 15),
 290        [HC_CHIP_REV]           = REG_FIELD(ISP1763_HC_CHIP_REV, 0, 7),
 291        [HC_SCRATCH]            = REG_FIELD(ISP1763_HC_SCRATCH, 0, 15),
 292        [ISO_BUF_FILL]          = REG_FIELD(ISP1763_HC_BUFFER_STATUS, 2, 2),
 293        [INT_BUF_FILL]          = REG_FIELD(ISP1763_HC_BUFFER_STATUS, 1, 1),
 294        [ATL_BUF_FILL]          = REG_FIELD(ISP1763_HC_BUFFER_STATUS, 0, 0),
 295        [MEM_START_ADDR]        = REG_FIELD(ISP1763_HC_MEMORY, 0, 15),
 296        [HC_DATA]               = REG_FIELD(ISP1763_HC_DATA, 0, 15),
 297        [HC_INTERRUPT]          = REG_FIELD(ISP1763_HC_INTERRUPT, 0, 10),
 298        [HC_ATL_IRQ_ENABLE]     = REG_FIELD(ISP1763_HC_INTERRUPT_ENABLE, 8, 8),
 299        [HC_INT_IRQ_ENABLE]     = REG_FIELD(ISP1763_HC_INTERRUPT_ENABLE, 7, 7),
 300        [HC_ISO_IRQ_MASK_OR]    = REG_FIELD(ISP1763_HC_ISO_IRQ_MASK_OR, 0, 15),
 301        [HC_INT_IRQ_MASK_OR]    = REG_FIELD(ISP1763_HC_INT_IRQ_MASK_OR, 0, 15),
 302        [HC_ATL_IRQ_MASK_OR]    = REG_FIELD(ISP1763_HC_ATL_IRQ_MASK_OR, 0, 15),
 303        [HC_ISO_IRQ_MASK_AND]   = REG_FIELD(ISP1763_HC_ISO_IRQ_MASK_AND, 0, 15),
 304        [HC_INT_IRQ_MASK_AND]   = REG_FIELD(ISP1763_HC_INT_IRQ_MASK_AND, 0, 15),
 305        [HC_ATL_IRQ_MASK_AND]   = REG_FIELD(ISP1763_HC_ATL_IRQ_MASK_AND, 0, 15),
 306        [HW_HC_2_DIS]           = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 15, 15),
 307        [HW_OTG_DISABLE]        = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 10, 10),
 308        [HW_SW_SEL_HC_DC]       = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 7, 7),
 309        [HW_VBUS_DRV]           = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 4, 4),
 310        [HW_SEL_CP_EXT]         = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 3, 3),
 311        [HW_DM_PULLDOWN]        = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 2, 2),
 312        [HW_DP_PULLDOWN]        = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 1, 1),
 313        [HW_DP_PULLUP]          = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 0, 0),
 314        [HW_HC_2_DIS_CLEAR]     = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 15, 15),
 315        [HW_OTG_DISABLE_CLEAR]  = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 10, 10),
 316        [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 7, 7),
 317        [HW_VBUS_DRV_CLEAR]     = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 4, 4),
 318        [HW_SEL_CP_EXT_CLEAR]   = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 3, 3),
 319        [HW_DM_PULLDOWN_CLEAR]  = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 2, 2),
 320        [HW_DP_PULLDOWN_CLEAR]  = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 1, 1),
 321        [HW_DP_PULLUP_CLEAR]    = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 0, 0),
 322};
 323
 324static const struct regmap_range isp1763_hc_volatile_ranges[] = {
 325        regmap_reg_range(ISP1763_HC_USBCMD, ISP1763_HC_ATL_PTD_LASTPTD),
 326        regmap_reg_range(ISP1763_HC_BUFFER_STATUS, ISP1763_HC_DATA),
 327        regmap_reg_range(ISP1763_HC_INTERRUPT, ISP1763_HC_OTG_CTRL_CLEAR),
 328};
 329
 330static const struct regmap_access_table isp1763_hc_volatile_table = {
 331        .yes_ranges     = isp1763_hc_volatile_ranges,
 332        .n_yes_ranges   = ARRAY_SIZE(isp1763_hc_volatile_ranges),
 333};
 334
 335static const struct regmap_config isp1763_hc_regmap_conf = {
 336        .name = "isp1763-hc",
 337        .reg_bits = 8,
 338        .reg_stride = 2,
 339        .val_bits = 16,
 340        .fast_io = true,
 341        .max_register = ISP1763_HC_OTG_CTRL_CLEAR,
 342        .volatile_table = &isp1763_hc_volatile_table,
 343};
 344
 345static const struct regmap_range isp176x_dc_volatile_ranges[] = {
 346        regmap_reg_range(ISP176x_DC_EPMAXPKTSZ, ISP176x_DC_EPTYPE),
 347        regmap_reg_range(ISP176x_DC_BUFLEN, ISP176x_DC_EPINDEX),
 348};
 349
 350static const struct regmap_access_table isp176x_dc_volatile_table = {
 351        .yes_ranges     = isp176x_dc_volatile_ranges,
 352        .n_yes_ranges   = ARRAY_SIZE(isp176x_dc_volatile_ranges),
 353};
 354
 355static const struct regmap_config isp1761_dc_regmap_conf = {
 356        .name = "isp1761-dc",
 357        .reg_bits = 16,
 358        .reg_stride = 4,
 359        .val_bits = 32,
 360        .fast_io = true,
 361        .max_register = ISP176x_DC_TESTMODE,
 362        .volatile_table = &isp176x_dc_volatile_table,
 363};
 364
 365static const struct reg_field isp1761_dc_reg_fields[] = {
 366        [DC_DEVEN]              = REG_FIELD(ISP176x_DC_ADDRESS, 7, 7),
 367        [DC_DEVADDR]            = REG_FIELD(ISP176x_DC_ADDRESS, 0, 6),
 368        [DC_VBUSSTAT]           = REG_FIELD(ISP176x_DC_MODE, 8, 8),
 369        [DC_SFRESET]            = REG_FIELD(ISP176x_DC_MODE, 4, 4),
 370        [DC_GLINTENA]           = REG_FIELD(ISP176x_DC_MODE, 3, 3),
 371        [DC_CDBGMOD_ACK]        = REG_FIELD(ISP176x_DC_INTCONF, 6, 6),
 372        [DC_DDBGMODIN_ACK]      = REG_FIELD(ISP176x_DC_INTCONF, 4, 4),
 373        [DC_DDBGMODOUT_ACK]     = REG_FIELD(ISP176x_DC_INTCONF, 2, 2),
 374        [DC_INTPOL]             = REG_FIELD(ISP176x_DC_INTCONF, 0, 0),
 375        [DC_IEPRXTX_7]          = REG_FIELD(ISP176x_DC_INTENABLE, 25, 25),
 376        [DC_IEPRXTX_6]          = REG_FIELD(ISP176x_DC_INTENABLE, 23, 23),
 377        [DC_IEPRXTX_5]          = REG_FIELD(ISP176x_DC_INTENABLE, 21, 21),
 378        [DC_IEPRXTX_4]          = REG_FIELD(ISP176x_DC_INTENABLE, 19, 19),
 379        [DC_IEPRXTX_3]          = REG_FIELD(ISP176x_DC_INTENABLE, 17, 17),
 380        [DC_IEPRXTX_2]          = REG_FIELD(ISP176x_DC_INTENABLE, 15, 15),
 381        [DC_IEPRXTX_1]          = REG_FIELD(ISP176x_DC_INTENABLE, 13, 13),
 382        [DC_IEPRXTX_0]          = REG_FIELD(ISP176x_DC_INTENABLE, 11, 11),
 383        [DC_IEP0SETUP]          = REG_FIELD(ISP176x_DC_INTENABLE, 8, 8),
 384        [DC_IEVBUS]             = REG_FIELD(ISP176x_DC_INTENABLE, 7, 7),
 385        [DC_IEHS_STA]           = REG_FIELD(ISP176x_DC_INTENABLE, 5, 5),
 386        [DC_IERESM]             = REG_FIELD(ISP176x_DC_INTENABLE, 4, 4),
 387        [DC_IESUSP]             = REG_FIELD(ISP176x_DC_INTENABLE, 3, 3),
 388        [DC_IEBRST]             = REG_FIELD(ISP176x_DC_INTENABLE, 0, 0),
 389        [DC_EP0SETUP]           = REG_FIELD(ISP176x_DC_EPINDEX, 5, 5),
 390        [DC_ENDPIDX]            = REG_FIELD(ISP176x_DC_EPINDEX, 1, 4),
 391        [DC_EPDIR]              = REG_FIELD(ISP176x_DC_EPINDEX, 0, 0),
 392        [DC_CLBUF]              = REG_FIELD(ISP176x_DC_CTRLFUNC, 4, 4),
 393        [DC_VENDP]              = REG_FIELD(ISP176x_DC_CTRLFUNC, 3, 3),
 394        [DC_DSEN]               = REG_FIELD(ISP176x_DC_CTRLFUNC, 2, 2),
 395        [DC_STATUS]             = REG_FIELD(ISP176x_DC_CTRLFUNC, 1, 1),
 396        [DC_STALL]              = REG_FIELD(ISP176x_DC_CTRLFUNC, 0, 0),
 397        [DC_BUFLEN]             = REG_FIELD(ISP176x_DC_BUFLEN, 0, 15),
 398        [DC_FFOSZ]              = REG_FIELD(ISP176x_DC_EPMAXPKTSZ, 0, 10),
 399        [DC_EPENABLE]           = REG_FIELD(ISP176x_DC_EPTYPE, 3, 3),
 400        [DC_ENDPTYP]            = REG_FIELD(ISP176x_DC_EPTYPE, 0, 1),
 401        [DC_UFRAMENUM]          = REG_FIELD(ISP176x_DC_FRAMENUM, 11, 13),
 402        [DC_FRAMENUM]           = REG_FIELD(ISP176x_DC_FRAMENUM, 0, 10),
 403        [DC_CHIP_ID_HIGH]       = REG_FIELD(ISP176x_DC_CHIPID, 16, 31),
 404        [DC_CHIP_ID_LOW]        = REG_FIELD(ISP176x_DC_CHIPID, 0, 15),
 405        [DC_SCRATCH]            = REG_FIELD(ISP176x_DC_SCRATCH, 0, 15),
 406};
 407
 408static const struct regmap_range isp1763_dc_volatile_ranges[] = {
 409        regmap_reg_range(ISP1763_DC_EPMAXPKTSZ, ISP1763_DC_EPTYPE),
 410        regmap_reg_range(ISP1763_DC_BUFLEN, ISP1763_DC_EPINDEX),
 411};
 412
 413static const struct regmap_access_table isp1763_dc_volatile_table = {
 414        .yes_ranges     = isp1763_dc_volatile_ranges,
 415        .n_yes_ranges   = ARRAY_SIZE(isp1763_dc_volatile_ranges),
 416};
 417
 418static const struct reg_field isp1763_dc_reg_fields[] = {
 419        [DC_DEVEN]              = REG_FIELD(ISP1763_DC_ADDRESS, 7, 7),
 420        [DC_DEVADDR]            = REG_FIELD(ISP1763_DC_ADDRESS, 0, 6),
 421        [DC_VBUSSTAT]           = REG_FIELD(ISP1763_DC_MODE, 8, 8),
 422        [DC_SFRESET]            = REG_FIELD(ISP1763_DC_MODE, 4, 4),
 423        [DC_GLINTENA]           = REG_FIELD(ISP1763_DC_MODE, 3, 3),
 424        [DC_CDBGMOD_ACK]        = REG_FIELD(ISP1763_DC_INTCONF, 6, 6),
 425        [DC_DDBGMODIN_ACK]      = REG_FIELD(ISP1763_DC_INTCONF, 4, 4),
 426        [DC_DDBGMODOUT_ACK]     = REG_FIELD(ISP1763_DC_INTCONF, 2, 2),
 427        [DC_INTPOL]             = REG_FIELD(ISP1763_DC_INTCONF, 0, 0),
 428        [DC_IEPRXTX_7]          = REG_FIELD(ISP1763_DC_INTENABLE, 25, 25),
 429        [DC_IEPRXTX_6]          = REG_FIELD(ISP1763_DC_INTENABLE, 23, 23),
 430        [DC_IEPRXTX_5]          = REG_FIELD(ISP1763_DC_INTENABLE, 21, 21),
 431        [DC_IEPRXTX_4]          = REG_FIELD(ISP1763_DC_INTENABLE, 19, 19),
 432        [DC_IEPRXTX_3]          = REG_FIELD(ISP1763_DC_INTENABLE, 17, 17),
 433        [DC_IEPRXTX_2]          = REG_FIELD(ISP1763_DC_INTENABLE, 15, 15),
 434        [DC_IEPRXTX_1]          = REG_FIELD(ISP1763_DC_INTENABLE, 13, 13),
 435        [DC_IEPRXTX_0]          = REG_FIELD(ISP1763_DC_INTENABLE, 11, 11),
 436        [DC_IEP0SETUP]          = REG_FIELD(ISP1763_DC_INTENABLE, 8, 8),
 437        [DC_IEVBUS]             = REG_FIELD(ISP1763_DC_INTENABLE, 7, 7),
 438        [DC_IEHS_STA]           = REG_FIELD(ISP1763_DC_INTENABLE, 5, 5),
 439        [DC_IERESM]             = REG_FIELD(ISP1763_DC_INTENABLE, 4, 4),
 440        [DC_IESUSP]             = REG_FIELD(ISP1763_DC_INTENABLE, 3, 3),
 441        [DC_IEBRST]             = REG_FIELD(ISP1763_DC_INTENABLE, 0, 0),
 442        [DC_EP0SETUP]           = REG_FIELD(ISP1763_DC_EPINDEX, 5, 5),
 443        [DC_ENDPIDX]            = REG_FIELD(ISP1763_DC_EPINDEX, 1, 4),
 444        [DC_EPDIR]              = REG_FIELD(ISP1763_DC_EPINDEX, 0, 0),
 445        [DC_CLBUF]              = REG_FIELD(ISP1763_DC_CTRLFUNC, 4, 4),
 446        [DC_VENDP]              = REG_FIELD(ISP1763_DC_CTRLFUNC, 3, 3),
 447        [DC_DSEN]               = REG_FIELD(ISP1763_DC_CTRLFUNC, 2, 2),
 448        [DC_STATUS]             = REG_FIELD(ISP1763_DC_CTRLFUNC, 1, 1),
 449        [DC_STALL]              = REG_FIELD(ISP1763_DC_CTRLFUNC, 0, 0),
 450        [DC_BUFLEN]             = REG_FIELD(ISP1763_DC_BUFLEN, 0, 15),
 451        [DC_FFOSZ]              = REG_FIELD(ISP1763_DC_EPMAXPKTSZ, 0, 10),
 452        [DC_EPENABLE]           = REG_FIELD(ISP1763_DC_EPTYPE, 3, 3),
 453        [DC_ENDPTYP]            = REG_FIELD(ISP1763_DC_EPTYPE, 0, 1),
 454        [DC_UFRAMENUM]          = REG_FIELD(ISP1763_DC_FRAMENUM, 11, 13),
 455        [DC_FRAMENUM]           = REG_FIELD(ISP1763_DC_FRAMENUM, 0, 10),
 456        [DC_CHIP_ID_HIGH]       = REG_FIELD(ISP1763_DC_CHIPID_HIGH, 0, 15),
 457        [DC_CHIP_ID_LOW]        = REG_FIELD(ISP1763_DC_CHIPID_LOW, 0, 15),
 458        [DC_SCRATCH]            = REG_FIELD(ISP1763_DC_SCRATCH, 0, 15),
 459};
 460
 461static const struct regmap_config isp1763_dc_regmap_conf = {
 462        .name = "isp1763-dc",
 463        .reg_bits = 8,
 464        .reg_stride = 2,
 465        .val_bits = 16,
 466        .fast_io = true,
 467        .max_register = ISP1763_DC_TESTMODE,
 468        .volatile_table = &isp1763_dc_volatile_table,
 469};
 470
 471int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
 472                     struct device *dev, unsigned int devflags)
 473{
 474        const struct regmap_config *hc_regmap;
 475        const struct reg_field *hc_reg_fields;
 476        const struct regmap_config *dc_regmap;
 477        const struct reg_field *dc_reg_fields;
 478        struct isp1760_device *isp;
 479        struct isp1760_hcd *hcd;
 480        struct isp1760_udc *udc;
 481        struct regmap_field *f;
 482        bool udc_enabled;
 483        int ret;
 484        int i;
 485
 486        /*
 487         * If neither the HCD not the UDC is enabled return an error, as no
 488         * device would be registered.
 489         */
 490        udc_enabled = ((devflags & ISP1760_FLAG_ISP1763) ||
 491                       (devflags & ISP1760_FLAG_ISP1761));
 492
 493        if ((!IS_ENABLED(CONFIG_USB_ISP1760_HCD) || usb_disabled()) &&
 494            (!IS_ENABLED(CONFIG_USB_ISP1761_UDC) || !udc_enabled))
 495                return -ENODEV;
 496
 497        isp = devm_kzalloc(dev, sizeof(*isp), GFP_KERNEL);
 498        if (!isp)
 499                return -ENOMEM;
 500
 501        isp->dev = dev;
 502        isp->devflags = devflags;
 503        hcd = &isp->hcd;
 504        udc = &isp->udc;
 505
 506        hcd->is_isp1763 = !!(devflags & ISP1760_FLAG_ISP1763);
 507        udc->is_isp1763 = !!(devflags & ISP1760_FLAG_ISP1763);
 508
 509        if (!hcd->is_isp1763 && (devflags & ISP1760_FLAG_BUS_WIDTH_8)) {
 510                dev_err(dev, "isp1760/61 do not support data width 8\n");
 511                return -EINVAL;
 512        }
 513
 514        if (hcd->is_isp1763) {
 515                hc_regmap = &isp1763_hc_regmap_conf;
 516                hc_reg_fields = &isp1763_hc_reg_fields[0];
 517                dc_regmap = &isp1763_dc_regmap_conf;
 518                dc_reg_fields = &isp1763_dc_reg_fields[0];
 519        } else {
 520                hc_regmap = &isp1760_hc_regmap_conf;
 521                hc_reg_fields = &isp1760_hc_reg_fields[0];
 522                dc_regmap = &isp1761_dc_regmap_conf;
 523                dc_reg_fields = &isp1761_dc_reg_fields[0];
 524        }
 525
 526        isp->rst_gpio = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH);
 527        if (IS_ERR(isp->rst_gpio))
 528                return PTR_ERR(isp->rst_gpio);
 529
 530        hcd->base = devm_ioremap_resource(dev, mem);
 531        if (IS_ERR(hcd->base))
 532                return PTR_ERR(hcd->base);
 533
 534        hcd->regs = devm_regmap_init_mmio(dev, hcd->base, hc_regmap);
 535        if (IS_ERR(hcd->regs))
 536                return PTR_ERR(hcd->regs);
 537
 538        for (i = 0; i < HC_FIELD_MAX; i++) {
 539                f = devm_regmap_field_alloc(dev, hcd->regs, hc_reg_fields[i]);
 540                if (IS_ERR(f))
 541                        return PTR_ERR(f);
 542
 543                hcd->fields[i] = f;
 544        }
 545
 546        udc->regs = devm_regmap_init_mmio(dev, hcd->base, dc_regmap);
 547        if (IS_ERR(udc->regs))
 548                return PTR_ERR(udc->regs);
 549
 550        for (i = 0; i < DC_FIELD_MAX; i++) {
 551                f = devm_regmap_field_alloc(dev, udc->regs, dc_reg_fields[i]);
 552                if (IS_ERR(f))
 553                        return PTR_ERR(f);
 554
 555                udc->fields[i] = f;
 556        }
 557
 558        if (hcd->is_isp1763)
 559                hcd->memory_layout = &isp1763_memory_conf;
 560        else
 561                hcd->memory_layout = &isp176x_memory_conf;
 562
 563        ret = isp1760_init_core(isp);
 564        if (ret < 0)
 565                return ret;
 566
 567        if (IS_ENABLED(CONFIG_USB_ISP1760_HCD) && !usb_disabled()) {
 568                ret = isp1760_hcd_register(hcd, mem, irq,
 569                                           irqflags | IRQF_SHARED, dev);
 570                if (ret < 0)
 571                        return ret;
 572        }
 573
 574        if (IS_ENABLED(CONFIG_USB_ISP1761_UDC) && udc_enabled) {
 575                ret = isp1760_udc_register(isp, irq, irqflags);
 576                if (ret < 0) {
 577                        isp1760_hcd_unregister(hcd);
 578                        return ret;
 579                }
 580        }
 581
 582        dev_set_drvdata(dev, isp);
 583
 584        return 0;
 585}
 586
 587void isp1760_unregister(struct device *dev)
 588{
 589        struct isp1760_device *isp = dev_get_drvdata(dev);
 590
 591        isp1760_udc_unregister(isp);
 592        isp1760_hcd_unregister(&isp->hcd);
 593}
 594
 595MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
 596MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
 597MODULE_LICENSE("GPL v2");
 598