linux/drivers/tty/serial/pmac_zilog.c
<<
>>
Prefs
   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Driver for PowerMac Z85c30 based ESCC cell found in the
   4 * "macio" ASICs of various PowerMac models
   5 * 
   6 * Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org)
   7 *
   8 * Derived from drivers/macintosh/macserial.c by Paul Mackerras
   9 * and drivers/serial/sunzilog.c by David S. Miller
  10 *
  11 * Hrm... actually, I ripped most of sunzilog (Thanks David !) and
  12 * adapted special tweaks needed for us. I don't think it's worth
  13 * merging back those though. The DMA code still has to get in
  14 * and once done, I expect that driver to remain fairly stable in
  15 * the long term, unless we change the driver model again...
  16 *
  17 * 2004-08-06 Harald Welte <laforge@gnumonks.org>
  18 *      - Enable BREAK interrupt
  19 *      - Add support for sysreq
  20 *
  21 * TODO:   - Add DMA support
  22 *         - Defer port shutdown to a few seconds after close
  23 *         - maybe put something right into uap->clk_divisor
  24 */
  25
  26#undef DEBUG
  27#undef DEBUG_HARD
  28#undef USE_CTRL_O_SYSRQ
  29
  30#include <linux/module.h>
  31#include <linux/tty.h>
  32
  33#include <linux/tty_flip.h>
  34#include <linux/major.h>
  35#include <linux/string.h>
  36#include <linux/fcntl.h>
  37#include <linux/mm.h>
  38#include <linux/kernel.h>
  39#include <linux/delay.h>
  40#include <linux/init.h>
  41#include <linux/console.h>
  42#include <linux/adb.h>
  43#include <linux/pmu.h>
  44#include <linux/bitops.h>
  45#include <linux/sysrq.h>
  46#include <linux/mutex.h>
  47#include <linux/of_address.h>
  48#include <linux/of_irq.h>
  49#include <asm/sections.h>
  50#include <asm/io.h>
  51#include <asm/irq.h>
  52
  53#ifdef CONFIG_PPC_PMAC
  54#include <asm/prom.h>
  55#include <asm/machdep.h>
  56#include <asm/pmac_feature.h>
  57#include <asm/dbdma.h>
  58#include <asm/macio.h>
  59#else
  60#include <linux/platform_device.h>
  61#define of_machine_is_compatible(x) (0)
  62#endif
  63
  64#include <linux/serial.h>
  65#include <linux/serial_core.h>
  66
  67#include "pmac_zilog.h"
  68
  69/* Not yet implemented */
  70#undef HAS_DBDMA
  71
  72static char version[] __initdata = "pmac_zilog: 0.6 (Benjamin Herrenschmidt <benh@kernel.crashing.org>)";
  73MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
  74MODULE_DESCRIPTION("Driver for the Mac and PowerMac serial ports.");
  75MODULE_LICENSE("GPL");
  76
  77#ifdef CONFIG_SERIAL_PMACZILOG_TTYS
  78#define PMACZILOG_MAJOR         TTY_MAJOR
  79#define PMACZILOG_MINOR         64
  80#define PMACZILOG_NAME          "ttyS"
  81#else
  82#define PMACZILOG_MAJOR         204
  83#define PMACZILOG_MINOR         192
  84#define PMACZILOG_NAME          "ttyPZ"
  85#endif
  86
  87#define pmz_debug(fmt, arg...)  pr_debug("ttyPZ%d: " fmt, uap->port.line, ## arg)
  88#define pmz_error(fmt, arg...)  pr_err("ttyPZ%d: " fmt, uap->port.line, ## arg)
  89#define pmz_info(fmt, arg...)   pr_info("ttyPZ%d: " fmt, uap->port.line, ## arg)
  90
  91/*
  92 * For the sake of early serial console, we can do a pre-probe
  93 * (optional) of the ports at rather early boot time.
  94 */
  95static struct uart_pmac_port    pmz_ports[MAX_ZS_PORTS];
  96static int                      pmz_ports_count;
  97
  98static struct uart_driver pmz_uart_reg = {
  99        .owner          =       THIS_MODULE,
 100        .driver_name    =       PMACZILOG_NAME,
 101        .dev_name       =       PMACZILOG_NAME,
 102        .major          =       PMACZILOG_MAJOR,
 103        .minor          =       PMACZILOG_MINOR,
 104};
 105
 106
 107/* 
 108 * Load all registers to reprogram the port
 109 * This function must only be called when the TX is not busy.  The UART
 110 * port lock must be held and local interrupts disabled.
 111 */
 112static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
 113{
 114        int i;
 115
 116        /* Let pending transmits finish.  */
 117        for (i = 0; i < 1000; i++) {
 118                unsigned char stat = read_zsreg(uap, R1);
 119                if (stat & ALL_SNT)
 120                        break;
 121                udelay(100);
 122        }
 123
 124        ZS_CLEARERR(uap);
 125        zssync(uap);
 126        ZS_CLEARFIFO(uap);
 127        zssync(uap);
 128        ZS_CLEARERR(uap);
 129
 130        /* Disable all interrupts.  */
 131        write_zsreg(uap, R1,
 132                    regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
 133
 134        /* Set parity, sync config, stop bits, and clock divisor.  */
 135        write_zsreg(uap, R4, regs[R4]);
 136
 137        /* Set misc. TX/RX control bits.  */
 138        write_zsreg(uap, R10, regs[R10]);
 139
 140        /* Set TX/RX controls sans the enable bits.  */
 141        write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
 142        write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
 143
 144        /* now set R7 "prime" on ESCC */
 145        write_zsreg(uap, R15, regs[R15] | EN85C30);
 146        write_zsreg(uap, R7, regs[R7P]);
 147
 148        /* make sure we use R7 "non-prime" on ESCC */
 149        write_zsreg(uap, R15, regs[R15] & ~EN85C30);
 150
 151        /* Synchronous mode config.  */
 152        write_zsreg(uap, R6, regs[R6]);
 153        write_zsreg(uap, R7, regs[R7]);
 154
 155        /* Disable baud generator.  */
 156        write_zsreg(uap, R14, regs[R14] & ~BRENAB);
 157
 158        /* Clock mode control.  */
 159        write_zsreg(uap, R11, regs[R11]);
 160
 161        /* Lower and upper byte of baud rate generator divisor.  */
 162        write_zsreg(uap, R12, regs[R12]);
 163        write_zsreg(uap, R13, regs[R13]);
 164        
 165        /* Now rewrite R14, with BRENAB (if set).  */
 166        write_zsreg(uap, R14, regs[R14]);
 167
 168        /* Reset external status interrupts.  */
 169        write_zsreg(uap, R0, RES_EXT_INT);
 170        write_zsreg(uap, R0, RES_EXT_INT);
 171
 172        /* Rewrite R3/R5, this time without enables masked.  */
 173        write_zsreg(uap, R3, regs[R3]);
 174        write_zsreg(uap, R5, regs[R5]);
 175
 176        /* Rewrite R1, this time without IRQ enabled masked.  */
 177        write_zsreg(uap, R1, regs[R1]);
 178
 179        /* Enable interrupts */
 180        write_zsreg(uap, R9, regs[R9]);
 181}
 182
 183/* 
 184 * We do like sunzilog to avoid disrupting pending Tx
 185 * Reprogram the Zilog channel HW registers with the copies found in the
 186 * software state struct.  If the transmitter is busy, we defer this update
 187 * until the next TX complete interrupt.  Else, we do it right now.
 188 *
 189 * The UART port lock must be held and local interrupts disabled.
 190 */
 191static void pmz_maybe_update_regs(struct uart_pmac_port *uap)
 192{
 193        if (!ZS_REGS_HELD(uap)) {
 194                if (ZS_TX_ACTIVE(uap)) {
 195                        uap->flags |= PMACZILOG_FLAG_REGS_HELD;
 196                } else {
 197                        pmz_debug("pmz: maybe_update_regs: updating\n");
 198                        pmz_load_zsregs(uap, uap->curregs);
 199                }
 200        }
 201}
 202
 203static void pmz_interrupt_control(struct uart_pmac_port *uap, int enable)
 204{
 205        if (enable) {
 206                uap->curregs[1] |= INT_ALL_Rx | TxINT_ENAB;
 207                if (!ZS_IS_EXTCLK(uap))
 208                        uap->curregs[1] |= EXT_INT_ENAB;
 209        } else {
 210                uap->curregs[1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
 211        }
 212        write_zsreg(uap, R1, uap->curregs[1]);
 213}
 214
 215static bool pmz_receive_chars(struct uart_pmac_port *uap)
 216        __must_hold(&uap->port.lock)
 217{
 218        struct tty_port *port;
 219        unsigned char ch, r1, drop, flag;
 220        int loops = 0;
 221
 222        /* Sanity check, make sure the old bug is no longer happening */
 223        if (uap->port.state == NULL) {
 224                WARN_ON(1);
 225                (void)read_zsdata(uap);
 226                return false;
 227        }
 228        port = &uap->port.state->port;
 229
 230        while (1) {
 231                drop = 0;
 232
 233                r1 = read_zsreg(uap, R1);
 234                ch = read_zsdata(uap);
 235
 236                if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
 237                        write_zsreg(uap, R0, ERR_RES);
 238                        zssync(uap);
 239                }
 240
 241                ch &= uap->parity_mask;
 242                if (ch == 0 && uap->flags & PMACZILOG_FLAG_BREAK) {
 243                        uap->flags &= ~PMACZILOG_FLAG_BREAK;
 244                }
 245
 246#if defined(CONFIG_MAGIC_SYSRQ) && defined(CONFIG_SERIAL_CORE_CONSOLE)
 247#ifdef USE_CTRL_O_SYSRQ
 248                /* Handle the SysRq ^O Hack */
 249                if (ch == '\x0f') {
 250                        uap->port.sysrq = jiffies + HZ*5;
 251                        goto next_char;
 252                }
 253#endif /* USE_CTRL_O_SYSRQ */
 254                if (uap->port.sysrq) {
 255                        int swallow;
 256                        spin_unlock(&uap->port.lock);
 257                        swallow = uart_handle_sysrq_char(&uap->port, ch);
 258                        spin_lock(&uap->port.lock);
 259                        if (swallow)
 260                                goto next_char;
 261                }
 262#endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */
 263
 264                /* A real serial line, record the character and status.  */
 265                if (drop)
 266                        goto next_char;
 267
 268                flag = TTY_NORMAL;
 269                uap->port.icount.rx++;
 270
 271                if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR | BRK_ABRT)) {
 272                        if (r1 & BRK_ABRT) {
 273                                pmz_debug("pmz: got break !\n");
 274                                r1 &= ~(PAR_ERR | CRC_ERR);
 275                                uap->port.icount.brk++;
 276                                if (uart_handle_break(&uap->port))
 277                                        goto next_char;
 278                        }
 279                        else if (r1 & PAR_ERR)
 280                                uap->port.icount.parity++;
 281                        else if (r1 & CRC_ERR)
 282                                uap->port.icount.frame++;
 283                        if (r1 & Rx_OVR)
 284                                uap->port.icount.overrun++;
 285                        r1 &= uap->port.read_status_mask;
 286                        if (r1 & BRK_ABRT)
 287                                flag = TTY_BREAK;
 288                        else if (r1 & PAR_ERR)
 289                                flag = TTY_PARITY;
 290                        else if (r1 & CRC_ERR)
 291                                flag = TTY_FRAME;
 292                }
 293
 294                if (uap->port.ignore_status_mask == 0xff ||
 295                    (r1 & uap->port.ignore_status_mask) == 0) {
 296                        tty_insert_flip_char(port, ch, flag);
 297                }
 298                if (r1 & Rx_OVR)
 299                        tty_insert_flip_char(port, 0, TTY_OVERRUN);
 300        next_char:
 301                /* We can get stuck in an infinite loop getting char 0 when the
 302                 * line is in a wrong HW state, we break that here.
 303                 * When that happens, I disable the receive side of the driver.
 304                 * Note that what I've been experiencing is a real irq loop where
 305                 * I'm getting flooded regardless of the actual port speed.
 306                 * Something strange is going on with the HW
 307                 */
 308                if ((++loops) > 1000)
 309                        goto flood;
 310                ch = read_zsreg(uap, R0);
 311                if (!(ch & Rx_CH_AV))
 312                        break;
 313        }
 314
 315        return true;
 316 flood:
 317        pmz_interrupt_control(uap, 0);
 318        pmz_error("pmz: rx irq flood !\n");
 319        return true;
 320}
 321
 322static void pmz_status_handle(struct uart_pmac_port *uap)
 323{
 324        unsigned char status;
 325
 326        status = read_zsreg(uap, R0);
 327        write_zsreg(uap, R0, RES_EXT_INT);
 328        zssync(uap);
 329
 330        if (ZS_IS_OPEN(uap) && ZS_WANTS_MODEM_STATUS(uap)) {
 331                if (status & SYNC_HUNT)
 332                        uap->port.icount.dsr++;
 333
 334                /* The Zilog just gives us an interrupt when DCD/CTS/etc. change.
 335                 * But it does not tell us which bit has changed, we have to keep
 336                 * track of this ourselves.
 337                 * The CTS input is inverted for some reason.  -- paulus
 338                 */
 339                if ((status ^ uap->prev_status) & DCD)
 340                        uart_handle_dcd_change(&uap->port,
 341                                               (status & DCD));
 342                if ((status ^ uap->prev_status) & CTS)
 343                        uart_handle_cts_change(&uap->port,
 344                                               !(status & CTS));
 345
 346                wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
 347        }
 348
 349        if (status & BRK_ABRT)
 350                uap->flags |= PMACZILOG_FLAG_BREAK;
 351
 352        uap->prev_status = status;
 353}
 354
 355static void pmz_transmit_chars(struct uart_pmac_port *uap)
 356{
 357        struct circ_buf *xmit;
 358
 359        if (ZS_IS_CONS(uap)) {
 360                unsigned char status = read_zsreg(uap, R0);
 361
 362                /* TX still busy?  Just wait for the next TX done interrupt.
 363                 *
 364                 * It can occur because of how we do serial console writes.  It would
 365                 * be nice to transmit console writes just like we normally would for
 366                 * a TTY line. (ie. buffered and TX interrupt driven).  That is not
 367                 * easy because console writes cannot sleep.  One solution might be
 368                 * to poll on enough port->xmit space becoming free.  -DaveM
 369                 */
 370                if (!(status & Tx_BUF_EMP))
 371                        return;
 372        }
 373
 374        uap->flags &= ~PMACZILOG_FLAG_TX_ACTIVE;
 375
 376        if (ZS_REGS_HELD(uap)) {
 377                pmz_load_zsregs(uap, uap->curregs);
 378                uap->flags &= ~PMACZILOG_FLAG_REGS_HELD;
 379        }
 380
 381        if (ZS_TX_STOPPED(uap)) {
 382                uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
 383                goto ack_tx_int;
 384        }
 385
 386        /* Under some circumstances, we see interrupts reported for
 387         * a closed channel. The interrupt mask in R1 is clear, but
 388         * R3 still signals the interrupts and we see them when taking
 389         * an interrupt for the other channel (this could be a qemu
 390         * bug but since the ESCC doc doesn't specify precsiely whether
 391         * R3 interrup status bits are masked by R1 interrupt enable
 392         * bits, better safe than sorry). --BenH.
 393         */
 394        if (!ZS_IS_OPEN(uap))
 395                goto ack_tx_int;
 396
 397        if (uap->port.x_char) {
 398                uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
 399                write_zsdata(uap, uap->port.x_char);
 400                zssync(uap);
 401                uap->port.icount.tx++;
 402                uap->port.x_char = 0;
 403                return;
 404        }
 405
 406        if (uap->port.state == NULL)
 407                goto ack_tx_int;
 408        xmit = &uap->port.state->xmit;
 409        if (uart_circ_empty(xmit)) {
 410                uart_write_wakeup(&uap->port);
 411                goto ack_tx_int;
 412        }
 413        if (uart_tx_stopped(&uap->port))
 414                goto ack_tx_int;
 415
 416        uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
 417        write_zsdata(uap, xmit->buf[xmit->tail]);
 418        zssync(uap);
 419
 420        xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 421        uap->port.icount.tx++;
 422
 423        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 424                uart_write_wakeup(&uap->port);
 425
 426        return;
 427
 428ack_tx_int:
 429        write_zsreg(uap, R0, RES_Tx_P);
 430        zssync(uap);
 431}
 432
 433/* Hrm... we register that twice, fixme later.... */
 434static irqreturn_t pmz_interrupt(int irq, void *dev_id)
 435{
 436        struct uart_pmac_port *uap = dev_id;
 437        struct uart_pmac_port *uap_a;
 438        struct uart_pmac_port *uap_b;
 439        int rc = IRQ_NONE;
 440        bool push;
 441        u8 r3;
 442
 443        uap_a = pmz_get_port_A(uap);
 444        uap_b = uap_a->mate;
 445
 446        spin_lock(&uap_a->port.lock);
 447        r3 = read_zsreg(uap_a, R3);
 448
 449#ifdef DEBUG_HARD
 450        pmz_debug("irq, r3: %x\n", r3);
 451#endif
 452        /* Channel A */
 453        push = false;
 454        if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
 455                if (!ZS_IS_OPEN(uap_a)) {
 456                        pmz_debug("ChanA interrupt while not open !\n");
 457                        goto skip_a;
 458                }
 459                write_zsreg(uap_a, R0, RES_H_IUS);
 460                zssync(uap_a);          
 461                if (r3 & CHAEXT)
 462                        pmz_status_handle(uap_a);
 463                if (r3 & CHARxIP)
 464                        push = pmz_receive_chars(uap_a);
 465                if (r3 & CHATxIP)
 466                        pmz_transmit_chars(uap_a);
 467                rc = IRQ_HANDLED;
 468        }
 469 skip_a:
 470        spin_unlock(&uap_a->port.lock);
 471        if (push)
 472                tty_flip_buffer_push(&uap->port.state->port);
 473
 474        if (!uap_b)
 475                goto out;
 476
 477        spin_lock(&uap_b->port.lock);
 478        push = false;
 479        if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
 480                if (!ZS_IS_OPEN(uap_b)) {
 481                        pmz_debug("ChanB interrupt while not open !\n");
 482                        goto skip_b;
 483                }
 484                write_zsreg(uap_b, R0, RES_H_IUS);
 485                zssync(uap_b);
 486                if (r3 & CHBEXT)
 487                        pmz_status_handle(uap_b);
 488                if (r3 & CHBRxIP)
 489                        push = pmz_receive_chars(uap_b);
 490                if (r3 & CHBTxIP)
 491                        pmz_transmit_chars(uap_b);
 492                rc = IRQ_HANDLED;
 493        }
 494 skip_b:
 495        spin_unlock(&uap_b->port.lock);
 496        if (push)
 497                tty_flip_buffer_push(&uap->port.state->port);
 498
 499 out:
 500        return rc;
 501}
 502
 503/*
 504 * Peek the status register, lock not held by caller
 505 */
 506static inline u8 pmz_peek_status(struct uart_pmac_port *uap)
 507{
 508        unsigned long flags;
 509        u8 status;
 510        
 511        spin_lock_irqsave(&uap->port.lock, flags);
 512        status = read_zsreg(uap, R0);
 513        spin_unlock_irqrestore(&uap->port.lock, flags);
 514
 515        return status;
 516}
 517
 518/* 
 519 * Check if transmitter is empty
 520 * The port lock is not held.
 521 */
 522static unsigned int pmz_tx_empty(struct uart_port *port)
 523{
 524        unsigned char status;
 525
 526        status = pmz_peek_status(to_pmz(port));
 527        if (status & Tx_BUF_EMP)
 528                return TIOCSER_TEMT;
 529        return 0;
 530}
 531
 532/* 
 533 * Set Modem Control (RTS & DTR) bits
 534 * The port lock is held and interrupts are disabled.
 535 * Note: Shall we really filter out RTS on external ports or
 536 * should that be dealt at higher level only ?
 537 */
 538static void pmz_set_mctrl(struct uart_port *port, unsigned int mctrl)
 539{
 540        struct uart_pmac_port *uap = to_pmz(port);
 541        unsigned char set_bits, clear_bits;
 542
 543        /* Do nothing for irda for now... */
 544        if (ZS_IS_IRDA(uap))
 545                return;
 546        /* We get called during boot with a port not up yet */
 547        if (!(ZS_IS_OPEN(uap) || ZS_IS_CONS(uap)))
 548                return;
 549
 550        set_bits = clear_bits = 0;
 551
 552        if (ZS_IS_INTMODEM(uap)) {
 553                if (mctrl & TIOCM_RTS)
 554                        set_bits |= RTS;
 555                else
 556                        clear_bits |= RTS;
 557        }
 558        if (mctrl & TIOCM_DTR)
 559                set_bits |= DTR;
 560        else
 561                clear_bits |= DTR;
 562
 563        /* NOTE: Not subject to 'transmitter active' rule.  */ 
 564        uap->curregs[R5] |= set_bits;
 565        uap->curregs[R5] &= ~clear_bits;
 566
 567        write_zsreg(uap, R5, uap->curregs[R5]);
 568        pmz_debug("pmz_set_mctrl: set bits: %x, clear bits: %x -> %x\n",
 569                  set_bits, clear_bits, uap->curregs[R5]);
 570        zssync(uap);
 571}
 572
 573/* 
 574 * Get Modem Control bits (only the input ones, the core will
 575 * or that with a cached value of the control ones)
 576 * The port lock is held and interrupts are disabled.
 577 */
 578static unsigned int pmz_get_mctrl(struct uart_port *port)
 579{
 580        struct uart_pmac_port *uap = to_pmz(port);
 581        unsigned char status;
 582        unsigned int ret;
 583
 584        status = read_zsreg(uap, R0);
 585
 586        ret = 0;
 587        if (status & DCD)
 588                ret |= TIOCM_CAR;
 589        if (status & SYNC_HUNT)
 590                ret |= TIOCM_DSR;
 591        if (!(status & CTS))
 592                ret |= TIOCM_CTS;
 593
 594        return ret;
 595}
 596
 597/* 
 598 * Stop TX side. Dealt like sunzilog at next Tx interrupt,
 599 * though for DMA, we will have to do a bit more.
 600 * The port lock is held and interrupts are disabled.
 601 */
 602static void pmz_stop_tx(struct uart_port *port)
 603{
 604        to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED;
 605}
 606
 607/* 
 608 * Kick the Tx side.
 609 * The port lock is held and interrupts are disabled.
 610 */
 611static void pmz_start_tx(struct uart_port *port)
 612{
 613        struct uart_pmac_port *uap = to_pmz(port);
 614        unsigned char status;
 615
 616        pmz_debug("pmz: start_tx()\n");
 617
 618        uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
 619        uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
 620
 621        status = read_zsreg(uap, R0);
 622
 623        /* TX busy?  Just wait for the TX done interrupt.  */
 624        if (!(status & Tx_BUF_EMP))
 625                return;
 626
 627        /* Send the first character to jump-start the TX done
 628         * IRQ sending engine.
 629         */
 630        if (port->x_char) {
 631                write_zsdata(uap, port->x_char);
 632                zssync(uap);
 633                port->icount.tx++;
 634                port->x_char = 0;
 635        } else {
 636                struct circ_buf *xmit = &port->state->xmit;
 637
 638                if (uart_circ_empty(xmit))
 639                        goto out;
 640                write_zsdata(uap, xmit->buf[xmit->tail]);
 641                zssync(uap);
 642                xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 643                port->icount.tx++;
 644
 645                if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 646                        uart_write_wakeup(&uap->port);
 647        }
 648 out:
 649        pmz_debug("pmz: start_tx() done.\n");
 650}
 651
 652/* 
 653 * Stop Rx side, basically disable emitting of
 654 * Rx interrupts on the port. We don't disable the rx
 655 * side of the chip proper though
 656 * The port lock is held.
 657 */
 658static void pmz_stop_rx(struct uart_port *port)
 659{
 660        struct uart_pmac_port *uap = to_pmz(port);
 661
 662        pmz_debug("pmz: stop_rx()()\n");
 663
 664        /* Disable all RX interrupts.  */
 665        uap->curregs[R1] &= ~RxINT_MASK;
 666        pmz_maybe_update_regs(uap);
 667
 668        pmz_debug("pmz: stop_rx() done.\n");
 669}
 670
 671/* 
 672 * Enable modem status change interrupts
 673 * The port lock is held.
 674 */
 675static void pmz_enable_ms(struct uart_port *port)
 676{
 677        struct uart_pmac_port *uap = to_pmz(port);
 678        unsigned char new_reg;
 679
 680        if (ZS_IS_IRDA(uap))
 681                return;
 682        new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE);
 683        if (new_reg != uap->curregs[R15]) {
 684                uap->curregs[R15] = new_reg;
 685
 686                /* NOTE: Not subject to 'transmitter active' rule. */
 687                write_zsreg(uap, R15, uap->curregs[R15]);
 688        }
 689}
 690
 691/* 
 692 * Control break state emission
 693 * The port lock is not held.
 694 */
 695static void pmz_break_ctl(struct uart_port *port, int break_state)
 696{
 697        struct uart_pmac_port *uap = to_pmz(port);
 698        unsigned char set_bits, clear_bits, new_reg;
 699        unsigned long flags;
 700
 701        set_bits = clear_bits = 0;
 702
 703        if (break_state)
 704                set_bits |= SND_BRK;
 705        else
 706                clear_bits |= SND_BRK;
 707
 708        spin_lock_irqsave(&port->lock, flags);
 709
 710        new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits;
 711        if (new_reg != uap->curregs[R5]) {
 712                uap->curregs[R5] = new_reg;
 713                write_zsreg(uap, R5, uap->curregs[R5]);
 714        }
 715
 716        spin_unlock_irqrestore(&port->lock, flags);
 717}
 718
 719#ifdef CONFIG_PPC_PMAC
 720
 721/*
 722 * Turn power on or off to the SCC and associated stuff
 723 * (port drivers, modem, IR port, etc.)
 724 * Returns the number of milliseconds we should wait before
 725 * trying to use the port.
 726 */
 727static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
 728{
 729        int delay = 0;
 730        int rc;
 731
 732        if (state) {
 733                rc = pmac_call_feature(
 734                        PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 1);
 735                pmz_debug("port power on result: %d\n", rc);
 736                if (ZS_IS_INTMODEM(uap)) {
 737                        rc = pmac_call_feature(
 738                                PMAC_FTR_MODEM_ENABLE, uap->node, 0, 1);
 739                        delay = 2500;   /* wait for 2.5s before using */
 740                        pmz_debug("modem power result: %d\n", rc);
 741                }
 742        } else {
 743                /* TODO: Make that depend on a timer, don't power down
 744                 * immediately
 745                 */
 746                if (ZS_IS_INTMODEM(uap)) {
 747                        rc = pmac_call_feature(
 748                                PMAC_FTR_MODEM_ENABLE, uap->node, 0, 0);
 749                        pmz_debug("port power off result: %d\n", rc);
 750                }
 751                pmac_call_feature(PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 0);
 752        }
 753        return delay;
 754}
 755
 756#else
 757
 758static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
 759{
 760        return 0;
 761}
 762
 763#endif /* !CONFIG_PPC_PMAC */
 764
 765/*
 766 * FixZeroBug....Works around a bug in the SCC receiving channel.
 767 * Inspired from Darwin code, 15 Sept. 2000  -DanM
 768 *
 769 * The following sequence prevents a problem that is seen with O'Hare ASICs
 770 * (most versions -- also with some Heathrow and Hydra ASICs) where a zero
 771 * at the input to the receiver becomes 'stuck' and locks up the receiver.
 772 * This problem can occur as a result of a zero bit at the receiver input
 773 * coincident with any of the following events:
 774 *
 775 *      The SCC is initialized (hardware or software).
 776 *      A framing error is detected.
 777 *      The clocking option changes from synchronous or X1 asynchronous
 778 *              clocking to X16, X32, or X64 asynchronous clocking.
 779 *      The decoding mode is changed among NRZ, NRZI, FM0, or FM1.
 780 *
 781 * This workaround attempts to recover from the lockup condition by placing
 782 * the SCC in synchronous loopback mode with a fast clock before programming
 783 * any of the asynchronous modes.
 784 */
 785static void pmz_fix_zero_bug_scc(struct uart_pmac_port *uap)
 786{
 787        write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
 788        zssync(uap);
 789        udelay(10);
 790        write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV);
 791        zssync(uap);
 792
 793        write_zsreg(uap, 4, X1CLK | MONSYNC);
 794        write_zsreg(uap, 3, Rx8);
 795        write_zsreg(uap, 5, Tx8 | RTS);
 796        write_zsreg(uap, 9, NV);        /* Didn't we already do this? */
 797        write_zsreg(uap, 11, RCBR | TCBR);
 798        write_zsreg(uap, 12, 0);
 799        write_zsreg(uap, 13, 0);
 800        write_zsreg(uap, 14, (LOOPBAK | BRSRC));
 801        write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB));
 802        write_zsreg(uap, 3, Rx8 | RxENABLE);
 803        write_zsreg(uap, 0, RES_EXT_INT);
 804        write_zsreg(uap, 0, RES_EXT_INT);
 805        write_zsreg(uap, 0, RES_EXT_INT);       /* to kill some time */
 806
 807        /* The channel should be OK now, but it is probably receiving
 808         * loopback garbage.
 809         * Switch to asynchronous mode, disable the receiver,
 810         * and discard everything in the receive buffer.
 811         */
 812        write_zsreg(uap, 9, NV);
 813        write_zsreg(uap, 4, X16CLK | SB_MASK);
 814        write_zsreg(uap, 3, Rx8);
 815
 816        while (read_zsreg(uap, 0) & Rx_CH_AV) {
 817                (void)read_zsreg(uap, 8);
 818                write_zsreg(uap, 0, RES_EXT_INT);
 819                write_zsreg(uap, 0, ERR_RES);
 820        }
 821}
 822
 823/*
 824 * Real startup routine, powers up the hardware and sets up
 825 * the SCC. Returns a delay in ms where you need to wait before
 826 * actually using the port, this is typically the internal modem
 827 * powerup delay. This routine expect the lock to be taken.
 828 */
 829static int __pmz_startup(struct uart_pmac_port *uap)
 830{
 831        int pwr_delay = 0;
 832
 833        memset(&uap->curregs, 0, sizeof(uap->curregs));
 834
 835        /* Power up the SCC & underlying hardware (modem/irda) */
 836        pwr_delay = pmz_set_scc_power(uap, 1);
 837
 838        /* Nice buggy HW ... */
 839        pmz_fix_zero_bug_scc(uap);
 840
 841        /* Reset the channel */
 842        uap->curregs[R9] = 0;
 843        write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
 844        zssync(uap);
 845        udelay(10);
 846        write_zsreg(uap, 9, 0);
 847        zssync(uap);
 848
 849        /* Clear the interrupt registers */
 850        write_zsreg(uap, R1, 0);
 851        write_zsreg(uap, R0, ERR_RES);
 852        write_zsreg(uap, R0, ERR_RES);
 853        write_zsreg(uap, R0, RES_H_IUS);
 854        write_zsreg(uap, R0, RES_H_IUS);
 855
 856        /* Setup some valid baud rate */
 857        uap->curregs[R4] = X16CLK | SB1;
 858        uap->curregs[R3] = Rx8;
 859        uap->curregs[R5] = Tx8 | RTS;
 860        if (!ZS_IS_IRDA(uap))
 861                uap->curregs[R5] |= DTR;
 862        uap->curregs[R12] = 0;
 863        uap->curregs[R13] = 0;
 864        uap->curregs[R14] = BRENAB;
 865
 866        /* Clear handshaking, enable BREAK interrupts */
 867        uap->curregs[R15] = BRKIE;
 868
 869        /* Master interrupt enable */
 870        uap->curregs[R9] |= NV | MIE;
 871
 872        pmz_load_zsregs(uap, uap->curregs);
 873
 874        /* Enable receiver and transmitter.  */
 875        write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE);
 876        write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE);
 877
 878        /* Remember status for DCD/CTS changes */
 879        uap->prev_status = read_zsreg(uap, R0);
 880
 881        return pwr_delay;
 882}
 883
 884static void pmz_irda_reset(struct uart_pmac_port *uap)
 885{
 886        unsigned long flags;
 887
 888        spin_lock_irqsave(&uap->port.lock, flags);
 889        uap->curregs[R5] |= DTR;
 890        write_zsreg(uap, R5, uap->curregs[R5]);
 891        zssync(uap);
 892        spin_unlock_irqrestore(&uap->port.lock, flags);
 893        msleep(110);
 894
 895        spin_lock_irqsave(&uap->port.lock, flags);
 896        uap->curregs[R5] &= ~DTR;
 897        write_zsreg(uap, R5, uap->curregs[R5]);
 898        zssync(uap);
 899        spin_unlock_irqrestore(&uap->port.lock, flags);
 900        msleep(10);
 901}
 902
 903/*
 904 * This is the "normal" startup routine, using the above one
 905 * wrapped with the lock and doing a schedule delay
 906 */
 907static int pmz_startup(struct uart_port *port)
 908{
 909        struct uart_pmac_port *uap = to_pmz(port);
 910        unsigned long flags;
 911        int pwr_delay = 0;
 912
 913        pmz_debug("pmz: startup()\n");
 914
 915        uap->flags |= PMACZILOG_FLAG_IS_OPEN;
 916
 917        /* A console is never powered down. Else, power up and
 918         * initialize the chip
 919         */
 920        if (!ZS_IS_CONS(uap)) {
 921                spin_lock_irqsave(&port->lock, flags);
 922                pwr_delay = __pmz_startup(uap);
 923                spin_unlock_irqrestore(&port->lock, flags);
 924        }       
 925        sprintf(uap->irq_name, PMACZILOG_NAME"%d", uap->port.line);
 926        if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED,
 927                        uap->irq_name, uap)) {
 928                pmz_error("Unable to register zs interrupt handler.\n");
 929                pmz_set_scc_power(uap, 0);
 930                return -ENXIO;
 931        }
 932
 933        /* Right now, we deal with delay by blocking here, I'll be
 934         * smarter later on
 935         */
 936        if (pwr_delay != 0) {
 937                pmz_debug("pmz: delaying %d ms\n", pwr_delay);
 938                msleep(pwr_delay);
 939        }
 940
 941        /* IrDA reset is done now */
 942        if (ZS_IS_IRDA(uap))
 943                pmz_irda_reset(uap);
 944
 945        /* Enable interrupt requests for the channel */
 946        spin_lock_irqsave(&port->lock, flags);
 947        pmz_interrupt_control(uap, 1);
 948        spin_unlock_irqrestore(&port->lock, flags);
 949
 950        pmz_debug("pmz: startup() done.\n");
 951
 952        return 0;
 953}
 954
 955static void pmz_shutdown(struct uart_port *port)
 956{
 957        struct uart_pmac_port *uap = to_pmz(port);
 958        unsigned long flags;
 959
 960        pmz_debug("pmz: shutdown()\n");
 961
 962        spin_lock_irqsave(&port->lock, flags);
 963
 964        /* Disable interrupt requests for the channel */
 965        pmz_interrupt_control(uap, 0);
 966
 967        if (!ZS_IS_CONS(uap)) {
 968                /* Disable receiver and transmitter */
 969                uap->curregs[R3] &= ~RxENABLE;
 970                uap->curregs[R5] &= ~TxENABLE;
 971
 972                /* Disable break assertion */
 973                uap->curregs[R5] &= ~SND_BRK;
 974                pmz_maybe_update_regs(uap);
 975        }
 976
 977        spin_unlock_irqrestore(&port->lock, flags);
 978
 979        /* Release interrupt handler */
 980        free_irq(uap->port.irq, uap);
 981
 982        spin_lock_irqsave(&port->lock, flags);
 983
 984        uap->flags &= ~PMACZILOG_FLAG_IS_OPEN;
 985
 986        if (!ZS_IS_CONS(uap))
 987                pmz_set_scc_power(uap, 0);      /* Shut the chip down */
 988
 989        spin_unlock_irqrestore(&port->lock, flags);
 990
 991        pmz_debug("pmz: shutdown() done.\n");
 992}
 993
 994/* Shared by TTY driver and serial console setup.  The port lock is held
 995 * and local interrupts are disabled.
 996 */
 997static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag,
 998                              unsigned int iflag, unsigned long baud)
 999{
1000        int brg;
1001
1002        /* Switch to external clocking for IrDA high clock rates. That
1003         * code could be re-used for Midi interfaces with different
1004         * multipliers
1005         */
1006        if (baud >= 115200 && ZS_IS_IRDA(uap)) {
1007                uap->curregs[R4] = X1CLK;
1008                uap->curregs[R11] = RCTRxCP | TCTRxCP;
1009                uap->curregs[R14] = 0; /* BRG off */
1010                uap->curregs[R12] = 0;
1011                uap->curregs[R13] = 0;
1012                uap->flags |= PMACZILOG_FLAG_IS_EXTCLK;
1013        } else {
1014                switch (baud) {
1015                case ZS_CLOCK/16:       /* 230400 */
1016                        uap->curregs[R4] = X16CLK;
1017                        uap->curregs[R11] = 0;
1018                        uap->curregs[R14] = 0;
1019                        break;
1020                case ZS_CLOCK/32:       /* 115200 */
1021                        uap->curregs[R4] = X32CLK;
1022                        uap->curregs[R11] = 0;
1023                        uap->curregs[R14] = 0;
1024                        break;
1025                default:
1026                        uap->curregs[R4] = X16CLK;
1027                        uap->curregs[R11] = TCBR | RCBR;
1028                        brg = BPS_TO_BRG(baud, ZS_CLOCK / 16);
1029                        uap->curregs[R12] = (brg & 255);
1030                        uap->curregs[R13] = ((brg >> 8) & 255);
1031                        uap->curregs[R14] = BRENAB;
1032                }
1033                uap->flags &= ~PMACZILOG_FLAG_IS_EXTCLK;
1034        }
1035
1036        /* Character size, stop bits, and parity. */
1037        uap->curregs[3] &= ~RxN_MASK;
1038        uap->curregs[5] &= ~TxN_MASK;
1039
1040        switch (cflag & CSIZE) {
1041        case CS5:
1042                uap->curregs[3] |= Rx5;
1043                uap->curregs[5] |= Tx5;
1044                uap->parity_mask = 0x1f;
1045                break;
1046        case CS6:
1047                uap->curregs[3] |= Rx6;
1048                uap->curregs[5] |= Tx6;
1049                uap->parity_mask = 0x3f;
1050                break;
1051        case CS7:
1052                uap->curregs[3] |= Rx7;
1053                uap->curregs[5] |= Tx7;
1054                uap->parity_mask = 0x7f;
1055                break;
1056        case CS8:
1057        default:
1058                uap->curregs[3] |= Rx8;
1059                uap->curregs[5] |= Tx8;
1060                uap->parity_mask = 0xff;
1061                break;
1062        }
1063        uap->curregs[4] &= ~(SB_MASK);
1064        if (cflag & CSTOPB)
1065                uap->curregs[4] |= SB2;
1066        else
1067                uap->curregs[4] |= SB1;
1068        if (cflag & PARENB)
1069                uap->curregs[4] |= PAR_ENAB;
1070        else
1071                uap->curregs[4] &= ~PAR_ENAB;
1072        if (!(cflag & PARODD))
1073                uap->curregs[4] |= PAR_EVEN;
1074        else
1075                uap->curregs[4] &= ~PAR_EVEN;
1076
1077        uap->port.read_status_mask = Rx_OVR;
1078        if (iflag & INPCK)
1079                uap->port.read_status_mask |= CRC_ERR | PAR_ERR;
1080        if (iflag & (IGNBRK | BRKINT | PARMRK))
1081                uap->port.read_status_mask |= BRK_ABRT;
1082
1083        uap->port.ignore_status_mask = 0;
1084        if (iflag & IGNPAR)
1085                uap->port.ignore_status_mask |= CRC_ERR | PAR_ERR;
1086        if (iflag & IGNBRK) {
1087                uap->port.ignore_status_mask |= BRK_ABRT;
1088                if (iflag & IGNPAR)
1089                        uap->port.ignore_status_mask |= Rx_OVR;
1090        }
1091
1092        if ((cflag & CREAD) == 0)
1093                uap->port.ignore_status_mask = 0xff;
1094}
1095
1096
1097/*
1098 * Set the irda codec on the imac to the specified baud rate.
1099 */
1100static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
1101{
1102        u8 cmdbyte;
1103        int t, version;
1104
1105        switch (*baud) {
1106        /* SIR modes */
1107        case 2400:
1108                cmdbyte = 0x53;
1109                break;
1110        case 4800:
1111                cmdbyte = 0x52;
1112                break;
1113        case 9600:
1114                cmdbyte = 0x51;
1115                break;
1116        case 19200:
1117                cmdbyte = 0x50;
1118                break;
1119        case 38400:
1120                cmdbyte = 0x4f;
1121                break;
1122        case 57600:
1123                cmdbyte = 0x4e;
1124                break;
1125        case 115200:
1126                cmdbyte = 0x4d;
1127                break;
1128        /* The FIR modes aren't really supported at this point, how
1129         * do we select the speed ? via the FCR on KeyLargo ?
1130         */
1131        case 1152000:
1132                cmdbyte = 0;
1133                break;
1134        case 4000000:
1135                cmdbyte = 0;
1136                break;
1137        default: /* 9600 */
1138                cmdbyte = 0x51;
1139                *baud = 9600;
1140                break;
1141        }
1142
1143        /* Wait for transmitter to drain */
1144        t = 10000;
1145        while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0
1146               || (read_zsreg(uap, R1) & ALL_SNT) == 0) {
1147                if (--t <= 0) {
1148                        pmz_error("transmitter didn't drain\n");
1149                        return;
1150                }
1151                udelay(10);
1152        }
1153
1154        /* Drain the receiver too */
1155        t = 100;
1156        (void)read_zsdata(uap);
1157        (void)read_zsdata(uap);
1158        (void)read_zsdata(uap);
1159        mdelay(10);
1160        while (read_zsreg(uap, R0) & Rx_CH_AV) {
1161                read_zsdata(uap);
1162                mdelay(10);
1163                if (--t <= 0) {
1164                        pmz_error("receiver didn't drain\n");
1165                        return;
1166                }
1167        }
1168
1169        /* Switch to command mode */
1170        uap->curregs[R5] |= DTR;
1171        write_zsreg(uap, R5, uap->curregs[R5]);
1172        zssync(uap);
1173        mdelay(1);
1174
1175        /* Switch SCC to 19200 */
1176        pmz_convert_to_zs(uap, CS8, 0, 19200);          
1177        pmz_load_zsregs(uap, uap->curregs);
1178        mdelay(1);
1179
1180        /* Write get_version command byte */
1181        write_zsdata(uap, 1);
1182        t = 5000;
1183        while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1184                if (--t <= 0) {
1185                        pmz_error("irda_setup timed out on get_version byte\n");
1186                        goto out;
1187                }
1188                udelay(10);
1189        }
1190        version = read_zsdata(uap);
1191
1192        if (version < 4) {
1193                pmz_info("IrDA: dongle version %d not supported\n", version);
1194                goto out;
1195        }
1196
1197        /* Send speed mode */
1198        write_zsdata(uap, cmdbyte);
1199        t = 5000;
1200        while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1201                if (--t <= 0) {
1202                        pmz_error("irda_setup timed out on speed mode byte\n");
1203                        goto out;
1204                }
1205                udelay(10);
1206        }
1207        t = read_zsdata(uap);
1208        if (t != cmdbyte)
1209                pmz_error("irda_setup speed mode byte = %x (%x)\n", t, cmdbyte);
1210
1211        pmz_info("IrDA setup for %ld bps, dongle version: %d\n",
1212                 *baud, version);
1213
1214        (void)read_zsdata(uap);
1215        (void)read_zsdata(uap);
1216        (void)read_zsdata(uap);
1217
1218 out:
1219        /* Switch back to data mode */
1220        uap->curregs[R5] &= ~DTR;
1221        write_zsreg(uap, R5, uap->curregs[R5]);
1222        zssync(uap);
1223
1224        (void)read_zsdata(uap);
1225        (void)read_zsdata(uap);
1226        (void)read_zsdata(uap);
1227}
1228
1229
1230static void __pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1231                              struct ktermios *old)
1232{
1233        struct uart_pmac_port *uap = to_pmz(port);
1234        unsigned long baud;
1235
1236        pmz_debug("pmz: set_termios()\n");
1237
1238        memcpy(&uap->termios_cache, termios, sizeof(struct ktermios));
1239
1240        /* XXX Check which revs of machines actually allow 1 and 4Mb speeds
1241         * on the IR dongle. Note that the IRTTY driver currently doesn't know
1242         * about the FIR mode and high speed modes. So these are unused. For
1243         * implementing proper support for these, we should probably add some
1244         * DMA as well, at least on the Rx side, which isn't a simple thing
1245         * at this point.
1246         */
1247        if (ZS_IS_IRDA(uap)) {
1248                /* Calc baud rate */
1249                baud = uart_get_baud_rate(port, termios, old, 1200, 4000000);
1250                pmz_debug("pmz: switch IRDA to %ld bauds\n", baud);
1251                /* Cet the irda codec to the right rate */
1252                pmz_irda_setup(uap, &baud);
1253                /* Set final baud rate */
1254                pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1255                pmz_load_zsregs(uap, uap->curregs);
1256                zssync(uap);
1257        } else {
1258                baud = uart_get_baud_rate(port, termios, old, 1200, 230400);
1259                pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1260                /* Make sure modem status interrupts are correctly configured */
1261                if (UART_ENABLE_MS(&uap->port, termios->c_cflag)) {
1262                        uap->curregs[R15] |= DCDIE | SYNCIE | CTSIE;
1263                        uap->flags |= PMACZILOG_FLAG_MODEM_STATUS;
1264                } else {
1265                        uap->curregs[R15] &= ~(DCDIE | SYNCIE | CTSIE);
1266                        uap->flags &= ~PMACZILOG_FLAG_MODEM_STATUS;
1267                }
1268
1269                /* Load registers to the chip */
1270                pmz_maybe_update_regs(uap);
1271        }
1272        uart_update_timeout(port, termios->c_cflag, baud);
1273
1274        pmz_debug("pmz: set_termios() done.\n");
1275}
1276
1277/* The port lock is not held.  */
1278static void pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1279                            struct ktermios *old)
1280{
1281        struct uart_pmac_port *uap = to_pmz(port);
1282        unsigned long flags;
1283
1284        spin_lock_irqsave(&port->lock, flags);  
1285
1286        /* Disable IRQs on the port */
1287        pmz_interrupt_control(uap, 0);
1288
1289        /* Setup new port configuration */
1290        __pmz_set_termios(port, termios, old);
1291
1292        /* Re-enable IRQs on the port */
1293        if (ZS_IS_OPEN(uap))
1294                pmz_interrupt_control(uap, 1);
1295
1296        spin_unlock_irqrestore(&port->lock, flags);
1297}
1298
1299static const char *pmz_type(struct uart_port *port)
1300{
1301        struct uart_pmac_port *uap = to_pmz(port);
1302
1303        if (ZS_IS_IRDA(uap))
1304                return "Z85c30 ESCC - Infrared port";
1305        else if (ZS_IS_INTMODEM(uap))
1306                return "Z85c30 ESCC - Internal modem";
1307        return "Z85c30 ESCC - Serial port";
1308}
1309
1310/* We do not request/release mappings of the registers here, this
1311 * happens at early serial probe time.
1312 */
1313static void pmz_release_port(struct uart_port *port)
1314{
1315}
1316
1317static int pmz_request_port(struct uart_port *port)
1318{
1319        return 0;
1320}
1321
1322/* These do not need to do anything interesting either.  */
1323static void pmz_config_port(struct uart_port *port, int flags)
1324{
1325}
1326
1327/* We do not support letting the user mess with the divisor, IRQ, etc. */
1328static int pmz_verify_port(struct uart_port *port, struct serial_struct *ser)
1329{
1330        return -EINVAL;
1331}
1332
1333#ifdef CONFIG_CONSOLE_POLL
1334
1335static int pmz_poll_get_char(struct uart_port *port)
1336{
1337        struct uart_pmac_port *uap =
1338                container_of(port, struct uart_pmac_port, port);
1339        int tries = 2;
1340
1341        while (tries) {
1342                if ((read_zsreg(uap, R0) & Rx_CH_AV) != 0)
1343                        return read_zsdata(uap);
1344                if (tries--)
1345                        udelay(5);
1346        }
1347
1348        return NO_POLL_CHAR;
1349}
1350
1351static void pmz_poll_put_char(struct uart_port *port, unsigned char c)
1352{
1353        struct uart_pmac_port *uap =
1354                container_of(port, struct uart_pmac_port, port);
1355
1356        /* Wait for the transmit buffer to empty. */
1357        while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1358                udelay(5);
1359        write_zsdata(uap, c);
1360}
1361
1362#endif /* CONFIG_CONSOLE_POLL */
1363
1364static const struct uart_ops pmz_pops = {
1365        .tx_empty       =       pmz_tx_empty,
1366        .set_mctrl      =       pmz_set_mctrl,
1367        .get_mctrl      =       pmz_get_mctrl,
1368        .stop_tx        =       pmz_stop_tx,
1369        .start_tx       =       pmz_start_tx,
1370        .stop_rx        =       pmz_stop_rx,
1371        .enable_ms      =       pmz_enable_ms,
1372        .break_ctl      =       pmz_break_ctl,
1373        .startup        =       pmz_startup,
1374        .shutdown       =       pmz_shutdown,
1375        .set_termios    =       pmz_set_termios,
1376        .type           =       pmz_type,
1377        .release_port   =       pmz_release_port,
1378        .request_port   =       pmz_request_port,
1379        .config_port    =       pmz_config_port,
1380        .verify_port    =       pmz_verify_port,
1381#ifdef CONFIG_CONSOLE_POLL
1382        .poll_get_char  =       pmz_poll_get_char,
1383        .poll_put_char  =       pmz_poll_put_char,
1384#endif
1385};
1386
1387#ifdef CONFIG_PPC_PMAC
1388
1389/*
1390 * Setup one port structure after probing, HW is down at this point,
1391 * Unlike sunzilog, we don't need to pre-init the spinlock as we don't
1392 * register our console before uart_add_one_port() is called
1393 */
1394static int __init pmz_init_port(struct uart_pmac_port *uap)
1395{
1396        struct device_node *np = uap->node;
1397        const char *conn;
1398        const struct slot_names_prop {
1399                int     count;
1400                char    name[1];
1401        } *slots;
1402        int len;
1403        struct resource r_ports, r_rxdma, r_txdma;
1404
1405        /*
1406         * Request & map chip registers
1407         */
1408        if (of_address_to_resource(np, 0, &r_ports))
1409                return -ENODEV;
1410        uap->port.mapbase = r_ports.start;
1411        uap->port.membase = ioremap(uap->port.mapbase, 0x1000);
1412
1413        uap->control_reg = uap->port.membase;
1414        uap->data_reg = uap->control_reg + 0x10;
1415        
1416        /*
1417         * Request & map DBDMA registers
1418         */
1419#ifdef HAS_DBDMA
1420        if (of_address_to_resource(np, 1, &r_txdma) == 0 &&
1421            of_address_to_resource(np, 2, &r_rxdma) == 0)
1422                uap->flags |= PMACZILOG_FLAG_HAS_DMA;
1423#else
1424        memset(&r_txdma, 0, sizeof(struct resource));
1425        memset(&r_rxdma, 0, sizeof(struct resource));
1426#endif  
1427        if (ZS_HAS_DMA(uap)) {
1428                uap->tx_dma_regs = ioremap(r_txdma.start, 0x100);
1429                if (uap->tx_dma_regs == NULL) { 
1430                        uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1431                        goto no_dma;
1432                }
1433                uap->rx_dma_regs = ioremap(r_rxdma.start, 0x100);
1434                if (uap->rx_dma_regs == NULL) { 
1435                        iounmap(uap->tx_dma_regs);
1436                        uap->tx_dma_regs = NULL;
1437                        uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1438                        goto no_dma;
1439                }
1440                uap->tx_dma_irq = irq_of_parse_and_map(np, 1);
1441                uap->rx_dma_irq = irq_of_parse_and_map(np, 2);
1442        }
1443no_dma:
1444
1445        /*
1446         * Detect port type
1447         */
1448        if (of_device_is_compatible(np, "cobalt"))
1449                uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
1450        conn = of_get_property(np, "AAPL,connector", &len);
1451        if (conn && (strcmp(conn, "infrared") == 0))
1452                uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1453        uap->port_type = PMAC_SCC_ASYNC;
1454        /* 1999 Powerbook G3 has slot-names property instead */
1455        slots = of_get_property(np, "slot-names", &len);
1456        if (slots && slots->count > 0) {
1457                if (strcmp(slots->name, "IrDA") == 0)
1458                        uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1459                else if (strcmp(slots->name, "Modem") == 0)
1460                        uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
1461        }
1462        if (ZS_IS_IRDA(uap))
1463                uap->port_type = PMAC_SCC_IRDA;
1464        if (ZS_IS_INTMODEM(uap)) {
1465                struct device_node* i2c_modem =
1466                        of_find_node_by_name(NULL, "i2c-modem");
1467                if (i2c_modem) {
1468                        const char* mid =
1469                                of_get_property(i2c_modem, "modem-id", NULL);
1470                        if (mid) switch(*mid) {
1471                        case 0x04 :
1472                        case 0x05 :
1473                        case 0x07 :
1474                        case 0x08 :
1475                        case 0x0b :
1476                        case 0x0c :
1477                                uap->port_type = PMAC_SCC_I2S1;
1478                        }
1479                        printk(KERN_INFO "pmac_zilog: i2c-modem detected, id: %d\n",
1480                                mid ? (*mid) : 0);
1481                        of_node_put(i2c_modem);
1482                } else {
1483                        printk(KERN_INFO "pmac_zilog: serial modem detected\n");
1484                }
1485        }
1486
1487        /*
1488         * Init remaining bits of "port" structure
1489         */
1490        uap->port.iotype = UPIO_MEM;
1491        uap->port.irq = irq_of_parse_and_map(np, 0);
1492        uap->port.uartclk = ZS_CLOCK;
1493        uap->port.fifosize = 1;
1494        uap->port.ops = &pmz_pops;
1495        uap->port.type = PORT_PMAC_ZILOG;
1496        uap->port.flags = 0;
1497
1498        /*
1499         * Fixup for the port on Gatwick for which the device-tree has
1500         * missing interrupts. Normally, the macio_dev would contain
1501         * fixed up interrupt info, but we use the device-tree directly
1502         * here due to early probing so we need the fixup too.
1503         */
1504        if (uap->port.irq == 0 &&
1505            np->parent && np->parent->parent &&
1506            of_device_is_compatible(np->parent->parent, "gatwick")) {
1507                /* IRQs on gatwick are offset by 64 */
1508                uap->port.irq = irq_create_mapping(NULL, 64 + 15);
1509                uap->tx_dma_irq = irq_create_mapping(NULL, 64 + 4);
1510                uap->rx_dma_irq = irq_create_mapping(NULL, 64 + 5);
1511        }
1512
1513        /* Setup some valid baud rate information in the register
1514         * shadows so we don't write crap there before baud rate is
1515         * first initialized.
1516         */
1517        pmz_convert_to_zs(uap, CS8, 0, 9600);
1518
1519        return 0;
1520}
1521
1522/*
1523 * Get rid of a port on module removal
1524 */
1525static void pmz_dispose_port(struct uart_pmac_port *uap)
1526{
1527        struct device_node *np;
1528
1529        np = uap->node;
1530        iounmap(uap->rx_dma_regs);
1531        iounmap(uap->tx_dma_regs);
1532        iounmap(uap->control_reg);
1533        uap->node = NULL;
1534        of_node_put(np);
1535        memset(uap, 0, sizeof(struct uart_pmac_port));
1536}
1537
1538/*
1539 * Called upon match with an escc node in the device-tree.
1540 */
1541static int pmz_attach(struct macio_dev *mdev, const struct of_device_id *match)
1542{
1543        struct uart_pmac_port *uap;
1544        int i;
1545        
1546        /* Iterate the pmz_ports array to find a matching entry
1547         */
1548        for (i = 0; i < MAX_ZS_PORTS; i++)
1549                if (pmz_ports[i].node == mdev->ofdev.dev.of_node)
1550                        break;
1551        if (i >= MAX_ZS_PORTS)
1552                return -ENODEV;
1553
1554
1555        uap = &pmz_ports[i];
1556        uap->dev = mdev;
1557        uap->port.dev = &mdev->ofdev.dev;
1558        dev_set_drvdata(&mdev->ofdev.dev, uap);
1559
1560        /* We still activate the port even when failing to request resources
1561         * to work around bugs in ancient Apple device-trees
1562         */
1563        if (macio_request_resources(uap->dev, "pmac_zilog"))
1564                printk(KERN_WARNING "%pOFn: Failed to request resource"
1565                       ", port still active\n",
1566                       uap->node);
1567        else
1568                uap->flags |= PMACZILOG_FLAG_RSRC_REQUESTED;
1569
1570        return uart_add_one_port(&pmz_uart_reg, &uap->port);
1571}
1572
1573/*
1574 * That one should not be called, macio isn't really a hotswap device,
1575 * we don't expect one of those serial ports to go away...
1576 */
1577static int pmz_detach(struct macio_dev *mdev)
1578{
1579        struct uart_pmac_port   *uap = dev_get_drvdata(&mdev->ofdev.dev);
1580        
1581        if (!uap)
1582                return -ENODEV;
1583
1584        uart_remove_one_port(&pmz_uart_reg, &uap->port);
1585
1586        if (uap->flags & PMACZILOG_FLAG_RSRC_REQUESTED) {
1587                macio_release_resources(uap->dev);
1588                uap->flags &= ~PMACZILOG_FLAG_RSRC_REQUESTED;
1589        }
1590        dev_set_drvdata(&mdev->ofdev.dev, NULL);
1591        uap->dev = NULL;
1592        uap->port.dev = NULL;
1593        
1594        return 0;
1595}
1596
1597
1598static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state)
1599{
1600        struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1601
1602        if (uap == NULL) {
1603                printk("HRM... pmz_suspend with NULL uap\n");
1604                return 0;
1605        }
1606
1607        uart_suspend_port(&pmz_uart_reg, &uap->port);
1608
1609        return 0;
1610}
1611
1612
1613static int pmz_resume(struct macio_dev *mdev)
1614{
1615        struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1616
1617        if (uap == NULL)
1618                return 0;
1619
1620        uart_resume_port(&pmz_uart_reg, &uap->port);
1621
1622        return 0;
1623}
1624
1625/*
1626 * Probe all ports in the system and build the ports array, we register
1627 * with the serial layer later, so we get a proper struct device which
1628 * allows the tty to attach properly. This is later than it used to be
1629 * but the tty layer really wants it that way.
1630 */
1631static int __init pmz_probe(void)
1632{
1633        struct device_node      *node_p, *node_a, *node_b, *np;
1634        int                     count = 0;
1635        int                     rc;
1636
1637        /*
1638         * Find all escc chips in the system
1639         */
1640        for_each_node_by_name(node_p, "escc") {
1641                /*
1642                 * First get channel A/B node pointers
1643                 * 
1644                 * TODO: Add routines with proper locking to do that...
1645                 */
1646                node_a = node_b = NULL;
1647                for_each_child_of_node(node_p, np) {
1648                        if (of_node_name_prefix(np, "ch-a"))
1649                                node_a = of_node_get(np);
1650                        else if (of_node_name_prefix(np, "ch-b"))
1651                                node_b = of_node_get(np);
1652                }
1653                if (!node_a && !node_b) {
1654                        of_node_put(node_a);
1655                        of_node_put(node_b);
1656                        printk(KERN_ERR "pmac_zilog: missing node %c for escc %pOF\n",
1657                                (!node_a) ? 'a' : 'b', node_p);
1658                        continue;
1659                }
1660
1661                /*
1662                 * Fill basic fields in the port structures
1663                 */
1664                if (node_b != NULL) {
1665                        pmz_ports[count].mate           = &pmz_ports[count+1];
1666                        pmz_ports[count+1].mate         = &pmz_ports[count];
1667                }
1668                pmz_ports[count].flags          = PMACZILOG_FLAG_IS_CHANNEL_A;
1669                pmz_ports[count].node           = node_a;
1670                pmz_ports[count+1].node         = node_b;
1671                pmz_ports[count].port.line      = count;
1672                pmz_ports[count+1].port.line    = count+1;
1673
1674                /*
1675                 * Setup the ports for real
1676                 */
1677                rc = pmz_init_port(&pmz_ports[count]);
1678                if (rc == 0 && node_b != NULL)
1679                        rc = pmz_init_port(&pmz_ports[count+1]);
1680                if (rc != 0) {
1681                        of_node_put(node_a);
1682                        of_node_put(node_b);
1683                        memset(&pmz_ports[count], 0, sizeof(struct uart_pmac_port));
1684                        memset(&pmz_ports[count+1], 0, sizeof(struct uart_pmac_port));
1685                        continue;
1686                }
1687                count += 2;
1688        }
1689        pmz_ports_count = count;
1690
1691        return 0;
1692}
1693
1694#else
1695
1696/* On PCI PowerMacs, pmz_probe() does an explicit search of the OpenFirmware
1697 * tree to obtain the device_nodes needed to start the console before the
1698 * macio driver. On Macs without OpenFirmware, global platform_devices take
1699 * the place of those device_nodes.
1700 */
1701extern struct platform_device scc_a_pdev, scc_b_pdev;
1702
1703static int __init pmz_init_port(struct uart_pmac_port *uap)
1704{
1705        struct resource *r_ports, *r_irq;
1706
1707        r_ports = platform_get_resource(uap->pdev, IORESOURCE_MEM, 0);
1708        r_irq = platform_get_resource(uap->pdev, IORESOURCE_IRQ, 0);
1709        if (!r_ports || !r_irq)
1710                return -ENODEV;
1711
1712        uap->port.mapbase  = r_ports->start;
1713        uap->port.membase  = (unsigned char __iomem *) r_ports->start;
1714        uap->port.iotype   = UPIO_MEM;
1715        uap->port.irq      = r_irq->start;
1716        uap->port.uartclk  = ZS_CLOCK;
1717        uap->port.fifosize = 1;
1718        uap->port.ops      = &pmz_pops;
1719        uap->port.type     = PORT_PMAC_ZILOG;
1720        uap->port.flags    = 0;
1721
1722        uap->control_reg   = uap->port.membase;
1723        uap->data_reg      = uap->control_reg + 4;
1724        uap->port_type     = 0;
1725        uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_PMACZILOG_CONSOLE);
1726
1727        pmz_convert_to_zs(uap, CS8, 0, 9600);
1728
1729        return 0;
1730}
1731
1732static int __init pmz_probe(void)
1733{
1734        int err;
1735
1736        pmz_ports_count = 0;
1737
1738        pmz_ports[0].port.line = 0;
1739        pmz_ports[0].flags     = PMACZILOG_FLAG_IS_CHANNEL_A;
1740        pmz_ports[0].pdev      = &scc_a_pdev;
1741        err = pmz_init_port(&pmz_ports[0]);
1742        if (err)
1743                return err;
1744        pmz_ports_count++;
1745
1746        pmz_ports[0].mate      = &pmz_ports[1];
1747        pmz_ports[1].mate      = &pmz_ports[0];
1748        pmz_ports[1].port.line = 1;
1749        pmz_ports[1].flags     = 0;
1750        pmz_ports[1].pdev      = &scc_b_pdev;
1751        err = pmz_init_port(&pmz_ports[1]);
1752        if (err)
1753                return err;
1754        pmz_ports_count++;
1755
1756        return 0;
1757}
1758
1759static void pmz_dispose_port(struct uart_pmac_port *uap)
1760{
1761        memset(uap, 0, sizeof(struct uart_pmac_port));
1762}
1763
1764static int __init pmz_attach(struct platform_device *pdev)
1765{
1766        struct uart_pmac_port *uap;
1767        int i;
1768
1769        /* Iterate the pmz_ports array to find a matching entry */
1770        for (i = 0; i < pmz_ports_count; i++)
1771                if (pmz_ports[i].pdev == pdev)
1772                        break;
1773        if (i >= pmz_ports_count)
1774                return -ENODEV;
1775
1776        uap = &pmz_ports[i];
1777        uap->port.dev = &pdev->dev;
1778        platform_set_drvdata(pdev, uap);
1779
1780        return uart_add_one_port(&pmz_uart_reg, &uap->port);
1781}
1782
1783static int __exit pmz_detach(struct platform_device *pdev)
1784{
1785        struct uart_pmac_port *uap = platform_get_drvdata(pdev);
1786
1787        if (!uap)
1788                return -ENODEV;
1789
1790        uart_remove_one_port(&pmz_uart_reg, &uap->port);
1791
1792        uap->port.dev = NULL;
1793
1794        return 0;
1795}
1796
1797#endif /* !CONFIG_PPC_PMAC */
1798
1799#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1800
1801static void pmz_console_write(struct console *con, const char *s, unsigned int count);
1802static int __init pmz_console_setup(struct console *co, char *options);
1803
1804static struct console pmz_console = {
1805        .name   =       PMACZILOG_NAME,
1806        .write  =       pmz_console_write,
1807        .device =       uart_console_device,
1808        .setup  =       pmz_console_setup,
1809        .flags  =       CON_PRINTBUFFER,
1810        .index  =       -1,
1811        .data   =       &pmz_uart_reg,
1812};
1813
1814#define PMACZILOG_CONSOLE       &pmz_console
1815#else /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1816#define PMACZILOG_CONSOLE       (NULL)
1817#endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1818
1819/*
1820 * Register the driver, console driver and ports with the serial
1821 * core
1822 */
1823static int __init pmz_register(void)
1824{
1825        pmz_uart_reg.nr = pmz_ports_count;
1826        pmz_uart_reg.cons = PMACZILOG_CONSOLE;
1827
1828        /*
1829         * Register this driver with the serial core
1830         */
1831        return uart_register_driver(&pmz_uart_reg);
1832}
1833
1834#ifdef CONFIG_PPC_PMAC
1835
1836static const struct of_device_id pmz_match[] =
1837{
1838        {
1839        .name           = "ch-a",
1840        },
1841        {
1842        .name           = "ch-b",
1843        },
1844        {},
1845};
1846MODULE_DEVICE_TABLE (of, pmz_match);
1847
1848static struct macio_driver pmz_driver = {
1849        .driver = {
1850                .name           = "pmac_zilog",
1851                .owner          = THIS_MODULE,
1852                .of_match_table = pmz_match,
1853        },
1854        .probe          = pmz_attach,
1855        .remove         = pmz_detach,
1856        .suspend        = pmz_suspend,
1857        .resume         = pmz_resume,
1858};
1859
1860#else
1861
1862static struct platform_driver pmz_driver = {
1863        .remove         = __exit_p(pmz_detach),
1864        .driver         = {
1865                .name           = "scc",
1866        },
1867};
1868
1869#endif /* !CONFIG_PPC_PMAC */
1870
1871static int __init init_pmz(void)
1872{
1873        int rc, i;
1874        printk(KERN_INFO "%s\n", version);
1875
1876        /* 
1877         * First, we need to do a direct OF-based probe pass. We
1878         * do that because we want serial console up before the
1879         * macio stuffs calls us back, and since that makes it
1880         * easier to pass the proper number of channels to
1881         * uart_register_driver()
1882         */
1883        if (pmz_ports_count == 0)
1884                pmz_probe();
1885
1886        /*
1887         * Bail early if no port found
1888         */
1889        if (pmz_ports_count == 0)
1890                return -ENODEV;
1891
1892        /*
1893         * Now we register with the serial layer
1894         */
1895        rc = pmz_register();
1896        if (rc) {
1897                printk(KERN_ERR 
1898                        "pmac_zilog: Error registering serial device, disabling pmac_zilog.\n"
1899                        "pmac_zilog: Did another serial driver already claim the minors?\n"); 
1900                /* effectively "pmz_unprobe()" */
1901                for (i=0; i < pmz_ports_count; i++)
1902                        pmz_dispose_port(&pmz_ports[i]);
1903                return rc;
1904        }
1905
1906        /*
1907         * Then we register the macio driver itself
1908         */
1909#ifdef CONFIG_PPC_PMAC
1910        return macio_register_driver(&pmz_driver);
1911#else
1912        return platform_driver_probe(&pmz_driver, pmz_attach);
1913#endif
1914}
1915
1916static void __exit exit_pmz(void)
1917{
1918        int i;
1919
1920#ifdef CONFIG_PPC_PMAC
1921        /* Get rid of macio-driver (detach from macio) */
1922        macio_unregister_driver(&pmz_driver);
1923#else
1924        platform_driver_unregister(&pmz_driver);
1925#endif
1926
1927        for (i = 0; i < pmz_ports_count; i++) {
1928                struct uart_pmac_port *uport = &pmz_ports[i];
1929#ifdef CONFIG_PPC_PMAC
1930                if (uport->node != NULL)
1931                        pmz_dispose_port(uport);
1932#else
1933                if (uport->pdev != NULL)
1934                        pmz_dispose_port(uport);
1935#endif
1936        }
1937        /* Unregister UART driver */
1938        uart_unregister_driver(&pmz_uart_reg);
1939}
1940
1941#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1942
1943static void pmz_console_putchar(struct uart_port *port, int ch)
1944{
1945        struct uart_pmac_port *uap =
1946                container_of(port, struct uart_pmac_port, port);
1947
1948        /* Wait for the transmit buffer to empty. */
1949        while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1950                udelay(5);
1951        write_zsdata(uap, ch);
1952}
1953
1954/*
1955 * Print a string to the serial port trying not to disturb
1956 * any possible real use of the port...
1957 */
1958static void pmz_console_write(struct console *con, const char *s, unsigned int count)
1959{
1960        struct uart_pmac_port *uap = &pmz_ports[con->index];
1961        unsigned long flags;
1962
1963        spin_lock_irqsave(&uap->port.lock, flags);
1964
1965        /* Turn of interrupts and enable the transmitter. */
1966        write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB);
1967        write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR);
1968
1969        uart_console_write(&uap->port, s, count, pmz_console_putchar);
1970
1971        /* Restore the values in the registers. */
1972        write_zsreg(uap, R1, uap->curregs[1]);
1973        /* Don't disable the transmitter. */
1974
1975        spin_unlock_irqrestore(&uap->port.lock, flags);
1976}
1977
1978/*
1979 * Setup the serial console
1980 */
1981static int __init pmz_console_setup(struct console *co, char *options)
1982{
1983        struct uart_pmac_port *uap;
1984        struct uart_port *port;
1985        int baud = 38400;
1986        int bits = 8;
1987        int parity = 'n';
1988        int flow = 'n';
1989        unsigned long pwr_delay;
1990
1991        /*
1992         * XServe's default to 57600 bps
1993         */
1994        if (of_machine_is_compatible("RackMac1,1")
1995            || of_machine_is_compatible("RackMac1,2")
1996            || of_machine_is_compatible("MacRISC4"))
1997                baud = 57600;
1998
1999        /*
2000         * Check whether an invalid uart number has been specified, and
2001         * if so, search for the first available port that does have
2002         * console support.
2003         */
2004        if (co->index >= pmz_ports_count)
2005                co->index = 0;
2006        uap = &pmz_ports[co->index];
2007#ifdef CONFIG_PPC_PMAC
2008        if (uap->node == NULL)
2009                return -ENODEV;
2010#else
2011        if (uap->pdev == NULL)
2012                return -ENODEV;
2013#endif
2014        port = &uap->port;
2015
2016        /*
2017         * Mark port as beeing a console
2018         */
2019        uap->flags |= PMACZILOG_FLAG_IS_CONS;
2020
2021        /*
2022         * Temporary fix for uart layer who didn't setup the spinlock yet
2023         */
2024        spin_lock_init(&port->lock);
2025
2026        /*
2027         * Enable the hardware
2028         */
2029        pwr_delay = __pmz_startup(uap);
2030        if (pwr_delay)
2031                mdelay(pwr_delay);
2032        
2033        if (options)
2034                uart_parse_options(options, &baud, &parity, &bits, &flow);
2035
2036        return uart_set_options(port, co, baud, parity, bits, flow);
2037}
2038
2039static int __init pmz_console_init(void)
2040{
2041        /* Probe ports */
2042        pmz_probe();
2043
2044        if (pmz_ports_count == 0)
2045                return -ENODEV;
2046
2047        /* TODO: Autoprobe console based on OF */
2048        /* pmz_console.index = i; */
2049        register_console(&pmz_console);
2050
2051        return 0;
2052
2053}
2054console_initcall(pmz_console_init);
2055#endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
2056
2057module_init(init_pmz);
2058module_exit(exit_pmz);
2059