linux/drivers/tty/serial/arc_uart.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * ARC On-Chip(fpga) UART Driver
   4 *
   5 * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
   6 *
   7 * vineetg: July 10th 2012
   8 *  -Decoupled the driver from arch/arc
   9 *    +Using platform_get_resource() for irq/membase (thx to bfin_uart.c)
  10 *    +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)
  11 *
  12 * Vineetg: Aug 21st 2010
  13 *  -Is uart_tx_stopped() not done in tty write path as it has already been
  14 *   taken care of, in serial core
  15 *
  16 * Vineetg: Aug 18th 2010
  17 *  -New Serial Core based ARC UART driver
  18 *  -Derived largely from blackfin driver albiet with some major tweaks
  19 *
  20 * TODO:
  21 *  -check if sysreq works
  22 */
  23
  24#include <linux/module.h>
  25#include <linux/serial.h>
  26#include <linux/console.h>
  27#include <linux/sysrq.h>
  28#include <linux/platform_device.h>
  29#include <linux/tty.h>
  30#include <linux/tty_flip.h>
  31#include <linux/serial_core.h>
  32#include <linux/io.h>
  33#include <linux/of_irq.h>
  34#include <linux/of_address.h>
  35
  36/*************************************
  37 * ARC UART Hardware Specs
  38 ************************************/
  39#define ARC_UART_TX_FIFO_SIZE  1
  40
  41/*
  42 * UART Register set (this is not a Standards Compliant IP)
  43 * Also each reg is Word aligned, but only 8 bits wide
  44 */
  45#define R_ID0   0
  46#define R_ID1   4
  47#define R_ID2   8
  48#define R_ID3   12
  49#define R_DATA  16
  50#define R_STS   20
  51#define R_BAUDL 24
  52#define R_BAUDH 28
  53
  54/* Bits for UART Status Reg (R/W) */
  55#define RXIENB  0x04    /* Receive Interrupt Enable */
  56#define TXIENB  0x40    /* Transmit Interrupt Enable */
  57
  58#define RXEMPTY 0x20    /* Receive FIFO Empty: No char receivede */
  59#define TXEMPTY 0x80    /* Transmit FIFO Empty, thus char can be written into */
  60
  61#define RXFULL  0x08    /* Receive FIFO full */
  62#define RXFULL1 0x10    /* Receive FIFO has space for 1 char (tot space=4) */
  63
  64#define RXFERR  0x01    /* Frame Error: Stop Bit not detected */
  65#define RXOERR  0x02    /* OverFlow Err: Char recv but RXFULL still set */
  66
  67/* Uart bit fiddling helpers: lowest level */
  68#define RBASE(port, reg)      (port->membase + reg)
  69#define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r))
  70#define UART_REG_GET(u, r)    readb(RBASE(u, r))
  71
  72#define UART_REG_OR(u, r, v)  UART_REG_SET(u, r, UART_REG_GET(u, r) | (v))
  73#define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v))
  74
  75/* Uart bit fiddling helpers: API level */
  76#define UART_SET_DATA(uart, val)   UART_REG_SET(uart, R_DATA, val)
  77#define UART_GET_DATA(uart)        UART_REG_GET(uart, R_DATA)
  78
  79#define UART_SET_BAUDH(uart, val)  UART_REG_SET(uart, R_BAUDH, val)
  80#define UART_SET_BAUDL(uart, val)  UART_REG_SET(uart, R_BAUDL, val)
  81
  82#define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val)
  83#define UART_GET_STATUS(uart)      UART_REG_GET(uart, R_STS)
  84
  85#define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB)
  86#define UART_RX_IRQ_DISABLE(uart)  UART_REG_CLR(uart, R_STS, RXIENB)
  87#define UART_TX_IRQ_DISABLE(uart)  UART_REG_CLR(uart, R_STS, TXIENB)
  88
  89#define UART_ALL_IRQ_ENABLE(uart)  UART_REG_OR(uart, R_STS, RXIENB|TXIENB)
  90#define UART_RX_IRQ_ENABLE(uart)   UART_REG_OR(uart, R_STS, RXIENB)
  91#define UART_TX_IRQ_ENABLE(uart)   UART_REG_OR(uart, R_STS, TXIENB)
  92
  93#define ARC_SERIAL_DEV_NAME     "ttyARC"
  94
  95struct arc_uart_port {
  96        struct uart_port port;
  97        unsigned long baud;
  98};
  99
 100#define to_arc_port(uport)  container_of(uport, struct arc_uart_port, port)
 101
 102static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS];
 103
 104#ifdef CONFIG_SERIAL_ARC_CONSOLE
 105static struct console arc_console;
 106#endif
 107
 108#define DRIVER_NAME     "arc-uart"
 109
 110static struct uart_driver arc_uart_driver = {
 111        .owner          = THIS_MODULE,
 112        .driver_name    = DRIVER_NAME,
 113        .dev_name       = ARC_SERIAL_DEV_NAME,
 114        .major          = 0,
 115        .minor          = 0,
 116        .nr             = CONFIG_SERIAL_ARC_NR_PORTS,
 117#ifdef CONFIG_SERIAL_ARC_CONSOLE
 118        .cons           = &arc_console,
 119#endif
 120};
 121
 122static void arc_serial_stop_rx(struct uart_port *port)
 123{
 124        UART_RX_IRQ_DISABLE(port);
 125}
 126
 127static void arc_serial_stop_tx(struct uart_port *port)
 128{
 129        while (!(UART_GET_STATUS(port) & TXEMPTY))
 130                cpu_relax();
 131
 132        UART_TX_IRQ_DISABLE(port);
 133}
 134
 135/*
 136 * Return TIOCSER_TEMT when transmitter is not busy.
 137 */
 138static unsigned int arc_serial_tx_empty(struct uart_port *port)
 139{
 140        unsigned int stat;
 141
 142        stat = UART_GET_STATUS(port);
 143        if (stat & TXEMPTY)
 144                return TIOCSER_TEMT;
 145
 146        return 0;
 147}
 148
 149/*
 150 * Driver internal routine, used by both tty(serial core) as well as tx-isr
 151 *  -Called under spinlock in either cases
 152 *  -also tty->stopped has already been checked
 153 *     = by uart_start( ) before calling us
 154 *     = tx_ist checks that too before calling
 155 */
 156static void arc_serial_tx_chars(struct uart_port *port)
 157{
 158        struct circ_buf *xmit = &port->state->xmit;
 159        int sent = 0;
 160        unsigned char ch;
 161
 162        if (unlikely(port->x_char)) {
 163                UART_SET_DATA(port, port->x_char);
 164                port->icount.tx++;
 165                port->x_char = 0;
 166                sent = 1;
 167        } else if (!uart_circ_empty(xmit)) {
 168                ch = xmit->buf[xmit->tail];
 169                xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 170                port->icount.tx++;
 171                while (!(UART_GET_STATUS(port) & TXEMPTY))
 172                        cpu_relax();
 173                UART_SET_DATA(port, ch);
 174                sent = 1;
 175        }
 176
 177        /*
 178         * If num chars in xmit buffer are too few, ask tty layer for more.
 179         * By Hard ISR to schedule processing in software interrupt part
 180         */
 181        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 182                uart_write_wakeup(port);
 183
 184        if (sent)
 185                UART_TX_IRQ_ENABLE(port);
 186}
 187
 188/*
 189 * port is locked and interrupts are disabled
 190 * uart_start( ) calls us under the port spinlock irqsave
 191 */
 192static void arc_serial_start_tx(struct uart_port *port)
 193{
 194        arc_serial_tx_chars(port);
 195}
 196
 197static void arc_serial_rx_chars(struct uart_port *port, unsigned int status)
 198{
 199        unsigned int ch, flg = 0;
 200
 201        /*
 202         * UART has 4 deep RX-FIFO. Driver's recongnition of this fact
 203         * is very subtle. Here's how ...
 204         * Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available,
 205         * driver reads the DATA Reg and keeps doing that in a loop, until
 206         * RX-EMPTY=1. Multiple chars being avail, with a single Interrupt,
 207         * before RX-EMPTY=0, implies some sort of buffering going on in the
 208         * controller, which is indeed the Rx-FIFO.
 209         */
 210        do {
 211                /*
 212                 * This could be an Rx Intr for err (no data),
 213                 * so check err and clear that Intr first
 214                 */
 215                if (unlikely(status & (RXOERR | RXFERR))) {
 216                        if (status & RXOERR) {
 217                                port->icount.overrun++;
 218                                flg = TTY_OVERRUN;
 219                                UART_CLR_STATUS(port, RXOERR);
 220                        }
 221
 222                        if (status & RXFERR) {
 223                                port->icount.frame++;
 224                                flg = TTY_FRAME;
 225                                UART_CLR_STATUS(port, RXFERR);
 226                        }
 227                } else
 228                        flg = TTY_NORMAL;
 229
 230                if (status & RXEMPTY)
 231                        continue;
 232
 233                ch = UART_GET_DATA(port);
 234                port->icount.rx++;
 235
 236                if (!(uart_handle_sysrq_char(port, ch)))
 237                        uart_insert_char(port, status, RXOERR, ch, flg);
 238
 239                tty_flip_buffer_push(&port->state->port);
 240        } while (!((status = UART_GET_STATUS(port)) & RXEMPTY));
 241}
 242
 243/*
 244 * A note on the Interrupt handling state machine of this driver
 245 *
 246 * kernel printk writes funnel thru the console driver framework and in order
 247 * to keep things simple as well as efficient, it writes to UART in polled
 248 * mode, in one shot, and exits.
 249 *
 250 * OTOH, Userland output (via tty layer), uses interrupt based writes as there
 251 * can be undeterministic delay between char writes.
 252 *
 253 * Thus Rx-interrupts are always enabled, while tx-interrupts are by default
 254 * disabled.
 255 *
 256 * When tty has some data to send out, serial core calls driver's start_tx
 257 * which
 258 *   -checks-if-tty-buffer-has-char-to-send
 259 *   -writes-data-to-uart
 260 *   -enable-tx-intr
 261 *
 262 * Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt.
 263 * The first thing Tx ISR does is disable further Tx interrupts (as this could
 264 * be the last char to send, before settling down into the quiet polled mode).
 265 * It then calls the exact routine used by tty layer write to send out any
 266 * more char in tty buffer. In case of sending, it re-enables Tx-intr. In case
 267 * of no data, it remains disabled.
 268 * This is how the transmit state machine is dynamically switched on/off
 269 */
 270
 271static irqreturn_t arc_serial_isr(int irq, void *dev_id)
 272{
 273        struct uart_port *port = dev_id;
 274        unsigned int status;
 275
 276        status = UART_GET_STATUS(port);
 277
 278        /*
 279         * Single IRQ for both Rx (data available) Tx (room available) Interrupt
 280         * notifications from the UART Controller.
 281         * To demultiplex between the two, we check the relevant bits
 282         */
 283        if (status & RXIENB) {
 284
 285                /* already in ISR, no need of xx_irqsave */
 286                spin_lock(&port->lock);
 287                arc_serial_rx_chars(port, status);
 288                spin_unlock(&port->lock);
 289        }
 290
 291        if ((status & TXIENB) && (status & TXEMPTY)) {
 292
 293                /* Unconditionally disable further Tx-Interrupts.
 294                 * will be enabled by tx_chars() if needed.
 295                 */
 296                UART_TX_IRQ_DISABLE(port);
 297
 298                spin_lock(&port->lock);
 299
 300                if (!uart_tx_stopped(port))
 301                        arc_serial_tx_chars(port);
 302
 303                spin_unlock(&port->lock);
 304        }
 305
 306        return IRQ_HANDLED;
 307}
 308
 309static unsigned int arc_serial_get_mctrl(struct uart_port *port)
 310{
 311        /*
 312         * Pretend we have a Modem status reg and following bits are
 313         *  always set, to satify the serial core state machine
 314         *  (DSR) Data Set Ready
 315         *  (CTS) Clear To Send
 316         *  (CAR) Carrier Detect
 317         */
 318        return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 319}
 320
 321static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 322{
 323        /* MCR not present */
 324}
 325
 326static void arc_serial_break_ctl(struct uart_port *port, int break_state)
 327{
 328        /* ARC UART doesn't support sending Break signal */
 329}
 330
 331static int arc_serial_startup(struct uart_port *port)
 332{
 333        /* Before we hook up the ISR, Disable all UART Interrupts */
 334        UART_ALL_IRQ_DISABLE(port);
 335
 336        if (request_irq(port->irq, arc_serial_isr, 0, "arc uart rx-tx", port)) {
 337                dev_warn(port->dev, "Unable to attach ARC UART intr\n");
 338                return -EBUSY;
 339        }
 340
 341        UART_RX_IRQ_ENABLE(port); /* Only Rx IRQ enabled to begin with */
 342
 343        return 0;
 344}
 345
 346/* This is not really needed */
 347static void arc_serial_shutdown(struct uart_port *port)
 348{
 349        free_irq(port->irq, port);
 350}
 351
 352static void
 353arc_serial_set_termios(struct uart_port *port, struct ktermios *new,
 354                       struct ktermios *old)
 355{
 356        struct arc_uart_port *uart = to_arc_port(port);
 357        unsigned int baud, uartl, uarth, hw_val;
 358        unsigned long flags;
 359
 360        /*
 361         * Use the generic handler so that any specially encoded baud rates
 362         * such as SPD_xx flags or "%B0" can be handled
 363         * Max Baud I suppose will not be more than current 115K * 4
 364         * Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1)
 365         * spread over two 8-bit registers
 366         */
 367        baud = uart_get_baud_rate(port, new, old, 0, 460800);
 368
 369        hw_val = port->uartclk / (uart->baud * 4) - 1;
 370        uartl = hw_val & 0xFF;
 371        uarth = (hw_val >> 8) & 0xFF;
 372
 373        spin_lock_irqsave(&port->lock, flags);
 374
 375        UART_ALL_IRQ_DISABLE(port);
 376
 377        UART_SET_BAUDL(port, uartl);
 378        UART_SET_BAUDH(port, uarth);
 379
 380        UART_RX_IRQ_ENABLE(port);
 381
 382        /*
 383         * UART doesn't support Parity/Hardware Flow Control;
 384         * Only supports 8N1 character size
 385         */
 386        new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE);
 387        new->c_cflag |= CS8;
 388
 389        if (old)
 390                tty_termios_copy_hw(new, old);
 391
 392        /* Don't rewrite B0 */
 393        if (tty_termios_baud_rate(new))
 394                tty_termios_encode_baud_rate(new, baud, baud);
 395
 396        uart_update_timeout(port, new->c_cflag, baud);
 397
 398        spin_unlock_irqrestore(&port->lock, flags);
 399}
 400
 401static const char *arc_serial_type(struct uart_port *port)
 402{
 403        return port->type == PORT_ARC ? DRIVER_NAME : NULL;
 404}
 405
 406static void arc_serial_release_port(struct uart_port *port)
 407{
 408}
 409
 410static int arc_serial_request_port(struct uart_port *port)
 411{
 412        return 0;
 413}
 414
 415/*
 416 * Verify the new serial_struct (for TIOCSSERIAL).
 417 */
 418static int
 419arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 420{
 421        if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC)
 422                return -EINVAL;
 423
 424        return 0;
 425}
 426
 427/*
 428 * Configure/autoconfigure the port.
 429 */
 430static void arc_serial_config_port(struct uart_port *port, int flags)
 431{
 432        if (flags & UART_CONFIG_TYPE)
 433                port->type = PORT_ARC;
 434}
 435
 436#ifdef CONFIG_CONSOLE_POLL
 437
 438static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr)
 439{
 440        while (!(UART_GET_STATUS(port) & TXEMPTY))
 441                cpu_relax();
 442
 443        UART_SET_DATA(port, chr);
 444}
 445
 446static int arc_serial_poll_getchar(struct uart_port *port)
 447{
 448        unsigned char chr;
 449
 450        while (!(UART_GET_STATUS(port) & RXEMPTY))
 451                cpu_relax();
 452
 453        chr = UART_GET_DATA(port);
 454        return chr;
 455}
 456#endif
 457
 458static const struct uart_ops arc_serial_pops = {
 459        .tx_empty       = arc_serial_tx_empty,
 460        .set_mctrl      = arc_serial_set_mctrl,
 461        .get_mctrl      = arc_serial_get_mctrl,
 462        .stop_tx        = arc_serial_stop_tx,
 463        .start_tx       = arc_serial_start_tx,
 464        .stop_rx        = arc_serial_stop_rx,
 465        .break_ctl      = arc_serial_break_ctl,
 466        .startup        = arc_serial_startup,
 467        .shutdown       = arc_serial_shutdown,
 468        .set_termios    = arc_serial_set_termios,
 469        .type           = arc_serial_type,
 470        .release_port   = arc_serial_release_port,
 471        .request_port   = arc_serial_request_port,
 472        .config_port    = arc_serial_config_port,
 473        .verify_port    = arc_serial_verify_port,
 474#ifdef CONFIG_CONSOLE_POLL
 475        .poll_put_char = arc_serial_poll_putchar,
 476        .poll_get_char = arc_serial_poll_getchar,
 477#endif
 478};
 479
 480#ifdef CONFIG_SERIAL_ARC_CONSOLE
 481
 482static int arc_serial_console_setup(struct console *co, char *options)
 483{
 484        struct uart_port *port;
 485        int baud = 115200;
 486        int bits = 8;
 487        int parity = 'n';
 488        int flow = 'n';
 489
 490        if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS)
 491                return -ENODEV;
 492
 493        /*
 494         * The uart port backing the console (e.g. ttyARC1) might not have been
 495         * init yet. If so, defer the console setup to after the port.
 496         */
 497        port = &arc_uart_ports[co->index].port;
 498        if (!port->membase)
 499                return -ENODEV;
 500
 501        if (options)
 502                uart_parse_options(options, &baud, &parity, &bits, &flow);
 503
 504        /*
 505         * Serial core will call port->ops->set_termios( )
 506         * which will set the baud reg
 507         */
 508        return uart_set_options(port, co, baud, parity, bits, flow);
 509}
 510
 511static void arc_serial_console_putchar(struct uart_port *port, int ch)
 512{
 513        while (!(UART_GET_STATUS(port) & TXEMPTY))
 514                cpu_relax();
 515
 516        UART_SET_DATA(port, (unsigned char)ch);
 517}
 518
 519/*
 520 * Interrupts are disabled on entering
 521 */
 522static void arc_serial_console_write(struct console *co, const char *s,
 523                                     unsigned int count)
 524{
 525        struct uart_port *port = &arc_uart_ports[co->index].port;
 526        unsigned long flags;
 527
 528        spin_lock_irqsave(&port->lock, flags);
 529        uart_console_write(port, s, count, arc_serial_console_putchar);
 530        spin_unlock_irqrestore(&port->lock, flags);
 531}
 532
 533static struct console arc_console = {
 534        .name   = ARC_SERIAL_DEV_NAME,
 535        .write  = arc_serial_console_write,
 536        .device = uart_console_device,
 537        .setup  = arc_serial_console_setup,
 538        .flags  = CON_PRINTBUFFER,
 539        .index  = -1,
 540        .data   = &arc_uart_driver
 541};
 542
 543static void arc_early_serial_write(struct console *con, const char *s,
 544                                   unsigned int n)
 545{
 546        struct earlycon_device *dev = con->data;
 547
 548        uart_console_write(&dev->port, s, n, arc_serial_console_putchar);
 549}
 550
 551static int __init arc_early_console_setup(struct earlycon_device *dev,
 552                                          const char *opt)
 553{
 554        struct uart_port *port = &dev->port;
 555        unsigned int l, h, hw_val;
 556
 557        if (!dev->port.membase)
 558                return -ENODEV;
 559
 560        hw_val = port->uartclk / (dev->baud * 4) - 1;
 561        l = hw_val & 0xFF;
 562        h = (hw_val >> 8) & 0xFF;
 563
 564        UART_SET_BAUDL(port, l);
 565        UART_SET_BAUDH(port, h);
 566
 567        dev->con->write = arc_early_serial_write;
 568        return 0;
 569}
 570OF_EARLYCON_DECLARE(arc_uart, "snps,arc-uart", arc_early_console_setup);
 571
 572#endif  /* CONFIG_SERIAL_ARC_CONSOLE */
 573
 574static int arc_serial_probe(struct platform_device *pdev)
 575{
 576        struct device_node *np = pdev->dev.of_node;
 577        struct arc_uart_port *uart;
 578        struct uart_port *port;
 579        int dev_id;
 580        u32 val;
 581
 582        /* no device tree device */
 583        if (!np)
 584                return -ENODEV;
 585
 586        dev_id = of_alias_get_id(np, "serial");
 587        if (dev_id < 0)
 588                dev_id = 0;
 589
 590        if (dev_id >= ARRAY_SIZE(arc_uart_ports)) {
 591                dev_err(&pdev->dev, "serial%d out of range\n", dev_id);
 592                return -EINVAL;
 593        }
 594
 595        uart = &arc_uart_ports[dev_id];
 596        port = &uart->port;
 597
 598        if (of_property_read_u32(np, "clock-frequency", &val)) {
 599                dev_err(&pdev->dev, "clock-frequency property NOTset\n");
 600                return -EINVAL;
 601        }
 602        port->uartclk = val;
 603
 604        if (of_property_read_u32(np, "current-speed", &val)) {
 605                dev_err(&pdev->dev, "current-speed property NOT set\n");
 606                return -EINVAL;
 607        }
 608        uart->baud = val;
 609
 610        port->membase = of_iomap(np, 0);
 611        if (!port->membase)
 612                /* No point of dev_err since UART itself is hosed here */
 613                return -ENXIO;
 614
 615        port->irq = irq_of_parse_and_map(np, 0);
 616
 617        port->dev = &pdev->dev;
 618        port->iotype = UPIO_MEM;
 619        port->flags = UPF_BOOT_AUTOCONF;
 620        port->line = dev_id;
 621        port->ops = &arc_serial_pops;
 622        port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_ARC_CONSOLE);
 623
 624        port->fifosize = ARC_UART_TX_FIFO_SIZE;
 625
 626        /*
 627         * uart_insert_char( ) uses it in decideding whether to ignore a
 628         * char or not. Explicitly setting it here, removes the subtelty
 629         */
 630        port->ignore_status_mask = 0;
 631
 632        return uart_add_one_port(&arc_uart_driver, &arc_uart_ports[dev_id].port);
 633}
 634
 635static int arc_serial_remove(struct platform_device *pdev)
 636{
 637        /* This will never be called */
 638        return 0;
 639}
 640
 641static const struct of_device_id arc_uart_dt_ids[] = {
 642        { .compatible = "snps,arc-uart" },
 643        { /* Sentinel */ }
 644};
 645MODULE_DEVICE_TABLE(of, arc_uart_dt_ids);
 646
 647static struct platform_driver arc_platform_driver = {
 648        .probe = arc_serial_probe,
 649        .remove = arc_serial_remove,
 650        .driver = {
 651                .name = DRIVER_NAME,
 652                .of_match_table  = arc_uart_dt_ids,
 653         },
 654};
 655
 656static int __init arc_serial_init(void)
 657{
 658        int ret;
 659
 660        ret = uart_register_driver(&arc_uart_driver);
 661        if (ret)
 662                return ret;
 663
 664        ret = platform_driver_register(&arc_platform_driver);
 665        if (ret)
 666                uart_unregister_driver(&arc_uart_driver);
 667
 668        return ret;
 669}
 670
 671static void __exit arc_serial_exit(void)
 672{
 673        platform_driver_unregister(&arc_platform_driver);
 674        uart_unregister_driver(&arc_uart_driver);
 675}
 676
 677module_init(arc_serial_init);
 678module_exit(arc_serial_exit);
 679
 680MODULE_LICENSE("GPL");
 681MODULE_ALIAS("platform:" DRIVER_NAME);
 682MODULE_AUTHOR("Vineet Gupta");
 683MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver");
 684