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8#include <linux/clk.h>
9#include <linux/etherdevice.h>
10#include <linux/if_vlan.h>
11#include <linux/interrupt.h>
12#include <linux/kernel.h>
13#include <linux/kmemleak.h>
14#include <linux/module.h>
15#include <linux/netdevice.h>
16#include <linux/net_tstamp.h>
17#include <linux/of.h>
18#include <linux/of_mdio.h>
19#include <linux/of_net.h>
20#include <linux/of_device.h>
21#include <linux/phy.h>
22#include <linux/phy/phy.h>
23#include <linux/platform_device.h>
24#include <linux/pm_runtime.h>
25#include <linux/regmap.h>
26#include <linux/mfd/syscon.h>
27#include <linux/sys_soc.h>
28#include <linux/dma/ti-cppi5.h>
29#include <linux/dma/k3-udma-glue.h>
30
31#include "cpsw_ale.h"
32#include "cpsw_sl.h"
33#include "am65-cpsw-nuss.h"
34#include "am65-cpsw-switchdev.h"
35#include "k3-cppi-desc-pool.h"
36#include "am65-cpts.h"
37
38#define AM65_CPSW_SS_BASE 0x0
39#define AM65_CPSW_SGMII_BASE 0x100
40#define AM65_CPSW_XGMII_BASE 0x2100
41#define AM65_CPSW_CPSW_NU_BASE 0x20000
42#define AM65_CPSW_NU_PORTS_BASE 0x1000
43#define AM65_CPSW_NU_FRAM_BASE 0x12000
44#define AM65_CPSW_NU_STATS_BASE 0x1a000
45#define AM65_CPSW_NU_ALE_BASE 0x1e000
46#define AM65_CPSW_NU_CPTS_BASE 0x1d000
47
48#define AM65_CPSW_NU_PORTS_OFFSET 0x1000
49#define AM65_CPSW_NU_STATS_PORT_OFFSET 0x200
50#define AM65_CPSW_NU_FRAM_PORT_OFFSET 0x200
51
52#define AM65_CPSW_MAX_PORTS 8
53
54#define AM65_CPSW_MIN_PACKET_SIZE VLAN_ETH_ZLEN
55#define AM65_CPSW_MAX_PACKET_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
56
57#define AM65_CPSW_REG_CTL 0x004
58#define AM65_CPSW_REG_STAT_PORT_EN 0x014
59#define AM65_CPSW_REG_PTYPE 0x018
60
61#define AM65_CPSW_P0_REG_CTL 0x004
62#define AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET 0x008
63
64#define AM65_CPSW_PORT_REG_PRI_CTL 0x01c
65#define AM65_CPSW_PORT_REG_RX_PRI_MAP 0x020
66#define AM65_CPSW_PORT_REG_RX_MAXLEN 0x024
67
68#define AM65_CPSW_PORTN_REG_SA_L 0x308
69#define AM65_CPSW_PORTN_REG_SA_H 0x30c
70#define AM65_CPSW_PORTN_REG_TS_CTL 0x310
71#define AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG 0x314
72#define AM65_CPSW_PORTN_REG_TS_VLAN_LTYPE_REG 0x318
73#define AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2 0x31C
74
75#define AM65_CPSW_CTL_VLAN_AWARE BIT(1)
76#define AM65_CPSW_CTL_P0_ENABLE BIT(2)
77#define AM65_CPSW_CTL_P0_TX_CRC_REMOVE BIT(13)
78#define AM65_CPSW_CTL_P0_RX_PAD BIT(14)
79
80
81#define AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN BIT(0)
82
83
84#define AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN BIT(8)
85
86
87#define AM65_CPSW_PN_TS_CTL_TX_ANX_F_EN BIT(4)
88#define AM65_CPSW_PN_TS_CTL_TX_VLAN_LT1_EN BIT(5)
89#define AM65_CPSW_PN_TS_CTL_TX_VLAN_LT2_EN BIT(6)
90#define AM65_CPSW_PN_TS_CTL_TX_ANX_D_EN BIT(7)
91#define AM65_CPSW_PN_TS_CTL_TX_ANX_E_EN BIT(10)
92#define AM65_CPSW_PN_TS_CTL_TX_HOST_TS_EN BIT(11)
93#define AM65_CPSW_PN_TS_CTL_MSG_TYPE_EN_SHIFT 16
94
95
96#define AM65_CPSW_PN_TS_SEQ_ID_OFFSET_SHIFT 16
97
98
99#define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_107 BIT(16)
100#define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_129 BIT(17)
101#define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_130 BIT(18)
102#define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_131 BIT(19)
103#define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_132 BIT(20)
104#define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_319 BIT(21)
105#define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_320 BIT(22)
106#define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_TTL_NONZERO BIT(23)
107
108
109#define AM65_CPSW_TS_EVENT_MSG_TYPE_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3))
110
111#define AM65_CPSW_TS_SEQ_ID_OFFSET (0x1e)
112
113#define AM65_CPSW_TS_TX_ANX_ALL_EN \
114 (AM65_CPSW_PN_TS_CTL_TX_ANX_D_EN | \
115 AM65_CPSW_PN_TS_CTL_TX_ANX_E_EN | \
116 AM65_CPSW_PN_TS_CTL_TX_ANX_F_EN)
117
118#define AM65_CPSW_ALE_AGEOUT_DEFAULT 30
119
120#define AM65_CPSW_MAX_TX_DESC 500
121#define AM65_CPSW_MAX_RX_DESC 500
122
123#define AM65_CPSW_NAV_PS_DATA_SIZE 16
124#define AM65_CPSW_NAV_SW_DATA_SIZE 16
125
126#define AM65_CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK | \
127 NETIF_MSG_IFUP | NETIF_MSG_PROBE | NETIF_MSG_IFDOWN | \
128 NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
129
130static void am65_cpsw_port_set_sl_mac(struct am65_cpsw_port *slave,
131 const u8 *dev_addr)
132{
133 u32 mac_hi = (dev_addr[0] << 0) | (dev_addr[1] << 8) |
134 (dev_addr[2] << 16) | (dev_addr[3] << 24);
135 u32 mac_lo = (dev_addr[4] << 0) | (dev_addr[5] << 8);
136
137 writel(mac_hi, slave->port_base + AM65_CPSW_PORTN_REG_SA_H);
138 writel(mac_lo, slave->port_base + AM65_CPSW_PORTN_REG_SA_L);
139}
140
141static void am65_cpsw_sl_ctl_reset(struct am65_cpsw_port *port)
142{
143 cpsw_sl_reset(port->slave.mac_sl, 100);
144
145 writel(AM65_CPSW_MAX_PACKET_SIZE,
146 port->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
147}
148
149static void am65_cpsw_nuss_get_ver(struct am65_cpsw_common *common)
150{
151 common->nuss_ver = readl(common->ss_base);
152 common->cpsw_ver = readl(common->cpsw_base);
153 dev_info(common->dev,
154 "initializing am65 cpsw nuss version 0x%08X, cpsw version 0x%08X Ports: %u quirks:%08x\n",
155 common->nuss_ver,
156 common->cpsw_ver,
157 common->port_num + 1,
158 common->pdata.quirks);
159}
160
161void am65_cpsw_nuss_adjust_link(struct net_device *ndev)
162{
163 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
164 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
165 struct phy_device *phy = port->slave.phy;
166 u32 mac_control = 0;
167
168 if (!phy)
169 return;
170
171 if (phy->link) {
172 mac_control = CPSW_SL_CTL_GMII_EN;
173
174 if (phy->speed == 1000)
175 mac_control |= CPSW_SL_CTL_GIG;
176 if (phy->speed == 10 && phy_interface_is_rgmii(phy))
177
178 mac_control |= CPSW_SL_CTL_EXT_EN;
179 if (phy->speed == 100 && phy->interface == PHY_INTERFACE_MODE_RMII)
180 mac_control |= CPSW_SL_CTL_IFCTL_A;
181 if (phy->duplex)
182 mac_control |= CPSW_SL_CTL_FULLDUPLEX;
183
184
185
186
187 if (port->slave.rx_pause)
188 mac_control |= CPSW_SL_CTL_RX_FLOW_EN;
189
190 if (port->slave.tx_pause)
191 mac_control |= CPSW_SL_CTL_TX_FLOW_EN;
192
193 cpsw_sl_ctl_set(port->slave.mac_sl, mac_control);
194
195
196 cpsw_ale_control_set(common->ale, port->port_id,
197 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
198
199 am65_cpsw_qos_link_up(ndev, phy->speed);
200 netif_tx_wake_all_queues(ndev);
201 } else {
202 int tmo;
203
204
205 cpsw_ale_control_set(common->ale, port->port_id,
206 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
207
208 cpsw_sl_ctl_set(port->slave.mac_sl, CPSW_SL_CTL_CMD_IDLE);
209
210 tmo = cpsw_sl_wait_for_idle(port->slave.mac_sl, 100);
211 dev_dbg(common->dev, "donw msc_sl %08x tmo %d\n",
212 cpsw_sl_reg_read(port->slave.mac_sl, CPSW_SL_MACSTATUS),
213 tmo);
214
215 cpsw_sl_ctl_reset(port->slave.mac_sl);
216
217 am65_cpsw_qos_link_down(ndev);
218 netif_tx_stop_all_queues(ndev);
219 }
220
221 phy_print_status(phy);
222}
223
224static int am65_cpsw_nuss_ndo_slave_add_vid(struct net_device *ndev,
225 __be16 proto, u16 vid)
226{
227 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
228 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
229 u32 port_mask, unreg_mcast = 0;
230 int ret;
231
232 if (!common->is_emac_mode)
233 return 0;
234
235 if (!netif_running(ndev) || !vid)
236 return 0;
237
238 ret = pm_runtime_get_sync(common->dev);
239 if (ret < 0) {
240 pm_runtime_put_noidle(common->dev);
241 return ret;
242 }
243
244 port_mask = BIT(port->port_id) | ALE_PORT_HOST;
245 if (!vid)
246 unreg_mcast = port_mask;
247 dev_info(common->dev, "Adding vlan %d to vlan filter\n", vid);
248 ret = cpsw_ale_vlan_add_modify(common->ale, vid, port_mask,
249 unreg_mcast, port_mask, 0);
250
251 pm_runtime_put(common->dev);
252 return ret;
253}
254
255static int am65_cpsw_nuss_ndo_slave_kill_vid(struct net_device *ndev,
256 __be16 proto, u16 vid)
257{
258 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
259 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
260 int ret;
261
262 if (!common->is_emac_mode)
263 return 0;
264
265 if (!netif_running(ndev) || !vid)
266 return 0;
267
268 ret = pm_runtime_get_sync(common->dev);
269 if (ret < 0) {
270 pm_runtime_put_noidle(common->dev);
271 return ret;
272 }
273
274 dev_info(common->dev, "Removing vlan %d from vlan filter\n", vid);
275 ret = cpsw_ale_del_vlan(common->ale, vid,
276 BIT(port->port_id) | ALE_PORT_HOST);
277
278 pm_runtime_put(common->dev);
279 return ret;
280}
281
282static void am65_cpsw_slave_set_promisc(struct am65_cpsw_port *port,
283 bool promisc)
284{
285 struct am65_cpsw_common *common = port->common;
286
287 if (promisc && !common->is_emac_mode) {
288 dev_dbg(common->dev, "promisc mode requested in switch mode");
289 return;
290 }
291
292 if (promisc) {
293
294 cpsw_ale_control_set(common->ale, port->port_id,
295 ALE_PORT_MACONLY_CAF, 1);
296 dev_dbg(common->dev, "promisc enabled\n");
297 } else {
298
299 cpsw_ale_control_set(common->ale, port->port_id,
300 ALE_PORT_MACONLY_CAF, 0);
301 dev_dbg(common->dev, "promisc disabled\n");
302 }
303}
304
305static void am65_cpsw_nuss_ndo_slave_set_rx_mode(struct net_device *ndev)
306{
307 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
308 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
309 u32 port_mask;
310 bool promisc;
311
312 promisc = !!(ndev->flags & IFF_PROMISC);
313 am65_cpsw_slave_set_promisc(port, promisc);
314
315 if (promisc)
316 return;
317
318
319 cpsw_ale_set_allmulti(common->ale,
320 ndev->flags & IFF_ALLMULTI, port->port_id);
321
322 port_mask = ALE_PORT_HOST;
323
324 cpsw_ale_flush_multicast(common->ale, port_mask, -1);
325
326 if (!netdev_mc_empty(ndev)) {
327 struct netdev_hw_addr *ha;
328
329
330 netdev_for_each_mc_addr(ha, ndev) {
331 cpsw_ale_add_mcast(common->ale, ha->addr,
332 port_mask, 0, 0, 0);
333 }
334 }
335}
336
337static void am65_cpsw_nuss_ndo_host_tx_timeout(struct net_device *ndev,
338 unsigned int txqueue)
339{
340 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
341 struct am65_cpsw_tx_chn *tx_chn;
342 struct netdev_queue *netif_txq;
343 unsigned long trans_start;
344
345 netif_txq = netdev_get_tx_queue(ndev, txqueue);
346 tx_chn = &common->tx_chns[txqueue];
347 trans_start = netif_txq->trans_start;
348
349 netdev_err(ndev, "txq:%d DRV_XOFF:%d tmo:%u dql_avail:%d free_desc:%zu\n",
350 txqueue,
351 netif_tx_queue_stopped(netif_txq),
352 jiffies_to_msecs(jiffies - trans_start),
353 dql_avail(&netif_txq->dql),
354 k3_cppi_desc_pool_avail(tx_chn->desc_pool));
355
356 if (netif_tx_queue_stopped(netif_txq)) {
357
358 txq_trans_update(netif_txq);
359 netif_tx_wake_queue(netif_txq);
360 }
361}
362
363static int am65_cpsw_nuss_rx_push(struct am65_cpsw_common *common,
364 struct sk_buff *skb)
365{
366 struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
367 struct cppi5_host_desc_t *desc_rx;
368 struct device *dev = common->dev;
369 u32 pkt_len = skb_tailroom(skb);
370 dma_addr_t desc_dma;
371 dma_addr_t buf_dma;
372 void *swdata;
373
374 desc_rx = k3_cppi_desc_pool_alloc(rx_chn->desc_pool);
375 if (!desc_rx) {
376 dev_err(dev, "Failed to allocate RXFDQ descriptor\n");
377 return -ENOMEM;
378 }
379 desc_dma = k3_cppi_desc_pool_virt2dma(rx_chn->desc_pool, desc_rx);
380
381 buf_dma = dma_map_single(rx_chn->dma_dev, skb->data, pkt_len,
382 DMA_FROM_DEVICE);
383 if (unlikely(dma_mapping_error(rx_chn->dma_dev, buf_dma))) {
384 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
385 dev_err(dev, "Failed to map rx skb buffer\n");
386 return -EINVAL;
387 }
388
389 cppi5_hdesc_init(desc_rx, CPPI5_INFO0_HDESC_EPIB_PRESENT,
390 AM65_CPSW_NAV_PS_DATA_SIZE);
391 k3_udma_glue_rx_dma_to_cppi5_addr(rx_chn->rx_chn, &buf_dma);
392 cppi5_hdesc_attach_buf(desc_rx, buf_dma, skb_tailroom(skb), buf_dma, skb_tailroom(skb));
393 swdata = cppi5_hdesc_get_swdata(desc_rx);
394 *((void **)swdata) = skb;
395
396 return k3_udma_glue_push_rx_chn(rx_chn->rx_chn, 0, desc_rx, desc_dma);
397}
398
399void am65_cpsw_nuss_set_p0_ptype(struct am65_cpsw_common *common)
400{
401 struct am65_cpsw_host *host_p = am65_common_get_host(common);
402 u32 val, pri_map;
403
404
405 val = readl(host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
406
407 if (common->pf_p0_rx_ptype_rrobin) {
408 val |= AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN;
409
410
411
412 pri_map = 0x0;
413 } else {
414 val &= ~AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN;
415
416 pri_map = 0x76543210;
417 }
418
419 writel(pri_map, host_p->port_base + AM65_CPSW_PORT_REG_RX_PRI_MAP);
420 writel(val, host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
421}
422
423static void am65_cpsw_init_host_port_switch(struct am65_cpsw_common *common);
424static void am65_cpsw_init_host_port_emac(struct am65_cpsw_common *common);
425static void am65_cpsw_init_port_switch_ale(struct am65_cpsw_port *port);
426static void am65_cpsw_init_port_emac_ale(struct am65_cpsw_port *port);
427
428static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common,
429 netdev_features_t features)
430{
431 struct am65_cpsw_host *host_p = am65_common_get_host(common);
432 int port_idx, i, ret;
433 struct sk_buff *skb;
434 u32 val, port_mask;
435
436 if (common->usage_count)
437 return 0;
438
439
440 writel(AM65_CPSW_CTL_P0_ENABLE | AM65_CPSW_CTL_P0_TX_CRC_REMOVE |
441 AM65_CPSW_CTL_VLAN_AWARE | AM65_CPSW_CTL_P0_RX_PAD,
442 common->cpsw_base + AM65_CPSW_REG_CTL);
443
444 writel(AM65_CPSW_MAX_PACKET_SIZE,
445 host_p->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
446
447 writel(common->rx_flow_id_base,
448 host_p->port_base + AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET);
449
450 writel(AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN, host_p->port_base + AM65_CPSW_P0_REG_CTL);
451
452 am65_cpsw_nuss_set_p0_ptype(common);
453
454
455 val = BIT(HOST_PORT_NUM);
456 for (port_idx = 0; port_idx < common->port_num; port_idx++) {
457 struct am65_cpsw_port *port = &common->ports[port_idx];
458
459 if (!port->disabled)
460 val |= BIT(port->port_id);
461 }
462 writel(val, common->cpsw_base + AM65_CPSW_REG_STAT_PORT_EN);
463
464
465 writel(0, common->cpsw_base + AM65_CPSW_REG_PTYPE);
466
467 cpsw_ale_start(common->ale);
468
469
470 cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
471 ALE_DEFAULT_THREAD_ID, 0);
472 cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
473 ALE_DEFAULT_THREAD_ENABLE, 1);
474
475 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_VLAN_AWARE, 1);
476 cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
477 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
478
479
480 port_mask = GENMASK(common->port_num, 0) &
481 ~common->disabled_ports_mask;
482
483 cpsw_ale_add_vlan(common->ale, 0, port_mask,
484 port_mask, port_mask,
485 port_mask & ~ALE_PORT_HOST);
486
487 if (common->is_emac_mode)
488 am65_cpsw_init_host_port_emac(common);
489 else
490 am65_cpsw_init_host_port_switch(common);
491
492 for (i = 0; i < common->rx_chns.descs_num; i++) {
493 skb = __netdev_alloc_skb_ip_align(NULL,
494 AM65_CPSW_MAX_PACKET_SIZE,
495 GFP_KERNEL);
496 if (!skb) {
497 dev_err(common->dev, "cannot allocate skb\n");
498 return -ENOMEM;
499 }
500
501 ret = am65_cpsw_nuss_rx_push(common, skb);
502 if (ret < 0) {
503 dev_err(common->dev,
504 "cannot submit skb to channel rx, error %d\n",
505 ret);
506 kfree_skb(skb);
507 return ret;
508 }
509 kmemleak_not_leak(skb);
510 }
511 k3_udma_glue_enable_rx_chn(common->rx_chns.rx_chn);
512
513 for (i = 0; i < common->tx_ch_num; i++) {
514 ret = k3_udma_glue_enable_tx_chn(common->tx_chns[i].tx_chn);
515 if (ret)
516 return ret;
517 napi_enable(&common->tx_chns[i].napi_tx);
518 }
519
520 napi_enable(&common->napi_rx);
521 if (common->rx_irq_disabled) {
522 common->rx_irq_disabled = false;
523 enable_irq(common->rx_chns.irq);
524 }
525
526 dev_dbg(common->dev, "cpsw_nuss started\n");
527 return 0;
528}
529
530static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma);
531static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma);
532
533static int am65_cpsw_nuss_common_stop(struct am65_cpsw_common *common)
534{
535 int i;
536
537 if (common->usage_count != 1)
538 return 0;
539
540 cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
541 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
542
543
544 atomic_set(&common->tdown_cnt, common->tx_ch_num);
545
546 smp_mb__after_atomic();
547 reinit_completion(&common->tdown_complete);
548
549 for (i = 0; i < common->tx_ch_num; i++)
550 k3_udma_glue_tdown_tx_chn(common->tx_chns[i].tx_chn, false);
551
552 i = wait_for_completion_timeout(&common->tdown_complete,
553 msecs_to_jiffies(1000));
554 if (!i)
555 dev_err(common->dev, "tx timeout\n");
556 for (i = 0; i < common->tx_ch_num; i++)
557 napi_disable(&common->tx_chns[i].napi_tx);
558
559 for (i = 0; i < common->tx_ch_num; i++) {
560 k3_udma_glue_reset_tx_chn(common->tx_chns[i].tx_chn,
561 &common->tx_chns[i],
562 am65_cpsw_nuss_tx_cleanup);
563 k3_udma_glue_disable_tx_chn(common->tx_chns[i].tx_chn);
564 }
565
566 k3_udma_glue_tdown_rx_chn(common->rx_chns.rx_chn, true);
567 napi_disable(&common->napi_rx);
568
569 for (i = 0; i < AM65_CPSW_MAX_RX_FLOWS; i++)
570 k3_udma_glue_reset_rx_chn(common->rx_chns.rx_chn, i,
571 &common->rx_chns,
572 am65_cpsw_nuss_rx_cleanup, !!i);
573
574 k3_udma_glue_disable_rx_chn(common->rx_chns.rx_chn);
575
576 cpsw_ale_stop(common->ale);
577
578 writel(0, common->cpsw_base + AM65_CPSW_REG_CTL);
579 writel(0, common->cpsw_base + AM65_CPSW_REG_STAT_PORT_EN);
580
581 dev_dbg(common->dev, "cpsw_nuss stopped\n");
582 return 0;
583}
584
585static int am65_cpsw_nuss_ndo_slave_stop(struct net_device *ndev)
586{
587 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
588 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
589 int ret;
590
591 if (port->slave.phy)
592 phy_stop(port->slave.phy);
593
594 netif_tx_stop_all_queues(ndev);
595
596 if (port->slave.phy) {
597 phy_disconnect(port->slave.phy);
598 port->slave.phy = NULL;
599 }
600
601 ret = am65_cpsw_nuss_common_stop(common);
602 if (ret)
603 return ret;
604
605 common->usage_count--;
606 pm_runtime_put(common->dev);
607 return 0;
608}
609
610static int cpsw_restore_vlans(struct net_device *vdev, int vid, void *arg)
611{
612 struct am65_cpsw_port *port = arg;
613
614 if (!vdev)
615 return 0;
616
617 return am65_cpsw_nuss_ndo_slave_add_vid(port->ndev, 0, vid);
618}
619
620static int am65_cpsw_nuss_ndo_slave_open(struct net_device *ndev)
621{
622 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
623 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
624 int ret, i;
625
626 ret = pm_runtime_get_sync(common->dev);
627 if (ret < 0) {
628 pm_runtime_put_noidle(common->dev);
629 return ret;
630 }
631
632
633 ret = netif_set_real_num_tx_queues(ndev, common->tx_ch_num);
634 if (ret) {
635 dev_err(common->dev, "cannot set real number of tx queues\n");
636 return ret;
637 }
638
639 ret = netif_set_real_num_rx_queues(ndev, AM65_CPSW_MAX_RX_QUEUES);
640 if (ret) {
641 dev_err(common->dev, "cannot set real number of rx queues\n");
642 return ret;
643 }
644
645 for (i = 0; i < common->tx_ch_num; i++)
646 netdev_tx_reset_queue(netdev_get_tx_queue(ndev, i));
647
648 ret = am65_cpsw_nuss_common_open(common, ndev->features);
649 if (ret)
650 return ret;
651
652 common->usage_count++;
653
654 am65_cpsw_port_set_sl_mac(port, ndev->dev_addr);
655
656 if (common->is_emac_mode)
657 am65_cpsw_init_port_emac_ale(port);
658 else
659 am65_cpsw_init_port_switch_ale(port);
660
661
662 am65_cpsw_sl_ctl_reset(port);
663
664 ret = phy_set_mode_ext(port->slave.ifphy, PHY_MODE_ETHERNET,
665 port->slave.phy_if);
666 if (ret)
667 goto error_cleanup;
668
669 if (port->slave.phy_node) {
670 port->slave.phy = of_phy_connect(ndev,
671 port->slave.phy_node,
672 &am65_cpsw_nuss_adjust_link,
673 0, port->slave.phy_if);
674 if (!port->slave.phy) {
675 dev_err(common->dev, "phy %pOF not found on slave %d\n",
676 port->slave.phy_node,
677 port->port_id);
678 ret = -ENODEV;
679 goto error_cleanup;
680 }
681 }
682
683
684 vlan_for_each(ndev, cpsw_restore_vlans, port);
685
686 phy_attached_info(port->slave.phy);
687 phy_start(port->slave.phy);
688
689 return 0;
690
691error_cleanup:
692 am65_cpsw_nuss_ndo_slave_stop(ndev);
693 return ret;
694}
695
696static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma)
697{
698 struct am65_cpsw_rx_chn *rx_chn = data;
699 struct cppi5_host_desc_t *desc_rx;
700 struct sk_buff *skb;
701 dma_addr_t buf_dma;
702 u32 buf_dma_len;
703 void **swdata;
704
705 desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn->desc_pool, desc_dma);
706 swdata = cppi5_hdesc_get_swdata(desc_rx);
707 skb = *swdata;
708 cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
709 k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn->rx_chn, &buf_dma);
710
711 dma_unmap_single(rx_chn->dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);
712 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
713
714 dev_kfree_skb_any(skb);
715}
716
717static void am65_cpsw_nuss_rx_ts(struct sk_buff *skb, u32 *psdata)
718{
719 struct skb_shared_hwtstamps *ssh;
720 u64 ns;
721
722 ns = ((u64)psdata[1] << 32) | psdata[0];
723
724 ssh = skb_hwtstamps(skb);
725 memset(ssh, 0, sizeof(*ssh));
726 ssh->hwtstamp = ns_to_ktime(ns);
727}
728
729
730#define AM65_CPSW_RX_PSD_CSUM_ADD GENMASK(15, 0)
731#define AM65_CPSW_RX_PSD_CSUM_ERR BIT(16)
732#define AM65_CPSW_RX_PSD_IS_FRAGMENT BIT(17)
733#define AM65_CPSW_RX_PSD_IS_TCP BIT(18)
734#define AM65_CPSW_RX_PSD_IPV6_VALID BIT(19)
735#define AM65_CPSW_RX_PSD_IPV4_VALID BIT(20)
736
737static void am65_cpsw_nuss_rx_csum(struct sk_buff *skb, u32 csum_info)
738{
739
740
741
742
743
744
745
746
747
748 skb_checksum_none_assert(skb);
749
750 if (unlikely(!(skb->dev->features & NETIF_F_RXCSUM)))
751 return;
752
753 if ((csum_info & (AM65_CPSW_RX_PSD_IPV6_VALID |
754 AM65_CPSW_RX_PSD_IPV4_VALID)) &&
755 !(csum_info & AM65_CPSW_RX_PSD_CSUM_ERR)) {
756
757 if (!(csum_info & AM65_CPSW_RX_PSD_IS_FRAGMENT))
758 skb->ip_summed = CHECKSUM_UNNECESSARY;
759 }
760}
761
762static int am65_cpsw_nuss_rx_packets(struct am65_cpsw_common *common,
763 u32 flow_idx)
764{
765 struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
766 u32 buf_dma_len, pkt_len, port_id = 0, csum_info;
767 struct am65_cpsw_ndev_priv *ndev_priv;
768 struct am65_cpsw_ndev_stats *stats;
769 struct cppi5_host_desc_t *desc_rx;
770 struct device *dev = common->dev;
771 struct sk_buff *skb, *new_skb;
772 dma_addr_t desc_dma, buf_dma;
773 struct am65_cpsw_port *port;
774 struct net_device *ndev;
775 void **swdata;
776 u32 *psdata;
777 int ret = 0;
778
779 ret = k3_udma_glue_pop_rx_chn(rx_chn->rx_chn, flow_idx, &desc_dma);
780 if (ret) {
781 if (ret != -ENODATA)
782 dev_err(dev, "RX: pop chn fail %d\n", ret);
783 return ret;
784 }
785
786 if (cppi5_desc_is_tdcm(desc_dma)) {
787 dev_dbg(dev, "%s RX tdown flow: %u\n", __func__, flow_idx);
788 return 0;
789 }
790
791 desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn->desc_pool, desc_dma);
792 dev_dbg(dev, "%s flow_idx: %u desc %pad\n",
793 __func__, flow_idx, &desc_dma);
794
795 swdata = cppi5_hdesc_get_swdata(desc_rx);
796 skb = *swdata;
797 cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
798 k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn->rx_chn, &buf_dma);
799 pkt_len = cppi5_hdesc_get_pktlen(desc_rx);
800 cppi5_desc_get_tags_ids(&desc_rx->hdr, &port_id, NULL);
801 dev_dbg(dev, "%s rx port_id:%d\n", __func__, port_id);
802 port = am65_common_get_port(common, port_id);
803 ndev = port->ndev;
804 skb->dev = ndev;
805
806 psdata = cppi5_hdesc_get_psdata(desc_rx);
807
808 if (port->rx_ts_enabled)
809 am65_cpsw_nuss_rx_ts(skb, psdata);
810 csum_info = psdata[2];
811 dev_dbg(dev, "%s rx csum_info:%#x\n", __func__, csum_info);
812
813 dma_unmap_single(rx_chn->dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);
814
815 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
816
817 new_skb = netdev_alloc_skb_ip_align(ndev, AM65_CPSW_MAX_PACKET_SIZE);
818 if (new_skb) {
819 ndev_priv = netdev_priv(ndev);
820 am65_cpsw_nuss_set_offload_fwd_mark(skb, ndev_priv->offload_fwd_mark);
821 skb_put(skb, pkt_len);
822 skb->protocol = eth_type_trans(skb, ndev);
823 am65_cpsw_nuss_rx_csum(skb, csum_info);
824 napi_gro_receive(&common->napi_rx, skb);
825
826 stats = this_cpu_ptr(ndev_priv->stats);
827
828 u64_stats_update_begin(&stats->syncp);
829 stats->rx_packets++;
830 stats->rx_bytes += pkt_len;
831 u64_stats_update_end(&stats->syncp);
832 kmemleak_not_leak(new_skb);
833 } else {
834 ndev->stats.rx_dropped++;
835 new_skb = skb;
836 }
837
838 if (netif_dormant(ndev)) {
839 dev_kfree_skb_any(new_skb);
840 ndev->stats.rx_dropped++;
841 return 0;
842 }
843
844 ret = am65_cpsw_nuss_rx_push(common, new_skb);
845 if (WARN_ON(ret < 0)) {
846 dev_kfree_skb_any(new_skb);
847 ndev->stats.rx_errors++;
848 ndev->stats.rx_dropped++;
849 }
850
851 return ret;
852}
853
854static int am65_cpsw_nuss_rx_poll(struct napi_struct *napi_rx, int budget)
855{
856 struct am65_cpsw_common *common = am65_cpsw_napi_to_common(napi_rx);
857 int flow = AM65_CPSW_MAX_RX_FLOWS;
858 int cur_budget, ret;
859 int num_rx = 0;
860
861
862 while (flow--) {
863 cur_budget = budget - num_rx;
864
865 while (cur_budget--) {
866 ret = am65_cpsw_nuss_rx_packets(common, flow);
867 if (ret)
868 break;
869 num_rx++;
870 }
871
872 if (num_rx >= budget)
873 break;
874 }
875
876 dev_dbg(common->dev, "%s num_rx:%d %d\n", __func__, num_rx, budget);
877
878 if (num_rx < budget && napi_complete_done(napi_rx, num_rx)) {
879 if (common->rx_irq_disabled) {
880 common->rx_irq_disabled = false;
881 enable_irq(common->rx_chns.irq);
882 }
883 }
884
885 return num_rx;
886}
887
888static void am65_cpsw_nuss_xmit_free(struct am65_cpsw_tx_chn *tx_chn,
889 struct cppi5_host_desc_t *desc)
890{
891 struct cppi5_host_desc_t *first_desc, *next_desc;
892 dma_addr_t buf_dma, next_desc_dma;
893 u32 buf_dma_len;
894
895 first_desc = desc;
896 next_desc = first_desc;
897
898 cppi5_hdesc_get_obuf(first_desc, &buf_dma, &buf_dma_len);
899 k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &buf_dma);
900
901 dma_unmap_single(tx_chn->dma_dev, buf_dma, buf_dma_len, DMA_TO_DEVICE);
902
903 next_desc_dma = cppi5_hdesc_get_next_hbdesc(first_desc);
904 k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &next_desc_dma);
905 while (next_desc_dma) {
906 next_desc = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool,
907 next_desc_dma);
908 cppi5_hdesc_get_obuf(next_desc, &buf_dma, &buf_dma_len);
909 k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &buf_dma);
910
911 dma_unmap_page(tx_chn->dma_dev, buf_dma, buf_dma_len,
912 DMA_TO_DEVICE);
913
914 next_desc_dma = cppi5_hdesc_get_next_hbdesc(next_desc);
915 k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &next_desc_dma);
916
917 k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc);
918 }
919
920 k3_cppi_desc_pool_free(tx_chn->desc_pool, first_desc);
921}
922
923static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma)
924{
925 struct am65_cpsw_tx_chn *tx_chn = data;
926 struct cppi5_host_desc_t *desc_tx;
927 struct sk_buff *skb;
928 void **swdata;
929
930 desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool, desc_dma);
931 swdata = cppi5_hdesc_get_swdata(desc_tx);
932 skb = *(swdata);
933 am65_cpsw_nuss_xmit_free(tx_chn, desc_tx);
934
935 dev_kfree_skb_any(skb);
936}
937
938static struct sk_buff *
939am65_cpsw_nuss_tx_compl_packet(struct am65_cpsw_tx_chn *tx_chn,
940 dma_addr_t desc_dma)
941{
942 struct am65_cpsw_ndev_priv *ndev_priv;
943 struct am65_cpsw_ndev_stats *stats;
944 struct cppi5_host_desc_t *desc_tx;
945 struct net_device *ndev;
946 struct sk_buff *skb;
947 void **swdata;
948
949 desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool,
950 desc_dma);
951 swdata = cppi5_hdesc_get_swdata(desc_tx);
952 skb = *(swdata);
953 am65_cpsw_nuss_xmit_free(tx_chn, desc_tx);
954
955 ndev = skb->dev;
956
957 am65_cpts_tx_timestamp(tx_chn->common->cpts, skb);
958
959 ndev_priv = netdev_priv(ndev);
960 stats = this_cpu_ptr(ndev_priv->stats);
961 u64_stats_update_begin(&stats->syncp);
962 stats->tx_packets++;
963 stats->tx_bytes += skb->len;
964 u64_stats_update_end(&stats->syncp);
965
966 return skb;
967}
968
969static void am65_cpsw_nuss_tx_wake(struct am65_cpsw_tx_chn *tx_chn, struct net_device *ndev,
970 struct netdev_queue *netif_txq)
971{
972 if (netif_tx_queue_stopped(netif_txq)) {
973
974
975
976
977 __netif_tx_lock(netif_txq, smp_processor_id());
978 if (netif_running(ndev) &&
979 (k3_cppi_desc_pool_avail(tx_chn->desc_pool) >= MAX_SKB_FRAGS))
980 netif_tx_wake_queue(netif_txq);
981
982 __netif_tx_unlock(netif_txq);
983 }
984}
985
986static int am65_cpsw_nuss_tx_compl_packets(struct am65_cpsw_common *common,
987 int chn, unsigned int budget)
988{
989 struct device *dev = common->dev;
990 struct am65_cpsw_tx_chn *tx_chn;
991 struct netdev_queue *netif_txq;
992 unsigned int total_bytes = 0;
993 struct net_device *ndev;
994 struct sk_buff *skb;
995 dma_addr_t desc_dma;
996 int res, num_tx = 0;
997
998 tx_chn = &common->tx_chns[chn];
999
1000 while (true) {
1001 spin_lock(&tx_chn->lock);
1002 res = k3_udma_glue_pop_tx_chn(tx_chn->tx_chn, &desc_dma);
1003 spin_unlock(&tx_chn->lock);
1004 if (res == -ENODATA)
1005 break;
1006
1007 if (cppi5_desc_is_tdcm(desc_dma)) {
1008 if (atomic_dec_and_test(&common->tdown_cnt))
1009 complete(&common->tdown_complete);
1010 break;
1011 }
1012
1013 skb = am65_cpsw_nuss_tx_compl_packet(tx_chn, desc_dma);
1014 total_bytes = skb->len;
1015 ndev = skb->dev;
1016 napi_consume_skb(skb, budget);
1017 num_tx++;
1018
1019 netif_txq = netdev_get_tx_queue(ndev, chn);
1020
1021 netdev_tx_completed_queue(netif_txq, num_tx, total_bytes);
1022
1023 am65_cpsw_nuss_tx_wake(tx_chn, ndev, netif_txq);
1024 }
1025
1026 dev_dbg(dev, "%s:%u pkt:%d\n", __func__, chn, num_tx);
1027
1028 return num_tx;
1029}
1030
1031static int am65_cpsw_nuss_tx_compl_packets_2g(struct am65_cpsw_common *common,
1032 int chn, unsigned int budget)
1033{
1034 struct device *dev = common->dev;
1035 struct am65_cpsw_tx_chn *tx_chn;
1036 struct netdev_queue *netif_txq;
1037 unsigned int total_bytes = 0;
1038 struct net_device *ndev;
1039 struct sk_buff *skb;
1040 dma_addr_t desc_dma;
1041 int res, num_tx = 0;
1042
1043 tx_chn = &common->tx_chns[chn];
1044
1045 while (true) {
1046 res = k3_udma_glue_pop_tx_chn(tx_chn->tx_chn, &desc_dma);
1047 if (res == -ENODATA)
1048 break;
1049
1050 if (cppi5_desc_is_tdcm(desc_dma)) {
1051 if (atomic_dec_and_test(&common->tdown_cnt))
1052 complete(&common->tdown_complete);
1053 break;
1054 }
1055
1056 skb = am65_cpsw_nuss_tx_compl_packet(tx_chn, desc_dma);
1057
1058 ndev = skb->dev;
1059 total_bytes += skb->len;
1060 napi_consume_skb(skb, budget);
1061 num_tx++;
1062 }
1063
1064 if (!num_tx)
1065 return 0;
1066
1067 netif_txq = netdev_get_tx_queue(ndev, chn);
1068
1069 netdev_tx_completed_queue(netif_txq, num_tx, total_bytes);
1070
1071 am65_cpsw_nuss_tx_wake(tx_chn, ndev, netif_txq);
1072
1073 dev_dbg(dev, "%s:%u pkt:%d\n", __func__, chn, num_tx);
1074
1075 return num_tx;
1076}
1077
1078static int am65_cpsw_nuss_tx_poll(struct napi_struct *napi_tx, int budget)
1079{
1080 struct am65_cpsw_tx_chn *tx_chn = am65_cpsw_napi_to_tx_chn(napi_tx);
1081 int num_tx;
1082
1083 if (AM65_CPSW_IS_CPSW2G(tx_chn->common))
1084 num_tx = am65_cpsw_nuss_tx_compl_packets_2g(tx_chn->common, tx_chn->id, budget);
1085 else
1086 num_tx = am65_cpsw_nuss_tx_compl_packets(tx_chn->common, tx_chn->id, budget);
1087
1088 num_tx = min(num_tx, budget);
1089 if (num_tx < budget) {
1090 napi_complete(napi_tx);
1091 enable_irq(tx_chn->irq);
1092 }
1093
1094 return num_tx;
1095}
1096
1097static irqreturn_t am65_cpsw_nuss_rx_irq(int irq, void *dev_id)
1098{
1099 struct am65_cpsw_common *common = dev_id;
1100
1101 common->rx_irq_disabled = true;
1102 disable_irq_nosync(irq);
1103 napi_schedule(&common->napi_rx);
1104
1105 return IRQ_HANDLED;
1106}
1107
1108static irqreturn_t am65_cpsw_nuss_tx_irq(int irq, void *dev_id)
1109{
1110 struct am65_cpsw_tx_chn *tx_chn = dev_id;
1111
1112 disable_irq_nosync(irq);
1113 napi_schedule(&tx_chn->napi_tx);
1114
1115 return IRQ_HANDLED;
1116}
1117
1118static netdev_tx_t am65_cpsw_nuss_ndo_slave_xmit(struct sk_buff *skb,
1119 struct net_device *ndev)
1120{
1121 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1122 struct cppi5_host_desc_t *first_desc, *next_desc, *cur_desc;
1123 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1124 struct device *dev = common->dev;
1125 struct am65_cpsw_tx_chn *tx_chn;
1126 struct netdev_queue *netif_txq;
1127 dma_addr_t desc_dma, buf_dma;
1128 int ret, q_idx, i;
1129 void **swdata;
1130 u32 *psdata;
1131 u32 pkt_len;
1132
1133
1134 pkt_len = skb_headlen(skb);
1135
1136
1137 if (port->tx_ts_enabled)
1138 am65_cpts_prep_tx_timestamp(common->cpts, skb);
1139
1140 q_idx = skb_get_queue_mapping(skb);
1141 dev_dbg(dev, "%s skb_queue:%d\n", __func__, q_idx);
1142
1143 tx_chn = &common->tx_chns[q_idx];
1144 netif_txq = netdev_get_tx_queue(ndev, q_idx);
1145
1146
1147 buf_dma = dma_map_single(tx_chn->dma_dev, skb->data, pkt_len,
1148 DMA_TO_DEVICE);
1149 if (unlikely(dma_mapping_error(tx_chn->dma_dev, buf_dma))) {
1150 dev_err(dev, "Failed to map tx skb buffer\n");
1151 ndev->stats.tx_errors++;
1152 goto err_free_skb;
1153 }
1154
1155 first_desc = k3_cppi_desc_pool_alloc(tx_chn->desc_pool);
1156 if (!first_desc) {
1157 dev_dbg(dev, "Failed to allocate descriptor\n");
1158 dma_unmap_single(tx_chn->dma_dev, buf_dma, pkt_len,
1159 DMA_TO_DEVICE);
1160 goto busy_stop_q;
1161 }
1162
1163 cppi5_hdesc_init(first_desc, CPPI5_INFO0_HDESC_EPIB_PRESENT,
1164 AM65_CPSW_NAV_PS_DATA_SIZE);
1165 cppi5_desc_set_pktids(&first_desc->hdr, 0, 0x3FFF);
1166 cppi5_hdesc_set_pkttype(first_desc, 0x7);
1167 cppi5_desc_set_tags_ids(&first_desc->hdr, 0, port->port_id);
1168
1169 k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn->tx_chn, &buf_dma);
1170 cppi5_hdesc_attach_buf(first_desc, buf_dma, pkt_len, buf_dma, pkt_len);
1171 swdata = cppi5_hdesc_get_swdata(first_desc);
1172 *(swdata) = skb;
1173 psdata = cppi5_hdesc_get_psdata(first_desc);
1174
1175
1176 psdata[2] = 0;
1177 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1178 unsigned int cs_start, cs_offset;
1179
1180 cs_start = skb_transport_offset(skb);
1181 cs_offset = cs_start + skb->csum_offset;
1182
1183 psdata[2] = ((cs_offset + 1) << 24) |
1184 ((cs_start + 1) << 16) | (skb->len - cs_start);
1185 dev_dbg(dev, "%s tx psdata:%#x\n", __func__, psdata[2]);
1186 }
1187
1188 if (!skb_is_nonlinear(skb))
1189 goto done_tx;
1190
1191 dev_dbg(dev, "fragmented SKB\n");
1192
1193
1194 cur_desc = first_desc;
1195 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1196 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1197 u32 frag_size = skb_frag_size(frag);
1198
1199 next_desc = k3_cppi_desc_pool_alloc(tx_chn->desc_pool);
1200 if (!next_desc) {
1201 dev_err(dev, "Failed to allocate descriptor\n");
1202 goto busy_free_descs;
1203 }
1204
1205 buf_dma = skb_frag_dma_map(tx_chn->dma_dev, frag, 0, frag_size,
1206 DMA_TO_DEVICE);
1207 if (unlikely(dma_mapping_error(tx_chn->dma_dev, buf_dma))) {
1208 dev_err(dev, "Failed to map tx skb page\n");
1209 k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc);
1210 ndev->stats.tx_errors++;
1211 goto err_free_descs;
1212 }
1213
1214 cppi5_hdesc_reset_hbdesc(next_desc);
1215 k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn->tx_chn, &buf_dma);
1216 cppi5_hdesc_attach_buf(next_desc,
1217 buf_dma, frag_size, buf_dma, frag_size);
1218
1219 desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn->desc_pool,
1220 next_desc);
1221 k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn->tx_chn, &desc_dma);
1222 cppi5_hdesc_link_hbdesc(cur_desc, desc_dma);
1223
1224 pkt_len += frag_size;
1225 cur_desc = next_desc;
1226 }
1227 WARN_ON(pkt_len != skb->len);
1228
1229done_tx:
1230 skb_tx_timestamp(skb);
1231
1232
1233 netdev_tx_sent_queue(netif_txq, pkt_len);
1234
1235 cppi5_hdesc_set_pktlen(first_desc, pkt_len);
1236 desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn->desc_pool, first_desc);
1237 if (AM65_CPSW_IS_CPSW2G(common)) {
1238 ret = k3_udma_glue_push_tx_chn(tx_chn->tx_chn, first_desc, desc_dma);
1239 } else {
1240 spin_lock_bh(&tx_chn->lock);
1241 ret = k3_udma_glue_push_tx_chn(tx_chn->tx_chn, first_desc, desc_dma);
1242 spin_unlock_bh(&tx_chn->lock);
1243 }
1244 if (ret) {
1245 dev_err(dev, "can't push desc %d\n", ret);
1246
1247 netdev_tx_completed_queue(netif_txq, 1, pkt_len);
1248 ndev->stats.tx_errors++;
1249 goto err_free_descs;
1250 }
1251
1252 if (k3_cppi_desc_pool_avail(tx_chn->desc_pool) < MAX_SKB_FRAGS) {
1253 netif_tx_stop_queue(netif_txq);
1254
1255 smp_mb__after_atomic();
1256 dev_dbg(dev, "netif_tx_stop_queue %d\n", q_idx);
1257
1258
1259 if (k3_cppi_desc_pool_avail(tx_chn->desc_pool) >=
1260 MAX_SKB_FRAGS) {
1261 netif_tx_wake_queue(netif_txq);
1262 dev_dbg(dev, "netif_tx_wake_queue %d\n", q_idx);
1263 }
1264 }
1265
1266 return NETDEV_TX_OK;
1267
1268err_free_descs:
1269 am65_cpsw_nuss_xmit_free(tx_chn, first_desc);
1270err_free_skb:
1271 ndev->stats.tx_dropped++;
1272 dev_kfree_skb_any(skb);
1273 return NETDEV_TX_OK;
1274
1275busy_free_descs:
1276 am65_cpsw_nuss_xmit_free(tx_chn, first_desc);
1277busy_stop_q:
1278 netif_tx_stop_queue(netif_txq);
1279 return NETDEV_TX_BUSY;
1280}
1281
1282static int am65_cpsw_nuss_ndo_slave_set_mac_address(struct net_device *ndev,
1283 void *addr)
1284{
1285 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1286 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1287 struct sockaddr *sockaddr = (struct sockaddr *)addr;
1288 int ret;
1289
1290 ret = eth_prepare_mac_addr_change(ndev, addr);
1291 if (ret < 0)
1292 return ret;
1293
1294 ret = pm_runtime_get_sync(common->dev);
1295 if (ret < 0) {
1296 pm_runtime_put_noidle(common->dev);
1297 return ret;
1298 }
1299
1300 cpsw_ale_del_ucast(common->ale, ndev->dev_addr,
1301 HOST_PORT_NUM, 0, 0);
1302 cpsw_ale_add_ucast(common->ale, sockaddr->sa_data,
1303 HOST_PORT_NUM, ALE_SECURE, 0);
1304
1305 am65_cpsw_port_set_sl_mac(port, addr);
1306 eth_commit_mac_addr_change(ndev, sockaddr);
1307
1308 pm_runtime_put(common->dev);
1309
1310 return 0;
1311}
1312
1313static int am65_cpsw_nuss_hwtstamp_set(struct net_device *ndev,
1314 struct ifreq *ifr)
1315{
1316 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1317 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1318 u32 ts_ctrl, seq_id, ts_ctrl_ltype2, ts_vlan_ltype;
1319 struct hwtstamp_config cfg;
1320
1321 if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1322 return -EOPNOTSUPP;
1323
1324 if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
1325 return -EFAULT;
1326
1327
1328 switch (cfg.tx_type) {
1329 case HWTSTAMP_TX_OFF:
1330 case HWTSTAMP_TX_ON:
1331 break;
1332 default:
1333 return -ERANGE;
1334 }
1335
1336 switch (cfg.rx_filter) {
1337 case HWTSTAMP_FILTER_NONE:
1338 port->rx_ts_enabled = false;
1339 break;
1340 case HWTSTAMP_FILTER_ALL:
1341 case HWTSTAMP_FILTER_SOME:
1342 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1343 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1344 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1345 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1346 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1347 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1348 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1349 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1350 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1351 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1352 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1353 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1354 case HWTSTAMP_FILTER_NTP_ALL:
1355 port->rx_ts_enabled = true;
1356 cfg.rx_filter = HWTSTAMP_FILTER_ALL;
1357 break;
1358 default:
1359 return -ERANGE;
1360 }
1361
1362 port->tx_ts_enabled = (cfg.tx_type == HWTSTAMP_TX_ON);
1363
1364
1365 seq_id = (AM65_CPSW_TS_SEQ_ID_OFFSET <<
1366 AM65_CPSW_PN_TS_SEQ_ID_OFFSET_SHIFT) | ETH_P_1588;
1367
1368 ts_vlan_ltype = ETH_P_8021Q;
1369
1370 ts_ctrl_ltype2 = ETH_P_1588 |
1371 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_107 |
1372 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_129 |
1373 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_130 |
1374 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_131 |
1375 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_132 |
1376 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_319 |
1377 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_320 |
1378 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_TTL_NONZERO;
1379
1380 ts_ctrl = AM65_CPSW_TS_EVENT_MSG_TYPE_BITS <<
1381 AM65_CPSW_PN_TS_CTL_MSG_TYPE_EN_SHIFT;
1382
1383 if (port->tx_ts_enabled)
1384 ts_ctrl |= AM65_CPSW_TS_TX_ANX_ALL_EN |
1385 AM65_CPSW_PN_TS_CTL_TX_VLAN_LT1_EN;
1386
1387 writel(seq_id, port->port_base + AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG);
1388 writel(ts_vlan_ltype, port->port_base +
1389 AM65_CPSW_PORTN_REG_TS_VLAN_LTYPE_REG);
1390 writel(ts_ctrl_ltype2, port->port_base +
1391 AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2);
1392 writel(ts_ctrl, port->port_base + AM65_CPSW_PORTN_REG_TS_CTL);
1393
1394
1395 am65_cpts_rx_enable(common->cpts, port->rx_ts_enabled);
1396
1397 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1398}
1399
1400static int am65_cpsw_nuss_hwtstamp_get(struct net_device *ndev,
1401 struct ifreq *ifr)
1402{
1403 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1404 struct hwtstamp_config cfg;
1405
1406 if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1407 return -EOPNOTSUPP;
1408
1409 cfg.flags = 0;
1410 cfg.tx_type = port->tx_ts_enabled ?
1411 HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
1412 cfg.rx_filter = port->rx_ts_enabled ?
1413 HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;
1414
1415 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1416}
1417
1418static int am65_cpsw_nuss_ndo_slave_ioctl(struct net_device *ndev,
1419 struct ifreq *req, int cmd)
1420{
1421 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1422
1423 if (!netif_running(ndev))
1424 return -EINVAL;
1425
1426 switch (cmd) {
1427 case SIOCSHWTSTAMP:
1428 return am65_cpsw_nuss_hwtstamp_set(ndev, req);
1429 case SIOCGHWTSTAMP:
1430 return am65_cpsw_nuss_hwtstamp_get(ndev, req);
1431 }
1432
1433 if (!port->slave.phy)
1434 return -EOPNOTSUPP;
1435
1436 return phy_mii_ioctl(port->slave.phy, req, cmd);
1437}
1438
1439static void am65_cpsw_nuss_ndo_get_stats(struct net_device *dev,
1440 struct rtnl_link_stats64 *stats)
1441{
1442 struct am65_cpsw_ndev_priv *ndev_priv = netdev_priv(dev);
1443 unsigned int start;
1444 int cpu;
1445
1446 for_each_possible_cpu(cpu) {
1447 struct am65_cpsw_ndev_stats *cpu_stats;
1448 u64 rx_packets;
1449 u64 rx_bytes;
1450 u64 tx_packets;
1451 u64 tx_bytes;
1452
1453 cpu_stats = per_cpu_ptr(ndev_priv->stats, cpu);
1454 do {
1455 start = u64_stats_fetch_begin_irq(&cpu_stats->syncp);
1456 rx_packets = cpu_stats->rx_packets;
1457 rx_bytes = cpu_stats->rx_bytes;
1458 tx_packets = cpu_stats->tx_packets;
1459 tx_bytes = cpu_stats->tx_bytes;
1460 } while (u64_stats_fetch_retry_irq(&cpu_stats->syncp, start));
1461
1462 stats->rx_packets += rx_packets;
1463 stats->rx_bytes += rx_bytes;
1464 stats->tx_packets += tx_packets;
1465 stats->tx_bytes += tx_bytes;
1466 }
1467
1468 stats->rx_errors = dev->stats.rx_errors;
1469 stats->rx_dropped = dev->stats.rx_dropped;
1470 stats->tx_dropped = dev->stats.tx_dropped;
1471}
1472
1473static struct devlink_port *am65_cpsw_ndo_get_devlink_port(struct net_device *ndev)
1474{
1475 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1476
1477 return &port->devlink_port;
1478}
1479
1480static const struct net_device_ops am65_cpsw_nuss_netdev_ops = {
1481 .ndo_open = am65_cpsw_nuss_ndo_slave_open,
1482 .ndo_stop = am65_cpsw_nuss_ndo_slave_stop,
1483 .ndo_start_xmit = am65_cpsw_nuss_ndo_slave_xmit,
1484 .ndo_set_rx_mode = am65_cpsw_nuss_ndo_slave_set_rx_mode,
1485 .ndo_get_stats64 = am65_cpsw_nuss_ndo_get_stats,
1486 .ndo_validate_addr = eth_validate_addr,
1487 .ndo_set_mac_address = am65_cpsw_nuss_ndo_slave_set_mac_address,
1488 .ndo_tx_timeout = am65_cpsw_nuss_ndo_host_tx_timeout,
1489 .ndo_vlan_rx_add_vid = am65_cpsw_nuss_ndo_slave_add_vid,
1490 .ndo_vlan_rx_kill_vid = am65_cpsw_nuss_ndo_slave_kill_vid,
1491 .ndo_do_ioctl = am65_cpsw_nuss_ndo_slave_ioctl,
1492 .ndo_setup_tc = am65_cpsw_qos_ndo_setup_tc,
1493 .ndo_get_devlink_port = am65_cpsw_ndo_get_devlink_port,
1494};
1495
1496static void am65_cpsw_nuss_slave_disable_unused(struct am65_cpsw_port *port)
1497{
1498 struct am65_cpsw_common *common = port->common;
1499
1500 if (!port->disabled)
1501 return;
1502
1503 cpsw_ale_control_set(common->ale, port->port_id,
1504 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
1505
1506 cpsw_sl_reset(port->slave.mac_sl, 100);
1507 cpsw_sl_ctl_reset(port->slave.mac_sl);
1508}
1509
1510static void am65_cpsw_nuss_free_tx_chns(void *data)
1511{
1512 struct am65_cpsw_common *common = data;
1513 int i;
1514
1515 for (i = 0; i < common->tx_ch_num; i++) {
1516 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1517
1518 if (!IS_ERR_OR_NULL(tx_chn->desc_pool))
1519 k3_cppi_desc_pool_destroy(tx_chn->desc_pool);
1520
1521 if (!IS_ERR_OR_NULL(tx_chn->tx_chn))
1522 k3_udma_glue_release_tx_chn(tx_chn->tx_chn);
1523
1524 memset(tx_chn, 0, sizeof(*tx_chn));
1525 }
1526}
1527
1528void am65_cpsw_nuss_remove_tx_chns(struct am65_cpsw_common *common)
1529{
1530 struct device *dev = common->dev;
1531 int i;
1532
1533 devm_remove_action(dev, am65_cpsw_nuss_free_tx_chns, common);
1534
1535 for (i = 0; i < common->tx_ch_num; i++) {
1536 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1537
1538 if (tx_chn->irq)
1539 devm_free_irq(dev, tx_chn->irq, tx_chn);
1540
1541 netif_napi_del(&tx_chn->napi_tx);
1542
1543 if (!IS_ERR_OR_NULL(tx_chn->desc_pool))
1544 k3_cppi_desc_pool_destroy(tx_chn->desc_pool);
1545
1546 if (!IS_ERR_OR_NULL(tx_chn->tx_chn))
1547 k3_udma_glue_release_tx_chn(tx_chn->tx_chn);
1548
1549 memset(tx_chn, 0, sizeof(*tx_chn));
1550 }
1551}
1552
1553static int am65_cpsw_nuss_init_tx_chns(struct am65_cpsw_common *common)
1554{
1555 u32 max_desc_num = ALIGN(AM65_CPSW_MAX_TX_DESC, MAX_SKB_FRAGS);
1556 struct k3_udma_glue_tx_channel_cfg tx_cfg = { 0 };
1557 struct device *dev = common->dev;
1558 struct k3_ring_cfg ring_cfg = {
1559 .elm_size = K3_RINGACC_RING_ELSIZE_8,
1560 .mode = K3_RINGACC_RING_MODE_RING,
1561 .flags = 0
1562 };
1563 u32 hdesc_size;
1564 int i, ret = 0;
1565
1566 hdesc_size = cppi5_hdesc_calc_size(true, AM65_CPSW_NAV_PS_DATA_SIZE,
1567 AM65_CPSW_NAV_SW_DATA_SIZE);
1568
1569 tx_cfg.swdata_size = AM65_CPSW_NAV_SW_DATA_SIZE;
1570 tx_cfg.tx_cfg = ring_cfg;
1571 tx_cfg.txcq_cfg = ring_cfg;
1572 tx_cfg.tx_cfg.size = max_desc_num;
1573 tx_cfg.txcq_cfg.size = max_desc_num;
1574
1575 for (i = 0; i < common->tx_ch_num; i++) {
1576 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1577
1578 snprintf(tx_chn->tx_chn_name,
1579 sizeof(tx_chn->tx_chn_name), "tx%d", i);
1580
1581 spin_lock_init(&tx_chn->lock);
1582 tx_chn->common = common;
1583 tx_chn->id = i;
1584 tx_chn->descs_num = max_desc_num;
1585
1586 tx_chn->tx_chn =
1587 k3_udma_glue_request_tx_chn(dev,
1588 tx_chn->tx_chn_name,
1589 &tx_cfg);
1590 if (IS_ERR(tx_chn->tx_chn)) {
1591 ret = dev_err_probe(dev, PTR_ERR(tx_chn->tx_chn),
1592 "Failed to request tx dma channel\n");
1593 goto err;
1594 }
1595 tx_chn->dma_dev = k3_udma_glue_tx_get_dma_device(tx_chn->tx_chn);
1596
1597 tx_chn->desc_pool = k3_cppi_desc_pool_create_name(tx_chn->dma_dev,
1598 tx_chn->descs_num,
1599 hdesc_size,
1600 tx_chn->tx_chn_name);
1601 if (IS_ERR(tx_chn->desc_pool)) {
1602 ret = PTR_ERR(tx_chn->desc_pool);
1603 dev_err(dev, "Failed to create poll %d\n", ret);
1604 goto err;
1605 }
1606
1607 tx_chn->irq = k3_udma_glue_tx_get_irq(tx_chn->tx_chn);
1608 if (tx_chn->irq <= 0) {
1609 dev_err(dev, "Failed to get tx dma irq %d\n",
1610 tx_chn->irq);
1611 goto err;
1612 }
1613
1614 snprintf(tx_chn->tx_chn_name,
1615 sizeof(tx_chn->tx_chn_name), "%s-tx%d",
1616 dev_name(dev), tx_chn->id);
1617 }
1618
1619err:
1620 i = devm_add_action(dev, am65_cpsw_nuss_free_tx_chns, common);
1621 if (i) {
1622 dev_err(dev, "Failed to add free_tx_chns action %d\n", i);
1623 return i;
1624 }
1625
1626 return ret;
1627}
1628
1629static void am65_cpsw_nuss_free_rx_chns(void *data)
1630{
1631 struct am65_cpsw_common *common = data;
1632 struct am65_cpsw_rx_chn *rx_chn;
1633
1634 rx_chn = &common->rx_chns;
1635
1636 if (!IS_ERR_OR_NULL(rx_chn->desc_pool))
1637 k3_cppi_desc_pool_destroy(rx_chn->desc_pool);
1638
1639 if (!IS_ERR_OR_NULL(rx_chn->rx_chn))
1640 k3_udma_glue_release_rx_chn(rx_chn->rx_chn);
1641}
1642
1643static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common)
1644{
1645 struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
1646 struct k3_udma_glue_rx_channel_cfg rx_cfg = { 0 };
1647 u32 max_desc_num = AM65_CPSW_MAX_RX_DESC;
1648 struct device *dev = common->dev;
1649 u32 hdesc_size;
1650 u32 fdqring_id;
1651 int i, ret = 0;
1652
1653 hdesc_size = cppi5_hdesc_calc_size(true, AM65_CPSW_NAV_PS_DATA_SIZE,
1654 AM65_CPSW_NAV_SW_DATA_SIZE);
1655
1656 rx_cfg.swdata_size = AM65_CPSW_NAV_SW_DATA_SIZE;
1657 rx_cfg.flow_id_num = AM65_CPSW_MAX_RX_FLOWS;
1658 rx_cfg.flow_id_base = common->rx_flow_id_base;
1659
1660
1661 rx_chn->dev = dev;
1662 rx_chn->descs_num = max_desc_num;
1663
1664 rx_chn->rx_chn = k3_udma_glue_request_rx_chn(dev, "rx", &rx_cfg);
1665 if (IS_ERR(rx_chn->rx_chn)) {
1666 ret = dev_err_probe(dev, PTR_ERR(rx_chn->rx_chn),
1667 "Failed to request rx dma channel\n");
1668 goto err;
1669 }
1670 rx_chn->dma_dev = k3_udma_glue_rx_get_dma_device(rx_chn->rx_chn);
1671
1672 rx_chn->desc_pool = k3_cppi_desc_pool_create_name(rx_chn->dma_dev,
1673 rx_chn->descs_num,
1674 hdesc_size, "rx");
1675 if (IS_ERR(rx_chn->desc_pool)) {
1676 ret = PTR_ERR(rx_chn->desc_pool);
1677 dev_err(dev, "Failed to create rx poll %d\n", ret);
1678 goto err;
1679 }
1680
1681 common->rx_flow_id_base =
1682 k3_udma_glue_rx_get_flow_id_base(rx_chn->rx_chn);
1683 dev_info(dev, "set new flow-id-base %u\n", common->rx_flow_id_base);
1684
1685 fdqring_id = K3_RINGACC_RING_ID_ANY;
1686 for (i = 0; i < rx_cfg.flow_id_num; i++) {
1687 struct k3_ring_cfg rxring_cfg = {
1688 .elm_size = K3_RINGACC_RING_ELSIZE_8,
1689 .mode = K3_RINGACC_RING_MODE_RING,
1690 .flags = 0,
1691 };
1692 struct k3_ring_cfg fdqring_cfg = {
1693 .elm_size = K3_RINGACC_RING_ELSIZE_8,
1694 .flags = K3_RINGACC_RING_SHARED,
1695 };
1696 struct k3_udma_glue_rx_flow_cfg rx_flow_cfg = {
1697 .rx_cfg = rxring_cfg,
1698 .rxfdq_cfg = fdqring_cfg,
1699 .ring_rxq_id = K3_RINGACC_RING_ID_ANY,
1700 .src_tag_lo_sel =
1701 K3_UDMA_GLUE_SRC_TAG_LO_USE_REMOTE_SRC_TAG,
1702 };
1703
1704 rx_flow_cfg.ring_rxfdq0_id = fdqring_id;
1705 rx_flow_cfg.rx_cfg.size = max_desc_num;
1706 rx_flow_cfg.rxfdq_cfg.size = max_desc_num;
1707 rx_flow_cfg.rxfdq_cfg.mode = common->pdata.fdqring_mode;
1708
1709 ret = k3_udma_glue_rx_flow_init(rx_chn->rx_chn,
1710 i, &rx_flow_cfg);
1711 if (ret) {
1712 dev_err(dev, "Failed to init rx flow%d %d\n", i, ret);
1713 goto err;
1714 }
1715 if (!i)
1716 fdqring_id =
1717 k3_udma_glue_rx_flow_get_fdq_id(rx_chn->rx_chn,
1718 i);
1719
1720 rx_chn->irq = k3_udma_glue_rx_get_irq(rx_chn->rx_chn, i);
1721
1722 if (rx_chn->irq <= 0) {
1723 dev_err(dev, "Failed to get rx dma irq %d\n",
1724 rx_chn->irq);
1725 ret = -ENXIO;
1726 goto err;
1727 }
1728 }
1729
1730err:
1731 i = devm_add_action(dev, am65_cpsw_nuss_free_rx_chns, common);
1732 if (i) {
1733 dev_err(dev, "Failed to add free_rx_chns action %d\n", i);
1734 return i;
1735 }
1736
1737 return ret;
1738}
1739
1740static int am65_cpsw_nuss_init_host_p(struct am65_cpsw_common *common)
1741{
1742 struct am65_cpsw_host *host_p = am65_common_get_host(common);
1743
1744 host_p->common = common;
1745 host_p->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE;
1746 host_p->stat_base = common->cpsw_base + AM65_CPSW_NU_STATS_BASE;
1747
1748 return 0;
1749}
1750
1751static int am65_cpsw_am654_get_efuse_macid(struct device_node *of_node,
1752 int slave, u8 *mac_addr)
1753{
1754 u32 mac_lo, mac_hi, offset;
1755 struct regmap *syscon;
1756 int ret;
1757
1758 syscon = syscon_regmap_lookup_by_phandle(of_node, "ti,syscon-efuse");
1759 if (IS_ERR(syscon)) {
1760 if (PTR_ERR(syscon) == -ENODEV)
1761 return 0;
1762 return PTR_ERR(syscon);
1763 }
1764
1765 ret = of_property_read_u32_index(of_node, "ti,syscon-efuse", 1,
1766 &offset);
1767 if (ret)
1768 return ret;
1769
1770 regmap_read(syscon, offset, &mac_lo);
1771 regmap_read(syscon, offset + 4, &mac_hi);
1772
1773 mac_addr[0] = (mac_hi >> 8) & 0xff;
1774 mac_addr[1] = mac_hi & 0xff;
1775 mac_addr[2] = (mac_lo >> 24) & 0xff;
1776 mac_addr[3] = (mac_lo >> 16) & 0xff;
1777 mac_addr[4] = (mac_lo >> 8) & 0xff;
1778 mac_addr[5] = mac_lo & 0xff;
1779
1780 return 0;
1781}
1782
1783static int am65_cpsw_init_cpts(struct am65_cpsw_common *common)
1784{
1785 struct device *dev = common->dev;
1786 struct device_node *node;
1787 struct am65_cpts *cpts;
1788 void __iomem *reg_base;
1789
1790 if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1791 return 0;
1792
1793 node = of_get_child_by_name(dev->of_node, "cpts");
1794 if (!node) {
1795 dev_err(dev, "%s cpts not found\n", __func__);
1796 return -ENOENT;
1797 }
1798
1799 reg_base = common->cpsw_base + AM65_CPSW_NU_CPTS_BASE;
1800 cpts = am65_cpts_create(dev, reg_base, node);
1801 if (IS_ERR(cpts)) {
1802 int ret = PTR_ERR(cpts);
1803
1804 if (ret == -EOPNOTSUPP) {
1805 dev_info(dev, "cpts disabled\n");
1806 return 0;
1807 }
1808
1809 dev_err(dev, "cpts create err %d\n", ret);
1810 return ret;
1811 }
1812 common->cpts = cpts;
1813
1814
1815
1816
1817
1818
1819 pm_runtime_forbid(dev);
1820
1821 return 0;
1822}
1823
1824static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common)
1825{
1826 struct device_node *node, *port_np;
1827 struct device *dev = common->dev;
1828 int ret;
1829
1830 node = of_get_child_by_name(dev->of_node, "ethernet-ports");
1831 if (!node)
1832 return -ENOENT;
1833
1834 for_each_child_of_node(node, port_np) {
1835 struct am65_cpsw_port *port;
1836 u32 port_id;
1837
1838
1839 if (strcmp(port_np->name, "port"))
1840 continue;
1841
1842 ret = of_property_read_u32(port_np, "reg", &port_id);
1843 if (ret < 0) {
1844 dev_err(dev, "%pOF error reading port_id %d\n",
1845 port_np, ret);
1846 return ret;
1847 }
1848
1849 if (!port_id || port_id > common->port_num) {
1850 dev_err(dev, "%pOF has invalid port_id %u %s\n",
1851 port_np, port_id, port_np->name);
1852 return -EINVAL;
1853 }
1854
1855 port = am65_common_get_port(common, port_id);
1856 port->port_id = port_id;
1857 port->common = common;
1858 port->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE +
1859 AM65_CPSW_NU_PORTS_OFFSET * (port_id);
1860 port->stat_base = common->cpsw_base + AM65_CPSW_NU_STATS_BASE +
1861 (AM65_CPSW_NU_STATS_PORT_OFFSET * port_id);
1862 port->name = of_get_property(port_np, "label", NULL);
1863 port->fetch_ram_base =
1864 common->cpsw_base + AM65_CPSW_NU_FRAM_BASE +
1865 (AM65_CPSW_NU_FRAM_PORT_OFFSET * (port_id - 1));
1866
1867 port->slave.mac_sl = cpsw_sl_get("am65", dev, port->port_base);
1868 if (IS_ERR(port->slave.mac_sl))
1869 return PTR_ERR(port->slave.mac_sl);
1870
1871 port->disabled = !of_device_is_available(port_np);
1872 if (port->disabled) {
1873 common->disabled_ports_mask |= BIT(port->port_id);
1874 continue;
1875 }
1876
1877 port->slave.ifphy = devm_of_phy_get(dev, port_np, NULL);
1878 if (IS_ERR(port->slave.ifphy)) {
1879 ret = PTR_ERR(port->slave.ifphy);
1880 dev_err(dev, "%pOF error retrieving port phy: %d\n",
1881 port_np, ret);
1882 return ret;
1883 }
1884
1885 port->slave.mac_only =
1886 of_property_read_bool(port_np, "ti,mac-only");
1887
1888
1889 if (of_phy_is_fixed_link(port_np)) {
1890 ret = of_phy_register_fixed_link(port_np);
1891 if (ret)
1892 return dev_err_probe(dev, ret,
1893 "failed to register fixed-link phy %pOF\n",
1894 port_np);
1895 port->slave.phy_node = of_node_get(port_np);
1896 } else {
1897 port->slave.phy_node =
1898 of_parse_phandle(port_np, "phy-handle", 0);
1899 }
1900
1901 if (!port->slave.phy_node) {
1902 dev_err(dev,
1903 "slave[%d] no phy found\n", port_id);
1904 return -ENODEV;
1905 }
1906
1907 ret = of_get_phy_mode(port_np, &port->slave.phy_if);
1908 if (ret) {
1909 dev_err(dev, "%pOF read phy-mode err %d\n",
1910 port_np, ret);
1911 return ret;
1912 }
1913
1914 ret = of_get_mac_address(port_np, port->slave.mac_addr);
1915 if (ret) {
1916 am65_cpsw_am654_get_efuse_macid(port_np,
1917 port->port_id,
1918 port->slave.mac_addr);
1919 if (!is_valid_ether_addr(port->slave.mac_addr)) {
1920 random_ether_addr(port->slave.mac_addr);
1921 dev_err(dev, "Use random MAC address\n");
1922 }
1923 }
1924 }
1925 of_node_put(node);
1926
1927
1928 if (!(~common->disabled_ports_mask & GENMASK(common->port_num, 1))) {
1929 dev_err(dev, "No Ext. port are available\n");
1930 return -ENODEV;
1931 }
1932
1933 return 0;
1934}
1935
1936static void am65_cpsw_pcpu_stats_free(void *data)
1937{
1938 struct am65_cpsw_ndev_stats __percpu *stats = data;
1939
1940 free_percpu(stats);
1941}
1942
1943static int
1944am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx)
1945{
1946 struct am65_cpsw_ndev_priv *ndev_priv;
1947 struct device *dev = common->dev;
1948 struct am65_cpsw_port *port;
1949 int ret;
1950
1951 port = &common->ports[port_idx];
1952
1953 if (port->disabled)
1954 return 0;
1955
1956
1957 port->ndev = devm_alloc_etherdev_mqs(common->dev,
1958 sizeof(struct am65_cpsw_ndev_priv),
1959 AM65_CPSW_MAX_TX_QUEUES,
1960 AM65_CPSW_MAX_RX_QUEUES);
1961 if (!port->ndev) {
1962 dev_err(dev, "error allocating slave net_device %u\n",
1963 port->port_id);
1964 return -ENOMEM;
1965 }
1966
1967 ndev_priv = netdev_priv(port->ndev);
1968 ndev_priv->port = port;
1969 ndev_priv->msg_enable = AM65_CPSW_DEBUG;
1970 SET_NETDEV_DEV(port->ndev, dev);
1971
1972 ether_addr_copy(port->ndev->dev_addr, port->slave.mac_addr);
1973
1974 port->ndev->min_mtu = AM65_CPSW_MIN_PACKET_SIZE;
1975 port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE;
1976 port->ndev->hw_features = NETIF_F_SG |
1977 NETIF_F_RXCSUM |
1978 NETIF_F_HW_CSUM |
1979 NETIF_F_HW_TC;
1980 port->ndev->features = port->ndev->hw_features |
1981 NETIF_F_HW_VLAN_CTAG_FILTER;
1982 port->ndev->vlan_features |= NETIF_F_SG;
1983 port->ndev->netdev_ops = &am65_cpsw_nuss_netdev_ops;
1984 port->ndev->ethtool_ops = &am65_cpsw_ethtool_ops_slave;
1985
1986
1987 if (common->pdata.quirks & AM65_CPSW_QUIRK_I2027_NO_TX_CSUM)
1988 port->ndev->features &= ~NETIF_F_HW_CSUM;
1989
1990 ndev_priv->stats = netdev_alloc_pcpu_stats(struct am65_cpsw_ndev_stats);
1991 if (!ndev_priv->stats)
1992 return -ENOMEM;
1993
1994 ret = devm_add_action_or_reset(dev, am65_cpsw_pcpu_stats_free,
1995 ndev_priv->stats);
1996 if (ret)
1997 dev_err(dev, "failed to add percpu stat free action %d\n", ret);
1998
1999 if (!common->dma_ndev)
2000 common->dma_ndev = port->ndev;
2001
2002 return ret;
2003}
2004
2005static int am65_cpsw_nuss_init_ndevs(struct am65_cpsw_common *common)
2006{
2007 int ret;
2008 int i;
2009
2010 for (i = 0; i < common->port_num; i++) {
2011 ret = am65_cpsw_nuss_init_port_ndev(common, i);
2012 if (ret)
2013 return ret;
2014 }
2015
2016 netif_napi_add(common->dma_ndev, &common->napi_rx,
2017 am65_cpsw_nuss_rx_poll, NAPI_POLL_WEIGHT);
2018
2019 return ret;
2020}
2021
2022static int am65_cpsw_nuss_ndev_add_tx_napi(struct am65_cpsw_common *common)
2023{
2024 struct device *dev = common->dev;
2025 int i, ret = 0;
2026
2027 for (i = 0; i < common->tx_ch_num; i++) {
2028 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
2029
2030 netif_tx_napi_add(common->dma_ndev, &tx_chn->napi_tx,
2031 am65_cpsw_nuss_tx_poll, NAPI_POLL_WEIGHT);
2032
2033 ret = devm_request_irq(dev, tx_chn->irq,
2034 am65_cpsw_nuss_tx_irq,
2035 IRQF_TRIGGER_HIGH,
2036 tx_chn->tx_chn_name, tx_chn);
2037 if (ret) {
2038 dev_err(dev, "failure requesting tx%u irq %u, %d\n",
2039 tx_chn->id, tx_chn->irq, ret);
2040 goto err;
2041 }
2042 }
2043
2044err:
2045 return ret;
2046}
2047
2048static void am65_cpsw_nuss_cleanup_ndev(struct am65_cpsw_common *common)
2049{
2050 struct am65_cpsw_port *port;
2051 int i;
2052
2053 for (i = 0; i < common->port_num; i++) {
2054 port = &common->ports[i];
2055 if (port->ndev)
2056 unregister_netdev(port->ndev);
2057 }
2058}
2059
2060static void am65_cpsw_port_offload_fwd_mark_update(struct am65_cpsw_common *common)
2061{
2062 int set_val = 0;
2063 int i;
2064
2065 if (common->br_members == (GENMASK(common->port_num, 1) & ~common->disabled_ports_mask))
2066 set_val = 1;
2067
2068 dev_dbg(common->dev, "set offload_fwd_mark %d\n", set_val);
2069
2070 for (i = 1; i <= common->port_num; i++) {
2071 struct am65_cpsw_port *port = am65_common_get_port(common, i);
2072 struct am65_cpsw_ndev_priv *priv;
2073
2074 if (!port->ndev)
2075 continue;
2076
2077 priv = am65_ndev_to_priv(port->ndev);
2078 priv->offload_fwd_mark = set_val;
2079 }
2080}
2081
2082bool am65_cpsw_port_dev_check(const struct net_device *ndev)
2083{
2084 if (ndev->netdev_ops == &am65_cpsw_nuss_netdev_ops) {
2085 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
2086
2087 return !common->is_emac_mode;
2088 }
2089
2090 return false;
2091}
2092
2093static int am65_cpsw_netdevice_port_link(struct net_device *ndev, struct net_device *br_ndev)
2094{
2095 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
2096 struct am65_cpsw_ndev_priv *priv = am65_ndev_to_priv(ndev);
2097
2098 if (!common->br_members) {
2099 common->hw_bridge_dev = br_ndev;
2100 } else {
2101
2102
2103
2104 if (common->hw_bridge_dev != br_ndev)
2105 return -EOPNOTSUPP;
2106 }
2107
2108 common->br_members |= BIT(priv->port->port_id);
2109
2110 am65_cpsw_port_offload_fwd_mark_update(common);
2111
2112 return NOTIFY_DONE;
2113}
2114
2115static void am65_cpsw_netdevice_port_unlink(struct net_device *ndev)
2116{
2117 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
2118 struct am65_cpsw_ndev_priv *priv = am65_ndev_to_priv(ndev);
2119
2120 common->br_members &= ~BIT(priv->port->port_id);
2121
2122 am65_cpsw_port_offload_fwd_mark_update(common);
2123
2124 if (!common->br_members)
2125 common->hw_bridge_dev = NULL;
2126}
2127
2128
2129static int am65_cpsw_netdevice_event(struct notifier_block *unused,
2130 unsigned long event, void *ptr)
2131{
2132 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2133 struct netdev_notifier_changeupper_info *info;
2134 int ret = NOTIFY_DONE;
2135
2136 if (!am65_cpsw_port_dev_check(ndev))
2137 return NOTIFY_DONE;
2138
2139 switch (event) {
2140 case NETDEV_CHANGEUPPER:
2141 info = ptr;
2142
2143 if (netif_is_bridge_master(info->upper_dev)) {
2144 if (info->linking)
2145 ret = am65_cpsw_netdevice_port_link(ndev, info->upper_dev);
2146 else
2147 am65_cpsw_netdevice_port_unlink(ndev);
2148 }
2149 break;
2150 default:
2151 return NOTIFY_DONE;
2152 }
2153
2154 return notifier_from_errno(ret);
2155}
2156
2157static int am65_cpsw_register_notifiers(struct am65_cpsw_common *cpsw)
2158{
2159 int ret = 0;
2160
2161 if (AM65_CPSW_IS_CPSW2G(cpsw) ||
2162 !IS_REACHABLE(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV))
2163 return 0;
2164
2165 cpsw->am65_cpsw_netdevice_nb.notifier_call = &am65_cpsw_netdevice_event;
2166 ret = register_netdevice_notifier(&cpsw->am65_cpsw_netdevice_nb);
2167 if (ret) {
2168 dev_err(cpsw->dev, "can't register netdevice notifier\n");
2169 return ret;
2170 }
2171
2172 ret = am65_cpsw_switchdev_register_notifiers(cpsw);
2173 if (ret)
2174 unregister_netdevice_notifier(&cpsw->am65_cpsw_netdevice_nb);
2175
2176 return ret;
2177}
2178
2179static void am65_cpsw_unregister_notifiers(struct am65_cpsw_common *cpsw)
2180{
2181 if (AM65_CPSW_IS_CPSW2G(cpsw) ||
2182 !IS_REACHABLE(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV))
2183 return;
2184
2185 am65_cpsw_switchdev_unregister_notifiers(cpsw);
2186 unregister_netdevice_notifier(&cpsw->am65_cpsw_netdevice_nb);
2187}
2188
2189static const struct devlink_ops am65_cpsw_devlink_ops = {};
2190
2191static void am65_cpsw_init_stp_ale_entry(struct am65_cpsw_common *cpsw)
2192{
2193 cpsw_ale_add_mcast(cpsw->ale, eth_stp_addr, ALE_PORT_HOST, ALE_SUPER, 0,
2194 ALE_MCAST_BLOCK_LEARN_FWD);
2195}
2196
2197static void am65_cpsw_init_host_port_switch(struct am65_cpsw_common *common)
2198{
2199 struct am65_cpsw_host *host = am65_common_get_host(common);
2200
2201 writel(common->default_vlan, host->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2202
2203 am65_cpsw_init_stp_ale_entry(common);
2204
2205 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_P0_UNI_FLOOD, 1);
2206 dev_dbg(common->dev, "Set P0_UNI_FLOOD\n");
2207 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_PORT_NOLEARN, 0);
2208}
2209
2210static void am65_cpsw_init_host_port_emac(struct am65_cpsw_common *common)
2211{
2212 struct am65_cpsw_host *host = am65_common_get_host(common);
2213
2214 writel(0, host->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2215
2216 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_P0_UNI_FLOOD, 0);
2217 dev_dbg(common->dev, "unset P0_UNI_FLOOD\n");
2218
2219
2220 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_PORT_NOLEARN, 1);
2221}
2222
2223static int am65_cpsw_dl_switch_mode_get(struct devlink *dl, u32 id,
2224 struct devlink_param_gset_ctx *ctx)
2225{
2226 struct am65_cpsw_devlink *dl_priv = devlink_priv(dl);
2227 struct am65_cpsw_common *common = dl_priv->common;
2228
2229 dev_dbg(common->dev, "%s id:%u\n", __func__, id);
2230
2231 if (id != AM65_CPSW_DL_PARAM_SWITCH_MODE)
2232 return -EOPNOTSUPP;
2233
2234 ctx->val.vbool = !common->is_emac_mode;
2235
2236 return 0;
2237}
2238
2239static void am65_cpsw_init_port_emac_ale(struct am65_cpsw_port *port)
2240{
2241 struct am65_cpsw_slave_data *slave = &port->slave;
2242 struct am65_cpsw_common *common = port->common;
2243 u32 port_mask;
2244
2245 writel(slave->port_vlan, port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2246
2247 if (slave->mac_only)
2248
2249 cpsw_ale_control_set(common->ale, port->port_id,
2250 ALE_PORT_MACONLY, 1);
2251
2252 cpsw_ale_control_set(common->ale, port->port_id, ALE_PORT_NOLEARN, 1);
2253
2254 port_mask = BIT(port->port_id) | ALE_PORT_HOST;
2255
2256 cpsw_ale_add_ucast(common->ale, port->ndev->dev_addr,
2257 HOST_PORT_NUM, ALE_SECURE, slave->port_vlan);
2258 cpsw_ale_add_mcast(common->ale, port->ndev->broadcast,
2259 port_mask, ALE_VLAN, slave->port_vlan, ALE_MCAST_FWD_2);
2260}
2261
2262static void am65_cpsw_init_port_switch_ale(struct am65_cpsw_port *port)
2263{
2264 struct am65_cpsw_slave_data *slave = &port->slave;
2265 struct am65_cpsw_common *cpsw = port->common;
2266 u32 port_mask;
2267
2268 cpsw_ale_control_set(cpsw->ale, port->port_id,
2269 ALE_PORT_NOLEARN, 0);
2270
2271 cpsw_ale_add_ucast(cpsw->ale, port->ndev->dev_addr,
2272 HOST_PORT_NUM, ALE_SECURE | ALE_BLOCKED | ALE_VLAN,
2273 slave->port_vlan);
2274
2275 port_mask = BIT(port->port_id) | ALE_PORT_HOST;
2276
2277 cpsw_ale_add_mcast(cpsw->ale, port->ndev->broadcast,
2278 port_mask, ALE_VLAN, slave->port_vlan,
2279 ALE_MCAST_FWD_2);
2280
2281 writel(slave->port_vlan, port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2282
2283 cpsw_ale_control_set(cpsw->ale, port->port_id,
2284 ALE_PORT_MACONLY, 0);
2285}
2286
2287static int am65_cpsw_dl_switch_mode_set(struct devlink *dl, u32 id,
2288 struct devlink_param_gset_ctx *ctx)
2289{
2290 struct am65_cpsw_devlink *dl_priv = devlink_priv(dl);
2291 struct am65_cpsw_common *cpsw = dl_priv->common;
2292 bool switch_en = ctx->val.vbool;
2293 bool if_running = false;
2294 int i;
2295
2296 dev_dbg(cpsw->dev, "%s id:%u\n", __func__, id);
2297
2298 if (id != AM65_CPSW_DL_PARAM_SWITCH_MODE)
2299 return -EOPNOTSUPP;
2300
2301 if (switch_en == !cpsw->is_emac_mode)
2302 return 0;
2303
2304 if (!switch_en && cpsw->br_members) {
2305 dev_err(cpsw->dev, "Remove ports from bridge before disabling switch mode\n");
2306 return -EINVAL;
2307 }
2308
2309 rtnl_lock();
2310
2311 cpsw->is_emac_mode = !switch_en;
2312
2313 for (i = 0; i < cpsw->port_num; i++) {
2314 struct net_device *sl_ndev = cpsw->ports[i].ndev;
2315
2316 if (!sl_ndev || !netif_running(sl_ndev))
2317 continue;
2318
2319 if_running = true;
2320 }
2321
2322 if (!if_running) {
2323
2324 for (i = 0; i < cpsw->port_num; i++) {
2325 struct net_device *sl_ndev = cpsw->ports[i].ndev;
2326 struct am65_cpsw_slave_data *slave;
2327
2328 if (!sl_ndev)
2329 continue;
2330
2331 slave = am65_ndev_to_slave(sl_ndev);
2332 if (switch_en)
2333 slave->port_vlan = cpsw->default_vlan;
2334 else
2335 slave->port_vlan = 0;
2336 }
2337
2338 goto exit;
2339 }
2340
2341 cpsw_ale_control_set(cpsw->ale, 0, ALE_BYPASS, 1);
2342
2343 cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_CLEAR, 1);
2344 cpsw_ale_control_get(cpsw->ale, HOST_PORT_NUM, ALE_AGEOUT);
2345
2346 if (switch_en) {
2347 dev_info(cpsw->dev, "Enable switch mode\n");
2348
2349 am65_cpsw_init_host_port_switch(cpsw);
2350
2351 for (i = 0; i < cpsw->port_num; i++) {
2352 struct net_device *sl_ndev = cpsw->ports[i].ndev;
2353 struct am65_cpsw_slave_data *slave;
2354 struct am65_cpsw_port *port;
2355
2356 if (!sl_ndev)
2357 continue;
2358
2359 port = am65_ndev_to_port(sl_ndev);
2360 slave = am65_ndev_to_slave(sl_ndev);
2361 slave->port_vlan = cpsw->default_vlan;
2362
2363 if (netif_running(sl_ndev))
2364 am65_cpsw_init_port_switch_ale(port);
2365 }
2366
2367 } else {
2368 dev_info(cpsw->dev, "Disable switch mode\n");
2369
2370 am65_cpsw_init_host_port_emac(cpsw);
2371
2372 for (i = 0; i < cpsw->port_num; i++) {
2373 struct net_device *sl_ndev = cpsw->ports[i].ndev;
2374 struct am65_cpsw_port *port;
2375
2376 if (!sl_ndev)
2377 continue;
2378
2379 port = am65_ndev_to_port(sl_ndev);
2380 port->slave.port_vlan = 0;
2381 if (netif_running(sl_ndev))
2382 am65_cpsw_init_port_emac_ale(port);
2383 }
2384 }
2385 cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_BYPASS, 0);
2386exit:
2387 rtnl_unlock();
2388
2389 return 0;
2390}
2391
2392static const struct devlink_param am65_cpsw_devlink_params[] = {
2393 DEVLINK_PARAM_DRIVER(AM65_CPSW_DL_PARAM_SWITCH_MODE, "switch_mode",
2394 DEVLINK_PARAM_TYPE_BOOL,
2395 BIT(DEVLINK_PARAM_CMODE_RUNTIME),
2396 am65_cpsw_dl_switch_mode_get,
2397 am65_cpsw_dl_switch_mode_set, NULL),
2398};
2399
2400static int am65_cpsw_nuss_register_devlink(struct am65_cpsw_common *common)
2401{
2402 struct devlink_port_attrs attrs = {};
2403 struct am65_cpsw_devlink *dl_priv;
2404 struct device *dev = common->dev;
2405 struct devlink_port *dl_port;
2406 struct am65_cpsw_port *port;
2407 int ret = 0;
2408 int i;
2409
2410 common->devlink =
2411 devlink_alloc(&am65_cpsw_devlink_ops, sizeof(*dl_priv));
2412 if (!common->devlink)
2413 return -ENOMEM;
2414
2415 dl_priv = devlink_priv(common->devlink);
2416 dl_priv->common = common;
2417
2418 ret = devlink_register(common->devlink, dev);
2419 if (ret) {
2420 dev_err(dev, "devlink reg fail ret:%d\n", ret);
2421 goto dl_free;
2422 }
2423
2424
2425
2426
2427 if (!AM65_CPSW_IS_CPSW2G(common) &&
2428 IS_ENABLED(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV)) {
2429 ret = devlink_params_register(common->devlink,
2430 am65_cpsw_devlink_params,
2431 ARRAY_SIZE(am65_cpsw_devlink_params));
2432 if (ret) {
2433 dev_err(dev, "devlink params reg fail ret:%d\n", ret);
2434 goto dl_unreg;
2435 }
2436 devlink_params_publish(common->devlink);
2437 }
2438
2439 for (i = 1; i <= common->port_num; i++) {
2440 port = am65_common_get_port(common, i);
2441 dl_port = &port->devlink_port;
2442
2443 attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;
2444 attrs.phys.port_number = port->port_id;
2445 attrs.switch_id.id_len = sizeof(resource_size_t);
2446 memcpy(attrs.switch_id.id, common->switch_id, attrs.switch_id.id_len);
2447 devlink_port_attrs_set(dl_port, &attrs);
2448
2449 ret = devlink_port_register(common->devlink, dl_port, port->port_id);
2450 if (ret) {
2451 dev_err(dev, "devlink_port reg fail for port %d, ret:%d\n",
2452 port->port_id, ret);
2453 goto dl_port_unreg;
2454 }
2455 devlink_port_type_eth_set(dl_port, port->ndev);
2456 }
2457
2458 return ret;
2459
2460dl_port_unreg:
2461 for (i = i - 1; i >= 1; i--) {
2462 port = am65_common_get_port(common, i);
2463 dl_port = &port->devlink_port;
2464
2465 devlink_port_unregister(dl_port);
2466 }
2467dl_unreg:
2468 devlink_unregister(common->devlink);
2469dl_free:
2470 devlink_free(common->devlink);
2471
2472 return ret;
2473}
2474
2475static void am65_cpsw_unregister_devlink(struct am65_cpsw_common *common)
2476{
2477 struct devlink_port *dl_port;
2478 struct am65_cpsw_port *port;
2479 int i;
2480
2481 for (i = 1; i <= common->port_num; i++) {
2482 port = am65_common_get_port(common, i);
2483 dl_port = &port->devlink_port;
2484
2485 devlink_port_unregister(dl_port);
2486 }
2487
2488 if (!AM65_CPSW_IS_CPSW2G(common) &&
2489 IS_ENABLED(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV)) {
2490 devlink_params_unpublish(common->devlink);
2491 devlink_params_unregister(common->devlink, am65_cpsw_devlink_params,
2492 ARRAY_SIZE(am65_cpsw_devlink_params));
2493 }
2494
2495 devlink_unregister(common->devlink);
2496 devlink_free(common->devlink);
2497}
2498
2499static int am65_cpsw_nuss_register_ndevs(struct am65_cpsw_common *common)
2500{
2501 struct device *dev = common->dev;
2502 struct am65_cpsw_port *port;
2503 int ret = 0, i;
2504
2505 ret = am65_cpsw_nuss_ndev_add_tx_napi(common);
2506 if (ret)
2507 return ret;
2508
2509 ret = devm_request_irq(dev, common->rx_chns.irq,
2510 am65_cpsw_nuss_rx_irq,
2511 IRQF_TRIGGER_HIGH, dev_name(dev), common);
2512 if (ret) {
2513 dev_err(dev, "failure requesting rx irq %u, %d\n",
2514 common->rx_chns.irq, ret);
2515 return ret;
2516 }
2517
2518 for (i = 0; i < common->port_num; i++) {
2519 port = &common->ports[i];
2520
2521 if (!port->ndev)
2522 continue;
2523
2524 ret = register_netdev(port->ndev);
2525 if (ret) {
2526 dev_err(dev, "error registering slave net device%i %d\n",
2527 i, ret);
2528 goto err_cleanup_ndev;
2529 }
2530 }
2531
2532 ret = am65_cpsw_register_notifiers(common);
2533 if (ret)
2534 goto err_cleanup_ndev;
2535
2536 ret = am65_cpsw_nuss_register_devlink(common);
2537 if (ret)
2538 goto clean_unregister_notifiers;
2539
2540
2541
2542
2543
2544 return 0;
2545clean_unregister_notifiers:
2546 am65_cpsw_unregister_notifiers(common);
2547err_cleanup_ndev:
2548 am65_cpsw_nuss_cleanup_ndev(common);
2549
2550 return ret;
2551}
2552
2553int am65_cpsw_nuss_update_tx_chns(struct am65_cpsw_common *common, int num_tx)
2554{
2555 int ret;
2556
2557 common->tx_ch_num = num_tx;
2558 ret = am65_cpsw_nuss_init_tx_chns(common);
2559 if (ret)
2560 return ret;
2561
2562 return am65_cpsw_nuss_ndev_add_tx_napi(common);
2563}
2564
2565struct am65_cpsw_soc_pdata {
2566 u32 quirks_dis;
2567};
2568
2569static const struct am65_cpsw_soc_pdata am65x_soc_sr2_0 = {
2570 .quirks_dis = AM65_CPSW_QUIRK_I2027_NO_TX_CSUM,
2571};
2572
2573static const struct soc_device_attribute am65_cpsw_socinfo[] = {
2574 { .family = "AM65X",
2575 .revision = "SR2.0",
2576 .data = &am65x_soc_sr2_0
2577 },
2578 {}
2579};
2580
2581static const struct am65_cpsw_pdata am65x_sr1_0 = {
2582 .quirks = AM65_CPSW_QUIRK_I2027_NO_TX_CSUM,
2583 .ale_dev_id = "am65x-cpsw2g",
2584 .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
2585};
2586
2587static const struct am65_cpsw_pdata j721e_pdata = {
2588 .quirks = 0,
2589 .ale_dev_id = "am65x-cpsw2g",
2590 .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
2591};
2592
2593static const struct am65_cpsw_pdata am64x_cpswxg_pdata = {
2594 .quirks = 0,
2595 .ale_dev_id = "am64-cpswxg",
2596 .fdqring_mode = K3_RINGACC_RING_MODE_RING,
2597};
2598
2599static const struct of_device_id am65_cpsw_nuss_of_mtable[] = {
2600 { .compatible = "ti,am654-cpsw-nuss", .data = &am65x_sr1_0},
2601 { .compatible = "ti,j721e-cpsw-nuss", .data = &j721e_pdata},
2602 { .compatible = "ti,am642-cpsw-nuss", .data = &am64x_cpswxg_pdata},
2603 { },
2604};
2605MODULE_DEVICE_TABLE(of, am65_cpsw_nuss_of_mtable);
2606
2607static void am65_cpsw_nuss_apply_socinfo(struct am65_cpsw_common *common)
2608{
2609 const struct soc_device_attribute *soc;
2610
2611 soc = soc_device_match(am65_cpsw_socinfo);
2612 if (soc && soc->data) {
2613 const struct am65_cpsw_soc_pdata *socdata = soc->data;
2614
2615
2616 common->pdata.quirks &= ~socdata->quirks_dis;
2617 }
2618}
2619
2620static int am65_cpsw_nuss_probe(struct platform_device *pdev)
2621{
2622 struct cpsw_ale_params ale_params = { 0 };
2623 const struct of_device_id *of_id;
2624 struct device *dev = &pdev->dev;
2625 struct am65_cpsw_common *common;
2626 struct device_node *node;
2627 struct resource *res;
2628 struct clk *clk;
2629 u64 id_temp;
2630 int ret, i;
2631
2632 common = devm_kzalloc(dev, sizeof(struct am65_cpsw_common), GFP_KERNEL);
2633 if (!common)
2634 return -ENOMEM;
2635 common->dev = dev;
2636
2637 of_id = of_match_device(am65_cpsw_nuss_of_mtable, dev);
2638 if (!of_id)
2639 return -EINVAL;
2640 common->pdata = *(const struct am65_cpsw_pdata *)of_id->data;
2641
2642 am65_cpsw_nuss_apply_socinfo(common);
2643
2644 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cpsw_nuss");
2645 common->ss_base = devm_ioremap_resource(&pdev->dev, res);
2646 if (IS_ERR(common->ss_base))
2647 return PTR_ERR(common->ss_base);
2648 common->cpsw_base = common->ss_base + AM65_CPSW_CPSW_NU_BASE;
2649
2650 id_temp = cpu_to_be64(res->start);
2651 memcpy(common->switch_id, &id_temp, sizeof(res->start));
2652
2653 node = of_get_child_by_name(dev->of_node, "ethernet-ports");
2654 if (!node)
2655 return -ENOENT;
2656 common->port_num = of_get_child_count(node);
2657 if (common->port_num < 1 || common->port_num > AM65_CPSW_MAX_PORTS)
2658 return -ENOENT;
2659 of_node_put(node);
2660
2661 common->rx_flow_id_base = -1;
2662 init_completion(&common->tdown_complete);
2663 common->tx_ch_num = 1;
2664 common->pf_p0_rx_ptype_rrobin = false;
2665 common->default_vlan = 1;
2666
2667 common->ports = devm_kcalloc(dev, common->port_num,
2668 sizeof(*common->ports),
2669 GFP_KERNEL);
2670 if (!common->ports)
2671 return -ENOMEM;
2672
2673 clk = devm_clk_get(dev, "fck");
2674 if (IS_ERR(clk))
2675 return dev_err_probe(dev, PTR_ERR(clk), "getting fck clock\n");
2676 common->bus_freq = clk_get_rate(clk);
2677
2678 pm_runtime_enable(dev);
2679 ret = pm_runtime_get_sync(dev);
2680 if (ret < 0) {
2681 pm_runtime_put_noidle(dev);
2682 pm_runtime_disable(dev);
2683 return ret;
2684 }
2685
2686 node = of_get_child_by_name(dev->of_node, "mdio");
2687 if (!node) {
2688 dev_warn(dev, "MDIO node not found\n");
2689 } else if (of_device_is_available(node)) {
2690 struct platform_device *mdio_pdev;
2691
2692 mdio_pdev = of_platform_device_create(node, NULL, dev);
2693 if (!mdio_pdev) {
2694 ret = -ENODEV;
2695 goto err_pm_clear;
2696 }
2697
2698 common->mdio_dev = &mdio_pdev->dev;
2699 }
2700 of_node_put(node);
2701
2702 am65_cpsw_nuss_get_ver(common);
2703
2704
2705 ret = am65_cpsw_nuss_init_tx_chns(common);
2706 if (ret)
2707 goto err_of_clear;
2708 ret = am65_cpsw_nuss_init_rx_chns(common);
2709 if (ret)
2710 goto err_of_clear;
2711
2712 ret = am65_cpsw_nuss_init_host_p(common);
2713 if (ret)
2714 goto err_of_clear;
2715
2716 ret = am65_cpsw_nuss_init_slave_ports(common);
2717 if (ret)
2718 goto err_of_clear;
2719
2720
2721 ale_params.dev = dev;
2722 ale_params.ale_ageout = AM65_CPSW_ALE_AGEOUT_DEFAULT;
2723 ale_params.ale_ports = common->port_num + 1;
2724 ale_params.ale_regs = common->cpsw_base + AM65_CPSW_NU_ALE_BASE;
2725 ale_params.dev_id = common->pdata.ale_dev_id;
2726 ale_params.bus_freq = common->bus_freq;
2727
2728 common->ale = cpsw_ale_create(&ale_params);
2729 if (IS_ERR(common->ale)) {
2730 dev_err(dev, "error initializing ale engine\n");
2731 ret = PTR_ERR(common->ale);
2732 goto err_of_clear;
2733 }
2734
2735 ret = am65_cpsw_init_cpts(common);
2736 if (ret)
2737 goto err_of_clear;
2738
2739
2740 for (i = 0; i < common->port_num; i++)
2741 am65_cpsw_nuss_slave_disable_unused(&common->ports[i]);
2742
2743 dev_set_drvdata(dev, common);
2744
2745 common->is_emac_mode = true;
2746
2747 ret = am65_cpsw_nuss_init_ndevs(common);
2748 if (ret)
2749 goto err_of_clear;
2750
2751 ret = am65_cpsw_nuss_register_ndevs(common);
2752 if (ret)
2753 goto err_of_clear;
2754
2755 pm_runtime_put(dev);
2756 return 0;
2757
2758err_of_clear:
2759 of_platform_device_destroy(common->mdio_dev, NULL);
2760err_pm_clear:
2761 pm_runtime_put_sync(dev);
2762 pm_runtime_disable(dev);
2763 return ret;
2764}
2765
2766static int am65_cpsw_nuss_remove(struct platform_device *pdev)
2767{
2768 struct device *dev = &pdev->dev;
2769 struct am65_cpsw_common *common;
2770 int ret;
2771
2772 common = dev_get_drvdata(dev);
2773
2774 ret = pm_runtime_get_sync(&pdev->dev);
2775 if (ret < 0) {
2776 pm_runtime_put_noidle(&pdev->dev);
2777 return ret;
2778 }
2779
2780 am65_cpsw_unregister_devlink(common);
2781 am65_cpsw_unregister_notifiers(common);
2782
2783
2784
2785
2786 am65_cpsw_nuss_cleanup_ndev(common);
2787
2788 of_platform_device_destroy(common->mdio_dev, NULL);
2789
2790 pm_runtime_put_sync(&pdev->dev);
2791 pm_runtime_disable(&pdev->dev);
2792 return 0;
2793}
2794
2795static struct platform_driver am65_cpsw_nuss_driver = {
2796 .driver = {
2797 .name = AM65_CPSW_DRV_NAME,
2798 .of_match_table = am65_cpsw_nuss_of_mtable,
2799 },
2800 .probe = am65_cpsw_nuss_probe,
2801 .remove = am65_cpsw_nuss_remove,
2802};
2803
2804module_platform_driver(am65_cpsw_nuss_driver);
2805
2806MODULE_LICENSE("GPL v2");
2807MODULE_AUTHOR("Grygorii Strashko <grygorii.strashko@ti.com>");
2808MODULE_DESCRIPTION("TI AM65 CPSW Ethernet driver");
2809
