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7#include "qlcnic.h"
8#include "qlcnic_hw.h"
9
10struct crb_addr_pair {
11 u32 addr;
12 u32 data;
13};
14
15#define QLCNIC_MAX_CRB_XFORM 60
16static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
17
18#define crb_addr_transform(name) \
19 (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
20 QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
21
22#define QLCNIC_ADDR_ERROR (0xffffffff)
23
24static int
25qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
26
27static void crb_addr_transform_setup(void)
28{
29 crb_addr_transform(XDMA);
30 crb_addr_transform(TIMR);
31 crb_addr_transform(SRE);
32 crb_addr_transform(SQN3);
33 crb_addr_transform(SQN2);
34 crb_addr_transform(SQN1);
35 crb_addr_transform(SQN0);
36 crb_addr_transform(SQS3);
37 crb_addr_transform(SQS2);
38 crb_addr_transform(SQS1);
39 crb_addr_transform(SQS0);
40 crb_addr_transform(RPMX7);
41 crb_addr_transform(RPMX6);
42 crb_addr_transform(RPMX5);
43 crb_addr_transform(RPMX4);
44 crb_addr_transform(RPMX3);
45 crb_addr_transform(RPMX2);
46 crb_addr_transform(RPMX1);
47 crb_addr_transform(RPMX0);
48 crb_addr_transform(ROMUSB);
49 crb_addr_transform(SN);
50 crb_addr_transform(QMN);
51 crb_addr_transform(QMS);
52 crb_addr_transform(PGNI);
53 crb_addr_transform(PGND);
54 crb_addr_transform(PGN3);
55 crb_addr_transform(PGN2);
56 crb_addr_transform(PGN1);
57 crb_addr_transform(PGN0);
58 crb_addr_transform(PGSI);
59 crb_addr_transform(PGSD);
60 crb_addr_transform(PGS3);
61 crb_addr_transform(PGS2);
62 crb_addr_transform(PGS1);
63 crb_addr_transform(PGS0);
64 crb_addr_transform(PS);
65 crb_addr_transform(PH);
66 crb_addr_transform(NIU);
67 crb_addr_transform(I2Q);
68 crb_addr_transform(EG);
69 crb_addr_transform(MN);
70 crb_addr_transform(MS);
71 crb_addr_transform(CAS2);
72 crb_addr_transform(CAS1);
73 crb_addr_transform(CAS0);
74 crb_addr_transform(CAM);
75 crb_addr_transform(C2C1);
76 crb_addr_transform(C2C0);
77 crb_addr_transform(SMB);
78 crb_addr_transform(OCM0);
79 crb_addr_transform(I2C0);
80}
81
82void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
83{
84 struct qlcnic_recv_context *recv_ctx;
85 struct qlcnic_host_rds_ring *rds_ring;
86 struct qlcnic_rx_buffer *rx_buf;
87 int i, ring;
88
89 recv_ctx = adapter->recv_ctx;
90 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
91 rds_ring = &recv_ctx->rds_rings[ring];
92 for (i = 0; i < rds_ring->num_desc; ++i) {
93 rx_buf = &(rds_ring->rx_buf_arr[i]);
94 if (rx_buf->skb == NULL)
95 continue;
96
97 pci_unmap_single(adapter->pdev,
98 rx_buf->dma,
99 rds_ring->dma_size,
100 PCI_DMA_FROMDEVICE);
101
102 dev_kfree_skb_any(rx_buf->skb);
103 }
104 }
105}
106
107void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
108{
109 struct qlcnic_recv_context *recv_ctx;
110 struct qlcnic_host_rds_ring *rds_ring;
111 struct qlcnic_rx_buffer *rx_buf;
112 int i, ring;
113
114 recv_ctx = adapter->recv_ctx;
115 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
116 rds_ring = &recv_ctx->rds_rings[ring];
117
118 INIT_LIST_HEAD(&rds_ring->free_list);
119
120 rx_buf = rds_ring->rx_buf_arr;
121 for (i = 0; i < rds_ring->num_desc; i++) {
122 list_add_tail(&rx_buf->list,
123 &rds_ring->free_list);
124 rx_buf++;
125 }
126 }
127}
128
129void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter,
130 struct qlcnic_host_tx_ring *tx_ring)
131{
132 struct qlcnic_cmd_buffer *cmd_buf;
133 struct qlcnic_skb_frag *buffrag;
134 int i, j;
135
136 spin_lock(&tx_ring->tx_clean_lock);
137
138 cmd_buf = tx_ring->cmd_buf_arr;
139 for (i = 0; i < tx_ring->num_desc; i++) {
140 buffrag = cmd_buf->frag_array;
141 if (buffrag->dma) {
142 pci_unmap_single(adapter->pdev, buffrag->dma,
143 buffrag->length, PCI_DMA_TODEVICE);
144 buffrag->dma = 0ULL;
145 }
146 for (j = 1; j < cmd_buf->frag_count; j++) {
147 buffrag++;
148 if (buffrag->dma) {
149 pci_unmap_page(adapter->pdev, buffrag->dma,
150 buffrag->length,
151 PCI_DMA_TODEVICE);
152 buffrag->dma = 0ULL;
153 }
154 }
155 if (cmd_buf->skb) {
156 dev_kfree_skb_any(cmd_buf->skb);
157 cmd_buf->skb = NULL;
158 }
159 cmd_buf++;
160 }
161
162 spin_unlock(&tx_ring->tx_clean_lock);
163}
164
165void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
166{
167 struct qlcnic_recv_context *recv_ctx;
168 struct qlcnic_host_rds_ring *rds_ring;
169 int ring;
170
171 recv_ctx = adapter->recv_ctx;
172
173 if (recv_ctx->rds_rings == NULL)
174 return;
175
176 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
177 rds_ring = &recv_ctx->rds_rings[ring];
178 vfree(rds_ring->rx_buf_arr);
179 rds_ring->rx_buf_arr = NULL;
180 }
181 kfree(recv_ctx->rds_rings);
182}
183
184int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
185{
186 struct qlcnic_recv_context *recv_ctx;
187 struct qlcnic_host_rds_ring *rds_ring;
188 struct qlcnic_host_sds_ring *sds_ring;
189 struct qlcnic_rx_buffer *rx_buf;
190 int ring, i;
191
192 recv_ctx = adapter->recv_ctx;
193
194 rds_ring = kcalloc(adapter->max_rds_rings,
195 sizeof(struct qlcnic_host_rds_ring), GFP_KERNEL);
196 if (rds_ring == NULL)
197 goto err_out;
198
199 recv_ctx->rds_rings = rds_ring;
200
201 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
202 rds_ring = &recv_ctx->rds_rings[ring];
203 switch (ring) {
204 case RCV_RING_NORMAL:
205 rds_ring->num_desc = adapter->num_rxd;
206 rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
207 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
208 break;
209
210 case RCV_RING_JUMBO:
211 rds_ring->num_desc = adapter->num_jumbo_rxd;
212 rds_ring->dma_size =
213 QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
214
215 if (adapter->ahw->capabilities &
216 QLCNIC_FW_CAPABILITY_HW_LRO)
217 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
218
219 rds_ring->skb_size =
220 rds_ring->dma_size + NET_IP_ALIGN;
221 break;
222 }
223 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
224 if (rds_ring->rx_buf_arr == NULL)
225 goto err_out;
226
227 INIT_LIST_HEAD(&rds_ring->free_list);
228
229
230
231
232 rx_buf = rds_ring->rx_buf_arr;
233 for (i = 0; i < rds_ring->num_desc; i++) {
234 list_add_tail(&rx_buf->list,
235 &rds_ring->free_list);
236 rx_buf->ref_handle = i;
237 rx_buf++;
238 }
239 spin_lock_init(&rds_ring->lock);
240 }
241
242 for (ring = 0; ring < adapter->drv_sds_rings; ring++) {
243 sds_ring = &recv_ctx->sds_rings[ring];
244 sds_ring->irq = adapter->msix_entries[ring].vector;
245 sds_ring->adapter = adapter;
246 sds_ring->num_desc = adapter->num_rxd;
247 if (qlcnic_82xx_check(adapter)) {
248 if (qlcnic_check_multi_tx(adapter) &&
249 !adapter->ahw->diag_test)
250 sds_ring->tx_ring = &adapter->tx_ring[ring];
251 else
252 sds_ring->tx_ring = &adapter->tx_ring[0];
253 }
254 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
255 INIT_LIST_HEAD(&sds_ring->free_list[i]);
256 }
257
258 return 0;
259
260err_out:
261 qlcnic_free_sw_resources(adapter);
262 return -ENOMEM;
263}
264
265
266
267
268
269static u32 qlcnic_decode_crb_addr(u32 addr)
270{
271 int i;
272 u32 base_addr, offset, pci_base;
273
274 crb_addr_transform_setup();
275
276 pci_base = QLCNIC_ADDR_ERROR;
277 base_addr = addr & 0xfff00000;
278 offset = addr & 0x000fffff;
279
280 for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
281 if (crb_addr_xform[i] == base_addr) {
282 pci_base = i << 20;
283 break;
284 }
285 }
286 if (pci_base == QLCNIC_ADDR_ERROR)
287 return pci_base;
288 else
289 return pci_base + offset;
290}
291
292#define QLCNIC_MAX_ROM_WAIT_USEC 100
293
294static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
295{
296 long timeout = 0;
297 long done = 0;
298 int err = 0;
299
300 cond_resched();
301 while (done == 0) {
302 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS, &err);
303 done &= 2;
304 if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
305 dev_err(&adapter->pdev->dev,
306 "Timeout reached waiting for rom done");
307 return -EIO;
308 }
309 udelay(1);
310 }
311 return 0;
312}
313
314static int do_rom_fast_read(struct qlcnic_adapter *adapter,
315 u32 addr, u32 *valp)
316{
317 int err = 0;
318
319 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
320 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
321 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
322 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
323 if (qlcnic_wait_rom_done(adapter)) {
324 dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
325 return -EIO;
326 }
327
328 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
329 udelay(10);
330 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
331
332 *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA, &err);
333 if (err == -EIO)
334 return err;
335 return 0;
336}
337
338static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
339 u8 *bytes, size_t size)
340{
341 int addridx;
342 int ret = 0;
343
344 for (addridx = addr; addridx < (addr + size); addridx += 4) {
345 int v;
346 ret = do_rom_fast_read(adapter, addridx, &v);
347 if (ret != 0)
348 break;
349 *(__le32 *)bytes = cpu_to_le32(v);
350 bytes += 4;
351 }
352
353 return ret;
354}
355
356int
357qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
358 u8 *bytes, size_t size)
359{
360 int ret;
361
362 ret = qlcnic_rom_lock(adapter);
363 if (ret < 0)
364 return ret;
365
366 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
367
368 qlcnic_rom_unlock(adapter);
369 return ret;
370}
371
372int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp)
373{
374 int ret;
375
376 if (qlcnic_rom_lock(adapter) != 0)
377 return -EIO;
378
379 ret = do_rom_fast_read(adapter, addr, valp);
380 qlcnic_rom_unlock(adapter);
381 return ret;
382}
383
384int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
385{
386 int addr, err = 0;
387 int i, n, init_delay;
388 struct crb_addr_pair *buf;
389 unsigned offset;
390 u32 off, val;
391 struct pci_dev *pdev = adapter->pdev;
392
393 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0);
394 QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0);
395
396
397
398 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0);
399 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0);
400 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0);
401 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0);
402 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0);
403 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0);
404
405
406 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff);
407
408 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00);
409
410 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00);
411
412 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00);
413
414 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00);
415
416 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00);
417
418
419 val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000, &err);
420 if (err == -EIO)
421 return err;
422 QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1)));
423
424
425 QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1);
426
427
428 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0);
429 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0);
430 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0);
431 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0);
432 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0);
433 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0);
434
435 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1);
436 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1);
437 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1);
438 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1);
439 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1);
440 msleep(20);
441
442 qlcnic_rom_unlock(adapter);
443
444 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
445
446
447 if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
448 qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
449 dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
450 return -EIO;
451 }
452 offset = n & 0xffffU;
453 n = (n >> 16) & 0xffffU;
454
455 if (n >= 1024) {
456 dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
457 return -EIO;
458 }
459
460 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
461 if (buf == NULL)
462 return -ENOMEM;
463
464 for (i = 0; i < n; i++) {
465 if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
466 qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
467 kfree(buf);
468 return -EIO;
469 }
470
471 buf[i].addr = addr;
472 buf[i].data = val;
473 }
474
475 for (i = 0; i < n; i++) {
476
477 off = qlcnic_decode_crb_addr(buf[i].addr);
478 if (off == QLCNIC_ADDR_ERROR) {
479 dev_err(&pdev->dev, "CRB init value out of range %x\n",
480 buf[i].addr);
481 continue;
482 }
483 off += QLCNIC_PCI_CRBSPACE;
484
485 if (off & 1)
486 continue;
487
488
489 if (off == QLCNIC_CAM_RAM(0x1fc))
490 continue;
491 if (off == (QLCNIC_CRB_I2C0 + 0x1c))
492 continue;
493 if (off == (ROMUSB_GLB + 0xbc))
494 continue;
495 if (off == (ROMUSB_GLB + 0xa8))
496 continue;
497 if (off == (ROMUSB_GLB + 0xc8))
498 continue;
499 if (off == (ROMUSB_GLB + 0x24))
500 continue;
501 if (off == (ROMUSB_GLB + 0x1c))
502 continue;
503 if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
504 continue;
505
506 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
507 continue;
508 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
509 continue;
510 if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
511 continue;
512
513 init_delay = 1;
514
515
516 if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
517 init_delay = 1000;
518
519 QLCWR32(adapter, off, buf[i].data);
520
521 msleep(init_delay);
522 }
523 kfree(buf);
524
525
526 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
527 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
528 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
529 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
530 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
531 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
532 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
533 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
534 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
535 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
536 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
537 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
538 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
539 usleep_range(1000, 1500);
540
541 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
542 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
543
544 return 0;
545}
546
547static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
548{
549 u32 val;
550 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
551
552 do {
553 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE);
554
555 switch (val) {
556 case PHAN_INITIALIZE_COMPLETE:
557 case PHAN_INITIALIZE_ACK:
558 return 0;
559 case PHAN_INITIALIZE_FAILED:
560 goto out_err;
561 default:
562 break;
563 }
564
565 msleep(QLCNIC_CMDPEG_CHECK_DELAY);
566
567 } while (--retries);
568
569 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE,
570 PHAN_INITIALIZE_FAILED);
571
572out_err:
573 dev_err(&adapter->pdev->dev, "Command Peg initialization not "
574 "complete, state: 0x%x.\n", val);
575 return -EIO;
576}
577
578static int
579qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
580{
581 u32 val;
582 int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
583
584 do {
585 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE);
586
587 if (val == PHAN_PEG_RCV_INITIALIZED)
588 return 0;
589
590 msleep(QLCNIC_RCVPEG_CHECK_DELAY);
591
592 } while (--retries);
593
594 dev_err(&adapter->pdev->dev, "Receive Peg initialization not complete, state: 0x%x.\n",
595 val);
596 return -EIO;
597}
598
599int
600qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
601{
602 int err;
603
604 err = qlcnic_cmd_peg_ready(adapter);
605 if (err)
606 return err;
607
608 err = qlcnic_receive_peg_ready(adapter);
609 if (err)
610 return err;
611
612 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
613
614 return err;
615}
616
617int
618qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
619
620 int timeo;
621 u32 val;
622
623 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
624 val = QLC_DEV_GET_DRV(val, adapter->portnum);
625 if ((val & 0x3) != QLCNIC_TYPE_NIC) {
626 dev_err(&adapter->pdev->dev,
627 "Not an Ethernet NIC func=%u\n", val);
628 return -EIO;
629 }
630 adapter->ahw->physical_port = (val >> 2);
631 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
632 timeo = QLCNIC_INIT_TIMEOUT_SECS;
633
634 adapter->dev_init_timeo = timeo;
635
636 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
637 timeo = QLCNIC_RESET_TIMEOUT_SECS;
638
639 adapter->reset_ack_timeo = timeo;
640
641 return 0;
642}
643
644static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
645 struct qlcnic_flt_entry *region_entry)
646{
647 struct qlcnic_flt_header flt_hdr;
648 struct qlcnic_flt_entry *flt_entry;
649 int i = 0, ret;
650 u32 entry_size;
651
652 memset(region_entry, 0, sizeof(struct qlcnic_flt_entry));
653 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION,
654 (u8 *)&flt_hdr,
655 sizeof(struct qlcnic_flt_header));
656 if (ret) {
657 dev_warn(&adapter->pdev->dev,
658 "error reading flash layout header\n");
659 return -EIO;
660 }
661
662 entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
663 flt_entry = vzalloc(entry_size);
664 if (flt_entry == NULL)
665 return -EIO;
666
667 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION +
668 sizeof(struct qlcnic_flt_header),
669 (u8 *)flt_entry, entry_size);
670 if (ret) {
671 dev_warn(&adapter->pdev->dev,
672 "error reading flash layout entries\n");
673 goto err_out;
674 }
675
676 while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) {
677 if (flt_entry[i].region == region)
678 break;
679 i++;
680 }
681 if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) {
682 dev_warn(&adapter->pdev->dev,
683 "region=%x not found in %d regions\n", region, i);
684 ret = -EIO;
685 goto err_out;
686 }
687 memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry));
688
689err_out:
690 vfree(flt_entry);
691 return ret;
692}
693
694int
695qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
696{
697 struct qlcnic_flt_entry fw_entry;
698 u32 ver = -1, min_ver;
699 int ret;
700
701 if (adapter->ahw->revision_id == QLCNIC_P3P_C0)
702 ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION,
703 &fw_entry);
704 else
705 ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION,
706 &fw_entry);
707
708 if (!ret)
709
710 qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4,
711 (int *)&ver);
712 else
713 qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET,
714 (int *)&ver);
715
716 ver = QLCNIC_DECODE_VERSION(ver);
717 min_ver = QLCNIC_MIN_FW_VERSION;
718
719 if (ver < min_ver) {
720 dev_err(&adapter->pdev->dev,
721 "firmware version %d.%d.%d unsupported."
722 "Min supported version %d.%d.%d\n",
723 _major(ver), _minor(ver), _build(ver),
724 _major(min_ver), _minor(min_ver), _build(min_ver));
725 return -EINVAL;
726 }
727
728 return 0;
729}
730
731static int
732qlcnic_has_mn(struct qlcnic_adapter *adapter)
733{
734 u32 capability = 0;
735 int err = 0;
736
737 capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY, &err);
738 if (err == -EIO)
739 return err;
740 if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
741 return 1;
742
743 return 0;
744}
745
746static
747struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
748{
749 u32 i, entries;
750 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
751 entries = le32_to_cpu(directory->num_entries);
752
753 for (i = 0; i < entries; i++) {
754
755 u32 offs = le32_to_cpu(directory->findex) +
756 i * le32_to_cpu(directory->entry_size);
757 u32 tab_type = le32_to_cpu(*((__le32 *)&unirom[offs] + 8));
758
759 if (tab_type == section)
760 return (struct uni_table_desc *) &unirom[offs];
761 }
762
763 return NULL;
764}
765
766#define FILEHEADER_SIZE (14 * 4)
767
768static int
769qlcnic_validate_header(struct qlcnic_adapter *adapter)
770{
771 const u8 *unirom = adapter->fw->data;
772 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
773 u32 entries, entry_size, tab_size, fw_file_size;
774
775 fw_file_size = adapter->fw->size;
776
777 if (fw_file_size < FILEHEADER_SIZE)
778 return -EINVAL;
779
780 entries = le32_to_cpu(directory->num_entries);
781 entry_size = le32_to_cpu(directory->entry_size);
782 tab_size = le32_to_cpu(directory->findex) + (entries * entry_size);
783
784 if (fw_file_size < tab_size)
785 return -EINVAL;
786
787 return 0;
788}
789
790static int
791qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
792{
793 struct uni_table_desc *tab_desc;
794 struct uni_data_desc *descr;
795 u32 offs, tab_size, data_size, idx;
796 const u8 *unirom = adapter->fw->data;
797 __le32 temp;
798
799 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
800 QLCNIC_UNI_BOOTLD_IDX_OFF);
801 idx = le32_to_cpu(temp);
802 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
803
804 if (!tab_desc)
805 return -EINVAL;
806
807 tab_size = le32_to_cpu(tab_desc->findex) +
808 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
809
810 if (adapter->fw->size < tab_size)
811 return -EINVAL;
812
813 offs = le32_to_cpu(tab_desc->findex) +
814 le32_to_cpu(tab_desc->entry_size) * idx;
815 descr = (struct uni_data_desc *)&unirom[offs];
816
817 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
818
819 if (adapter->fw->size < data_size)
820 return -EINVAL;
821
822 return 0;
823}
824
825static int
826qlcnic_validate_fw(struct qlcnic_adapter *adapter)
827{
828 struct uni_table_desc *tab_desc;
829 struct uni_data_desc *descr;
830 const u8 *unirom = adapter->fw->data;
831 u32 offs, tab_size, data_size, idx;
832 __le32 temp;
833
834 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
835 QLCNIC_UNI_FIRMWARE_IDX_OFF);
836 idx = le32_to_cpu(temp);
837 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
838
839 if (!tab_desc)
840 return -EINVAL;
841
842 tab_size = le32_to_cpu(tab_desc->findex) +
843 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
844
845 if (adapter->fw->size < tab_size)
846 return -EINVAL;
847
848 offs = le32_to_cpu(tab_desc->findex) +
849 le32_to_cpu(tab_desc->entry_size) * idx;
850 descr = (struct uni_data_desc *)&unirom[offs];
851 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
852
853 if (adapter->fw->size < data_size)
854 return -EINVAL;
855
856 return 0;
857}
858
859static int
860qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
861{
862 struct uni_table_desc *ptab_descr;
863 const u8 *unirom = adapter->fw->data;
864 int mn_present = qlcnic_has_mn(adapter);
865 u32 entries, entry_size, tab_size, i;
866 __le32 temp;
867
868 ptab_descr = qlcnic_get_table_desc(unirom,
869 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
870 if (!ptab_descr)
871 return -EINVAL;
872
873 entries = le32_to_cpu(ptab_descr->num_entries);
874 entry_size = le32_to_cpu(ptab_descr->entry_size);
875 tab_size = le32_to_cpu(ptab_descr->findex) + (entries * entry_size);
876
877 if (adapter->fw->size < tab_size)
878 return -EINVAL;
879
880nomn:
881 for (i = 0; i < entries; i++) {
882
883 u32 flags, file_chiprev, offs;
884 u8 chiprev = adapter->ahw->revision_id;
885 u32 flagbit;
886
887 offs = le32_to_cpu(ptab_descr->findex) +
888 i * le32_to_cpu(ptab_descr->entry_size);
889 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_FLAGS_OFF);
890 flags = le32_to_cpu(temp);
891 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_CHIP_REV_OFF);
892 file_chiprev = le32_to_cpu(temp);
893
894 flagbit = mn_present ? 1 : 2;
895
896 if ((chiprev == file_chiprev) &&
897 ((1ULL << flagbit) & flags)) {
898 adapter->file_prd_off = offs;
899 return 0;
900 }
901 }
902 if (mn_present) {
903 mn_present = 0;
904 goto nomn;
905 }
906 return -EINVAL;
907}
908
909static int
910qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
911{
912 if (qlcnic_validate_header(adapter)) {
913 dev_err(&adapter->pdev->dev,
914 "unified image: header validation failed\n");
915 return -EINVAL;
916 }
917
918 if (qlcnic_validate_product_offs(adapter)) {
919 dev_err(&adapter->pdev->dev,
920 "unified image: product validation failed\n");
921 return -EINVAL;
922 }
923
924 if (qlcnic_validate_bootld(adapter)) {
925 dev_err(&adapter->pdev->dev,
926 "unified image: bootld validation failed\n");
927 return -EINVAL;
928 }
929
930 if (qlcnic_validate_fw(adapter)) {
931 dev_err(&adapter->pdev->dev,
932 "unified image: firmware validation failed\n");
933 return -EINVAL;
934 }
935
936 return 0;
937}
938
939static
940struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
941 u32 section, u32 idx_offset)
942{
943 const u8 *unirom = adapter->fw->data;
944 struct uni_table_desc *tab_desc;
945 u32 offs, idx;
946 __le32 temp;
947
948 temp = *((__le32 *)&unirom[adapter->file_prd_off] + idx_offset);
949 idx = le32_to_cpu(temp);
950
951 tab_desc = qlcnic_get_table_desc(unirom, section);
952
953 if (tab_desc == NULL)
954 return NULL;
955
956 offs = le32_to_cpu(tab_desc->findex) +
957 le32_to_cpu(tab_desc->entry_size) * idx;
958
959 return (struct uni_data_desc *)&unirom[offs];
960}
961
962static u8 *
963qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
964{
965 u32 offs = QLCNIC_BOOTLD_START;
966 struct uni_data_desc *data_desc;
967
968 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_BOOTLD,
969 QLCNIC_UNI_BOOTLD_IDX_OFF);
970
971 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
972 offs = le32_to_cpu(data_desc->findex);
973
974 return (u8 *)&adapter->fw->data[offs];
975}
976
977static u8 *
978qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
979{
980 u32 offs = QLCNIC_IMAGE_START;
981 struct uni_data_desc *data_desc;
982
983 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
984 QLCNIC_UNI_FIRMWARE_IDX_OFF);
985 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
986 offs = le32_to_cpu(data_desc->findex);
987
988 return (u8 *)&adapter->fw->data[offs];
989}
990
991static u32 qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
992{
993 struct uni_data_desc *data_desc;
994 const u8 *unirom = adapter->fw->data;
995
996 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
997 QLCNIC_UNI_FIRMWARE_IDX_OFF);
998
999 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
1000 return le32_to_cpu(data_desc->size);
1001 else
1002 return le32_to_cpu(*(__le32 *)&unirom[QLCNIC_FW_SIZE_OFFSET]);
1003}
1004
1005static u32 qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
1006{
1007 struct uni_data_desc *fw_data_desc;
1008 const struct firmware *fw = adapter->fw;
1009 u32 major, minor, sub;
1010 __le32 version_offset;
1011 const u8 *ver_str;
1012 int i, ret;
1013
1014 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1015 version_offset = *(__le32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET];
1016 return le32_to_cpu(version_offset);
1017 }
1018
1019 fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
1020 QLCNIC_UNI_FIRMWARE_IDX_OFF);
1021 ver_str = fw->data + le32_to_cpu(fw_data_desc->findex) +
1022 le32_to_cpu(fw_data_desc->size) - 17;
1023
1024 for (i = 0; i < 12; i++) {
1025 if (!strncmp(&ver_str[i], "REV=", 4)) {
1026 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
1027 &major, &minor, &sub);
1028 if (ret != 3)
1029 return 0;
1030 else
1031 return major + (minor << 8) + (sub << 16);
1032 }
1033 }
1034
1035 return 0;
1036}
1037
1038static u32 qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
1039{
1040 const struct firmware *fw = adapter->fw;
1041 u32 bios_ver, prd_off = adapter->file_prd_off;
1042 u8 *version_offset;
1043 __le32 temp;
1044
1045 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1046 version_offset = (u8 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET];
1047 return le32_to_cpu(*(__le32 *)version_offset);
1048 }
1049
1050 temp = *((__le32 *)(&fw->data[prd_off]) + QLCNIC_UNI_BIOS_VERSION_OFF);
1051 bios_ver = le32_to_cpu(temp);
1052
1053 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
1054}
1055
1056static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
1057{
1058 if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
1059 dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
1060
1061 qlcnic_pcie_sem_unlock(adapter, 2);
1062}
1063
1064static int
1065qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
1066{
1067 u32 heartbeat, ret = -EIO;
1068 int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
1069
1070 adapter->heartbeat = QLC_SHARED_REG_RD32(adapter,
1071 QLCNIC_PEG_ALIVE_COUNTER);
1072
1073 do {
1074 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
1075 heartbeat = QLC_SHARED_REG_RD32(adapter,
1076 QLCNIC_PEG_ALIVE_COUNTER);
1077 if (heartbeat != adapter->heartbeat) {
1078 ret = QLCNIC_RCODE_SUCCESS;
1079 break;
1080 }
1081 } while (--retries);
1082
1083 return ret;
1084}
1085
1086int
1087qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
1088{
1089 if ((adapter->flags & QLCNIC_FW_HANG) ||
1090 qlcnic_check_fw_hearbeat(adapter)) {
1091 qlcnic_rom_lock_recovery(adapter);
1092 return 1;
1093 }
1094
1095 if (adapter->need_fw_reset)
1096 return 1;
1097
1098 if (adapter->fw)
1099 return 1;
1100
1101 return 0;
1102}
1103
1104static const char *fw_name[] = {
1105 QLCNIC_UNIFIED_ROMIMAGE_NAME,
1106 QLCNIC_FLASH_ROMIMAGE_NAME,
1107};
1108
1109int
1110qlcnic_load_firmware(struct qlcnic_adapter *adapter)
1111{
1112 __le64 *ptr64;
1113 u32 i, flashaddr, size;
1114 const struct firmware *fw = adapter->fw;
1115 struct pci_dev *pdev = adapter->pdev;
1116
1117 dev_info(&pdev->dev, "loading firmware from %s\n",
1118 fw_name[adapter->ahw->fw_type]);
1119
1120 if (fw) {
1121 u64 data;
1122
1123 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1124
1125 ptr64 = (__le64 *)qlcnic_get_bootld_offs(adapter);
1126 flashaddr = QLCNIC_BOOTLD_START;
1127
1128 for (i = 0; i < size; i++) {
1129 data = le64_to_cpu(ptr64[i]);
1130
1131 if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
1132 return -EIO;
1133
1134 flashaddr += 8;
1135 }
1136
1137 size = qlcnic_get_fw_size(adapter) / 8;
1138
1139 ptr64 = (__le64 *)qlcnic_get_fw_offs(adapter);
1140 flashaddr = QLCNIC_IMAGE_START;
1141
1142 for (i = 0; i < size; i++) {
1143 data = le64_to_cpu(ptr64[i]);
1144
1145 if (qlcnic_pci_mem_write_2M(adapter,
1146 flashaddr, data))
1147 return -EIO;
1148
1149 flashaddr += 8;
1150 }
1151
1152 size = qlcnic_get_fw_size(adapter) % 8;
1153 if (size) {
1154 data = le64_to_cpu(ptr64[i]);
1155
1156 if (qlcnic_pci_mem_write_2M(adapter,
1157 flashaddr, data))
1158 return -EIO;
1159 }
1160
1161 } else {
1162 u64 data;
1163 u32 hi, lo;
1164 int ret;
1165 struct qlcnic_flt_entry bootld_entry;
1166
1167 ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION,
1168 &bootld_entry);
1169 if (!ret) {
1170 size = bootld_entry.size / 8;
1171 flashaddr = bootld_entry.start_addr;
1172 } else {
1173 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1174 flashaddr = QLCNIC_BOOTLD_START;
1175 dev_info(&pdev->dev,
1176 "using legacy method to get flash fw region");
1177 }
1178
1179 for (i = 0; i < size; i++) {
1180 if (qlcnic_rom_fast_read(adapter,
1181 flashaddr, (int *)&lo) != 0)
1182 return -EIO;
1183 if (qlcnic_rom_fast_read(adapter,
1184 flashaddr + 4, (int *)&hi) != 0)
1185 return -EIO;
1186
1187 data = (((u64)hi << 32) | lo);
1188
1189 if (qlcnic_pci_mem_write_2M(adapter,
1190 flashaddr, data))
1191 return -EIO;
1192
1193 flashaddr += 8;
1194 }
1195 }
1196 usleep_range(1000, 1500);
1197
1198 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
1199 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
1200 return 0;
1201}
1202
1203static int
1204qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
1205{
1206 u32 val;
1207 u32 ver, bios, min_size;
1208 struct pci_dev *pdev = adapter->pdev;
1209 const struct firmware *fw = adapter->fw;
1210 u8 fw_type = adapter->ahw->fw_type;
1211
1212 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
1213 if (qlcnic_validate_unified_romimage(adapter))
1214 return -EINVAL;
1215
1216 min_size = QLCNIC_UNI_FW_MIN_SIZE;
1217 } else {
1218 val = le32_to_cpu(*(__le32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
1219 if (val != QLCNIC_BDINFO_MAGIC)
1220 return -EINVAL;
1221
1222 min_size = QLCNIC_FW_MIN_SIZE;
1223 }
1224
1225 if (fw->size < min_size)
1226 return -EINVAL;
1227
1228 val = qlcnic_get_fw_version(adapter);
1229 ver = QLCNIC_DECODE_VERSION(val);
1230
1231 if (ver < QLCNIC_MIN_FW_VERSION) {
1232 dev_err(&pdev->dev,
1233 "%s: firmware version %d.%d.%d unsupported\n",
1234 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
1235 return -EINVAL;
1236 }
1237
1238 val = qlcnic_get_bios_version(adapter);
1239 qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
1240 if (val != bios) {
1241 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1242 fw_name[fw_type]);
1243 return -EINVAL;
1244 }
1245
1246 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC);
1247 return 0;
1248}
1249
1250static void
1251qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
1252{
1253 u8 fw_type;
1254
1255 switch (adapter->ahw->fw_type) {
1256 case QLCNIC_UNKNOWN_ROMIMAGE:
1257 fw_type = QLCNIC_UNIFIED_ROMIMAGE;
1258 break;
1259
1260 case QLCNIC_UNIFIED_ROMIMAGE:
1261 default:
1262 fw_type = QLCNIC_FLASH_ROMIMAGE;
1263 break;
1264 }
1265
1266 adapter->ahw->fw_type = fw_type;
1267}
1268
1269
1270
1271void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
1272{
1273 struct pci_dev *pdev = adapter->pdev;
1274 int rc;
1275
1276 adapter->ahw->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
1277
1278next:
1279 qlcnic_get_next_fwtype(adapter);
1280
1281 if (adapter->ahw->fw_type == QLCNIC_FLASH_ROMIMAGE) {
1282 adapter->fw = NULL;
1283 } else {
1284 rc = request_firmware(&adapter->fw,
1285 fw_name[adapter->ahw->fw_type],
1286 &pdev->dev);
1287 if (rc != 0)
1288 goto next;
1289
1290 rc = qlcnic_validate_firmware(adapter);
1291 if (rc != 0) {
1292 release_firmware(adapter->fw);
1293 usleep_range(1000, 1500);
1294 goto next;
1295 }
1296 }
1297}
1298
1299
1300void
1301qlcnic_release_firmware(struct qlcnic_adapter *adapter)
1302{
1303 release_firmware(adapter->fw);
1304 adapter->fw = NULL;
1305}
1306
