linux/drivers/char/pcmcia/synclink_cs.c
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   1/*
   2 * linux/drivers/char/pcmcia/synclink_cs.c
   3 *
   4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
   5 *
   6 * Device driver for Microgate SyncLink PC Card
   7 * multiprotocol serial adapter.
   8 *
   9 * written by Paul Fulghum for Microgate Corporation
  10 * paulkf@microgate.com
  11 *
  12 * Microgate and SyncLink are trademarks of Microgate Corporation
  13 *
  14 * This code is released under the GNU General Public License (GPL)
  15 *
  16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26 * OF THE POSSIBILITY OF SUCH DAMAGE.
  27 */
  28
  29#define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  30#if defined(__i386__)
  31#  define BREAKPOINT() asm("   int $3");
  32#else
  33#  define BREAKPOINT() { }
  34#endif
  35
  36#define MAX_DEVICE_COUNT 4
  37
  38#include <linux/module.h>
  39#include <linux/errno.h>
  40#include <linux/signal.h>
  41#include <linux/sched.h>
  42#include <linux/timer.h>
  43#include <linux/time.h>
  44#include <linux/interrupt.h>
  45#include <linux/tty.h>
  46#include <linux/tty_flip.h>
  47#include <linux/serial.h>
  48#include <linux/major.h>
  49#include <linux/string.h>
  50#include <linux/fcntl.h>
  51#include <linux/ptrace.h>
  52#include <linux/ioport.h>
  53#include <linux/mm.h>
  54#include <linux/seq_file.h>
  55#include <linux/slab.h>
  56#include <linux/netdevice.h>
  57#include <linux/vmalloc.h>
  58#include <linux/init.h>
  59#include <linux/delay.h>
  60#include <linux/ioctl.h>
  61#include <linux/synclink.h>
  62
  63#include <asm/io.h>
  64#include <asm/irq.h>
  65#include <asm/dma.h>
  66#include <linux/bitops.h>
  67#include <asm/types.h>
  68#include <linux/termios.h>
  69#include <linux/workqueue.h>
  70#include <linux/hdlc.h>
  71
  72#include <pcmcia/cistpl.h>
  73#include <pcmcia/cisreg.h>
  74#include <pcmcia/ds.h>
  75
  76#if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  77#define SYNCLINK_GENERIC_HDLC 1
  78#else
  79#define SYNCLINK_GENERIC_HDLC 0
  80#endif
  81
  82#define GET_USER(error,value,addr) error = get_user(value,addr)
  83#define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  84#define PUT_USER(error,value,addr) error = put_user(value,addr)
  85#define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  86
  87#include <linux/uaccess.h>
  88
  89static MGSL_PARAMS default_params = {
  90        MGSL_MODE_HDLC,                 /* unsigned long mode */
  91        0,                              /* unsigned char loopback; */
  92        HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
  93        HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
  94        0,                              /* unsigned long clock_speed; */
  95        0xff,                           /* unsigned char addr_filter; */
  96        HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
  97        HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
  98        HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
  99        9600,                           /* unsigned long data_rate; */
 100        8,                              /* unsigned char data_bits; */
 101        1,                              /* unsigned char stop_bits; */
 102        ASYNC_PARITY_NONE               /* unsigned char parity; */
 103};
 104
 105typedef struct {
 106        int count;
 107        unsigned char status;
 108        char data[1];
 109} RXBUF;
 110
 111/* The queue of BH actions to be performed */
 112
 113#define BH_RECEIVE  1
 114#define BH_TRANSMIT 2
 115#define BH_STATUS   4
 116
 117#define IO_PIN_SHUTDOWN_LIMIT 100
 118
 119#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 120
 121struct _input_signal_events {
 122        int     ri_up;
 123        int     ri_down;
 124        int     dsr_up;
 125        int     dsr_down;
 126        int     dcd_up;
 127        int     dcd_down;
 128        int     cts_up;
 129        int     cts_down;
 130};
 131
 132
 133/*
 134 * Device instance data structure
 135 */
 136
 137typedef struct _mgslpc_info {
 138        struct tty_port         port;
 139        void *if_ptr;   /* General purpose pointer (used by SPPP) */
 140        int                     magic;
 141        int                     line;
 142
 143        struct mgsl_icount      icount;
 144
 145        int                     timeout;
 146        int                     x_char;         /* xon/xoff character */
 147        unsigned char           read_status_mask;
 148        unsigned char           ignore_status_mask;
 149
 150        unsigned char *tx_buf;
 151        int            tx_put;
 152        int            tx_get;
 153        int            tx_count;
 154
 155        /* circular list of fixed length rx buffers */
 156
 157        unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
 158        int            rx_buf_total_size; /* size of memory allocated for rx buffers */
 159        int            rx_put;         /* index of next empty rx buffer */
 160        int            rx_get;         /* index of next full rx buffer */
 161        int            rx_buf_size;    /* size in bytes of single rx buffer */
 162        int            rx_buf_count;   /* total number of rx buffers */
 163        int            rx_frame_count; /* number of full rx buffers */
 164
 165        wait_queue_head_t       status_event_wait_q;
 166        wait_queue_head_t       event_wait_q;
 167        struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
 168        struct _mgslpc_info     *next_device;   /* device list link */
 169
 170        unsigned short imra_value;
 171        unsigned short imrb_value;
 172        unsigned char  pim_value;
 173
 174        spinlock_t lock;
 175        struct work_struct task;                /* task structure for scheduling bh */
 176
 177        u32 max_frame_size;
 178
 179        u32 pending_bh;
 180
 181        bool bh_running;
 182        bool bh_requested;
 183
 184        int dcd_chkcount; /* check counts to prevent */
 185        int cts_chkcount; /* too many IRQs if a signal */
 186        int dsr_chkcount; /* is floating */
 187        int ri_chkcount;
 188
 189        bool rx_enabled;
 190        bool rx_overflow;
 191
 192        bool tx_enabled;
 193        bool tx_active;
 194        bool tx_aborting;
 195        u32 idle_mode;
 196
 197        int if_mode; /* serial interface selection (RS-232, v.35 etc) */
 198
 199        char device_name[25];           /* device instance name */
 200
 201        unsigned int io_base;   /* base I/O address of adapter */
 202        unsigned int irq_level;
 203
 204        MGSL_PARAMS params;             /* communications parameters */
 205
 206        unsigned char serial_signals;   /* current serial signal states */
 207
 208        bool irq_occurred;              /* for diagnostics use */
 209        char testing_irq;
 210        unsigned int init_error;        /* startup error (DIAGS)        */
 211
 212        char *flag_buf;
 213        bool drop_rts_on_tx_done;
 214
 215        struct  _input_signal_events    input_signal_events;
 216
 217        /* PCMCIA support */
 218        struct pcmcia_device    *p_dev;
 219        int                   stop;
 220
 221        /* SPPP/Cisco HDLC device parts */
 222        int netcount;
 223        spinlock_t netlock;
 224
 225#if SYNCLINK_GENERIC_HDLC
 226        struct net_device *netdev;
 227#endif
 228
 229} MGSLPC_INFO;
 230
 231#define MGSLPC_MAGIC 0x5402
 232
 233/*
 234 * The size of the serial xmit buffer is 1 page, or 4096 bytes
 235 */
 236#define TXBUFSIZE 4096
 237
 238
 239#define CHA     0x00   /* channel A offset */
 240#define CHB     0x40   /* channel B offset */
 241
 242/*
 243 *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
 244 */
 245#undef PVR
 246
 247#define RXFIFO  0
 248#define TXFIFO  0
 249#define STAR    0x20
 250#define CMDR    0x20
 251#define RSTA    0x21
 252#define PRE     0x21
 253#define MODE    0x22
 254#define TIMR    0x23
 255#define XAD1    0x24
 256#define XAD2    0x25
 257#define RAH1    0x26
 258#define RAH2    0x27
 259#define DAFO    0x27
 260#define RAL1    0x28
 261#define RFC     0x28
 262#define RHCR    0x29
 263#define RAL2    0x29
 264#define RBCL    0x2a
 265#define XBCL    0x2a
 266#define RBCH    0x2b
 267#define XBCH    0x2b
 268#define CCR0    0x2c
 269#define CCR1    0x2d
 270#define CCR2    0x2e
 271#define CCR3    0x2f
 272#define VSTR    0x34
 273#define BGR     0x34
 274#define RLCR    0x35
 275#define AML     0x36
 276#define AMH     0x37
 277#define GIS     0x38
 278#define IVA     0x38
 279#define IPC     0x39
 280#define ISR     0x3a
 281#define IMR     0x3a
 282#define PVR     0x3c
 283#define PIS     0x3d
 284#define PIM     0x3d
 285#define PCR     0x3e
 286#define CCR4    0x3f
 287
 288// IMR/ISR
 289
 290#define IRQ_BREAK_ON    BIT15   // rx break detected
 291#define IRQ_DATAOVERRUN BIT14   // receive data overflow
 292#define IRQ_ALLSENT     BIT13   // all sent
 293#define IRQ_UNDERRUN    BIT12   // transmit data underrun
 294#define IRQ_TIMER       BIT11   // timer interrupt
 295#define IRQ_CTS         BIT10   // CTS status change
 296#define IRQ_TXREPEAT    BIT9    // tx message repeat
 297#define IRQ_TXFIFO      BIT8    // transmit pool ready
 298#define IRQ_RXEOM       BIT7    // receive message end
 299#define IRQ_EXITHUNT    BIT6    // receive frame start
 300#define IRQ_RXTIME      BIT6    // rx char timeout
 301#define IRQ_DCD         BIT2    // carrier detect status change
 302#define IRQ_OVERRUN     BIT1    // receive frame overflow
 303#define IRQ_RXFIFO      BIT0    // receive pool full
 304
 305// STAR
 306
 307#define XFW   BIT6              // transmit FIFO write enable
 308#define CEC   BIT2              // command executing
 309#define CTS   BIT1              // CTS state
 310
 311#define PVR_DTR      BIT0
 312#define PVR_DSR      BIT1
 313#define PVR_RI       BIT2
 314#define PVR_AUTOCTS  BIT3
 315#define PVR_RS232    0x20   /* 0010b */
 316#define PVR_V35      0xe0   /* 1110b */
 317#define PVR_RS422    0x40   /* 0100b */
 318
 319/* Register access functions */
 320
 321#define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
 322#define read_reg(info, reg) inb((info)->io_base + (reg))
 323
 324#define read_reg16(info, reg) inw((info)->io_base + (reg))
 325#define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
 326
 327#define set_reg_bits(info, reg, mask) \
 328        write_reg(info, (reg), \
 329                 (unsigned char) (read_reg(info, (reg)) | (mask)))
 330#define clear_reg_bits(info, reg, mask) \
 331        write_reg(info, (reg), \
 332                 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
 333/*
 334 * interrupt enable/disable routines
 335 */
 336static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 337{
 338        if (channel == CHA) {
 339                info->imra_value |= mask;
 340                write_reg16(info, CHA + IMR, info->imra_value);
 341        } else {
 342                info->imrb_value |= mask;
 343                write_reg16(info, CHB + IMR, info->imrb_value);
 344        }
 345}
 346static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 347{
 348        if (channel == CHA) {
 349                info->imra_value &= ~mask;
 350                write_reg16(info, CHA + IMR, info->imra_value);
 351        } else {
 352                info->imrb_value &= ~mask;
 353                write_reg16(info, CHB + IMR, info->imrb_value);
 354        }
 355}
 356
 357#define port_irq_disable(info, mask) \
 358        { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
 359
 360#define port_irq_enable(info, mask) \
 361        { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
 362
 363static void rx_start(MGSLPC_INFO *info);
 364static void rx_stop(MGSLPC_INFO *info);
 365
 366static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
 367static void tx_stop(MGSLPC_INFO *info);
 368static void tx_set_idle(MGSLPC_INFO *info);
 369
 370static void get_signals(MGSLPC_INFO *info);
 371static void set_signals(MGSLPC_INFO *info);
 372
 373static void reset_device(MGSLPC_INFO *info);
 374
 375static void hdlc_mode(MGSLPC_INFO *info);
 376static void async_mode(MGSLPC_INFO *info);
 377
 378static void tx_timeout(struct timer_list *t);
 379
 380static int carrier_raised(struct tty_port *port);
 381static void dtr_rts(struct tty_port *port, int onoff);
 382
 383#if SYNCLINK_GENERIC_HDLC
 384#define dev_to_port(D) (dev_to_hdlc(D)->priv)
 385static void hdlcdev_tx_done(MGSLPC_INFO *info);
 386static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
 387static int  hdlcdev_init(MGSLPC_INFO *info);
 388static void hdlcdev_exit(MGSLPC_INFO *info);
 389#endif
 390
 391static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
 392
 393static bool register_test(MGSLPC_INFO *info);
 394static bool irq_test(MGSLPC_INFO *info);
 395static int adapter_test(MGSLPC_INFO *info);
 396
 397static int claim_resources(MGSLPC_INFO *info);
 398static void release_resources(MGSLPC_INFO *info);
 399static int mgslpc_add_device(MGSLPC_INFO *info);
 400static void mgslpc_remove_device(MGSLPC_INFO *info);
 401
 402static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
 403static void rx_reset_buffers(MGSLPC_INFO *info);
 404static int  rx_alloc_buffers(MGSLPC_INFO *info);
 405static void rx_free_buffers(MGSLPC_INFO *info);
 406
 407static irqreturn_t mgslpc_isr(int irq, void *dev_id);
 408
 409/*
 410 * Bottom half interrupt handlers
 411 */
 412static void bh_handler(struct work_struct *work);
 413static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
 414static void bh_status(MGSLPC_INFO *info);
 415
 416/*
 417 * ioctl handlers
 418 */
 419static int tiocmget(struct tty_struct *tty);
 420static int tiocmset(struct tty_struct *tty,
 421                                        unsigned int set, unsigned int clear);
 422static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
 423static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
 424static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
 425static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
 426static int set_txidle(MGSLPC_INFO *info, int idle_mode);
 427static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
 428static int tx_abort(MGSLPC_INFO *info);
 429static int set_rxenable(MGSLPC_INFO *info, int enable);
 430static int wait_events(MGSLPC_INFO *info, int __user *mask);
 431
 432static MGSLPC_INFO *mgslpc_device_list = NULL;
 433static int mgslpc_device_count = 0;
 434
 435/*
 436 * Set this param to non-zero to load eax with the
 437 * .text section address and breakpoint on module load.
 438 * This is useful for use with gdb and add-symbol-file command.
 439 */
 440static bool break_on_load;
 441
 442/*
 443 * Driver major number, defaults to zero to get auto
 444 * assigned major number. May be forced as module parameter.
 445 */
 446static int ttymajor=0;
 447
 448static int debug_level = 0;
 449static int maxframe[MAX_DEVICE_COUNT] = {0,};
 450
 451module_param(break_on_load, bool, 0);
 452module_param(ttymajor, int, 0);
 453module_param(debug_level, int, 0);
 454module_param_array(maxframe, int, NULL, 0);
 455
 456MODULE_LICENSE("GPL");
 457
 458static char *driver_name = "SyncLink PC Card driver";
 459static char *driver_version = "$Revision: 4.34 $";
 460
 461static struct tty_driver *serial_driver;
 462
 463/* number of characters left in xmit buffer before we ask for more */
 464#define WAKEUP_CHARS 256
 465
 466static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
 467static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
 468
 469/* PCMCIA prototypes */
 470
 471static int mgslpc_config(struct pcmcia_device *link);
 472static void mgslpc_release(u_long arg);
 473static void mgslpc_detach(struct pcmcia_device *p_dev);
 474
 475/*
 476 * 1st function defined in .text section. Calling this function in
 477 * init_module() followed by a breakpoint allows a remote debugger
 478 * (gdb) to get the .text address for the add-symbol-file command.
 479 * This allows remote debugging of dynamically loadable modules.
 480 */
 481static void* mgslpc_get_text_ptr(void)
 482{
 483        return mgslpc_get_text_ptr;
 484}
 485
 486/**
 487 * line discipline callback wrappers
 488 *
 489 * The wrappers maintain line discipline references
 490 * while calling into the line discipline.
 491 *
 492 * ldisc_receive_buf  - pass receive data to line discipline
 493 */
 494
 495static void ldisc_receive_buf(struct tty_struct *tty,
 496                              const __u8 *data, char *flags, int count)
 497{
 498        struct tty_ldisc *ld;
 499        if (!tty)
 500                return;
 501        ld = tty_ldisc_ref(tty);
 502        if (ld) {
 503                if (ld->ops->receive_buf)
 504                        ld->ops->receive_buf(tty, data, flags, count);
 505                tty_ldisc_deref(ld);
 506        }
 507}
 508
 509static const struct tty_port_operations mgslpc_port_ops = {
 510        .carrier_raised = carrier_raised,
 511        .dtr_rts = dtr_rts
 512};
 513
 514static int mgslpc_probe(struct pcmcia_device *link)
 515{
 516        MGSLPC_INFO *info;
 517        int ret;
 518
 519        if (debug_level >= DEBUG_LEVEL_INFO)
 520                printk("mgslpc_attach\n");
 521
 522        info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
 523        if (!info) {
 524                printk("Error can't allocate device instance data\n");
 525                return -ENOMEM;
 526        }
 527
 528        info->magic = MGSLPC_MAGIC;
 529        tty_port_init(&info->port);
 530        info->port.ops = &mgslpc_port_ops;
 531        INIT_WORK(&info->task, bh_handler);
 532        info->max_frame_size = 4096;
 533        init_waitqueue_head(&info->status_event_wait_q);
 534        init_waitqueue_head(&info->event_wait_q);
 535        spin_lock_init(&info->lock);
 536        spin_lock_init(&info->netlock);
 537        memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
 538        info->idle_mode = HDLC_TXIDLE_FLAGS;
 539        info->imra_value = 0xffff;
 540        info->imrb_value = 0xffff;
 541        info->pim_value = 0xff;
 542
 543        info->p_dev = link;
 544        link->priv = info;
 545
 546        /* Initialize the struct pcmcia_device structure */
 547
 548        ret = mgslpc_config(link);
 549        if (ret != 0)
 550                goto failed;
 551
 552        ret = mgslpc_add_device(info);
 553        if (ret != 0)
 554                goto failed_release;
 555
 556        return 0;
 557
 558failed_release:
 559        mgslpc_release((u_long)link);
 560failed:
 561        tty_port_destroy(&info->port);
 562        kfree(info);
 563        return ret;
 564}
 565
 566/* Card has been inserted.
 567 */
 568
 569static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data)
 570{
 571        return pcmcia_request_io(p_dev);
 572}
 573
 574static int mgslpc_config(struct pcmcia_device *link)
 575{
 576        MGSLPC_INFO *info = link->priv;
 577        int ret;
 578
 579        if (debug_level >= DEBUG_LEVEL_INFO)
 580                printk("mgslpc_config(0x%p)\n", link);
 581
 582        link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
 583
 584        ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
 585        if (ret != 0)
 586                goto failed;
 587
 588        link->config_index = 8;
 589        link->config_regs = PRESENT_OPTION;
 590
 591        ret = pcmcia_request_irq(link, mgslpc_isr);
 592        if (ret)
 593                goto failed;
 594        ret = pcmcia_enable_device(link);
 595        if (ret)
 596                goto failed;
 597
 598        info->io_base = link->resource[0]->start;
 599        info->irq_level = link->irq;
 600        return 0;
 601
 602failed:
 603        mgslpc_release((u_long)link);
 604        return -ENODEV;
 605}
 606
 607/* Card has been removed.
 608 * Unregister device and release PCMCIA configuration.
 609 * If device is open, postpone until it is closed.
 610 */
 611static void mgslpc_release(u_long arg)
 612{
 613        struct pcmcia_device *link = (struct pcmcia_device *)arg;
 614
 615        if (debug_level >= DEBUG_LEVEL_INFO)
 616                printk("mgslpc_release(0x%p)\n", link);
 617
 618        pcmcia_disable_device(link);
 619}
 620
 621static void mgslpc_detach(struct pcmcia_device *link)
 622{
 623        if (debug_level >= DEBUG_LEVEL_INFO)
 624                printk("mgslpc_detach(0x%p)\n", link);
 625
 626        ((MGSLPC_INFO *)link->priv)->stop = 1;
 627        mgslpc_release((u_long)link);
 628
 629        mgslpc_remove_device((MGSLPC_INFO *)link->priv);
 630}
 631
 632static int mgslpc_suspend(struct pcmcia_device *link)
 633{
 634        MGSLPC_INFO *info = link->priv;
 635
 636        info->stop = 1;
 637
 638        return 0;
 639}
 640
 641static int mgslpc_resume(struct pcmcia_device *link)
 642{
 643        MGSLPC_INFO *info = link->priv;
 644
 645        info->stop = 0;
 646
 647        return 0;
 648}
 649
 650
 651static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
 652                                        char *name, const char *routine)
 653{
 654#ifdef MGSLPC_PARANOIA_CHECK
 655        static const char *badmagic =
 656                "Warning: bad magic number for mgsl struct (%s) in %s\n";
 657        static const char *badinfo =
 658                "Warning: null mgslpc_info for (%s) in %s\n";
 659
 660        if (!info) {
 661                printk(badinfo, name, routine);
 662                return true;
 663        }
 664        if (info->magic != MGSLPC_MAGIC) {
 665                printk(badmagic, name, routine);
 666                return true;
 667        }
 668#else
 669        if (!info)
 670                return true;
 671#endif
 672        return false;
 673}
 674
 675
 676#define CMD_RXFIFO      BIT7    // release current rx FIFO
 677#define CMD_RXRESET     BIT6    // receiver reset
 678#define CMD_RXFIFO_READ BIT5
 679#define CMD_START_TIMER BIT4
 680#define CMD_TXFIFO      BIT3    // release current tx FIFO
 681#define CMD_TXEOM       BIT1    // transmit end message
 682#define CMD_TXRESET     BIT0    // transmit reset
 683
 684static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
 685{
 686        int i = 0;
 687        /* wait for command completion */
 688        while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
 689                udelay(1);
 690                if (i++ == 1000)
 691                        return false;
 692        }
 693        return true;
 694}
 695
 696static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
 697{
 698        wait_command_complete(info, channel);
 699        write_reg(info, (unsigned char) (channel + CMDR), cmd);
 700}
 701
 702static void tx_pause(struct tty_struct *tty)
 703{
 704        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 705        unsigned long flags;
 706
 707        if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
 708                return;
 709        if (debug_level >= DEBUG_LEVEL_INFO)
 710                printk("tx_pause(%s)\n", info->device_name);
 711
 712        spin_lock_irqsave(&info->lock, flags);
 713        if (info->tx_enabled)
 714                tx_stop(info);
 715        spin_unlock_irqrestore(&info->lock, flags);
 716}
 717
 718static void tx_release(struct tty_struct *tty)
 719{
 720        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 721        unsigned long flags;
 722
 723        if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
 724                return;
 725        if (debug_level >= DEBUG_LEVEL_INFO)
 726                printk("tx_release(%s)\n", info->device_name);
 727
 728        spin_lock_irqsave(&info->lock, flags);
 729        if (!info->tx_enabled)
 730                tx_start(info, tty);
 731        spin_unlock_irqrestore(&info->lock, flags);
 732}
 733
 734/* Return next bottom half action to perform.
 735 * or 0 if nothing to do.
 736 */
 737static int bh_action(MGSLPC_INFO *info)
 738{
 739        unsigned long flags;
 740        int rc = 0;
 741
 742        spin_lock_irqsave(&info->lock, flags);
 743
 744        if (info->pending_bh & BH_RECEIVE) {
 745                info->pending_bh &= ~BH_RECEIVE;
 746                rc = BH_RECEIVE;
 747        } else if (info->pending_bh & BH_TRANSMIT) {
 748                info->pending_bh &= ~BH_TRANSMIT;
 749                rc = BH_TRANSMIT;
 750        } else if (info->pending_bh & BH_STATUS) {
 751                info->pending_bh &= ~BH_STATUS;
 752                rc = BH_STATUS;
 753        }
 754
 755        if (!rc) {
 756                /* Mark BH routine as complete */
 757                info->bh_running = false;
 758                info->bh_requested = false;
 759        }
 760
 761        spin_unlock_irqrestore(&info->lock, flags);
 762
 763        return rc;
 764}
 765
 766static void bh_handler(struct work_struct *work)
 767{
 768        MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
 769        struct tty_struct *tty;
 770        int action;
 771
 772        if (debug_level >= DEBUG_LEVEL_BH)
 773                printk("%s(%d):bh_handler(%s) entry\n",
 774                        __FILE__,__LINE__,info->device_name);
 775
 776        info->bh_running = true;
 777        tty = tty_port_tty_get(&info->port);
 778
 779        while((action = bh_action(info)) != 0) {
 780
 781                /* Process work item */
 782                if (debug_level >= DEBUG_LEVEL_BH)
 783                        printk("%s(%d):bh_handler() work item action=%d\n",
 784                                __FILE__,__LINE__,action);
 785
 786                switch (action) {
 787
 788                case BH_RECEIVE:
 789                        while(rx_get_frame(info, tty));
 790                        break;
 791                case BH_TRANSMIT:
 792                        bh_transmit(info, tty);
 793                        break;
 794                case BH_STATUS:
 795                        bh_status(info);
 796                        break;
 797                default:
 798                        /* unknown work item ID */
 799                        printk("Unknown work item ID=%08X!\n", action);
 800                        break;
 801                }
 802        }
 803
 804        tty_kref_put(tty);
 805        if (debug_level >= DEBUG_LEVEL_BH)
 806                printk("%s(%d):bh_handler(%s) exit\n",
 807                        __FILE__,__LINE__,info->device_name);
 808}
 809
 810static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
 811{
 812        if (debug_level >= DEBUG_LEVEL_BH)
 813                printk("bh_transmit() entry on %s\n", info->device_name);
 814
 815        if (tty)
 816                tty_wakeup(tty);
 817}
 818
 819static void bh_status(MGSLPC_INFO *info)
 820{
 821        info->ri_chkcount = 0;
 822        info->dsr_chkcount = 0;
 823        info->dcd_chkcount = 0;
 824        info->cts_chkcount = 0;
 825}
 826
 827/* eom: non-zero = end of frame */
 828static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
 829{
 830        unsigned char data[2];
 831        unsigned char fifo_count, read_count, i;
 832        RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
 833
 834        if (debug_level >= DEBUG_LEVEL_ISR)
 835                printk("%s(%d):rx_ready_hdlc(eom=%d)\n", __FILE__, __LINE__, eom);
 836
 837        if (!info->rx_enabled)
 838                return;
 839
 840        if (info->rx_frame_count >= info->rx_buf_count) {
 841                /* no more free buffers */
 842                issue_command(info, CHA, CMD_RXRESET);
 843                info->pending_bh |= BH_RECEIVE;
 844                info->rx_overflow = true;
 845                info->icount.buf_overrun++;
 846                return;
 847        }
 848
 849        if (eom) {
 850                /* end of frame, get FIFO count from RBCL register */
 851                fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 852                if (fifo_count == 0)
 853                        fifo_count = 32;
 854        } else
 855                fifo_count = 32;
 856
 857        do {
 858                if (fifo_count == 1) {
 859                        read_count = 1;
 860                        data[0] = read_reg(info, CHA + RXFIFO);
 861                } else {
 862                        read_count = 2;
 863                        *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
 864                }
 865                fifo_count -= read_count;
 866                if (!fifo_count && eom)
 867                        buf->status = data[--read_count];
 868
 869                for (i = 0; i < read_count; i++) {
 870                        if (buf->count >= info->max_frame_size) {
 871                                /* frame too large, reset receiver and reset current buffer */
 872                                issue_command(info, CHA, CMD_RXRESET);
 873                                buf->count = 0;
 874                                return;
 875                        }
 876                        *(buf->data + buf->count) = data[i];
 877                        buf->count++;
 878                }
 879        } while (fifo_count);
 880
 881        if (eom) {
 882                info->pending_bh |= BH_RECEIVE;
 883                info->rx_frame_count++;
 884                info->rx_put++;
 885                if (info->rx_put >= info->rx_buf_count)
 886                        info->rx_put = 0;
 887        }
 888        issue_command(info, CHA, CMD_RXFIFO);
 889}
 890
 891static void rx_ready_async(MGSLPC_INFO *info, int tcd)
 892{
 893        struct tty_port *port = &info->port;
 894        unsigned char data, status, flag;
 895        int fifo_count;
 896        int work = 0;
 897        struct mgsl_icount *icount = &info->icount;
 898
 899        if (tcd) {
 900                /* early termination, get FIFO count from RBCL register */
 901                fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 902
 903                /* Zero fifo count could mean 0 or 32 bytes available.
 904                 * If BIT5 of STAR is set then at least 1 byte is available.
 905                 */
 906                if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
 907                        fifo_count = 32;
 908        } else
 909                fifo_count = 32;
 910
 911        tty_buffer_request_room(port, fifo_count);
 912        /* Flush received async data to receive data buffer. */
 913        while (fifo_count) {
 914                data   = read_reg(info, CHA + RXFIFO);
 915                status = read_reg(info, CHA + RXFIFO);
 916                fifo_count -= 2;
 917
 918                icount->rx++;
 919                flag = TTY_NORMAL;
 920
 921                // if no frameing/crc error then save data
 922                // BIT7:parity error
 923                // BIT6:framing error
 924
 925                if (status & (BIT7 + BIT6)) {
 926                        if (status & BIT7)
 927                                icount->parity++;
 928                        else
 929                                icount->frame++;
 930
 931                        /* discard char if tty control flags say so */
 932                        if (status & info->ignore_status_mask)
 933                                continue;
 934
 935                        status &= info->read_status_mask;
 936
 937                        if (status & BIT7)
 938                                flag = TTY_PARITY;
 939                        else if (status & BIT6)
 940                                flag = TTY_FRAME;
 941                }
 942                work += tty_insert_flip_char(port, data, flag);
 943        }
 944        issue_command(info, CHA, CMD_RXFIFO);
 945
 946        if (debug_level >= DEBUG_LEVEL_ISR) {
 947                printk("%s(%d):rx_ready_async",
 948                        __FILE__,__LINE__);
 949                printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
 950                        __FILE__,__LINE__,icount->rx,icount->brk,
 951                        icount->parity,icount->frame,icount->overrun);
 952        }
 953
 954        if (work)
 955                tty_flip_buffer_push(port);
 956}
 957
 958
 959static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
 960{
 961        if (!info->tx_active)
 962                return;
 963
 964        info->tx_active = false;
 965        info->tx_aborting = false;
 966
 967        if (info->params.mode == MGSL_MODE_ASYNC)
 968                return;
 969
 970        info->tx_count = info->tx_put = info->tx_get = 0;
 971        del_timer(&info->tx_timer);
 972
 973        if (info->drop_rts_on_tx_done) {
 974                get_signals(info);
 975                if (info->serial_signals & SerialSignal_RTS) {
 976                        info->serial_signals &= ~SerialSignal_RTS;
 977                        set_signals(info);
 978                }
 979                info->drop_rts_on_tx_done = false;
 980        }
 981
 982#if SYNCLINK_GENERIC_HDLC
 983        if (info->netcount)
 984                hdlcdev_tx_done(info);
 985        else
 986#endif
 987        {
 988                if (tty && (tty->stopped || tty->hw_stopped)) {
 989                        tx_stop(info);
 990                        return;
 991                }
 992                info->pending_bh |= BH_TRANSMIT;
 993        }
 994}
 995
 996static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
 997{
 998        unsigned char fifo_count = 32;
 999        int c;
1000
1001        if (debug_level >= DEBUG_LEVEL_ISR)
1002                printk("%s(%d):tx_ready(%s)\n", __FILE__, __LINE__, info->device_name);
1003
1004        if (info->params.mode == MGSL_MODE_HDLC) {
1005                if (!info->tx_active)
1006                        return;
1007        } else {
1008                if (tty && (tty->stopped || tty->hw_stopped)) {
1009                        tx_stop(info);
1010                        return;
1011                }
1012                if (!info->tx_count)
1013                        info->tx_active = false;
1014        }
1015
1016        if (!info->tx_count)
1017                return;
1018
1019        while (info->tx_count && fifo_count) {
1020                c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1021
1022                if (c == 1) {
1023                        write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1024                } else {
1025                        write_reg16(info, CHA + TXFIFO,
1026                                          *((unsigned short*)(info->tx_buf + info->tx_get)));
1027                }
1028                info->tx_count -= c;
1029                info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1030                fifo_count -= c;
1031        }
1032
1033        if (info->params.mode == MGSL_MODE_ASYNC) {
1034                if (info->tx_count < WAKEUP_CHARS)
1035                        info->pending_bh |= BH_TRANSMIT;
1036                issue_command(info, CHA, CMD_TXFIFO);
1037        } else {
1038                if (info->tx_count)
1039                        issue_command(info, CHA, CMD_TXFIFO);
1040                else
1041                        issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1042        }
1043}
1044
1045static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1046{
1047        get_signals(info);
1048        if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1049                irq_disable(info, CHB, IRQ_CTS);
1050        info->icount.cts++;
1051        if (info->serial_signals & SerialSignal_CTS)
1052                info->input_signal_events.cts_up++;
1053        else
1054                info->input_signal_events.cts_down++;
1055        wake_up_interruptible(&info->status_event_wait_q);
1056        wake_up_interruptible(&info->event_wait_q);
1057
1058        if (tty && tty_port_cts_enabled(&info->port)) {
1059                if (tty->hw_stopped) {
1060                        if (info->serial_signals & SerialSignal_CTS) {
1061                                if (debug_level >= DEBUG_LEVEL_ISR)
1062                                        printk("CTS tx start...");
1063                                tty->hw_stopped = 0;
1064                                tx_start(info, tty);
1065                                info->pending_bh |= BH_TRANSMIT;
1066                                return;
1067                        }
1068                } else {
1069                        if (!(info->serial_signals & SerialSignal_CTS)) {
1070                                if (debug_level >= DEBUG_LEVEL_ISR)
1071                                        printk("CTS tx stop...");
1072                                tty->hw_stopped = 1;
1073                                tx_stop(info);
1074                        }
1075                }
1076        }
1077        info->pending_bh |= BH_STATUS;
1078}
1079
1080static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1081{
1082        get_signals(info);
1083        if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1084                irq_disable(info, CHB, IRQ_DCD);
1085        info->icount.dcd++;
1086        if (info->serial_signals & SerialSignal_DCD) {
1087                info->input_signal_events.dcd_up++;
1088        }
1089        else
1090                info->input_signal_events.dcd_down++;
1091#if SYNCLINK_GENERIC_HDLC
1092        if (info->netcount) {
1093                if (info->serial_signals & SerialSignal_DCD)
1094                        netif_carrier_on(info->netdev);
1095                else
1096                        netif_carrier_off(info->netdev);
1097        }
1098#endif
1099        wake_up_interruptible(&info->status_event_wait_q);
1100        wake_up_interruptible(&info->event_wait_q);
1101
1102        if (tty_port_check_carrier(&info->port)) {
1103                if (debug_level >= DEBUG_LEVEL_ISR)
1104                        printk("%s CD now %s...", info->device_name,
1105                               (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1106                if (info->serial_signals & SerialSignal_DCD)
1107                        wake_up_interruptible(&info->port.open_wait);
1108                else {
1109                        if (debug_level >= DEBUG_LEVEL_ISR)
1110                                printk("doing serial hangup...");
1111                        if (tty)
1112                                tty_hangup(tty);
1113                }
1114        }
1115        info->pending_bh |= BH_STATUS;
1116}
1117
1118static void dsr_change(MGSLPC_INFO *info)
1119{
1120        get_signals(info);
1121        if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1122                port_irq_disable(info, PVR_DSR);
1123        info->icount.dsr++;
1124        if (info->serial_signals & SerialSignal_DSR)
1125                info->input_signal_events.dsr_up++;
1126        else
1127                info->input_signal_events.dsr_down++;
1128        wake_up_interruptible(&info->status_event_wait_q);
1129        wake_up_interruptible(&info->event_wait_q);
1130        info->pending_bh |= BH_STATUS;
1131}
1132
1133static void ri_change(MGSLPC_INFO *info)
1134{
1135        get_signals(info);
1136        if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1137                port_irq_disable(info, PVR_RI);
1138        info->icount.rng++;
1139        if (info->serial_signals & SerialSignal_RI)
1140                info->input_signal_events.ri_up++;
1141        else
1142                info->input_signal_events.ri_down++;
1143        wake_up_interruptible(&info->status_event_wait_q);
1144        wake_up_interruptible(&info->event_wait_q);
1145        info->pending_bh |= BH_STATUS;
1146}
1147
1148/* Interrupt service routine entry point.
1149 *
1150 * Arguments:
1151 *
1152 * irq     interrupt number that caused interrupt
1153 * dev_id  device ID supplied during interrupt registration
1154 */
1155static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1156{
1157        MGSLPC_INFO *info = dev_id;
1158        struct tty_struct *tty;
1159        unsigned short isr;
1160        unsigned char gis, pis;
1161        int count=0;
1162
1163        if (debug_level >= DEBUG_LEVEL_ISR)
1164                printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1165
1166        if (!(info->p_dev->_locked))
1167                return IRQ_HANDLED;
1168
1169        tty = tty_port_tty_get(&info->port);
1170
1171        spin_lock(&info->lock);
1172
1173        while ((gis = read_reg(info, CHA + GIS))) {
1174                if (debug_level >= DEBUG_LEVEL_ISR)
1175                        printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1176
1177                if ((gis & 0x70) || count > 1000) {
1178                        printk("synclink_cs:hardware failed or ejected\n");
1179                        break;
1180                }
1181                count++;
1182
1183                if (gis & (BIT1 | BIT0)) {
1184                        isr = read_reg16(info, CHB + ISR);
1185                        if (isr & IRQ_DCD)
1186                                dcd_change(info, tty);
1187                        if (isr & IRQ_CTS)
1188                                cts_change(info, tty);
1189                }
1190                if (gis & (BIT3 | BIT2))
1191                {
1192                        isr = read_reg16(info, CHA + ISR);
1193                        if (isr & IRQ_TIMER) {
1194                                info->irq_occurred = true;
1195                                irq_disable(info, CHA, IRQ_TIMER);
1196                        }
1197
1198                        /* receive IRQs */
1199                        if (isr & IRQ_EXITHUNT) {
1200                                info->icount.exithunt++;
1201                                wake_up_interruptible(&info->event_wait_q);
1202                        }
1203                        if (isr & IRQ_BREAK_ON) {
1204                                info->icount.brk++;
1205                                if (info->port.flags & ASYNC_SAK)
1206                                        do_SAK(tty);
1207                        }
1208                        if (isr & IRQ_RXTIME) {
1209                                issue_command(info, CHA, CMD_RXFIFO_READ);
1210                        }
1211                        if (isr & (IRQ_RXEOM | IRQ_RXFIFO)) {
1212                                if (info->params.mode == MGSL_MODE_HDLC)
1213                                        rx_ready_hdlc(info, isr & IRQ_RXEOM);
1214                                else
1215                                        rx_ready_async(info, isr & IRQ_RXEOM);
1216                        }
1217
1218                        /* transmit IRQs */
1219                        if (isr & IRQ_UNDERRUN) {
1220                                if (info->tx_aborting)
1221                                        info->icount.txabort++;
1222                                else
1223                                        info->icount.txunder++;
1224                                tx_done(info, tty);
1225                        }
1226                        else if (isr & IRQ_ALLSENT) {
1227                                info->icount.txok++;
1228                                tx_done(info, tty);
1229                        }
1230                        else if (isr & IRQ_TXFIFO)
1231                                tx_ready(info, tty);
1232                }
1233                if (gis & BIT7) {
1234                        pis = read_reg(info, CHA + PIS);
1235                        if (pis & BIT1)
1236                                dsr_change(info);
1237                        if (pis & BIT2)
1238                                ri_change(info);
1239                }
1240        }
1241
1242        /* Request bottom half processing if there's something
1243         * for it to do and the bh is not already running
1244         */
1245
1246        if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1247                if (debug_level >= DEBUG_LEVEL_ISR)
1248                        printk("%s(%d):%s queueing bh task.\n",
1249                                __FILE__,__LINE__,info->device_name);
1250                schedule_work(&info->task);
1251                info->bh_requested = true;
1252        }
1253
1254        spin_unlock(&info->lock);
1255        tty_kref_put(tty);
1256
1257        if (debug_level >= DEBUG_LEVEL_ISR)
1258                printk("%s(%d):mgslpc_isr(%d)exit.\n",
1259                       __FILE__, __LINE__, info->irq_level);
1260
1261        return IRQ_HANDLED;
1262}
1263
1264/* Initialize and start device.
1265 */
1266static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1267{
1268        int retval = 0;
1269
1270        if (debug_level >= DEBUG_LEVEL_INFO)
1271                printk("%s(%d):startup(%s)\n", __FILE__, __LINE__, info->device_name);
1272
1273        if (tty_port_initialized(&info->port))
1274                return 0;
1275
1276        if (!info->tx_buf) {
1277                /* allocate a page of memory for a transmit buffer */
1278                info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1279                if (!info->tx_buf) {
1280                        printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1281                                __FILE__, __LINE__, info->device_name);
1282                        return -ENOMEM;
1283                }
1284        }
1285
1286        info->pending_bh = 0;
1287
1288        memset(&info->icount, 0, sizeof(info->icount));
1289
1290        timer_setup(&info->tx_timer, tx_timeout, 0);
1291
1292        /* Allocate and claim adapter resources */
1293        retval = claim_resources(info);
1294
1295        /* perform existence check and diagnostics */
1296        if (!retval)
1297                retval = adapter_test(info);
1298
1299        if (retval) {
1300                if (capable(CAP_SYS_ADMIN) && tty)
1301                        set_bit(TTY_IO_ERROR, &tty->flags);
1302                release_resources(info);
1303                return retval;
1304        }
1305
1306        /* program hardware for current parameters */
1307        mgslpc_change_params(info, tty);
1308
1309        if (tty)
1310                clear_bit(TTY_IO_ERROR, &tty->flags);
1311
1312        tty_port_set_initialized(&info->port, 1);
1313
1314        return 0;
1315}
1316
1317/* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1318 */
1319static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1320{
1321        unsigned long flags;
1322
1323        if (!tty_port_initialized(&info->port))
1324                return;
1325
1326        if (debug_level >= DEBUG_LEVEL_INFO)
1327                printk("%s(%d):mgslpc_shutdown(%s)\n",
1328                         __FILE__, __LINE__, info->device_name);
1329
1330        /* clear status wait queue because status changes */
1331        /* can't happen after shutting down the hardware */
1332        wake_up_interruptible(&info->status_event_wait_q);
1333        wake_up_interruptible(&info->event_wait_q);
1334
1335        del_timer_sync(&info->tx_timer);
1336
1337        if (info->tx_buf) {
1338                free_page((unsigned long) info->tx_buf);
1339                info->tx_buf = NULL;
1340        }
1341
1342        spin_lock_irqsave(&info->lock, flags);
1343
1344        rx_stop(info);
1345        tx_stop(info);
1346
1347        /* TODO:disable interrupts instead of reset to preserve signal states */
1348        reset_device(info);
1349
1350        if (!tty || C_HUPCL(tty)) {
1351                info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1352                set_signals(info);
1353        }
1354
1355        spin_unlock_irqrestore(&info->lock, flags);
1356
1357        release_resources(info);
1358
1359        if (tty)
1360                set_bit(TTY_IO_ERROR, &tty->flags);
1361
1362        tty_port_set_initialized(&info->port, 0);
1363}
1364
1365static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1366{
1367        unsigned long flags;
1368
1369        spin_lock_irqsave(&info->lock, flags);
1370
1371        rx_stop(info);
1372        tx_stop(info);
1373        info->tx_count = info->tx_put = info->tx_get = 0;
1374
1375        if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1376                hdlc_mode(info);
1377        else
1378                async_mode(info);
1379
1380        set_signals(info);
1381
1382        info->dcd_chkcount = 0;
1383        info->cts_chkcount = 0;
1384        info->ri_chkcount = 0;
1385        info->dsr_chkcount = 0;
1386
1387        irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1388        port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1389        get_signals(info);
1390
1391        if (info->netcount || (tty && C_CREAD(tty)))
1392                rx_start(info);
1393
1394        spin_unlock_irqrestore(&info->lock, flags);
1395}
1396
1397/* Reconfigure adapter based on new parameters
1398 */
1399static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1400{
1401        unsigned cflag;
1402        int bits_per_char;
1403
1404        if (!tty)
1405                return;
1406
1407        if (debug_level >= DEBUG_LEVEL_INFO)
1408                printk("%s(%d):mgslpc_change_params(%s)\n",
1409                         __FILE__, __LINE__, info->device_name);
1410
1411        cflag = tty->termios.c_cflag;
1412
1413        /* if B0 rate (hangup) specified then negate RTS and DTR */
1414        /* otherwise assert RTS and DTR */
1415        if (cflag & CBAUD)
1416                info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
1417        else
1418                info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1419
1420        /* byte size and parity */
1421
1422        switch (cflag & CSIZE) {
1423        case CS5: info->params.data_bits = 5; break;
1424        case CS6: info->params.data_bits = 6; break;
1425        case CS7: info->params.data_bits = 7; break;
1426        case CS8: info->params.data_bits = 8; break;
1427        default:  info->params.data_bits = 7; break;
1428        }
1429
1430        if (cflag & CSTOPB)
1431                info->params.stop_bits = 2;
1432        else
1433                info->params.stop_bits = 1;
1434
1435        info->params.parity = ASYNC_PARITY_NONE;
1436        if (cflag & PARENB) {
1437                if (cflag & PARODD)
1438                        info->params.parity = ASYNC_PARITY_ODD;
1439                else
1440                        info->params.parity = ASYNC_PARITY_EVEN;
1441#ifdef CMSPAR
1442                if (cflag & CMSPAR)
1443                        info->params.parity = ASYNC_PARITY_SPACE;
1444#endif
1445        }
1446
1447        /* calculate number of jiffies to transmit a full
1448         * FIFO (32 bytes) at specified data rate
1449         */
1450        bits_per_char = info->params.data_bits +
1451                        info->params.stop_bits + 1;
1452
1453        /* if port data rate is set to 460800 or less then
1454         * allow tty settings to override, otherwise keep the
1455         * current data rate.
1456         */
1457        if (info->params.data_rate <= 460800) {
1458                info->params.data_rate = tty_get_baud_rate(tty);
1459        }
1460
1461        if (info->params.data_rate) {
1462                info->timeout = (32*HZ*bits_per_char) /
1463                                info->params.data_rate;
1464        }
1465        info->timeout += HZ/50;         /* Add .02 seconds of slop */
1466
1467        tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
1468        tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
1469
1470        /* process tty input control flags */
1471
1472        info->read_status_mask = 0;
1473        if (I_INPCK(tty))
1474                info->read_status_mask |= BIT7 | BIT6;
1475        if (I_IGNPAR(tty))
1476                info->ignore_status_mask |= BIT7 | BIT6;
1477
1478        mgslpc_program_hw(info, tty);
1479}
1480
1481/* Add a character to the transmit buffer
1482 */
1483static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1484{
1485        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1486        unsigned long flags;
1487
1488        if (debug_level >= DEBUG_LEVEL_INFO) {
1489                printk("%s(%d):mgslpc_put_char(%d) on %s\n",
1490                        __FILE__, __LINE__, ch, info->device_name);
1491        }
1492
1493        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1494                return 0;
1495
1496        if (!info->tx_buf)
1497                return 0;
1498
1499        spin_lock_irqsave(&info->lock, flags);
1500
1501        if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1502                if (info->tx_count < TXBUFSIZE - 1) {
1503                        info->tx_buf[info->tx_put++] = ch;
1504                        info->tx_put &= TXBUFSIZE-1;
1505                        info->tx_count++;
1506                }
1507        }
1508
1509        spin_unlock_irqrestore(&info->lock, flags);
1510        return 1;
1511}
1512
1513/* Enable transmitter so remaining characters in the
1514 * transmit buffer are sent.
1515 */
1516static void mgslpc_flush_chars(struct tty_struct *tty)
1517{
1518        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1519        unsigned long flags;
1520
1521        if (debug_level >= DEBUG_LEVEL_INFO)
1522                printk("%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1523                        __FILE__, __LINE__, info->device_name, info->tx_count);
1524
1525        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1526                return;
1527
1528        if (info->tx_count <= 0 || tty->stopped ||
1529            tty->hw_stopped || !info->tx_buf)
1530                return;
1531
1532        if (debug_level >= DEBUG_LEVEL_INFO)
1533                printk("%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1534                        __FILE__, __LINE__, info->device_name);
1535
1536        spin_lock_irqsave(&info->lock, flags);
1537        if (!info->tx_active)
1538                tx_start(info, tty);
1539        spin_unlock_irqrestore(&info->lock, flags);
1540}
1541
1542/* Send a block of data
1543 *
1544 * Arguments:
1545 *
1546 * tty        pointer to tty information structure
1547 * buf        pointer to buffer containing send data
1548 * count      size of send data in bytes
1549 *
1550 * Returns: number of characters written
1551 */
1552static int mgslpc_write(struct tty_struct * tty,
1553                        const unsigned char *buf, int count)
1554{
1555        int c, ret = 0;
1556        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1557        unsigned long flags;
1558
1559        if (debug_level >= DEBUG_LEVEL_INFO)
1560                printk("%s(%d):mgslpc_write(%s) count=%d\n",
1561                        __FILE__, __LINE__, info->device_name, count);
1562
1563        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1564                !info->tx_buf)
1565                goto cleanup;
1566
1567        if (info->params.mode == MGSL_MODE_HDLC) {
1568                if (count > TXBUFSIZE) {
1569                        ret = -EIO;
1570                        goto cleanup;
1571                }
1572                if (info->tx_active)
1573                        goto cleanup;
1574                else if (info->tx_count)
1575                        goto start;
1576        }
1577
1578        for (;;) {
1579                c = min(count,
1580                        min(TXBUFSIZE - info->tx_count - 1,
1581                            TXBUFSIZE - info->tx_put));
1582                if (c <= 0)
1583                        break;
1584
1585                memcpy(info->tx_buf + info->tx_put, buf, c);
1586
1587                spin_lock_irqsave(&info->lock, flags);
1588                info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1589                info->tx_count += c;
1590                spin_unlock_irqrestore(&info->lock, flags);
1591
1592                buf += c;
1593                count -= c;
1594                ret += c;
1595        }
1596start:
1597        if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1598                spin_lock_irqsave(&info->lock, flags);
1599                if (!info->tx_active)
1600                        tx_start(info, tty);
1601                spin_unlock_irqrestore(&info->lock, flags);
1602        }
1603cleanup:
1604        if (debug_level >= DEBUG_LEVEL_INFO)
1605                printk("%s(%d):mgslpc_write(%s) returning=%d\n",
1606                        __FILE__, __LINE__, info->device_name, ret);
1607        return ret;
1608}
1609
1610/* Return the count of free bytes in transmit buffer
1611 */
1612static int mgslpc_write_room(struct tty_struct *tty)
1613{
1614        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1615        int ret;
1616
1617        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1618                return 0;
1619
1620        if (info->params.mode == MGSL_MODE_HDLC) {
1621                /* HDLC (frame oriented) mode */
1622                if (info->tx_active)
1623                        return 0;
1624                else
1625                        return HDLC_MAX_FRAME_SIZE;
1626        } else {
1627                ret = TXBUFSIZE - info->tx_count - 1;
1628                if (ret < 0)
1629                        ret = 0;
1630        }
1631
1632        if (debug_level >= DEBUG_LEVEL_INFO)
1633                printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1634                         __FILE__, __LINE__, info->device_name, ret);
1635        return ret;
1636}
1637
1638/* Return the count of bytes in transmit buffer
1639 */
1640static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1641{
1642        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1643        int rc;
1644
1645        if (debug_level >= DEBUG_LEVEL_INFO)
1646                printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1647                         __FILE__, __LINE__, info->device_name);
1648
1649        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1650                return 0;
1651
1652        if (info->params.mode == MGSL_MODE_HDLC)
1653                rc = info->tx_active ? info->max_frame_size : 0;
1654        else
1655                rc = info->tx_count;
1656
1657        if (debug_level >= DEBUG_LEVEL_INFO)
1658                printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1659                         __FILE__, __LINE__, info->device_name, rc);
1660
1661        return rc;
1662}
1663
1664/* Discard all data in the send buffer
1665 */
1666static void mgslpc_flush_buffer(struct tty_struct *tty)
1667{
1668        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1669        unsigned long flags;
1670
1671        if (debug_level >= DEBUG_LEVEL_INFO)
1672                printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1673                         __FILE__, __LINE__, info->device_name);
1674
1675        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1676                return;
1677
1678        spin_lock_irqsave(&info->lock, flags);
1679        info->tx_count = info->tx_put = info->tx_get = 0;
1680        del_timer(&info->tx_timer);
1681        spin_unlock_irqrestore(&info->lock, flags);
1682
1683        wake_up_interruptible(&tty->write_wait);
1684        tty_wakeup(tty);
1685}
1686
1687/* Send a high-priority XON/XOFF character
1688 */
1689static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1690{
1691        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1692        unsigned long flags;
1693
1694        if (debug_level >= DEBUG_LEVEL_INFO)
1695                printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1696                         __FILE__, __LINE__, info->device_name, ch);
1697
1698        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1699                return;
1700
1701        info->x_char = ch;
1702        if (ch) {
1703                spin_lock_irqsave(&info->lock, flags);
1704                if (!info->tx_enabled)
1705                        tx_start(info, tty);
1706                spin_unlock_irqrestore(&info->lock, flags);
1707        }
1708}
1709
1710/* Signal remote device to throttle send data (our receive data)
1711 */
1712static void mgslpc_throttle(struct tty_struct * tty)
1713{
1714        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1715        unsigned long flags;
1716
1717        if (debug_level >= DEBUG_LEVEL_INFO)
1718                printk("%s(%d):mgslpc_throttle(%s) entry\n",
1719                         __FILE__, __LINE__, info->device_name);
1720
1721        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1722                return;
1723
1724        if (I_IXOFF(tty))
1725                mgslpc_send_xchar(tty, STOP_CHAR(tty));
1726
1727        if (C_CRTSCTS(tty)) {
1728                spin_lock_irqsave(&info->lock, flags);
1729                info->serial_signals &= ~SerialSignal_RTS;
1730                set_signals(info);
1731                spin_unlock_irqrestore(&info->lock, flags);
1732        }
1733}
1734
1735/* Signal remote device to stop throttling send data (our receive data)
1736 */
1737static void mgslpc_unthrottle(struct tty_struct * tty)
1738{
1739        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1740        unsigned long flags;
1741
1742        if (debug_level >= DEBUG_LEVEL_INFO)
1743                printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1744                         __FILE__, __LINE__, info->device_name);
1745
1746        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1747                return;
1748
1749        if (I_IXOFF(tty)) {
1750                if (info->x_char)
1751                        info->x_char = 0;
1752                else
1753                        mgslpc_send_xchar(tty, START_CHAR(tty));
1754        }
1755
1756        if (C_CRTSCTS(tty)) {
1757                spin_lock_irqsave(&info->lock, flags);
1758                info->serial_signals |= SerialSignal_RTS;
1759                set_signals(info);
1760                spin_unlock_irqrestore(&info->lock, flags);
1761        }
1762}
1763
1764/* get the current serial statistics
1765 */
1766static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1767{
1768        int err;
1769        if (debug_level >= DEBUG_LEVEL_INFO)
1770                printk("get_params(%s)\n", info->device_name);
1771        if (!user_icount) {
1772                memset(&info->icount, 0, sizeof(info->icount));
1773        } else {
1774                COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1775                if (err)
1776                        return -EFAULT;
1777        }
1778        return 0;
1779}
1780
1781/* get the current serial parameters
1782 */
1783static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1784{
1785        int err;
1786        if (debug_level >= DEBUG_LEVEL_INFO)
1787                printk("get_params(%s)\n", info->device_name);
1788        COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1789        if (err)
1790                return -EFAULT;
1791        return 0;
1792}
1793
1794/* set the serial parameters
1795 *
1796 * Arguments:
1797 *
1798 *      info            pointer to device instance data
1799 *      new_params      user buffer containing new serial params
1800 *
1801 * Returns:     0 if success, otherwise error code
1802 */
1803static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1804{
1805        unsigned long flags;
1806        MGSL_PARAMS tmp_params;
1807        int err;
1808
1809        if (debug_level >= DEBUG_LEVEL_INFO)
1810                printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1811                        info->device_name);
1812        COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1813        if (err) {
1814                if (debug_level >= DEBUG_LEVEL_INFO)
1815                        printk("%s(%d):set_params(%s) user buffer copy failed\n",
1816                                __FILE__, __LINE__, info->device_name);
1817                return -EFAULT;
1818        }
1819
1820        spin_lock_irqsave(&info->lock, flags);
1821        memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1822        spin_unlock_irqrestore(&info->lock, flags);
1823
1824        mgslpc_change_params(info, tty);
1825
1826        return 0;
1827}
1828
1829static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1830{
1831        int err;
1832        if (debug_level >= DEBUG_LEVEL_INFO)
1833                printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1834        COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1835        if (err)
1836                return -EFAULT;
1837        return 0;
1838}
1839
1840static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1841{
1842        unsigned long flags;
1843        if (debug_level >= DEBUG_LEVEL_INFO)
1844                printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1845        spin_lock_irqsave(&info->lock, flags);
1846        info->idle_mode = idle_mode;
1847        tx_set_idle(info);
1848        spin_unlock_irqrestore(&info->lock, flags);
1849        return 0;
1850}
1851
1852static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1853{
1854        int err;
1855        if (debug_level >= DEBUG_LEVEL_INFO)
1856                printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1857        COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1858        if (err)
1859                return -EFAULT;
1860        return 0;
1861}
1862
1863static int set_interface(MGSLPC_INFO * info, int if_mode)
1864{
1865        unsigned long flags;
1866        unsigned char val;
1867        if (debug_level >= DEBUG_LEVEL_INFO)
1868                printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1869        spin_lock_irqsave(&info->lock, flags);
1870        info->if_mode = if_mode;
1871
1872        val = read_reg(info, PVR) & 0x0f;
1873        switch (info->if_mode)
1874        {
1875        case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1876        case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1877        case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1878        }
1879        write_reg(info, PVR, val);
1880
1881        spin_unlock_irqrestore(&info->lock, flags);
1882        return 0;
1883}
1884
1885static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1886{
1887        unsigned long flags;
1888
1889        if (debug_level >= DEBUG_LEVEL_INFO)
1890                printk("set_txenable(%s,%d)\n", info->device_name, enable);
1891
1892        spin_lock_irqsave(&info->lock, flags);
1893        if (enable) {
1894                if (!info->tx_enabled)
1895                        tx_start(info, tty);
1896        } else {
1897                if (info->tx_enabled)
1898                        tx_stop(info);
1899        }
1900        spin_unlock_irqrestore(&info->lock, flags);
1901        return 0;
1902}
1903
1904static int tx_abort(MGSLPC_INFO * info)
1905{
1906        unsigned long flags;
1907
1908        if (debug_level >= DEBUG_LEVEL_INFO)
1909                printk("tx_abort(%s)\n", info->device_name);
1910
1911        spin_lock_irqsave(&info->lock, flags);
1912        if (info->tx_active && info->tx_count &&
1913            info->params.mode == MGSL_MODE_HDLC) {
1914                /* clear data count so FIFO is not filled on next IRQ.
1915                 * This results in underrun and abort transmission.
1916                 */
1917                info->tx_count = info->tx_put = info->tx_get = 0;
1918                info->tx_aborting = true;
1919        }
1920        spin_unlock_irqrestore(&info->lock, flags);
1921        return 0;
1922}
1923
1924static int set_rxenable(MGSLPC_INFO * info, int enable)
1925{
1926        unsigned long flags;
1927
1928        if (debug_level >= DEBUG_LEVEL_INFO)
1929                printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1930
1931        spin_lock_irqsave(&info->lock, flags);
1932        if (enable) {
1933                if (!info->rx_enabled)
1934                        rx_start(info);
1935        } else {
1936                if (info->rx_enabled)
1937                        rx_stop(info);
1938        }
1939        spin_unlock_irqrestore(&info->lock, flags);
1940        return 0;
1941}
1942
1943/* wait for specified event to occur
1944 *
1945 * Arguments:           info    pointer to device instance data
1946 *                      mask    pointer to bitmask of events to wait for
1947 * Return Value:        0       if successful and bit mask updated with
1948 *                              of events triggerred,
1949 *                      otherwise error code
1950 */
1951static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1952{
1953        unsigned long flags;
1954        int s;
1955        int rc=0;
1956        struct mgsl_icount cprev, cnow;
1957        int events;
1958        int mask;
1959        struct  _input_signal_events oldsigs, newsigs;
1960        DECLARE_WAITQUEUE(wait, current);
1961
1962        COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1963        if (rc)
1964                return  -EFAULT;
1965
1966        if (debug_level >= DEBUG_LEVEL_INFO)
1967                printk("wait_events(%s,%d)\n", info->device_name, mask);
1968
1969        spin_lock_irqsave(&info->lock, flags);
1970
1971        /* return immediately if state matches requested events */
1972        get_signals(info);
1973        s = info->serial_signals;
1974        events = mask &
1975                ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
1976                  ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
1977                  ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
1978                  ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
1979        if (events) {
1980                spin_unlock_irqrestore(&info->lock, flags);
1981                goto exit;
1982        }
1983
1984        /* save current irq counts */
1985        cprev = info->icount;
1986        oldsigs = info->input_signal_events;
1987
1988        if ((info->params.mode == MGSL_MODE_HDLC) &&
1989            (mask & MgslEvent_ExitHuntMode))
1990                irq_enable(info, CHA, IRQ_EXITHUNT);
1991
1992        set_current_state(TASK_INTERRUPTIBLE);
1993        add_wait_queue(&info->event_wait_q, &wait);
1994
1995        spin_unlock_irqrestore(&info->lock, flags);
1996
1997
1998        for(;;) {
1999                schedule();
2000                if (signal_pending(current)) {
2001                        rc = -ERESTARTSYS;
2002                        break;
2003                }
2004
2005                /* get current irq counts */
2006                spin_lock_irqsave(&info->lock, flags);
2007                cnow = info->icount;
2008                newsigs = info->input_signal_events;
2009                set_current_state(TASK_INTERRUPTIBLE);
2010                spin_unlock_irqrestore(&info->lock, flags);
2011
2012                /* if no change, wait aborted for some reason */
2013                if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2014                    newsigs.dsr_down == oldsigs.dsr_down &&
2015                    newsigs.dcd_up   == oldsigs.dcd_up   &&
2016                    newsigs.dcd_down == oldsigs.dcd_down &&
2017                    newsigs.cts_up   == oldsigs.cts_up   &&
2018                    newsigs.cts_down == oldsigs.cts_down &&
2019                    newsigs.ri_up    == oldsigs.ri_up    &&
2020                    newsigs.ri_down  == oldsigs.ri_down  &&
2021                    cnow.exithunt    == cprev.exithunt   &&
2022                    cnow.rxidle      == cprev.rxidle) {
2023                        rc = -EIO;
2024                        break;
2025                }
2026
2027                events = mask &
2028                        ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2029                          (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2030                          (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2031                          (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2032                          (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2033                          (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2034                          (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2035                          (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2036                          (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2037                          (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2038                if (events)
2039                        break;
2040
2041                cprev = cnow;
2042                oldsigs = newsigs;
2043        }
2044
2045        remove_wait_queue(&info->event_wait_q, &wait);
2046        set_current_state(TASK_RUNNING);
2047
2048        if (mask & MgslEvent_ExitHuntMode) {
2049                spin_lock_irqsave(&info->lock, flags);
2050                if (!waitqueue_active(&info->event_wait_q))
2051                        irq_disable(info, CHA, IRQ_EXITHUNT);
2052                spin_unlock_irqrestore(&info->lock, flags);
2053        }
2054exit:
2055        if (rc == 0)
2056                PUT_USER(rc, events, mask_ptr);
2057        return rc;
2058}
2059
2060static int modem_input_wait(MGSLPC_INFO *info,int arg)
2061{
2062        unsigned long flags;
2063        int rc;
2064        struct mgsl_icount cprev, cnow;
2065        DECLARE_WAITQUEUE(wait, current);
2066
2067        /* save current irq counts */
2068        spin_lock_irqsave(&info->lock, flags);
2069        cprev = info->icount;
2070        add_wait_queue(&info->status_event_wait_q, &wait);
2071        set_current_state(TASK_INTERRUPTIBLE);
2072        spin_unlock_irqrestore(&info->lock, flags);
2073
2074        for(;;) {
2075                schedule();
2076                if (signal_pending(current)) {
2077                        rc = -ERESTARTSYS;
2078                        break;
2079                }
2080
2081                /* get new irq counts */
2082                spin_lock_irqsave(&info->lock, flags);
2083                cnow = info->icount;
2084                set_current_state(TASK_INTERRUPTIBLE);
2085                spin_unlock_irqrestore(&info->lock, flags);
2086
2087                /* if no change, wait aborted for some reason */
2088                if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2089                    cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2090                        rc = -EIO;
2091                        break;
2092                }
2093
2094                /* check for change in caller specified modem input */
2095                if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2096                    (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2097                    (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2098                    (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2099                        rc = 0;
2100                        break;
2101                }
2102
2103                cprev = cnow;
2104        }
2105        remove_wait_queue(&info->status_event_wait_q, &wait);
2106        set_current_state(TASK_RUNNING);
2107        return rc;
2108}
2109
2110/* return the state of the serial control and status signals
2111 */
2112static int tiocmget(struct tty_struct *tty)
2113{
2114        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2115        unsigned int result;
2116        unsigned long flags;
2117
2118        spin_lock_irqsave(&info->lock, flags);
2119        get_signals(info);
2120        spin_unlock_irqrestore(&info->lock, flags);
2121
2122        result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2123                ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2124                ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2125                ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2126                ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2127                ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2128
2129        if (debug_level >= DEBUG_LEVEL_INFO)
2130                printk("%s(%d):%s tiocmget() value=%08X\n",
2131                         __FILE__, __LINE__, info->device_name, result);
2132        return result;
2133}
2134
2135/* set modem control signals (DTR/RTS)
2136 */
2137static int tiocmset(struct tty_struct *tty,
2138                    unsigned int set, unsigned int clear)
2139{
2140        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2141        unsigned long flags;
2142
2143        if (debug_level >= DEBUG_LEVEL_INFO)
2144                printk("%s(%d):%s tiocmset(%x,%x)\n",
2145                        __FILE__, __LINE__, info->device_name, set, clear);
2146
2147        if (set & TIOCM_RTS)
2148                info->serial_signals |= SerialSignal_RTS;
2149        if (set & TIOCM_DTR)
2150                info->serial_signals |= SerialSignal_DTR;
2151        if (clear & TIOCM_RTS)
2152                info->serial_signals &= ~SerialSignal_RTS;
2153        if (clear & TIOCM_DTR)
2154                info->serial_signals &= ~SerialSignal_DTR;
2155
2156        spin_lock_irqsave(&info->lock, flags);
2157        set_signals(info);
2158        spin_unlock_irqrestore(&info->lock, flags);
2159
2160        return 0;
2161}
2162
2163/* Set or clear transmit break condition
2164 *
2165 * Arguments:           tty             pointer to tty instance data
2166 *                      break_state     -1=set break condition, 0=clear
2167 */
2168static int mgslpc_break(struct tty_struct *tty, int break_state)
2169{
2170        MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2171        unsigned long flags;
2172
2173        if (debug_level >= DEBUG_LEVEL_INFO)
2174                printk("%s(%d):mgslpc_break(%s,%d)\n",
2175                         __FILE__, __LINE__, info->device_name, break_state);
2176
2177        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2178                return -EINVAL;
2179
2180        spin_lock_irqsave(&info->lock, flags);
2181        if (break_state == -1)
2182                set_reg_bits(info, CHA+DAFO, BIT6);
2183        else
2184                clear_reg_bits(info, CHA+DAFO, BIT6);
2185        spin_unlock_irqrestore(&info->lock, flags);
2186        return 0;
2187}
2188
2189static int mgslpc_get_icount(struct tty_struct *tty,
2190                                struct serial_icounter_struct *icount)
2191{
2192        MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2193        struct mgsl_icount cnow;        /* kernel counter temps */
2194        unsigned long flags;
2195
2196        spin_lock_irqsave(&info->lock, flags);
2197        cnow = info->icount;
2198        spin_unlock_irqrestore(&info->lock, flags);
2199
2200        icount->cts = cnow.cts;
2201        icount->dsr = cnow.dsr;
2202        icount->rng = cnow.rng;
2203        icount->dcd = cnow.dcd;
2204        icount->rx = cnow.rx;
2205        icount->tx = cnow.tx;
2206        icount->frame = cnow.frame;
2207        icount->overrun = cnow.overrun;
2208        icount->parity = cnow.parity;
2209        icount->brk = cnow.brk;
2210        icount->buf_overrun = cnow.buf_overrun;
2211
2212        return 0;
2213}
2214
2215/* Service an IOCTL request
2216 *
2217 * Arguments:
2218 *
2219 *      tty     pointer to tty instance data
2220 *      cmd     IOCTL command code
2221 *      arg     command argument/context
2222 *
2223 * Return Value:        0 if success, otherwise error code
2224 */
2225static int mgslpc_ioctl(struct tty_struct *tty,
2226                        unsigned int cmd, unsigned long arg)
2227{
2228        MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2229        void __user *argp = (void __user *)arg;
2230
2231        if (debug_level >= DEBUG_LEVEL_INFO)
2232                printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__, __LINE__,
2233                        info->device_name, cmd);
2234
2235        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2236                return -ENODEV;
2237
2238        if (cmd != TIOCMIWAIT) {
2239                if (tty_io_error(tty))
2240                    return -EIO;
2241        }
2242
2243        switch (cmd) {
2244        case MGSL_IOCGPARAMS:
2245                return get_params(info, argp);
2246        case MGSL_IOCSPARAMS:
2247                return set_params(info, argp, tty);
2248        case MGSL_IOCGTXIDLE:
2249                return get_txidle(info, argp);
2250        case MGSL_IOCSTXIDLE:
2251                return set_txidle(info, (int)arg);
2252        case MGSL_IOCGIF:
2253                return get_interface(info, argp);
2254        case MGSL_IOCSIF:
2255                return set_interface(info,(int)arg);
2256        case MGSL_IOCTXENABLE:
2257                return set_txenable(info,(int)arg, tty);
2258        case MGSL_IOCRXENABLE:
2259                return set_rxenable(info,(int)arg);
2260        case MGSL_IOCTXABORT:
2261                return tx_abort(info);
2262        case MGSL_IOCGSTATS:
2263                return get_stats(info, argp);
2264        case MGSL_IOCWAITEVENT:
2265                return wait_events(info, argp);
2266        case TIOCMIWAIT:
2267                return modem_input_wait(info,(int)arg);
2268        default:
2269                return -ENOIOCTLCMD;
2270        }
2271        return 0;
2272}
2273
2274/* Set new termios settings
2275 *
2276 * Arguments:
2277 *
2278 *      tty             pointer to tty structure
2279 *      termios         pointer to buffer to hold returned old termios
2280 */
2281static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2282{
2283        MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2284        unsigned long flags;
2285
2286        if (debug_level >= DEBUG_LEVEL_INFO)
2287                printk("%s(%d):mgslpc_set_termios %s\n", __FILE__, __LINE__,
2288                        tty->driver->name);
2289
2290        /* just return if nothing has changed */
2291        if ((tty->termios.c_cflag == old_termios->c_cflag)
2292            && (RELEVANT_IFLAG(tty->termios.c_iflag)
2293                == RELEVANT_IFLAG(old_termios->c_iflag)))
2294          return;
2295
2296        mgslpc_change_params(info, tty);
2297
2298        /* Handle transition to B0 status */
2299        if ((old_termios->c_cflag & CBAUD) && !C_BAUD(tty)) {
2300                info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2301                spin_lock_irqsave(&info->lock, flags);
2302                set_signals(info);
2303                spin_unlock_irqrestore(&info->lock, flags);
2304        }
2305
2306        /* Handle transition away from B0 status */
2307        if (!(old_termios->c_cflag & CBAUD) && C_BAUD(tty)) {
2308                info->serial_signals |= SerialSignal_DTR;
2309                if (!C_CRTSCTS(tty) || !tty_throttled(tty))
2310                        info->serial_signals |= SerialSignal_RTS;
2311                spin_lock_irqsave(&info->lock, flags);
2312                set_signals(info);
2313                spin_unlock_irqrestore(&info->lock, flags);
2314        }
2315
2316        /* Handle turning off CRTSCTS */
2317        if (old_termios->c_cflag & CRTSCTS && !C_CRTSCTS(tty)) {
2318                tty->hw_stopped = 0;
2319                tx_release(tty);
2320        }
2321}
2322
2323static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2324{
2325        MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2326        struct tty_port *port = &info->port;
2327
2328        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2329                return;
2330
2331        if (debug_level >= DEBUG_LEVEL_INFO)
2332                printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2333                         __FILE__, __LINE__, info->device_name, port->count);
2334
2335        if (tty_port_close_start(port, tty, filp) == 0)
2336                goto cleanup;
2337
2338        if (tty_port_initialized(port))
2339                mgslpc_wait_until_sent(tty, info->timeout);
2340
2341        mgslpc_flush_buffer(tty);
2342
2343        tty_ldisc_flush(tty);
2344        shutdown(info, tty);
2345        
2346        tty_port_close_end(port, tty);
2347        tty_port_tty_set(port, NULL);
2348cleanup:
2349        if (debug_level >= DEBUG_LEVEL_INFO)
2350                printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__, __LINE__,
2351                        tty->driver->name, port->count);
2352}
2353
2354/* Wait until the transmitter is empty.
2355 */
2356static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2357{
2358        MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2359        unsigned long orig_jiffies, char_time;
2360
2361        if (!info)
2362                return;
2363
2364        if (debug_level >= DEBUG_LEVEL_INFO)
2365                printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2366                         __FILE__, __LINE__, info->device_name);
2367
2368        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2369                return;
2370
2371        if (!tty_port_initialized(&info->port))
2372                goto exit;
2373
2374        orig_jiffies = jiffies;
2375
2376        /* Set check interval to 1/5 of estimated time to
2377         * send a character, and make it at least 1. The check
2378         * interval should also be less than the timeout.
2379         * Note: use tight timings here to satisfy the NIST-PCTS.
2380         */
2381
2382        if (info->params.data_rate) {
2383                char_time = info->timeout/(32 * 5);
2384                if (!char_time)
2385                        char_time++;
2386        } else
2387                char_time = 1;
2388
2389        if (timeout)
2390                char_time = min_t(unsigned long, char_time, timeout);
2391
2392        if (info->params.mode == MGSL_MODE_HDLC) {
2393                while (info->tx_active) {
2394                        msleep_interruptible(jiffies_to_msecs(char_time));
2395                        if (signal_pending(current))
2396                                break;
2397                        if (timeout && time_after(jiffies, orig_jiffies + timeout))
2398                                break;
2399                }
2400        } else {
2401                while ((info->tx_count || info->tx_active) &&
2402                        info->tx_enabled) {
2403                        msleep_interruptible(jiffies_to_msecs(char_time));
2404                        if (signal_pending(current))
2405                                break;
2406                        if (timeout && time_after(jiffies, orig_jiffies + timeout))
2407                                break;
2408                }
2409        }
2410
2411exit:
2412        if (debug_level >= DEBUG_LEVEL_INFO)
2413                printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2414                         __FILE__, __LINE__, info->device_name);
2415}
2416
2417/* Called by tty_hangup() when a hangup is signaled.
2418 * This is the same as closing all open files for the port.
2419 */
2420static void mgslpc_hangup(struct tty_struct *tty)
2421{
2422        MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2423
2424        if (debug_level >= DEBUG_LEVEL_INFO)
2425                printk("%s(%d):mgslpc_hangup(%s)\n",
2426                         __FILE__, __LINE__, info->device_name);
2427
2428        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2429                return;
2430
2431        mgslpc_flush_buffer(tty);
2432        shutdown(info, tty);
2433        tty_port_hangup(&info->port);
2434}
2435
2436static int carrier_raised(struct tty_port *port)
2437{
2438        MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2439        unsigned long flags;
2440
2441        spin_lock_irqsave(&info->lock, flags);
2442        get_signals(info);
2443        spin_unlock_irqrestore(&info->lock, flags);
2444
2445        if (info->serial_signals & SerialSignal_DCD)
2446                return 1;
2447        return 0;
2448}
2449
2450static void dtr_rts(struct tty_port *port, int onoff)
2451{
2452        MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2453        unsigned long flags;
2454
2455        spin_lock_irqsave(&info->lock, flags);
2456        if (onoff)
2457                info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
2458        else
2459                info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2460        set_signals(info);
2461        spin_unlock_irqrestore(&info->lock, flags);
2462}
2463
2464
2465static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2466{
2467        MGSLPC_INFO     *info;
2468        struct tty_port *port;
2469        int             retval, line;
2470        unsigned long   flags;
2471
2472        /* verify range of specified line number */
2473        line = tty->index;
2474        if (line >= mgslpc_device_count) {
2475                printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2476                        __FILE__, __LINE__, line);
2477                return -ENODEV;
2478        }
2479
2480        /* find the info structure for the specified line */
2481        info = mgslpc_device_list;
2482        while(info && info->line != line)
2483                info = info->next_device;
2484        if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2485                return -ENODEV;
2486
2487        port = &info->port;
2488        tty->driver_data = info;
2489        tty_port_tty_set(port, tty);
2490
2491        if (debug_level >= DEBUG_LEVEL_INFO)
2492                printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2493                         __FILE__, __LINE__, tty->driver->name, port->count);
2494
2495        spin_lock_irqsave(&info->netlock, flags);
2496        if (info->netcount) {
2497                retval = -EBUSY;
2498                spin_unlock_irqrestore(&info->netlock, flags);
2499                goto cleanup;
2500        }
2501        spin_lock(&port->lock);
2502        port->count++;
2503        spin_unlock(&port->lock);
2504        spin_unlock_irqrestore(&info->netlock, flags);
2505
2506        if (port->count == 1) {
2507                /* 1st open on this device, init hardware */
2508                retval = startup(info, tty);
2509                if (retval < 0)
2510                        goto cleanup;
2511        }
2512
2513        retval = tty_port_block_til_ready(&info->port, tty, filp);
2514        if (retval) {
2515                if (debug_level >= DEBUG_LEVEL_INFO)
2516                        printk("%s(%d):block_til_ready(%s) returned %d\n",
2517                                 __FILE__, __LINE__, info->device_name, retval);
2518                goto cleanup;
2519        }
2520
2521        if (debug_level >= DEBUG_LEVEL_INFO)
2522                printk("%s(%d):mgslpc_open(%s) success\n",
2523                         __FILE__, __LINE__, info->device_name);
2524        retval = 0;
2525
2526cleanup:
2527        return retval;
2528}
2529
2530/*
2531 * /proc fs routines....
2532 */
2533
2534static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2535{
2536        char    stat_buf[30];
2537        unsigned long flags;
2538
2539        seq_printf(m, "%s:io:%04X irq:%d",
2540                      info->device_name, info->io_base, info->irq_level);
2541
2542        /* output current serial signal states */
2543        spin_lock_irqsave(&info->lock, flags);
2544        get_signals(info);
2545        spin_unlock_irqrestore(&info->lock, flags);
2546
2547        stat_buf[0] = 0;
2548        stat_buf[1] = 0;
2549        if (info->serial_signals & SerialSignal_RTS)
2550                strcat(stat_buf, "|RTS");
2551        if (info->serial_signals & SerialSignal_CTS)
2552                strcat(stat_buf, "|CTS");
2553        if (info->serial_signals & SerialSignal_DTR)
2554                strcat(stat_buf, "|DTR");
2555        if (info->serial_signals & SerialSignal_DSR)
2556                strcat(stat_buf, "|DSR");
2557        if (info->serial_signals & SerialSignal_DCD)
2558                strcat(stat_buf, "|CD");
2559        if (info->serial_signals & SerialSignal_RI)
2560                strcat(stat_buf, "|RI");
2561
2562        if (info->params.mode == MGSL_MODE_HDLC) {
2563                seq_printf(m, " HDLC txok:%d rxok:%d",
2564                              info->icount.txok, info->icount.rxok);
2565                if (info->icount.txunder)
2566                        seq_printf(m, " txunder:%d", info->icount.txunder);
2567                if (info->icount.txabort)
2568                        seq_printf(m, " txabort:%d", info->icount.txabort);
2569                if (info->icount.rxshort)
2570                        seq_printf(m, " rxshort:%d", info->icount.rxshort);
2571                if (info->icount.rxlong)
2572                        seq_printf(m, " rxlong:%d", info->icount.rxlong);
2573                if (info->icount.rxover)
2574                        seq_printf(m, " rxover:%d", info->icount.rxover);
2575                if (info->icount.rxcrc)
2576                        seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2577        } else {
2578                seq_printf(m, " ASYNC tx:%d rx:%d",
2579                              info->icount.tx, info->icount.rx);
2580                if (info->icount.frame)
2581                        seq_printf(m, " fe:%d", info->icount.frame);
2582                if (info->icount.parity)
2583                        seq_printf(m, " pe:%d", info->icount.parity);
2584                if (info->icount.brk)
2585                        seq_printf(m, " brk:%d", info->icount.brk);
2586                if (info->icount.overrun)
2587                        seq_printf(m, " oe:%d", info->icount.overrun);
2588        }
2589
2590        /* Append serial signal status to end */
2591        seq_printf(m, " %s\n", stat_buf+1);
2592
2593        seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2594                       info->tx_active,info->bh_requested,info->bh_running,
2595                       info->pending_bh);
2596}
2597
2598/* Called to print information about devices
2599 */
2600static int mgslpc_proc_show(struct seq_file *m, void *v)
2601{
2602        MGSLPC_INFO *info;
2603
2604        seq_printf(m, "synclink driver:%s\n", driver_version);
2605
2606        info = mgslpc_device_list;
2607        while (info) {
2608                line_info(m, info);
2609                info = info->next_device;
2610        }
2611        return 0;
2612}
2613
2614static int rx_alloc_buffers(MGSLPC_INFO *info)
2615{
2616        /* each buffer has header and data */
2617        info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2618
2619        /* calculate total allocation size for 8 buffers */
2620        info->rx_buf_total_size = info->rx_buf_size * 8;
2621
2622        /* limit total allocated memory */
2623        if (info->rx_buf_total_size > 0x10000)
2624                info->rx_buf_total_size = 0x10000;
2625
2626        /* calculate number of buffers */
2627        info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2628
2629        info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2630        if (info->rx_buf == NULL)
2631                return -ENOMEM;
2632
2633        /* unused flag buffer to satisfy receive_buf calling interface */
2634        info->flag_buf = kzalloc(info->max_frame_size, GFP_KERNEL);
2635        if (!info->flag_buf) {
2636                kfree(info->rx_buf);
2637                info->rx_buf = NULL;
2638                return -ENOMEM;
2639        }
2640        
2641        rx_reset_buffers(info);
2642        return 0;
2643}
2644
2645static void rx_free_buffers(MGSLPC_INFO *info)
2646{
2647        kfree(info->rx_buf);
2648        info->rx_buf = NULL;
2649        kfree(info->flag_buf);
2650        info->flag_buf = NULL;
2651}
2652
2653static int claim_resources(MGSLPC_INFO *info)
2654{
2655        if (rx_alloc_buffers(info) < 0) {
2656                printk("Can't allocate rx buffer %s\n", info->device_name);
2657                release_resources(info);
2658                return -ENODEV;
2659        }
2660        return 0;
2661}
2662
2663static void release_resources(MGSLPC_INFO *info)
2664{
2665        if (debug_level >= DEBUG_LEVEL_INFO)
2666                printk("release_resources(%s)\n", info->device_name);
2667        rx_free_buffers(info);
2668}
2669
2670/* Add the specified device instance data structure to the
2671 * global linked list of devices and increment the device count.
2672 *
2673 * Arguments:           info    pointer to device instance data
2674 */
2675static int mgslpc_add_device(MGSLPC_INFO *info)
2676{
2677        MGSLPC_INFO *current_dev = NULL;
2678        struct device *tty_dev;
2679        int ret;
2680
2681        info->next_device = NULL;
2682        info->line = mgslpc_device_count;
2683        sprintf(info->device_name,"ttySLP%d",info->line);
2684
2685        if (info->line < MAX_DEVICE_COUNT) {
2686                if (maxframe[info->line])
2687                        info->max_frame_size = maxframe[info->line];
2688        }
2689
2690        mgslpc_device_count++;
2691
2692        if (!mgslpc_device_list)
2693                mgslpc_device_list = info;
2694        else {
2695                current_dev = mgslpc_device_list;
2696                while (current_dev->next_device)
2697                        current_dev = current_dev->next_device;
2698                current_dev->next_device = info;
2699        }
2700
2701        if (info->max_frame_size < 4096)
2702                info->max_frame_size = 4096;
2703        else if (info->max_frame_size > 65535)
2704                info->max_frame_size = 65535;
2705
2706        printk("SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2707                info->device_name, info->io_base, info->irq_level);
2708
2709#if SYNCLINK_GENERIC_HDLC
2710        ret = hdlcdev_init(info);
2711        if (ret != 0)
2712                goto failed;
2713#endif
2714
2715        tty_dev = tty_port_register_device(&info->port, serial_driver, info->line,
2716                        &info->p_dev->dev);
2717        if (IS_ERR(tty_dev)) {
2718                ret = PTR_ERR(tty_dev);
2719#if SYNCLINK_GENERIC_HDLC
2720                hdlcdev_exit(info);
2721#endif
2722                goto failed;
2723        }
2724
2725        return 0;
2726
2727failed:
2728        if (current_dev)
2729                current_dev->next_device = NULL;
2730        else
2731                mgslpc_device_list = NULL;
2732        mgslpc_device_count--;
2733        return ret;
2734}
2735
2736static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2737{
2738        MGSLPC_INFO *info = mgslpc_device_list;
2739        MGSLPC_INFO *last = NULL;
2740
2741        while(info) {
2742                if (info == remove_info) {
2743                        if (last)
2744                                last->next_device = info->next_device;
2745                        else
2746                                mgslpc_device_list = info->next_device;
2747                        tty_unregister_device(serial_driver, info->line);
2748#if SYNCLINK_GENERIC_HDLC
2749                        hdlcdev_exit(info);
2750#endif
2751                        release_resources(info);
2752                        tty_port_destroy(&info->port);
2753                        kfree(info);
2754                        mgslpc_device_count--;
2755                        return;
2756                }
2757                last = info;
2758                info = info->next_device;
2759        }
2760}
2761
2762static const struct pcmcia_device_id mgslpc_ids[] = {
2763        PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2764        PCMCIA_DEVICE_NULL
2765};
2766MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2767
2768static struct pcmcia_driver mgslpc_driver = {
2769        .owner          = THIS_MODULE,
2770        .name           = "synclink_cs",
2771        .probe          = mgslpc_probe,
2772        .remove         = mgslpc_detach,
2773        .id_table       = mgslpc_ids,
2774        .suspend        = mgslpc_suspend,
2775        .resume         = mgslpc_resume,
2776};
2777
2778static const struct tty_operations mgslpc_ops = {
2779        .open = mgslpc_open,
2780        .close = mgslpc_close,
2781        .write = mgslpc_write,
2782        .put_char = mgslpc_put_char,
2783        .flush_chars = mgslpc_flush_chars,
2784        .write_room = mgslpc_write_room,
2785        .chars_in_buffer = mgslpc_chars_in_buffer,
2786        .flush_buffer = mgslpc_flush_buffer,
2787        .ioctl = mgslpc_ioctl,
2788        .throttle = mgslpc_throttle,
2789        .unthrottle = mgslpc_unthrottle,
2790        .send_xchar = mgslpc_send_xchar,
2791        .break_ctl = mgslpc_break,
2792        .wait_until_sent = mgslpc_wait_until_sent,
2793        .set_termios = mgslpc_set_termios,
2794        .stop = tx_pause,
2795        .start = tx_release,
2796        .hangup = mgslpc_hangup,
2797        .tiocmget = tiocmget,
2798        .tiocmset = tiocmset,
2799        .get_icount = mgslpc_get_icount,
2800        .proc_show = mgslpc_proc_show,
2801};
2802
2803static int __init synclink_cs_init(void)
2804{
2805        int rc;
2806
2807        if (break_on_load) {
2808                mgslpc_get_text_ptr();
2809                BREAKPOINT();
2810        }
2811
2812        serial_driver = tty_alloc_driver(MAX_DEVICE_COUNT,
2813                        TTY_DRIVER_REAL_RAW |
2814                        TTY_DRIVER_DYNAMIC_DEV);
2815        if (IS_ERR(serial_driver)) {
2816                rc = PTR_ERR(serial_driver);
2817                goto err;
2818        }
2819
2820        /* Initialize the tty_driver structure */
2821        serial_driver->driver_name = "synclink_cs";
2822        serial_driver->name = "ttySLP";
2823        serial_driver->major = ttymajor;
2824        serial_driver->minor_start = 64;
2825        serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2826        serial_driver->subtype = SERIAL_TYPE_NORMAL;
2827        serial_driver->init_termios = tty_std_termios;
2828        serial_driver->init_termios.c_cflag =
2829        B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2830        tty_set_operations(serial_driver, &mgslpc_ops);
2831
2832        rc = tty_register_driver(serial_driver);
2833        if (rc < 0) {
2834                printk(KERN_ERR "%s(%d):Couldn't register serial driver\n",
2835                                __FILE__, __LINE__);
2836                goto err_put_tty;
2837        }
2838
2839        rc = pcmcia_register_driver(&mgslpc_driver);
2840        if (rc < 0)
2841                goto err_unreg_tty;
2842
2843        printk(KERN_INFO "%s %s, tty major#%d\n", driver_name, driver_version,
2844                        serial_driver->major);
2845
2846        return 0;
2847err_unreg_tty:
2848        tty_unregister_driver(serial_driver);
2849err_put_tty:
2850        put_tty_driver(serial_driver);
2851err:
2852        return rc;
2853}
2854
2855static void __exit synclink_cs_exit(void)
2856{
2857        pcmcia_unregister_driver(&mgslpc_driver);
2858        tty_unregister_driver(serial_driver);
2859        put_tty_driver(serial_driver);
2860}
2861
2862module_init(synclink_cs_init);
2863module_exit(synclink_cs_exit);
2864
2865static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2866{
2867        unsigned int M, N;
2868        unsigned char val;
2869
2870        /* note:standard BRG mode is broken in V3.2 chip
2871         * so enhanced mode is always used
2872         */
2873
2874        if (rate) {
2875                N = 3686400 / rate;
2876                if (!N)
2877                        N = 1;
2878                N >>= 1;
2879                for (M = 1; N > 64 && M < 16; M++)
2880                        N >>= 1;
2881                N--;
2882
2883                /* BGR[5..0] = N
2884                 * BGR[9..6] = M
2885                 * BGR[7..0] contained in BGR register
2886                 * BGR[9..8] contained in CCR2[7..6]
2887                 * divisor = (N+1)*2^M
2888                 *
2889                 * Note: M *must* not be zero (causes asymetric duty cycle)
2890                 */
2891                write_reg(info, (unsigned char) (channel + BGR),
2892                                  (unsigned char) ((M << 6) + N));
2893                val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2894                val |= ((M << 4) & 0xc0);
2895                write_reg(info, (unsigned char) (channel + CCR2), val);
2896        }
2897}
2898
2899/* Enabled the AUX clock output at the specified frequency.
2900 */
2901static void enable_auxclk(MGSLPC_INFO *info)
2902{
2903        unsigned char val;
2904
2905        /* MODE
2906         *
2907         * 07..06  MDS[1..0] 10 = transparent HDLC mode
2908         * 05      ADM Address Mode, 0 = no addr recognition
2909         * 04      TMD Timer Mode, 0 = external
2910         * 03      RAC Receiver Active, 0 = inactive
2911         * 02      RTS 0=RTS active during xmit, 1=RTS always active
2912         * 01      TRS Timer Resolution, 1=512
2913         * 00      TLP Test Loop, 0 = no loop
2914         *
2915         * 1000 0010
2916         */
2917        val = 0x82;
2918
2919        /* channel B RTS is used to enable AUXCLK driver on SP505 */
2920        if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2921                val |= BIT2;
2922        write_reg(info, CHB + MODE, val);
2923
2924        /* CCR0
2925         *
2926         * 07      PU Power Up, 1=active, 0=power down
2927         * 06      MCE Master Clock Enable, 1=enabled
2928         * 05      Reserved, 0
2929         * 04..02  SC[2..0] Encoding
2930         * 01..00  SM[1..0] Serial Mode, 00=HDLC
2931         *
2932         * 11000000
2933         */
2934        write_reg(info, CHB + CCR0, 0xc0);
2935
2936        /* CCR1
2937         *
2938         * 07      SFLG Shared Flag, 0 = disable shared flags
2939         * 06      GALP Go Active On Loop, 0 = not used
2940         * 05      GLP Go On Loop, 0 = not used
2941         * 04      ODS Output Driver Select, 1=TxD is push-pull output
2942         * 03      ITF Interframe Time Fill, 0=mark, 1=flag
2943         * 02..00  CM[2..0] Clock Mode
2944         *
2945         * 0001 0111
2946         */
2947        write_reg(info, CHB + CCR1, 0x17);
2948
2949        /* CCR2 (Channel B)
2950         *
2951         * 07..06  BGR[9..8] Baud rate bits 9..8
2952         * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
2953         * 04      SSEL Clock source select, 1=submode b
2954         * 03      TOE 0=TxCLK is input, 1=TxCLK is output
2955         * 02      RWX Read/Write Exchange 0=disabled
2956         * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
2957         * 00      DIV, data inversion 0=disabled, 1=enabled
2958         *
2959         * 0011 1000
2960         */
2961        if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2962                write_reg(info, CHB + CCR2, 0x38);
2963        else
2964                write_reg(info, CHB + CCR2, 0x30);
2965
2966        /* CCR4
2967         *
2968         * 07      MCK4 Master Clock Divide by 4, 1=enabled
2969         * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
2970         * 05      TST1 Test Pin, 0=normal operation
2971         * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
2972         * 03..02  Reserved, must be 0
2973         * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
2974         *
2975         * 0101 0000
2976         */
2977        write_reg(info, CHB + CCR4, 0x50);
2978
2979        /* if auxclk not enabled, set internal BRG so
2980         * CTS transitions can be detected (requires TxC)
2981         */
2982        if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2983                mgslpc_set_rate(info, CHB, info->params.clock_speed);
2984        else
2985                mgslpc_set_rate(info, CHB, 921600);
2986}
2987
2988static void loopback_enable(MGSLPC_INFO *info)
2989{
2990        unsigned char val;
2991
2992        /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
2993        val = read_reg(info, CHA + CCR1) | (BIT2 | BIT1 | BIT0);
2994        write_reg(info, CHA + CCR1, val);
2995
2996        /* CCR2:04 SSEL Clock source select, 1=submode b */
2997        val = read_reg(info, CHA + CCR2) | (BIT4 | BIT5);
2998        write_reg(info, CHA + CCR2, val);
2999
3000        /* set LinkSpeed if available, otherwise default to 2Mbps */
3001        if (info->params.clock_speed)
3002                mgslpc_set_rate(info, CHA, info->params.clock_speed);
3003        else
3004                mgslpc_set_rate(info, CHA, 1843200);
3005
3006        /* MODE:00 TLP Test Loop, 1=loopback enabled */
3007        val = read_reg(info, CHA + MODE) | BIT0;
3008        write_reg(info, CHA + MODE, val);
3009}
3010
3011static void hdlc_mode(MGSLPC_INFO *info)
3012{
3013        unsigned char val;
3014        unsigned char clkmode, clksubmode;
3015
3016        /* disable all interrupts */
3017        irq_disable(info, CHA, 0xffff);
3018        irq_disable(info, CHB, 0xffff);
3019        port_irq_disable(info, 0xff);
3020
3021        /* assume clock mode 0a, rcv=RxC xmt=TxC */
3022        clkmode = clksubmode = 0;
3023        if (info->params.flags & HDLC_FLAG_RXC_DPLL
3024            && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3025                /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3026                clkmode = 7;
3027        } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3028                 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3029                /* clock mode 7b, rcv = BRG, xmt = BRG */
3030                clkmode = 7;
3031                clksubmode = 1;
3032        } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3033                if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3034                        /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3035                        clkmode = 6;
3036                        clksubmode = 1;
3037                } else {
3038                        /* clock mode 6a, rcv = DPLL, xmt = TxC */
3039                        clkmode = 6;
3040                }
3041        } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3042                /* clock mode 0b, rcv = RxC, xmt = BRG */
3043                clksubmode = 1;
3044        }
3045
3046        /* MODE
3047         *
3048         * 07..06  MDS[1..0] 10 = transparent HDLC mode
3049         * 05      ADM Address Mode, 0 = no addr recognition
3050         * 04      TMD Timer Mode, 0 = external
3051         * 03      RAC Receiver Active, 0 = inactive
3052         * 02      RTS 0=RTS active during xmit, 1=RTS always active
3053         * 01      TRS Timer Resolution, 1=512
3054         * 00      TLP Test Loop, 0 = no loop
3055         *
3056         * 1000 0010
3057         */
3058        val = 0x82;
3059        if (info->params.loopback)
3060                val |= BIT0;
3061
3062        /* preserve RTS state */
3063        if (info->serial_signals & SerialSignal_RTS)
3064                val |= BIT2;
3065        write_reg(info, CHA + MODE, val);
3066
3067        /* CCR0
3068         *
3069         * 07      PU Power Up, 1=active, 0=power down
3070         * 06      MCE Master Clock Enable, 1=enabled
3071         * 05      Reserved, 0
3072         * 04..02  SC[2..0] Encoding
3073         * 01..00  SM[1..0] Serial Mode, 00=HDLC
3074         *
3075         * 11000000
3076         */
3077        val = 0xc0;
3078        switch (info->params.encoding)
3079        {
3080        case HDLC_ENCODING_NRZI:
3081                val |= BIT3;
3082                break;
3083        case HDLC_ENCODING_BIPHASE_SPACE:
3084                val |= BIT4;
3085                break;          // FM0
3086        case HDLC_ENCODING_BIPHASE_MARK:
3087                val |= BIT4 | BIT2;
3088                break;          // FM1
3089        case HDLC_ENCODING_BIPHASE_LEVEL:
3090                val |= BIT4 | BIT3;
3091                break;          // Manchester
3092        }
3093        write_reg(info, CHA + CCR0, val);
3094
3095        /* CCR1
3096         *
3097         * 07      SFLG Shared Flag, 0 = disable shared flags
3098         * 06      GALP Go Active On Loop, 0 = not used
3099         * 05      GLP Go On Loop, 0 = not used
3100         * 04      ODS Output Driver Select, 1=TxD is push-pull output
3101         * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3102         * 02..00  CM[2..0] Clock Mode
3103         *
3104         * 0001 0000
3105         */
3106        val = 0x10 + clkmode;
3107        write_reg(info, CHA + CCR1, val);
3108
3109        /* CCR2
3110         *
3111         * 07..06  BGR[9..8] Baud rate bits 9..8
3112         * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3113         * 04      SSEL Clock source select, 1=submode b
3114         * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3115         * 02      RWX Read/Write Exchange 0=disabled
3116         * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3117         * 00      DIV, data inversion 0=disabled, 1=enabled
3118         *
3119         * 0000 0000
3120         */
3121        val = 0x00;
3122        if (clkmode == 2 || clkmode == 3 || clkmode == 6
3123            || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3124                val |= BIT5;
3125        if (clksubmode)
3126                val |= BIT4;
3127        if (info->params.crc_type == HDLC_CRC_32_CCITT)
3128                val |= BIT1;
3129        if (info->params.encoding == HDLC_ENCODING_NRZB)
3130                val |= BIT0;
3131        write_reg(info, CHA + CCR2, val);
3132
3133        /* CCR3
3134         *
3135         * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3136         * 05      EPT Enable preamble transmission, 1=enabled
3137         * 04      RADD Receive address pushed to FIFO, 0=disabled
3138         * 03      CRL CRC Reset Level, 0=FFFF
3139         * 02      RCRC Rx CRC 0=On 1=Off
3140         * 01      TCRC Tx CRC 0=On 1=Off
3141         * 00      PSD DPLL Phase Shift Disable
3142         *
3143         * 0000 0000
3144         */
3145        val = 0x00;
3146        if (info->params.crc_type == HDLC_CRC_NONE)
3147                val |= BIT2 | BIT1;
3148        if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3149                val |= BIT5;
3150        switch (info->params.preamble_length)
3151        {
3152        case HDLC_PREAMBLE_LENGTH_16BITS:
3153                val |= BIT6;
3154                break;
3155        case HDLC_PREAMBLE_LENGTH_32BITS:
3156                val |= BIT6;
3157                break;
3158        case HDLC_PREAMBLE_LENGTH_64BITS:
3159                val |= BIT7 | BIT6;
3160                break;
3161        }
3162        write_reg(info, CHA + CCR3, val);
3163
3164        /* PRE - Preamble pattern */
3165        val = 0;
3166        switch (info->params.preamble)
3167        {
3168        case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3169        case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3170        case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3171        case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3172        }
3173        write_reg(info, CHA + PRE, val);
3174
3175        /* CCR4
3176         *
3177         * 07      MCK4 Master Clock Divide by 4, 1=enabled
3178         * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3179         * 05      TST1 Test Pin, 0=normal operation
3180         * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3181         * 03..02  Reserved, must be 0
3182         * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3183         *
3184         * 0101 0000
3185         */
3186        val = 0x50;
3187        write_reg(info, CHA + CCR4, val);
3188        if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3189                mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3190        else
3191                mgslpc_set_rate(info, CHA, info->params.clock_speed);
3192
3193        /* RLCR Receive length check register
3194         *
3195         * 7     1=enable receive length check
3196         * 6..0  Max frame length = (RL + 1) * 32
3197         */
3198        write_reg(info, CHA + RLCR, 0);
3199
3200        /* XBCH Transmit Byte Count High
3201         *
3202         * 07      DMA mode, 0 = interrupt driven
3203         * 06      NRM, 0=ABM (ignored)
3204         * 05      CAS Carrier Auto Start
3205         * 04      XC Transmit Continuously (ignored)
3206         * 03..00  XBC[10..8] Transmit byte count bits 10..8
3207         *
3208         * 0000 0000
3209         */
3210        val = 0x00;
3211        if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3212                val |= BIT5;
3213        write_reg(info, CHA + XBCH, val);
3214        enable_auxclk(info);
3215        if (info->params.loopback || info->testing_irq)
3216                loopback_enable(info);
3217        if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3218        {
3219                irq_enable(info, CHB, IRQ_CTS);
3220                /* PVR[3] 1=AUTO CTS active */
3221                set_reg_bits(info, CHA + PVR, BIT3);
3222        } else
3223                clear_reg_bits(info, CHA + PVR, BIT3);
3224
3225        irq_enable(info, CHA,
3226                         IRQ_RXEOM | IRQ_RXFIFO | IRQ_ALLSENT |
3227                         IRQ_UNDERRUN | IRQ_TXFIFO);
3228        issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3229        wait_command_complete(info, CHA);
3230        read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3231
3232        /* Master clock mode enabled above to allow reset commands
3233         * to complete even if no data clocks are present.
3234         *
3235         * Disable master clock mode for normal communications because
3236         * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3237         * IRQ when in master clock mode.
3238         *
3239         * Leave master clock mode enabled for IRQ test because the
3240         * timer IRQ used by the test can only happen in master clock mode.
3241         */
3242        if (!info->testing_irq)
3243                clear_reg_bits(info, CHA + CCR0, BIT6);
3244
3245        tx_set_idle(info);
3246
3247        tx_stop(info);
3248        rx_stop(info);
3249}
3250
3251static void rx_stop(MGSLPC_INFO *info)
3252{
3253        if (debug_level >= DEBUG_LEVEL_ISR)
3254                printk("%s(%d):rx_stop(%s)\n",
3255                         __FILE__, __LINE__, info->device_name);
3256
3257        /* MODE:03 RAC Receiver Active, 0=inactive */
3258        clear_reg_bits(info, CHA + MODE, BIT3);
3259
3260        info->rx_enabled = false;
3261        info->rx_overflow = false;
3262}
3263
3264static void rx_start(MGSLPC_INFO *info)
3265{
3266        if (debug_level >= DEBUG_LEVEL_ISR)
3267                printk("%s(%d):rx_start(%s)\n",
3268                         __FILE__, __LINE__, info->device_name);
3269
3270        rx_reset_buffers(info);
3271        info->rx_enabled = false;
3272        info->rx_overflow = false;
3273
3274        /* MODE:03 RAC Receiver Active, 1=active */
3275        set_reg_bits(info, CHA + MODE, BIT3);
3276
3277        info->rx_enabled = true;
3278}
3279
3280static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3281{
3282        if (debug_level >= DEBUG_LEVEL_ISR)
3283                printk("%s(%d):tx_start(%s)\n",
3284                         __FILE__, __LINE__, info->device_name);
3285
3286        if (info->tx_count) {
3287                /* If auto RTS enabled and RTS is inactive, then assert */
3288                /* RTS and set a flag indicating that the driver should */
3289                /* negate RTS when the transmission completes. */
3290                info->drop_rts_on_tx_done = false;
3291
3292                if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3293                        get_signals(info);
3294                        if (!(info->serial_signals & SerialSignal_RTS)) {
3295                                info->serial_signals |= SerialSignal_RTS;
3296                                set_signals(info);
3297                                info->drop_rts_on_tx_done = true;
3298                        }
3299                }
3300
3301                if (info->params.mode == MGSL_MODE_ASYNC) {
3302                        if (!info->tx_active) {
3303                                info->tx_active = true;
3304                                tx_ready(info, tty);
3305                        }
3306                } else {
3307                        info->tx_active = true;
3308                        tx_ready(info, tty);
3309                        mod_timer(&info->tx_timer, jiffies +
3310                                        msecs_to_jiffies(5000));
3311                }
3312        }
3313
3314        if (!info->tx_enabled)
3315                info->tx_enabled = true;
3316}
3317
3318static void tx_stop(MGSLPC_INFO *info)
3319{
3320        if (debug_level >= DEBUG_LEVEL_ISR)
3321                printk("%s(%d):tx_stop(%s)\n",
3322                         __FILE__, __LINE__, info->device_name);
3323
3324        del_timer(&info->tx_timer);
3325
3326        info->tx_enabled = false;
3327        info->tx_active = false;
3328}
3329
3330/* Reset the adapter to a known state and prepare it for further use.
3331 */
3332static void reset_device(MGSLPC_INFO *info)
3333{
3334        /* power up both channels (set BIT7) */
3335        write_reg(info, CHA + CCR0, 0x80);
3336        write_reg(info, CHB + CCR0, 0x80);
3337        write_reg(info, CHA + MODE, 0);
3338        write_reg(info, CHB + MODE, 0);
3339
3340        /* disable all interrupts */
3341        irq_disable(info, CHA, 0xffff);
3342        irq_disable(info, CHB, 0xffff);
3343        port_irq_disable(info, 0xff);
3344
3345        /* PCR Port Configuration Register
3346         *
3347         * 07..04  DEC[3..0] Serial I/F select outputs
3348         * 03      output, 1=AUTO CTS control enabled
3349         * 02      RI Ring Indicator input 0=active
3350         * 01      DSR input 0=active
3351         * 00      DTR output 0=active
3352         *
3353         * 0000 0110
3354         */
3355        write_reg(info, PCR, 0x06);
3356
3357        /* PVR Port Value Register
3358         *
3359         * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3360         * 03      AUTO CTS output 1=enabled
3361         * 02      RI Ring Indicator input
3362         * 01      DSR input
3363         * 00      DTR output (1=inactive)
3364         *
3365         * 0000 0001
3366         */
3367//      write_reg(info, PVR, PVR_DTR);
3368
3369        /* IPC Interrupt Port Configuration
3370         *
3371         * 07      VIS 1=Masked interrupts visible
3372         * 06..05  Reserved, 0
3373         * 04..03  SLA Slave address, 00 ignored
3374         * 02      CASM Cascading Mode, 1=daisy chain
3375         * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3376         *
3377         * 0000 0101
3378         */
3379        write_reg(info, IPC, 0x05);
3380}
3381
3382static void async_mode(MGSLPC_INFO *info)
3383{
3384        unsigned char val;
3385
3386        /* disable all interrupts */
3387        irq_disable(info, CHA, 0xffff);
3388        irq_disable(info, CHB, 0xffff);
3389        port_irq_disable(info, 0xff);
3390
3391        /* MODE
3392         *
3393         * 07      Reserved, 0
3394         * 06      FRTS RTS State, 0=active
3395         * 05      FCTS Flow Control on CTS
3396         * 04      FLON Flow Control Enable
3397         * 03      RAC Receiver Active, 0 = inactive
3398         * 02      RTS 0=Auto RTS, 1=manual RTS
3399         * 01      TRS Timer Resolution, 1=512
3400         * 00      TLP Test Loop, 0 = no loop
3401         *
3402         * 0000 0110
3403         */
3404        val = 0x06;
3405        if (info->params.loopback)
3406                val |= BIT0;
3407
3408        /* preserve RTS state */
3409        if (!(info->serial_signals & SerialSignal_RTS))
3410                val |= BIT6;
3411        write_reg(info, CHA + MODE, val);
3412
3413        /* CCR0
3414         *
3415         * 07      PU Power Up, 1=active, 0=power down
3416         * 06      MCE Master Clock Enable, 1=enabled
3417         * 05      Reserved, 0
3418         * 04..02  SC[2..0] Encoding, 000=NRZ
3419         * 01..00  SM[1..0] Serial Mode, 11=Async
3420         *
3421         * 1000 0011
3422         */
3423        write_reg(info, CHA + CCR0, 0x83);
3424
3425        /* CCR1
3426         *
3427         * 07..05  Reserved, 0
3428         * 04      ODS Output Driver Select, 1=TxD is push-pull output
3429         * 03      BCR Bit Clock Rate, 1=16x
3430         * 02..00  CM[2..0] Clock Mode, 111=BRG
3431         *
3432         * 0001 1111
3433         */
3434        write_reg(info, CHA + CCR1, 0x1f);
3435
3436        /* CCR2 (channel A)
3437         *
3438         * 07..06  BGR[9..8] Baud rate bits 9..8
3439         * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3440         * 04      SSEL Clock source select, 1=submode b
3441         * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3442         * 02      RWX Read/Write Exchange 0=disabled
3443         * 01      Reserved, 0
3444         * 00      DIV, data inversion 0=disabled, 1=enabled
3445         *
3446         * 0001 0000
3447         */
3448        write_reg(info, CHA + CCR2, 0x10);
3449
3450        /* CCR3
3451         *
3452         * 07..01  Reserved, 0
3453         * 00      PSD DPLL Phase Shift Disable
3454         *
3455         * 0000 0000
3456         */
3457        write_reg(info, CHA + CCR3, 0);
3458
3459        /* CCR4
3460         *
3461         * 07      MCK4 Master Clock Divide by 4, 1=enabled
3462         * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3463         * 05      TST1 Test Pin, 0=normal operation
3464         * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3465         * 03..00  Reserved, must be 0
3466         *
3467         * 0101 0000
3468         */
3469        write_reg(info, CHA + CCR4, 0x50);
3470        mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3471
3472        /* DAFO Data Format
3473         *
3474         * 07      Reserved, 0
3475         * 06      XBRK transmit break, 0=normal operation
3476         * 05      Stop bits (0=1, 1=2)
3477         * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3478         * 02      PAREN Parity Enable
3479         * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3480         *
3481         */
3482        val = 0x00;
3483        if (info->params.data_bits != 8)
3484                val |= BIT0;    /* 7 bits */
3485        if (info->params.stop_bits != 1)
3486                val |= BIT5;
3487        if (info->params.parity != ASYNC_PARITY_NONE)
3488        {
3489                val |= BIT2;    /* Parity enable */
3490                if (info->params.parity == ASYNC_PARITY_ODD)
3491                        val |= BIT3;
3492                else
3493                        val |= BIT4;
3494        }
3495        write_reg(info, CHA + DAFO, val);
3496
3497        /* RFC Rx FIFO Control
3498         *
3499         * 07      Reserved, 0
3500         * 06      DPS, 1=parity bit not stored in data byte
3501         * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3502         * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3503         * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3504         * 01      Reserved, 0
3505         * 00      TCDE Terminate Char Detect Enable, 0=disabled
3506         *
3507         * 0101 1100
3508         */
3509        write_reg(info, CHA + RFC, 0x5c);
3510
3511        /* RLCR Receive length check register
3512         *
3513         * Max frame length = (RL + 1) * 32
3514         */
3515        write_reg(info, CHA + RLCR, 0);
3516
3517        /* XBCH Transmit Byte Count High
3518         *
3519         * 07      DMA mode, 0 = interrupt driven
3520         * 06      NRM, 0=ABM (ignored)
3521         * 05      CAS Carrier Auto Start
3522         * 04      XC Transmit Continuously (ignored)
3523         * 03..00  XBC[10..8] Transmit byte count bits 10..8
3524         *
3525         * 0000 0000
3526         */
3527        val = 0x00;
3528        if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3529                val |= BIT5;
3530        write_reg(info, CHA + XBCH, val);
3531        if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3532                irq_enable(info, CHA, IRQ_CTS);
3533
3534        /* MODE:03 RAC Receiver Active, 1=active */
3535        set_reg_bits(info, CHA + MODE, BIT3);
3536        enable_auxclk(info);
3537        if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3538                irq_enable(info, CHB, IRQ_CTS);
3539                /* PVR[3] 1=AUTO CTS active */
3540                set_reg_bits(info, CHA + PVR, BIT3);
3541        } else
3542                clear_reg_bits(info, CHA + PVR, BIT3);
3543        irq_enable(info, CHA,
3544                          IRQ_RXEOM | IRQ_RXFIFO | IRQ_BREAK_ON | IRQ_RXTIME |
3545                          IRQ_ALLSENT | IRQ_TXFIFO);
3546        issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3547        wait_command_complete(info, CHA);
3548        read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3549}
3550
3551/* Set the HDLC idle mode for the transmitter.
3552 */
3553static void tx_set_idle(MGSLPC_INFO *info)
3554{
3555        /* Note: ESCC2 only supports flags and one idle modes */
3556        if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3557                set_reg_bits(info, CHA + CCR1, BIT3);
3558        else
3559                clear_reg_bits(info, CHA + CCR1, BIT3);
3560}
3561
3562/* get state of the V24 status (input) signals.
3563 */
3564static void get_signals(MGSLPC_INFO *info)
3565{
3566        unsigned char status = 0;
3567
3568        /* preserve RTS and DTR */
3569        info->serial_signals &= SerialSignal_RTS | SerialSignal_DTR;
3570
3571        if (read_reg(info, CHB + VSTR) & BIT7)
3572                info->serial_signals |= SerialSignal_DCD;
3573        if (read_reg(info, CHB + STAR) & BIT1)
3574                info->serial_signals |= SerialSignal_CTS;
3575
3576        status = read_reg(info, CHA + PVR);
3577        if (!(status & PVR_RI))
3578                info->serial_signals |= SerialSignal_RI;
3579        if (!(status & PVR_DSR))
3580                info->serial_signals |= SerialSignal_DSR;
3581}
3582
3583/* Set the state of RTS and DTR based on contents of
3584 * serial_signals member of device extension.
3585 */
3586static void set_signals(MGSLPC_INFO *info)
3587{
3588        unsigned char val;
3589
3590        val = read_reg(info, CHA + MODE);
3591        if (info->params.mode == MGSL_MODE_ASYNC) {
3592                if (info->serial_signals & SerialSignal_RTS)
3593                        val &= ~BIT6;
3594                else
3595                        val |= BIT6;
3596        } else {
3597                if (info->serial_signals & SerialSignal_RTS)
3598                        val |= BIT2;
3599                else
3600                        val &= ~BIT2;
3601        }
3602        write_reg(info, CHA + MODE, val);
3603
3604        if (info->serial_signals & SerialSignal_DTR)
3605                clear_reg_bits(info, CHA + PVR, PVR_DTR);
3606        else
3607                set_reg_bits(info, CHA + PVR, PVR_DTR);
3608}
3609
3610static void rx_reset_buffers(MGSLPC_INFO *info)
3611{
3612        RXBUF *buf;
3613        int i;
3614
3615        info->rx_put = 0;
3616        info->rx_get = 0;
3617        info->rx_frame_count = 0;
3618        for (i=0 ; i < info->rx_buf_count ; i++) {
3619                buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3620                buf->status = buf->count = 0;
3621        }
3622}
3623
3624/* Attempt to return a received HDLC frame
3625 * Only frames received without errors are returned.
3626 *
3627 * Returns true if frame returned, otherwise false
3628 */
3629static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3630{
3631        unsigned short status;
3632        RXBUF *buf;
3633        unsigned int framesize = 0;
3634        unsigned long flags;
3635        bool return_frame = false;
3636
3637        if (info->rx_frame_count == 0)
3638                return false;
3639
3640        buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3641
3642        status = buf->status;
3643
3644        /* 07  VFR  1=valid frame
3645         * 06  RDO  1=data overrun
3646         * 05  CRC  1=OK, 0=error
3647         * 04  RAB  1=frame aborted
3648         */
3649        if ((status & 0xf0) != 0xA0) {
3650                if (!(status & BIT7) || (status & BIT4))
3651                        info->icount.rxabort++;
3652                else if (status & BIT6)
3653                        info->icount.rxover++;
3654                else if (!(status & BIT5)) {
3655                        info->icount.rxcrc++;
3656                        if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3657                                return_frame = true;
3658                }
3659                framesize = 0;
3660#if SYNCLINK_GENERIC_HDLC
3661                {
3662                        info->netdev->stats.rx_errors++;
3663                        info->netdev->stats.rx_frame_errors++;
3664                }
3665#endif
3666        } else
3667                return_frame = true;
3668
3669        if (return_frame)
3670                framesize = buf->count;
3671
3672        if (debug_level >= DEBUG_LEVEL_BH)
3673                printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3674                        __FILE__, __LINE__, info->device_name, status, framesize);
3675
3676        if (debug_level >= DEBUG_LEVEL_DATA)
3677                trace_block(info, buf->data, framesize, 0);
3678
3679        if (framesize) {
3680                if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3681                      framesize+1 > info->max_frame_size) ||
3682                    framesize > info->max_frame_size)
3683                        info->icount.rxlong++;
3684                else {
3685                        if (status & BIT5)
3686                                info->icount.rxok++;
3687
3688                        if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3689                                *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3690                                ++framesize;
3691                        }
3692
3693#if SYNCLINK_GENERIC_HDLC
3694                        if (info->netcount)
3695                                hdlcdev_rx(info, buf->data, framesize);
3696                        else
3697#endif
3698                                ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3699                }
3700        }
3701
3702        spin_lock_irqsave(&info->lock, flags);
3703        buf->status = buf->count = 0;
3704        info->rx_frame_count--;
3705        info->rx_get++;
3706        if (info->rx_get >= info->rx_buf_count)
3707                info->rx_get = 0;
3708        spin_unlock_irqrestore(&info->lock, flags);
3709
3710        return true;
3711}
3712
3713static bool register_test(MGSLPC_INFO *info)
3714{
3715        static unsigned char patterns[] =
3716            { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3717        static unsigned int count = ARRAY_SIZE(patterns);
3718        unsigned int i;
3719        bool rc = true;
3720        unsigned long flags;
3721
3722        spin_lock_irqsave(&info->lock, flags);
3723        reset_device(info);
3724
3725        for (i = 0; i < count; i++) {
3726                write_reg(info, XAD1, patterns[i]);
3727                write_reg(info, XAD2, patterns[(i + 1) % count]);
3728                if ((read_reg(info, XAD1) != patterns[i]) ||
3729                    (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3730                        rc = false;
3731                        break;
3732                }
3733        }
3734
3735        spin_unlock_irqrestore(&info->lock, flags);
3736        return rc;
3737}
3738
3739static bool irq_test(MGSLPC_INFO *info)
3740{
3741        unsigned long end_time;
3742        unsigned long flags;
3743
3744        spin_lock_irqsave(&info->lock, flags);
3745        reset_device(info);
3746
3747        info->testing_irq = true;
3748        hdlc_mode(info);
3749
3750        info->irq_occurred = false;
3751
3752        /* init hdlc mode */
3753
3754        irq_enable(info, CHA, IRQ_TIMER);
3755        write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3756        issue_command(info, CHA, CMD_START_TIMER);
3757
3758        spin_unlock_irqrestore(&info->lock, flags);
3759
3760        end_time=100;
3761        while(end_time-- && !info->irq_occurred) {
3762                msleep_interruptible(10);
3763        }
3764
3765        info->testing_irq = false;
3766
3767        spin_lock_irqsave(&info->lock, flags);
3768        reset_device(info);
3769        spin_unlock_irqrestore(&info->lock, flags);
3770
3771        return info->irq_occurred;
3772}
3773
3774static int adapter_test(MGSLPC_INFO *info)
3775{
3776        if (!register_test(info)) {
3777                info->init_error = DiagStatus_AddressFailure;
3778                printk("%s(%d):Register test failure for device %s Addr=%04X\n",
3779                        __FILE__, __LINE__, info->device_name, (unsigned short)(info->io_base));
3780                return -ENODEV;
3781        }
3782
3783        if (!irq_test(info)) {
3784                info->init_error = DiagStatus_IrqFailure;
3785                printk("%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3786                        __FILE__, __LINE__, info->device_name, (unsigned short)(info->irq_level));
3787                return -ENODEV;
3788        }
3789
3790        if (debug_level >= DEBUG_LEVEL_INFO)
3791                printk("%s(%d):device %s passed diagnostics\n",
3792                        __FILE__, __LINE__, info->device_name);
3793        return 0;
3794}
3795
3796static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3797{
3798        int i;
3799        int linecount;
3800        if (xmit)
3801                printk("%s tx data:\n", info->device_name);
3802        else
3803                printk("%s rx data:\n", info->device_name);
3804
3805        while(count) {
3806                if (count > 16)
3807                        linecount = 16;
3808                else
3809                        linecount = count;
3810
3811                for(i=0;i<linecount;i++)
3812                        printk("%02X ", (unsigned char)data[i]);
3813                for(;i<17;i++)
3814                        printk("   ");
3815                for(i=0;i<linecount;i++) {
3816                        if (data[i]>=040 && data[i]<=0176)
3817                                printk("%c", data[i]);
3818                        else
3819                                printk(".");
3820                }
3821                printk("\n");
3822
3823                data  += linecount;
3824                count -= linecount;
3825        }
3826}
3827
3828/* HDLC frame time out
3829 * update stats and do tx completion processing
3830 */
3831static void tx_timeout(struct timer_list *t)
3832{
3833        MGSLPC_INFO *info = from_timer(info, t, tx_timer);
3834        unsigned long flags;
3835
3836        if (debug_level >= DEBUG_LEVEL_INFO)
3837                printk("%s(%d):tx_timeout(%s)\n",
3838                        __FILE__, __LINE__, info->device_name);
3839        if (info->tx_active &&
3840            info->params.mode == MGSL_MODE_HDLC) {
3841                info->icount.txtimeout++;
3842        }
3843        spin_lock_irqsave(&info->lock, flags);
3844        info->tx_active = false;
3845        info->tx_count = info->tx_put = info->tx_get = 0;
3846
3847        spin_unlock_irqrestore(&info->lock, flags);
3848
3849#if SYNCLINK_GENERIC_HDLC
3850        if (info->netcount)
3851                hdlcdev_tx_done(info);
3852        else
3853#endif
3854        {
3855                struct tty_struct *tty = tty_port_tty_get(&info->port);
3856                bh_transmit(info, tty);
3857                tty_kref_put(tty);
3858        }
3859}
3860
3861#if SYNCLINK_GENERIC_HDLC
3862
3863/**
3864 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3865 * set encoding and frame check sequence (FCS) options
3866 *
3867 * dev       pointer to network device structure
3868 * encoding  serial encoding setting
3869 * parity    FCS setting
3870 *
3871 * returns 0 if success, otherwise error code
3872 */
3873static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3874                          unsigned short parity)
3875{
3876        MGSLPC_INFO *info = dev_to_port(dev);
3877        struct tty_struct *tty;
3878        unsigned char  new_encoding;
3879        unsigned short new_crctype;
3880
3881        /* return error if TTY interface open */
3882        if (info->port.count)
3883                return -EBUSY;
3884
3885        switch (encoding)
3886        {
3887        case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
3888        case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3889        case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3890        case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3891        case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3892        default: return -EINVAL;
3893        }
3894
3895        switch (parity)
3896        {
3897        case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
3898        case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3899        case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3900        default: return -EINVAL;
3901        }
3902
3903        info->params.encoding = new_encoding;
3904        info->params.crc_type = new_crctype;
3905
3906        /* if network interface up, reprogram hardware */
3907        if (info->netcount) {
3908                tty = tty_port_tty_get(&info->port);
3909                mgslpc_program_hw(info, tty);
3910                tty_kref_put(tty);
3911        }
3912
3913        return 0;
3914}
3915
3916/**
3917 * called by generic HDLC layer to send frame
3918 *
3919 * skb  socket buffer containing HDLC frame
3920 * dev  pointer to network device structure
3921 */
3922static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3923                                      struct net_device *dev)
3924{
3925        MGSLPC_INFO *info = dev_to_port(dev);
3926        unsigned long flags;
3927
3928        if (debug_level >= DEBUG_LEVEL_INFO)
3929                printk(KERN_INFO "%s:hdlc_xmit(%s)\n", __FILE__, dev->name);
3930
3931        /* stop sending until this frame completes */
3932        netif_stop_queue(dev);
3933
3934        /* copy data to device buffers */
3935        skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3936        info->tx_get = 0;
3937        info->tx_put = info->tx_count = skb->len;
3938
3939        /* update network statistics */
3940        dev->stats.tx_packets++;
3941        dev->stats.tx_bytes += skb->len;
3942
3943        /* done with socket buffer, so free it */
3944        dev_kfree_skb(skb);
3945
3946        /* save start time for transmit timeout detection */
3947        netif_trans_update(dev);
3948
3949        /* start hardware transmitter if necessary */
3950        spin_lock_irqsave(&info->lock, flags);
3951        if (!info->tx_active) {
3952                struct tty_struct *tty = tty_port_tty_get(&info->port);
3953                tx_start(info, tty);
3954                tty_kref_put(tty);
3955        }
3956        spin_unlock_irqrestore(&info->lock, flags);
3957
3958        return NETDEV_TX_OK;
3959}
3960
3961/**
3962 * called by network layer when interface enabled
3963 * claim resources and initialize hardware
3964 *
3965 * dev  pointer to network device structure
3966 *
3967 * returns 0 if success, otherwise error code
3968 */
3969static int hdlcdev_open(struct net_device *dev)
3970{
3971        MGSLPC_INFO *info = dev_to_port(dev);
3972        struct tty_struct *tty;
3973        int rc;
3974        unsigned long flags;
3975
3976        if (debug_level >= DEBUG_LEVEL_INFO)
3977                printk("%s:hdlcdev_open(%s)\n", __FILE__, dev->name);
3978
3979        /* generic HDLC layer open processing */
3980        rc = hdlc_open(dev);
3981        if (rc != 0)
3982                return rc;
3983
3984        /* arbitrate between network and tty opens */
3985        spin_lock_irqsave(&info->netlock, flags);
3986        if (info->port.count != 0 || info->netcount != 0) {
3987                printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
3988                spin_unlock_irqrestore(&info->netlock, flags);
3989                return -EBUSY;
3990        }
3991        info->netcount=1;
3992        spin_unlock_irqrestore(&info->netlock, flags);
3993
3994        tty = tty_port_tty_get(&info->port);
3995        /* claim resources and init adapter */
3996        rc = startup(info, tty);
3997        if (rc != 0) {
3998                tty_kref_put(tty);
3999                spin_lock_irqsave(&info->netlock, flags);
4000                info->netcount=0;
4001                spin_unlock_irqrestore(&info->netlock, flags);
4002                return rc;
4003        }
4004        /* assert RTS and DTR, apply hardware settings */
4005        info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
4006        mgslpc_program_hw(info, tty);
4007        tty_kref_put(tty);
4008
4009        /* enable network layer transmit */
4010        netif_trans_update(dev);
4011        netif_start_queue(dev);
4012
4013        /* inform generic HDLC layer of current DCD status */
4014        spin_lock_irqsave(&info->lock, flags);
4015        get_signals(info);
4016        spin_unlock_irqrestore(&info->lock, flags);
4017        if (info->serial_signals & SerialSignal_DCD)
4018                netif_carrier_on(dev);
4019        else
4020                netif_carrier_off(dev);
4021        return 0;
4022}
4023
4024/**
4025 * called by network layer when interface is disabled
4026 * shutdown hardware and release resources
4027 *
4028 * dev  pointer to network device structure
4029 *
4030 * returns 0 if success, otherwise error code
4031 */
4032static int hdlcdev_close(struct net_device *dev)
4033{
4034        MGSLPC_INFO *info = dev_to_port(dev);
4035        struct tty_struct *tty = tty_port_tty_get(&info->port);
4036        unsigned long flags;
4037
4038        if (debug_level >= DEBUG_LEVEL_INFO)
4039                printk("%s:hdlcdev_close(%s)\n", __FILE__, dev->name);
4040
4041        netif_stop_queue(dev);
4042
4043        /* shutdown adapter and release resources */
4044        shutdown(info, tty);
4045        tty_kref_put(tty);
4046        hdlc_close(dev);
4047
4048        spin_lock_irqsave(&info->netlock, flags);
4049        info->netcount=0;
4050        spin_unlock_irqrestore(&info->netlock, flags);
4051
4052        return 0;
4053}
4054
4055/**
4056 * called by network layer to process IOCTL call to network device
4057 *
4058 * dev  pointer to network device structure
4059 * ifr  pointer to network interface request structure
4060 * cmd  IOCTL command code
4061 *
4062 * returns 0 if success, otherwise error code
4063 */
4064static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4065{
4066        const size_t size = sizeof(sync_serial_settings);
4067        sync_serial_settings new_line;
4068        sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4069        MGSLPC_INFO *info = dev_to_port(dev);
4070        unsigned int flags;
4071
4072        if (debug_level >= DEBUG_LEVEL_INFO)
4073                printk("%s:hdlcdev_ioctl(%s)\n", __FILE__, dev->name);
4074
4075        /* return error if TTY interface open */
4076        if (info->port.count)
4077                return -EBUSY;
4078
4079        if (cmd != SIOCWANDEV)
4080                return hdlc_ioctl(dev, ifr, cmd);
4081
4082        memset(&new_line, 0, size);
4083
4084        switch(ifr->ifr_settings.type) {
4085        case IF_GET_IFACE: /* return current sync_serial_settings */
4086
4087                ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4088                if (ifr->ifr_settings.size < size) {
4089                        ifr->ifr_settings.size = size; /* data size wanted */
4090                        return -ENOBUFS;
4091                }
4092
4093                flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4094                                              HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4095                                              HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4096                                              HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4097
4098                switch (flags){
4099                case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4100                case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4101                case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4102                case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4103                default: new_line.clock_type = CLOCK_DEFAULT;
4104                }
4105
4106                new_line.clock_rate = info->params.clock_speed;
4107                new_line.loopback   = info->params.loopback ? 1:0;
4108
4109                if (copy_to_user(line, &new_line, size))
4110                        return -EFAULT;
4111                return 0;
4112
4113        case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4114
4115                if(!capable(CAP_NET_ADMIN))
4116                        return -EPERM;
4117                if (copy_from_user(&new_line, line, size))
4118                        return -EFAULT;
4119
4120                switch (new_line.clock_type)
4121                {
4122                case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4123                case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4124                case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4125                case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4126                case CLOCK_DEFAULT:  flags = info->params.flags &
4127                                             (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4128                                              HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4129                                              HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4130                                              HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4131                default: return -EINVAL;
4132                }
4133
4134                if (new_line.loopback != 0 && new_line.loopback != 1)
4135                        return -EINVAL;
4136
4137                info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4138                                        HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4139                                        HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4140                                        HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4141                info->params.flags |= flags;
4142
4143                info->params.loopback = new_line.loopback;
4144
4145                if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4146                        info->params.clock_speed = new_line.clock_rate;
4147                else
4148                        info->params.clock_speed = 0;
4149
4150                /* if network interface up, reprogram hardware */
4151                if (info->netcount) {
4152                        struct tty_struct *tty = tty_port_tty_get(&info->port);
4153                        mgslpc_program_hw(info, tty);
4154                        tty_kref_put(tty);
4155                }
4156                return 0;
4157
4158        default:
4159                return hdlc_ioctl(dev, ifr, cmd);
4160        }
4161}
4162
4163/**
4164 * called by network layer when transmit timeout is detected
4165 *
4166 * dev  pointer to network device structure
4167 */
4168static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue)
4169{
4170        MGSLPC_INFO *info = dev_to_port(dev);
4171        unsigned long flags;
4172
4173        if (debug_level >= DEBUG_LEVEL_INFO)
4174                printk("hdlcdev_tx_timeout(%s)\n", dev->name);
4175
4176        dev->stats.tx_errors++;
4177        dev->stats.tx_aborted_errors++;
4178
4179        spin_lock_irqsave(&info->lock, flags);
4180        tx_stop(info);
4181        spin_unlock_irqrestore(&info->lock, flags);
4182
4183        netif_wake_queue(dev);
4184}
4185
4186/**
4187 * called by device driver when transmit completes
4188 * reenable network layer transmit if stopped
4189 *
4190 * info  pointer to device instance information
4191 */
4192static void hdlcdev_tx_done(MGSLPC_INFO *info)
4193{
4194        if (netif_queue_stopped(info->netdev))
4195                netif_wake_queue(info->netdev);
4196}
4197
4198/**
4199 * called by device driver when frame received
4200 * pass frame to network layer
4201 *
4202 * info  pointer to device instance information
4203 * buf   pointer to buffer contianing frame data
4204 * size  count of data bytes in buf
4205 */
4206static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4207{
4208        struct sk_buff *skb = dev_alloc_skb(size);
4209        struct net_device *dev = info->netdev;
4210
4211        if (debug_level >= DEBUG_LEVEL_INFO)
4212                printk("hdlcdev_rx(%s)\n", dev->name);
4213
4214        if (skb == NULL) {
4215                printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4216                dev->stats.rx_dropped++;
4217                return;
4218        }
4219
4220        skb_put_data(skb, buf, size);
4221
4222        skb->protocol = hdlc_type_trans(skb, dev);
4223
4224        dev->stats.rx_packets++;
4225        dev->stats.rx_bytes += size;
4226
4227        netif_rx(skb);
4228}
4229
4230static const struct net_device_ops hdlcdev_ops = {
4231        .ndo_open       = hdlcdev_open,
4232        .ndo_stop       = hdlcdev_close,
4233        .ndo_start_xmit = hdlc_start_xmit,
4234        .ndo_do_ioctl   = hdlcdev_ioctl,
4235        .ndo_tx_timeout = hdlcdev_tx_timeout,
4236};
4237
4238/**
4239 * called by device driver when adding device instance
4240 * do generic HDLC initialization
4241 *
4242 * info  pointer to device instance information
4243 *
4244 * returns 0 if success, otherwise error code
4245 */
4246static int hdlcdev_init(MGSLPC_INFO *info)
4247{
4248        int rc;
4249        struct net_device *dev;
4250        hdlc_device *hdlc;
4251
4252        /* allocate and initialize network and HDLC layer objects */
4253
4254        dev = alloc_hdlcdev(info);
4255        if (dev == NULL) {
4256                printk(KERN_ERR "%s:hdlc device allocation failure\n", __FILE__);
4257                return -ENOMEM;
4258        }
4259
4260        /* for network layer reporting purposes only */
4261        dev->base_addr = info->io_base;
4262        dev->irq       = info->irq_level;
4263
4264        /* network layer callbacks and settings */
4265        dev->netdev_ops     = &hdlcdev_ops;
4266        dev->watchdog_timeo = 10 * HZ;
4267        dev->tx_queue_len   = 50;
4268
4269        /* generic HDLC layer callbacks and settings */
4270        hdlc         = dev_to_hdlc(dev);
4271        hdlc->attach = hdlcdev_attach;
4272        hdlc->xmit   = hdlcdev_xmit;
4273
4274        /* register objects with HDLC layer */
4275        rc = register_hdlc_device(dev);
4276        if (rc) {
4277                printk(KERN_WARNING "%s:unable to register hdlc device\n", __FILE__);
4278                free_netdev(dev);
4279                return rc;
4280        }
4281
4282        info->netdev = dev;
4283        return 0;
4284}
4285
4286/**
4287 * called by device driver when removing device instance
4288 * do generic HDLC cleanup
4289 *
4290 * info  pointer to device instance information
4291 */
4292static void hdlcdev_exit(MGSLPC_INFO *info)
4293{
4294        unregister_hdlc_device(info->netdev);
4295        free_netdev(info->netdev);
4296        info->netdev = NULL;
4297}
4298
4299#endif /* CONFIG_HDLC */
4300
4301