linux/drivers/crypto/omap-des.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Support for OMAP DES and Triple DES HW acceleration.
   4 *
   5 * Copyright (c) 2013 Texas Instruments Incorporated
   6 * Author: Joel Fernandes <joelf@ti.com>
   7 */
   8
   9#define pr_fmt(fmt) "%s: " fmt, __func__
  10
  11#ifdef DEBUG
  12#define prn(num) printk(#num "=%d\n", num)
  13#define prx(num) printk(#num "=%x\n", num)
  14#else
  15#define prn(num) do { } while (0)
  16#define prx(num)  do { } while (0)
  17#endif
  18
  19#include <linux/err.h>
  20#include <linux/module.h>
  21#include <linux/init.h>
  22#include <linux/errno.h>
  23#include <linux/kernel.h>
  24#include <linux/platform_device.h>
  25#include <linux/scatterlist.h>
  26#include <linux/dma-mapping.h>
  27#include <linux/dmaengine.h>
  28#include <linux/pm_runtime.h>
  29#include <linux/of.h>
  30#include <linux/of_device.h>
  31#include <linux/of_address.h>
  32#include <linux/io.h>
  33#include <linux/crypto.h>
  34#include <linux/interrupt.h>
  35#include <crypto/scatterwalk.h>
  36#include <crypto/internal/des.h>
  37#include <crypto/internal/skcipher.h>
  38#include <crypto/algapi.h>
  39#include <crypto/engine.h>
  40
  41#include "omap-crypto.h"
  42
  43#define DST_MAXBURST                    2
  44
  45#define DES_BLOCK_WORDS         (DES_BLOCK_SIZE >> 2)
  46
  47#define _calc_walked(inout) (dd->inout##_walk.offset - dd->inout##_sg->offset)
  48
  49#define DES_REG_KEY(dd, x)              ((dd)->pdata->key_ofs - \
  50                                                ((x ^ 0x01) * 0x04))
  51
  52#define DES_REG_IV(dd, x)               ((dd)->pdata->iv_ofs + ((x) * 0x04))
  53
  54#define DES_REG_CTRL(dd)                ((dd)->pdata->ctrl_ofs)
  55#define DES_REG_CTRL_CBC                BIT(4)
  56#define DES_REG_CTRL_TDES               BIT(3)
  57#define DES_REG_CTRL_DIRECTION          BIT(2)
  58#define DES_REG_CTRL_INPUT_READY        BIT(1)
  59#define DES_REG_CTRL_OUTPUT_READY       BIT(0)
  60
  61#define DES_REG_DATA_N(dd, x)           ((dd)->pdata->data_ofs + ((x) * 0x04))
  62
  63#define DES_REG_REV(dd)                 ((dd)->pdata->rev_ofs)
  64
  65#define DES_REG_MASK(dd)                ((dd)->pdata->mask_ofs)
  66
  67#define DES_REG_LENGTH_N(x)             (0x24 + ((x) * 0x04))
  68
  69#define DES_REG_IRQ_STATUS(dd)         ((dd)->pdata->irq_status_ofs)
  70#define DES_REG_IRQ_ENABLE(dd)         ((dd)->pdata->irq_enable_ofs)
  71#define DES_REG_IRQ_DATA_IN            BIT(1)
  72#define DES_REG_IRQ_DATA_OUT           BIT(2)
  73
  74#define FLAGS_MODE_MASK         0x000f
  75#define FLAGS_ENCRYPT           BIT(0)
  76#define FLAGS_CBC               BIT(1)
  77#define FLAGS_INIT              BIT(4)
  78#define FLAGS_BUSY              BIT(6)
  79
  80#define DEFAULT_AUTOSUSPEND_DELAY       1000
  81
  82#define FLAGS_IN_DATA_ST_SHIFT  8
  83#define FLAGS_OUT_DATA_ST_SHIFT 10
  84
  85struct omap_des_ctx {
  86        struct crypto_engine_ctx enginectx;
  87        struct omap_des_dev *dd;
  88
  89        int             keylen;
  90        __le32          key[(3 * DES_KEY_SIZE) / sizeof(u32)];
  91        unsigned long   flags;
  92};
  93
  94struct omap_des_reqctx {
  95        unsigned long mode;
  96};
  97
  98#define OMAP_DES_QUEUE_LENGTH   1
  99#define OMAP_DES_CACHE_SIZE     0
 100
 101struct omap_des_algs_info {
 102        struct skcipher_alg     *algs_list;
 103        unsigned int            size;
 104        unsigned int            registered;
 105};
 106
 107struct omap_des_pdata {
 108        struct omap_des_algs_info       *algs_info;
 109        unsigned int    algs_info_size;
 110
 111        void            (*trigger)(struct omap_des_dev *dd, int length);
 112
 113        u32             key_ofs;
 114        u32             iv_ofs;
 115        u32             ctrl_ofs;
 116        u32             data_ofs;
 117        u32             rev_ofs;
 118        u32             mask_ofs;
 119        u32             irq_enable_ofs;
 120        u32             irq_status_ofs;
 121
 122        u32             dma_enable_in;
 123        u32             dma_enable_out;
 124        u32             dma_start;
 125
 126        u32             major_mask;
 127        u32             major_shift;
 128        u32             minor_mask;
 129        u32             minor_shift;
 130};
 131
 132struct omap_des_dev {
 133        struct list_head        list;
 134        unsigned long           phys_base;
 135        void __iomem            *io_base;
 136        struct omap_des_ctx     *ctx;
 137        struct device           *dev;
 138        unsigned long           flags;
 139        int                     err;
 140
 141        struct tasklet_struct   done_task;
 142
 143        struct skcipher_request *req;
 144        struct crypto_engine            *engine;
 145        /*
 146         * total is used by PIO mode for book keeping so introduce
 147         * variable total_save as need it to calc page_order
 148         */
 149        size_t                          total;
 150        size_t                          total_save;
 151
 152        struct scatterlist              *in_sg;
 153        struct scatterlist              *out_sg;
 154
 155        /* Buffers for copying for unaligned cases */
 156        struct scatterlist              in_sgl;
 157        struct scatterlist              out_sgl;
 158        struct scatterlist              *orig_out;
 159
 160        struct scatter_walk             in_walk;
 161        struct scatter_walk             out_walk;
 162        struct dma_chan         *dma_lch_in;
 163        struct dma_chan         *dma_lch_out;
 164        int                     in_sg_len;
 165        int                     out_sg_len;
 166        int                     pio_only;
 167        const struct omap_des_pdata     *pdata;
 168};
 169
 170/* keep registered devices data here */
 171static LIST_HEAD(dev_list);
 172static DEFINE_SPINLOCK(list_lock);
 173
 174#ifdef DEBUG
 175#define omap_des_read(dd, offset)                               \
 176        ({                                                              \
 177         int _read_ret;                                          \
 178         _read_ret = __raw_readl(dd->io_base + offset);          \
 179         pr_err("omap_des_read(" #offset "=%#x)= %#x\n",       \
 180                 offset, _read_ret);                            \
 181         _read_ret;                                              \
 182         })
 183#else
 184static inline u32 omap_des_read(struct omap_des_dev *dd, u32 offset)
 185{
 186        return __raw_readl(dd->io_base + offset);
 187}
 188#endif
 189
 190#ifdef DEBUG
 191#define omap_des_write(dd, offset, value)                               \
 192        do {                                                            \
 193                pr_err("omap_des_write(" #offset "=%#x) value=%#x\n", \
 194                                offset, value);                                \
 195                __raw_writel(value, dd->io_base + offset);              \
 196        } while (0)
 197#else
 198static inline void omap_des_write(struct omap_des_dev *dd, u32 offset,
 199                u32 value)
 200{
 201        __raw_writel(value, dd->io_base + offset);
 202}
 203#endif
 204
 205static inline void omap_des_write_mask(struct omap_des_dev *dd, u32 offset,
 206                                        u32 value, u32 mask)
 207{
 208        u32 val;
 209
 210        val = omap_des_read(dd, offset);
 211        val &= ~mask;
 212        val |= value;
 213        omap_des_write(dd, offset, val);
 214}
 215
 216static void omap_des_write_n(struct omap_des_dev *dd, u32 offset,
 217                                        u32 *value, int count)
 218{
 219        for (; count--; value++, offset += 4)
 220                omap_des_write(dd, offset, *value);
 221}
 222
 223static int omap_des_hw_init(struct omap_des_dev *dd)
 224{
 225        int err;
 226
 227        /*
 228         * clocks are enabled when request starts and disabled when finished.
 229         * It may be long delays between requests.
 230         * Device might go to off mode to save power.
 231         */
 232        err = pm_runtime_get_sync(dd->dev);
 233        if (err < 0) {
 234                pm_runtime_put_noidle(dd->dev);
 235                dev_err(dd->dev, "%s: failed to get_sync(%d)\n", __func__, err);
 236                return err;
 237        }
 238
 239        if (!(dd->flags & FLAGS_INIT)) {
 240                dd->flags |= FLAGS_INIT;
 241                dd->err = 0;
 242        }
 243
 244        return 0;
 245}
 246
 247static int omap_des_write_ctrl(struct omap_des_dev *dd)
 248{
 249        unsigned int key32;
 250        int i, err;
 251        u32 val = 0, mask = 0;
 252
 253        err = omap_des_hw_init(dd);
 254        if (err)
 255                return err;
 256
 257        key32 = dd->ctx->keylen / sizeof(u32);
 258
 259        /* it seems a key should always be set even if it has not changed */
 260        for (i = 0; i < key32; i++) {
 261                omap_des_write(dd, DES_REG_KEY(dd, i),
 262                               __le32_to_cpu(dd->ctx->key[i]));
 263        }
 264
 265        if ((dd->flags & FLAGS_CBC) && dd->req->iv)
 266                omap_des_write_n(dd, DES_REG_IV(dd, 0), (void *)dd->req->iv, 2);
 267
 268        if (dd->flags & FLAGS_CBC)
 269                val |= DES_REG_CTRL_CBC;
 270        if (dd->flags & FLAGS_ENCRYPT)
 271                val |= DES_REG_CTRL_DIRECTION;
 272        if (key32 == 6)
 273                val |= DES_REG_CTRL_TDES;
 274
 275        mask |= DES_REG_CTRL_CBC | DES_REG_CTRL_DIRECTION | DES_REG_CTRL_TDES;
 276
 277        omap_des_write_mask(dd, DES_REG_CTRL(dd), val, mask);
 278
 279        return 0;
 280}
 281
 282static void omap_des_dma_trigger_omap4(struct omap_des_dev *dd, int length)
 283{
 284        u32 mask, val;
 285
 286        omap_des_write(dd, DES_REG_LENGTH_N(0), length);
 287
 288        val = dd->pdata->dma_start;
 289
 290        if (dd->dma_lch_out != NULL)
 291                val |= dd->pdata->dma_enable_out;
 292        if (dd->dma_lch_in != NULL)
 293                val |= dd->pdata->dma_enable_in;
 294
 295        mask = dd->pdata->dma_enable_out | dd->pdata->dma_enable_in |
 296               dd->pdata->dma_start;
 297
 298        omap_des_write_mask(dd, DES_REG_MASK(dd), val, mask);
 299}
 300
 301static void omap_des_dma_stop(struct omap_des_dev *dd)
 302{
 303        u32 mask;
 304
 305        mask = dd->pdata->dma_enable_out | dd->pdata->dma_enable_in |
 306               dd->pdata->dma_start;
 307
 308        omap_des_write_mask(dd, DES_REG_MASK(dd), 0, mask);
 309}
 310
 311static struct omap_des_dev *omap_des_find_dev(struct omap_des_ctx *ctx)
 312{
 313        struct omap_des_dev *dd = NULL, *tmp;
 314
 315        spin_lock_bh(&list_lock);
 316        if (!ctx->dd) {
 317                list_for_each_entry(tmp, &dev_list, list) {
 318                        /* FIXME: take fist available des core */
 319                        dd = tmp;
 320                        break;
 321                }
 322                ctx->dd = dd;
 323        } else {
 324                /* already found before */
 325                dd = ctx->dd;
 326        }
 327        spin_unlock_bh(&list_lock);
 328
 329        return dd;
 330}
 331
 332static void omap_des_dma_out_callback(void *data)
 333{
 334        struct omap_des_dev *dd = data;
 335
 336        /* dma_lch_out - completed */
 337        tasklet_schedule(&dd->done_task);
 338}
 339
 340static int omap_des_dma_init(struct omap_des_dev *dd)
 341{
 342        int err;
 343
 344        dd->dma_lch_out = NULL;
 345        dd->dma_lch_in = NULL;
 346
 347        dd->dma_lch_in = dma_request_chan(dd->dev, "rx");
 348        if (IS_ERR(dd->dma_lch_in)) {
 349                dev_err(dd->dev, "Unable to request in DMA channel\n");
 350                return PTR_ERR(dd->dma_lch_in);
 351        }
 352
 353        dd->dma_lch_out = dma_request_chan(dd->dev, "tx");
 354        if (IS_ERR(dd->dma_lch_out)) {
 355                dev_err(dd->dev, "Unable to request out DMA channel\n");
 356                err = PTR_ERR(dd->dma_lch_out);
 357                goto err_dma_out;
 358        }
 359
 360        return 0;
 361
 362err_dma_out:
 363        dma_release_channel(dd->dma_lch_in);
 364
 365        return err;
 366}
 367
 368static void omap_des_dma_cleanup(struct omap_des_dev *dd)
 369{
 370        if (dd->pio_only)
 371                return;
 372
 373        dma_release_channel(dd->dma_lch_out);
 374        dma_release_channel(dd->dma_lch_in);
 375}
 376
 377static int omap_des_crypt_dma(struct crypto_tfm *tfm,
 378                struct scatterlist *in_sg, struct scatterlist *out_sg,
 379                int in_sg_len, int out_sg_len)
 380{
 381        struct omap_des_ctx *ctx = crypto_tfm_ctx(tfm);
 382        struct omap_des_dev *dd = ctx->dd;
 383        struct dma_async_tx_descriptor *tx_in, *tx_out;
 384        struct dma_slave_config cfg;
 385        int ret;
 386
 387        if (dd->pio_only) {
 388                scatterwalk_start(&dd->in_walk, dd->in_sg);
 389                scatterwalk_start(&dd->out_walk, dd->out_sg);
 390
 391                /* Enable DATAIN interrupt and let it take
 392                   care of the rest */
 393                omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x2);
 394                return 0;
 395        }
 396
 397        dma_sync_sg_for_device(dd->dev, dd->in_sg, in_sg_len, DMA_TO_DEVICE);
 398
 399        memset(&cfg, 0, sizeof(cfg));
 400
 401        cfg.src_addr = dd->phys_base + DES_REG_DATA_N(dd, 0);
 402        cfg.dst_addr = dd->phys_base + DES_REG_DATA_N(dd, 0);
 403        cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 404        cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 405        cfg.src_maxburst = DST_MAXBURST;
 406        cfg.dst_maxburst = DST_MAXBURST;
 407
 408        /* IN */
 409        ret = dmaengine_slave_config(dd->dma_lch_in, &cfg);
 410        if (ret) {
 411                dev_err(dd->dev, "can't configure IN dmaengine slave: %d\n",
 412                        ret);
 413                return ret;
 414        }
 415
 416        tx_in = dmaengine_prep_slave_sg(dd->dma_lch_in, in_sg, in_sg_len,
 417                                        DMA_MEM_TO_DEV,
 418                                        DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 419        if (!tx_in) {
 420                dev_err(dd->dev, "IN prep_slave_sg() failed\n");
 421                return -EINVAL;
 422        }
 423
 424        /* No callback necessary */
 425        tx_in->callback_param = dd;
 426
 427        /* OUT */
 428        ret = dmaengine_slave_config(dd->dma_lch_out, &cfg);
 429        if (ret) {
 430                dev_err(dd->dev, "can't configure OUT dmaengine slave: %d\n",
 431                        ret);
 432                return ret;
 433        }
 434
 435        tx_out = dmaengine_prep_slave_sg(dd->dma_lch_out, out_sg, out_sg_len,
 436                                        DMA_DEV_TO_MEM,
 437                                        DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 438        if (!tx_out) {
 439                dev_err(dd->dev, "OUT prep_slave_sg() failed\n");
 440                return -EINVAL;
 441        }
 442
 443        tx_out->callback = omap_des_dma_out_callback;
 444        tx_out->callback_param = dd;
 445
 446        dmaengine_submit(tx_in);
 447        dmaengine_submit(tx_out);
 448
 449        dma_async_issue_pending(dd->dma_lch_in);
 450        dma_async_issue_pending(dd->dma_lch_out);
 451
 452        /* start DMA */
 453        dd->pdata->trigger(dd, dd->total);
 454
 455        return 0;
 456}
 457
 458static int omap_des_crypt_dma_start(struct omap_des_dev *dd)
 459{
 460        struct crypto_tfm *tfm = crypto_skcipher_tfm(
 461                                        crypto_skcipher_reqtfm(dd->req));
 462        int err;
 463
 464        pr_debug("total: %zd\n", dd->total);
 465
 466        if (!dd->pio_only) {
 467                err = dma_map_sg(dd->dev, dd->in_sg, dd->in_sg_len,
 468                                 DMA_TO_DEVICE);
 469                if (!err) {
 470                        dev_err(dd->dev, "dma_map_sg() error\n");
 471                        return -EINVAL;
 472                }
 473
 474                err = dma_map_sg(dd->dev, dd->out_sg, dd->out_sg_len,
 475                                 DMA_FROM_DEVICE);
 476                if (!err) {
 477                        dev_err(dd->dev, "dma_map_sg() error\n");
 478                        return -EINVAL;
 479                }
 480        }
 481
 482        err = omap_des_crypt_dma(tfm, dd->in_sg, dd->out_sg, dd->in_sg_len,
 483                                 dd->out_sg_len);
 484        if (err && !dd->pio_only) {
 485                dma_unmap_sg(dd->dev, dd->in_sg, dd->in_sg_len, DMA_TO_DEVICE);
 486                dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len,
 487                             DMA_FROM_DEVICE);
 488        }
 489
 490        return err;
 491}
 492
 493static void omap_des_finish_req(struct omap_des_dev *dd, int err)
 494{
 495        struct skcipher_request *req = dd->req;
 496
 497        pr_debug("err: %d\n", err);
 498
 499        crypto_finalize_skcipher_request(dd->engine, req, err);
 500
 501        pm_runtime_mark_last_busy(dd->dev);
 502        pm_runtime_put_autosuspend(dd->dev);
 503}
 504
 505static int omap_des_crypt_dma_stop(struct omap_des_dev *dd)
 506{
 507        pr_debug("total: %zd\n", dd->total);
 508
 509        omap_des_dma_stop(dd);
 510
 511        dmaengine_terminate_all(dd->dma_lch_in);
 512        dmaengine_terminate_all(dd->dma_lch_out);
 513
 514        return 0;
 515}
 516
 517static int omap_des_handle_queue(struct omap_des_dev *dd,
 518                                 struct skcipher_request *req)
 519{
 520        if (req)
 521                return crypto_transfer_skcipher_request_to_engine(dd->engine, req);
 522
 523        return 0;
 524}
 525
 526static int omap_des_prepare_req(struct crypto_engine *engine,
 527                                void *areq)
 528{
 529        struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
 530        struct omap_des_ctx *ctx = crypto_skcipher_ctx(
 531                        crypto_skcipher_reqtfm(req));
 532        struct omap_des_dev *dd = omap_des_find_dev(ctx);
 533        struct omap_des_reqctx *rctx;
 534        int ret;
 535        u16 flags;
 536
 537        if (!dd)
 538                return -ENODEV;
 539
 540        /* assign new request to device */
 541        dd->req = req;
 542        dd->total = req->cryptlen;
 543        dd->total_save = req->cryptlen;
 544        dd->in_sg = req->src;
 545        dd->out_sg = req->dst;
 546        dd->orig_out = req->dst;
 547
 548        flags = OMAP_CRYPTO_COPY_DATA;
 549        if (req->src == req->dst)
 550                flags |= OMAP_CRYPTO_FORCE_COPY;
 551
 552        ret = omap_crypto_align_sg(&dd->in_sg, dd->total, DES_BLOCK_SIZE,
 553                                   &dd->in_sgl, flags,
 554                                   FLAGS_IN_DATA_ST_SHIFT, &dd->flags);
 555        if (ret)
 556                return ret;
 557
 558        ret = omap_crypto_align_sg(&dd->out_sg, dd->total, DES_BLOCK_SIZE,
 559                                   &dd->out_sgl, 0,
 560                                   FLAGS_OUT_DATA_ST_SHIFT, &dd->flags);
 561        if (ret)
 562                return ret;
 563
 564        dd->in_sg_len = sg_nents_for_len(dd->in_sg, dd->total);
 565        if (dd->in_sg_len < 0)
 566                return dd->in_sg_len;
 567
 568        dd->out_sg_len = sg_nents_for_len(dd->out_sg, dd->total);
 569        if (dd->out_sg_len < 0)
 570                return dd->out_sg_len;
 571
 572        rctx = skcipher_request_ctx(req);
 573        ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req));
 574        rctx->mode &= FLAGS_MODE_MASK;
 575        dd->flags = (dd->flags & ~FLAGS_MODE_MASK) | rctx->mode;
 576
 577        dd->ctx = ctx;
 578        ctx->dd = dd;
 579
 580        return omap_des_write_ctrl(dd);
 581}
 582
 583static int omap_des_crypt_req(struct crypto_engine *engine,
 584                              void *areq)
 585{
 586        struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
 587        struct omap_des_ctx *ctx = crypto_skcipher_ctx(
 588                        crypto_skcipher_reqtfm(req));
 589        struct omap_des_dev *dd = omap_des_find_dev(ctx);
 590
 591        if (!dd)
 592                return -ENODEV;
 593
 594        return omap_des_crypt_dma_start(dd);
 595}
 596
 597static void omap_des_done_task(unsigned long data)
 598{
 599        struct omap_des_dev *dd = (struct omap_des_dev *)data;
 600        int i;
 601
 602        pr_debug("enter done_task\n");
 603
 604        if (!dd->pio_only) {
 605                dma_sync_sg_for_device(dd->dev, dd->out_sg, dd->out_sg_len,
 606                                       DMA_FROM_DEVICE);
 607                dma_unmap_sg(dd->dev, dd->in_sg, dd->in_sg_len, DMA_TO_DEVICE);
 608                dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len,
 609                             DMA_FROM_DEVICE);
 610                omap_des_crypt_dma_stop(dd);
 611        }
 612
 613        omap_crypto_cleanup(&dd->in_sgl, NULL, 0, dd->total_save,
 614                            FLAGS_IN_DATA_ST_SHIFT, dd->flags);
 615
 616        omap_crypto_cleanup(&dd->out_sgl, dd->orig_out, 0, dd->total_save,
 617                            FLAGS_OUT_DATA_ST_SHIFT, dd->flags);
 618
 619        if ((dd->flags & FLAGS_CBC) && dd->req->iv)
 620                for (i = 0; i < 2; i++)
 621                        ((u32 *)dd->req->iv)[i] =
 622                                omap_des_read(dd, DES_REG_IV(dd, i));
 623
 624        omap_des_finish_req(dd, 0);
 625
 626        pr_debug("exit\n");
 627}
 628
 629static int omap_des_crypt(struct skcipher_request *req, unsigned long mode)
 630{
 631        struct omap_des_ctx *ctx = crypto_skcipher_ctx(
 632                        crypto_skcipher_reqtfm(req));
 633        struct omap_des_reqctx *rctx = skcipher_request_ctx(req);
 634        struct omap_des_dev *dd;
 635
 636        pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->cryptlen,
 637                 !!(mode & FLAGS_ENCRYPT),
 638                 !!(mode & FLAGS_CBC));
 639
 640        if (!req->cryptlen)
 641                return 0;
 642
 643        if (!IS_ALIGNED(req->cryptlen, DES_BLOCK_SIZE))
 644                return -EINVAL;
 645
 646        dd = omap_des_find_dev(ctx);
 647        if (!dd)
 648                return -ENODEV;
 649
 650        rctx->mode = mode;
 651
 652        return omap_des_handle_queue(dd, req);
 653}
 654
 655/* ********************** ALG API ************************************ */
 656
 657static int omap_des_setkey(struct crypto_skcipher *cipher, const u8 *key,
 658                           unsigned int keylen)
 659{
 660        struct omap_des_ctx *ctx = crypto_skcipher_ctx(cipher);
 661        int err;
 662
 663        pr_debug("enter, keylen: %d\n", keylen);
 664
 665        err = verify_skcipher_des_key(cipher, key);
 666        if (err)
 667                return err;
 668
 669        memcpy(ctx->key, key, keylen);
 670        ctx->keylen = keylen;
 671
 672        return 0;
 673}
 674
 675static int omap_des3_setkey(struct crypto_skcipher *cipher, const u8 *key,
 676                            unsigned int keylen)
 677{
 678        struct omap_des_ctx *ctx = crypto_skcipher_ctx(cipher);
 679        int err;
 680
 681        pr_debug("enter, keylen: %d\n", keylen);
 682
 683        err = verify_skcipher_des3_key(cipher, key);
 684        if (err)
 685                return err;
 686
 687        memcpy(ctx->key, key, keylen);
 688        ctx->keylen = keylen;
 689
 690        return 0;
 691}
 692
 693static int omap_des_ecb_encrypt(struct skcipher_request *req)
 694{
 695        return omap_des_crypt(req, FLAGS_ENCRYPT);
 696}
 697
 698static int omap_des_ecb_decrypt(struct skcipher_request *req)
 699{
 700        return omap_des_crypt(req, 0);
 701}
 702
 703static int omap_des_cbc_encrypt(struct skcipher_request *req)
 704{
 705        return omap_des_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC);
 706}
 707
 708static int omap_des_cbc_decrypt(struct skcipher_request *req)
 709{
 710        return omap_des_crypt(req, FLAGS_CBC);
 711}
 712
 713static int omap_des_prepare_req(struct crypto_engine *engine,
 714                                void *areq);
 715static int omap_des_crypt_req(struct crypto_engine *engine,
 716                              void *areq);
 717
 718static int omap_des_init_tfm(struct crypto_skcipher *tfm)
 719{
 720        struct omap_des_ctx *ctx = crypto_skcipher_ctx(tfm);
 721
 722        pr_debug("enter\n");
 723
 724        crypto_skcipher_set_reqsize(tfm, sizeof(struct omap_des_reqctx));
 725
 726        ctx->enginectx.op.prepare_request = omap_des_prepare_req;
 727        ctx->enginectx.op.unprepare_request = NULL;
 728        ctx->enginectx.op.do_one_request = omap_des_crypt_req;
 729
 730        return 0;
 731}
 732
 733/* ********************** ALGS ************************************ */
 734
 735static struct skcipher_alg algs_ecb_cbc[] = {
 736{
 737        .base.cra_name          = "ecb(des)",
 738        .base.cra_driver_name   = "ecb-des-omap",
 739        .base.cra_priority      = 100,
 740        .base.cra_flags         = CRYPTO_ALG_KERN_DRIVER_ONLY |
 741                                  CRYPTO_ALG_ASYNC,
 742        .base.cra_blocksize     = DES_BLOCK_SIZE,
 743        .base.cra_ctxsize       = sizeof(struct omap_des_ctx),
 744        .base.cra_module        = THIS_MODULE,
 745
 746        .min_keysize            = DES_KEY_SIZE,
 747        .max_keysize            = DES_KEY_SIZE,
 748        .setkey                 = omap_des_setkey,
 749        .encrypt                = omap_des_ecb_encrypt,
 750        .decrypt                = omap_des_ecb_decrypt,
 751        .init                   = omap_des_init_tfm,
 752},
 753{
 754        .base.cra_name          = "cbc(des)",
 755        .base.cra_driver_name   = "cbc-des-omap",
 756        .base.cra_priority      = 100,
 757        .base.cra_flags         = CRYPTO_ALG_KERN_DRIVER_ONLY |
 758                                  CRYPTO_ALG_ASYNC,
 759        .base.cra_blocksize     = DES_BLOCK_SIZE,
 760        .base.cra_ctxsize       = sizeof(struct omap_des_ctx),
 761        .base.cra_module        = THIS_MODULE,
 762
 763        .min_keysize            = DES_KEY_SIZE,
 764        .max_keysize            = DES_KEY_SIZE,
 765        .ivsize                 = DES_BLOCK_SIZE,
 766        .setkey                 = omap_des_setkey,
 767        .encrypt                = omap_des_cbc_encrypt,
 768        .decrypt                = omap_des_cbc_decrypt,
 769        .init                   = omap_des_init_tfm,
 770},
 771{
 772        .base.cra_name          = "ecb(des3_ede)",
 773        .base.cra_driver_name   = "ecb-des3-omap",
 774        .base.cra_priority      = 100,
 775        .base.cra_flags         = CRYPTO_ALG_KERN_DRIVER_ONLY |
 776                                  CRYPTO_ALG_ASYNC,
 777        .base.cra_blocksize     = DES3_EDE_BLOCK_SIZE,
 778        .base.cra_ctxsize       = sizeof(struct omap_des_ctx),
 779        .base.cra_module        = THIS_MODULE,
 780
 781        .min_keysize            = DES3_EDE_KEY_SIZE,
 782        .max_keysize            = DES3_EDE_KEY_SIZE,
 783        .setkey                 = omap_des3_setkey,
 784        .encrypt                = omap_des_ecb_encrypt,
 785        .decrypt                = omap_des_ecb_decrypt,
 786        .init                   = omap_des_init_tfm,
 787},
 788{
 789        .base.cra_name          = "cbc(des3_ede)",
 790        .base.cra_driver_name   = "cbc-des3-omap",
 791        .base.cra_priority      = 100,
 792        .base.cra_flags         = CRYPTO_ALG_KERN_DRIVER_ONLY |
 793                                  CRYPTO_ALG_ASYNC,
 794        .base.cra_blocksize     = DES3_EDE_BLOCK_SIZE,
 795        .base.cra_ctxsize       = sizeof(struct omap_des_ctx),
 796        .base.cra_module        = THIS_MODULE,
 797
 798        .min_keysize            = DES3_EDE_KEY_SIZE,
 799        .max_keysize            = DES3_EDE_KEY_SIZE,
 800        .ivsize                 = DES3_EDE_BLOCK_SIZE,
 801        .setkey                 = omap_des3_setkey,
 802        .encrypt                = omap_des_cbc_encrypt,
 803        .decrypt                = omap_des_cbc_decrypt,
 804        .init                   = omap_des_init_tfm,
 805}
 806};
 807
 808static struct omap_des_algs_info omap_des_algs_info_ecb_cbc[] = {
 809        {
 810                .algs_list      = algs_ecb_cbc,
 811                .size           = ARRAY_SIZE(algs_ecb_cbc),
 812        },
 813};
 814
 815#ifdef CONFIG_OF
 816static const struct omap_des_pdata omap_des_pdata_omap4 = {
 817        .algs_info      = omap_des_algs_info_ecb_cbc,
 818        .algs_info_size = ARRAY_SIZE(omap_des_algs_info_ecb_cbc),
 819        .trigger        = omap_des_dma_trigger_omap4,
 820        .key_ofs        = 0x14,
 821        .iv_ofs         = 0x18,
 822        .ctrl_ofs       = 0x20,
 823        .data_ofs       = 0x28,
 824        .rev_ofs        = 0x30,
 825        .mask_ofs       = 0x34,
 826        .irq_status_ofs = 0x3c,
 827        .irq_enable_ofs = 0x40,
 828        .dma_enable_in  = BIT(5),
 829        .dma_enable_out = BIT(6),
 830        .major_mask     = 0x0700,
 831        .major_shift    = 8,
 832        .minor_mask     = 0x003f,
 833        .minor_shift    = 0,
 834};
 835
 836static irqreturn_t omap_des_irq(int irq, void *dev_id)
 837{
 838        struct omap_des_dev *dd = dev_id;
 839        u32 status, i;
 840        u32 *src, *dst;
 841
 842        status = omap_des_read(dd, DES_REG_IRQ_STATUS(dd));
 843        if (status & DES_REG_IRQ_DATA_IN) {
 844                omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x0);
 845
 846                BUG_ON(!dd->in_sg);
 847
 848                BUG_ON(_calc_walked(in) > dd->in_sg->length);
 849
 850                src = sg_virt(dd->in_sg) + _calc_walked(in);
 851
 852                for (i = 0; i < DES_BLOCK_WORDS; i++) {
 853                        omap_des_write(dd, DES_REG_DATA_N(dd, i), *src);
 854
 855                        scatterwalk_advance(&dd->in_walk, 4);
 856                        if (dd->in_sg->length == _calc_walked(in)) {
 857                                dd->in_sg = sg_next(dd->in_sg);
 858                                if (dd->in_sg) {
 859                                        scatterwalk_start(&dd->in_walk,
 860                                                          dd->in_sg);
 861                                        src = sg_virt(dd->in_sg) +
 862                                              _calc_walked(in);
 863                                }
 864                        } else {
 865                                src++;
 866                        }
 867                }
 868
 869                /* Clear IRQ status */
 870                status &= ~DES_REG_IRQ_DATA_IN;
 871                omap_des_write(dd, DES_REG_IRQ_STATUS(dd), status);
 872
 873                /* Enable DATA_OUT interrupt */
 874                omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x4);
 875
 876        } else if (status & DES_REG_IRQ_DATA_OUT) {
 877                omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x0);
 878
 879                BUG_ON(!dd->out_sg);
 880
 881                BUG_ON(_calc_walked(out) > dd->out_sg->length);
 882
 883                dst = sg_virt(dd->out_sg) + _calc_walked(out);
 884
 885                for (i = 0; i < DES_BLOCK_WORDS; i++) {
 886                        *dst = omap_des_read(dd, DES_REG_DATA_N(dd, i));
 887                        scatterwalk_advance(&dd->out_walk, 4);
 888                        if (dd->out_sg->length == _calc_walked(out)) {
 889                                dd->out_sg = sg_next(dd->out_sg);
 890                                if (dd->out_sg) {
 891                                        scatterwalk_start(&dd->out_walk,
 892                                                          dd->out_sg);
 893                                        dst = sg_virt(dd->out_sg) +
 894                                              _calc_walked(out);
 895                                }
 896                        } else {
 897                                dst++;
 898                        }
 899                }
 900
 901                BUG_ON(dd->total < DES_BLOCK_SIZE);
 902
 903                dd->total -= DES_BLOCK_SIZE;
 904
 905                /* Clear IRQ status */
 906                status &= ~DES_REG_IRQ_DATA_OUT;
 907                omap_des_write(dd, DES_REG_IRQ_STATUS(dd), status);
 908
 909                if (!dd->total)
 910                        /* All bytes read! */
 911                        tasklet_schedule(&dd->done_task);
 912                else
 913                        /* Enable DATA_IN interrupt for next block */
 914                        omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x2);
 915        }
 916
 917        return IRQ_HANDLED;
 918}
 919
 920static const struct of_device_id omap_des_of_match[] = {
 921        {
 922                .compatible     = "ti,omap4-des",
 923                .data           = &omap_des_pdata_omap4,
 924        },
 925        {},
 926};
 927MODULE_DEVICE_TABLE(of, omap_des_of_match);
 928
 929static int omap_des_get_of(struct omap_des_dev *dd,
 930                struct platform_device *pdev)
 931{
 932
 933        dd->pdata = of_device_get_match_data(&pdev->dev);
 934        if (!dd->pdata) {
 935                dev_err(&pdev->dev, "no compatible OF match\n");
 936                return -EINVAL;
 937        }
 938
 939        return 0;
 940}
 941#else
 942static int omap_des_get_of(struct omap_des_dev *dd,
 943                struct device *dev)
 944{
 945        return -EINVAL;
 946}
 947#endif
 948
 949static int omap_des_get_pdev(struct omap_des_dev *dd,
 950                struct platform_device *pdev)
 951{
 952        /* non-DT devices get pdata from pdev */
 953        dd->pdata = pdev->dev.platform_data;
 954
 955        return 0;
 956}
 957
 958static int omap_des_probe(struct platform_device *pdev)
 959{
 960        struct device *dev = &pdev->dev;
 961        struct omap_des_dev *dd;
 962        struct skcipher_alg *algp;
 963        struct resource *res;
 964        int err = -ENOMEM, i, j, irq = -1;
 965        u32 reg;
 966
 967        dd = devm_kzalloc(dev, sizeof(struct omap_des_dev), GFP_KERNEL);
 968        if (dd == NULL) {
 969                dev_err(dev, "unable to alloc data struct.\n");
 970                goto err_data;
 971        }
 972        dd->dev = dev;
 973        platform_set_drvdata(pdev, dd);
 974
 975        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 976        if (!res) {
 977                dev_err(dev, "no MEM resource info\n");
 978                goto err_res;
 979        }
 980
 981        err = (dev->of_node) ? omap_des_get_of(dd, pdev) :
 982                               omap_des_get_pdev(dd, pdev);
 983        if (err)
 984                goto err_res;
 985
 986        dd->io_base = devm_ioremap_resource(dev, res);
 987        if (IS_ERR(dd->io_base)) {
 988                err = PTR_ERR(dd->io_base);
 989                goto err_res;
 990        }
 991        dd->phys_base = res->start;
 992
 993        pm_runtime_use_autosuspend(dev);
 994        pm_runtime_set_autosuspend_delay(dev, DEFAULT_AUTOSUSPEND_DELAY);
 995
 996        pm_runtime_enable(dev);
 997        err = pm_runtime_get_sync(dev);
 998        if (err < 0) {
 999                pm_runtime_put_noidle(dev);
1000                dev_err(dd->dev, "%s: failed to get_sync(%d)\n", __func__, err);
1001                goto err_get;
1002        }
1003
1004        omap_des_dma_stop(dd);
1005
1006        reg = omap_des_read(dd, DES_REG_REV(dd));
1007
1008        pm_runtime_put_sync(dev);
1009
1010        dev_info(dev, "OMAP DES hw accel rev: %u.%u\n",
1011                 (reg & dd->pdata->major_mask) >> dd->pdata->major_shift,
1012                 (reg & dd->pdata->minor_mask) >> dd->pdata->minor_shift);
1013
1014        tasklet_init(&dd->done_task, omap_des_done_task, (unsigned long)dd);
1015
1016        err = omap_des_dma_init(dd);
1017        if (err == -EPROBE_DEFER) {
1018                goto err_irq;
1019        } else if (err && DES_REG_IRQ_STATUS(dd) && DES_REG_IRQ_ENABLE(dd)) {
1020                dd->pio_only = 1;
1021
1022                irq = platform_get_irq(pdev, 0);
1023                if (irq < 0) {
1024                        err = irq;
1025                        goto err_irq;
1026                }
1027
1028                err = devm_request_irq(dev, irq, omap_des_irq, 0,
1029                                dev_name(dev), dd);
1030                if (err) {
1031                        dev_err(dev, "Unable to grab omap-des IRQ\n");
1032                        goto err_irq;
1033                }
1034        }
1035
1036
1037        INIT_LIST_HEAD(&dd->list);
1038        spin_lock_bh(&list_lock);
1039        list_add_tail(&dd->list, &dev_list);
1040        spin_unlock_bh(&list_lock);
1041
1042        /* Initialize des crypto engine */
1043        dd->engine = crypto_engine_alloc_init(dev, 1);
1044        if (!dd->engine) {
1045                err = -ENOMEM;
1046                goto err_engine;
1047        }
1048
1049        err = crypto_engine_start(dd->engine);
1050        if (err)
1051                goto err_engine;
1052
1053        for (i = 0; i < dd->pdata->algs_info_size; i++) {
1054                for (j = 0; j < dd->pdata->algs_info[i].size; j++) {
1055                        algp = &dd->pdata->algs_info[i].algs_list[j];
1056
1057                        pr_debug("reg alg: %s\n", algp->base.cra_name);
1058
1059                        err = crypto_register_skcipher(algp);
1060                        if (err)
1061                                goto err_algs;
1062
1063                        dd->pdata->algs_info[i].registered++;
1064                }
1065        }
1066
1067        return 0;
1068
1069err_algs:
1070        for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
1071                for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
1072                        crypto_unregister_skcipher(
1073                                        &dd->pdata->algs_info[i].algs_list[j]);
1074
1075err_engine:
1076        if (dd->engine)
1077                crypto_engine_exit(dd->engine);
1078
1079        omap_des_dma_cleanup(dd);
1080err_irq:
1081        tasklet_kill(&dd->done_task);
1082err_get:
1083        pm_runtime_disable(dev);
1084err_res:
1085        dd = NULL;
1086err_data:
1087        dev_err(dev, "initialization failed.\n");
1088        return err;
1089}
1090
1091static int omap_des_remove(struct platform_device *pdev)
1092{
1093        struct omap_des_dev *dd = platform_get_drvdata(pdev);
1094        int i, j;
1095
1096        if (!dd)
1097                return -ENODEV;
1098
1099        spin_lock_bh(&list_lock);
1100        list_del(&dd->list);
1101        spin_unlock_bh(&list_lock);
1102
1103        for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
1104                for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
1105                        crypto_unregister_skcipher(
1106                                        &dd->pdata->algs_info[i].algs_list[j]);
1107
1108        tasklet_kill(&dd->done_task);
1109        omap_des_dma_cleanup(dd);
1110        pm_runtime_disable(dd->dev);
1111        dd = NULL;
1112
1113        return 0;
1114}
1115
1116#ifdef CONFIG_PM_SLEEP
1117static int omap_des_suspend(struct device *dev)
1118{
1119        pm_runtime_put_sync(dev);
1120        return 0;
1121}
1122
1123static int omap_des_resume(struct device *dev)
1124{
1125        int err;
1126
1127        err = pm_runtime_get_sync(dev);
1128        if (err < 0) {
1129                pm_runtime_put_noidle(dev);
1130                dev_err(dev, "%s: failed to get_sync(%d)\n", __func__, err);
1131                return err;
1132        }
1133        return 0;
1134}
1135#endif
1136
1137static SIMPLE_DEV_PM_OPS(omap_des_pm_ops, omap_des_suspend, omap_des_resume);
1138
1139static struct platform_driver omap_des_driver = {
1140        .probe  = omap_des_probe,
1141        .remove = omap_des_remove,
1142        .driver = {
1143                .name   = "omap-des",
1144                .pm     = &omap_des_pm_ops,
1145                .of_match_table = of_match_ptr(omap_des_of_match),
1146        },
1147};
1148
1149module_platform_driver(omap_des_driver);
1150
1151MODULE_DESCRIPTION("OMAP DES hw acceleration support.");
1152MODULE_LICENSE("GPL v2");
1153MODULE_AUTHOR("Joel Fernandes <joelf@ti.com>");
1154