linux/drivers/scsi/aic94xx/aic94xx_dump.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Aic94xx SAS/SATA driver dump interface.
   4 *
   5 * Copyright (C) 2004 Adaptec, Inc.  All rights reserved.
   6 * Copyright (C) 2004 David Chaw <david_chaw@adaptec.com>
   7 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
   8 *
   9 * 2005/07/14/LT  Complete overhaul of this file.  Update pages, register
  10 * locations, names, etc.  Make use of macros.  Print more information.
  11 * Print all cseq and lseq mip and mdp.
  12 */
  13
  14#include <linux/pci.h>
  15#include "aic94xx.h"
  16#include "aic94xx_reg.h"
  17#include "aic94xx_reg_def.h"
  18#include "aic94xx_sas.h"
  19
  20#include "aic94xx_dump.h"
  21
  22#ifdef ASD_DEBUG
  23
  24#define MD(x)       (1 << (x))
  25#define MODE_COMMON (1 << 31)
  26#define MODE_0_7    (0xFF)
  27
  28static const struct lseq_cio_regs {
  29        char    *name;
  30        u32     offs;
  31        u8      width;
  32        u32     mode;
  33} LSEQmCIOREGS[] = {
  34        {"LmMnSCBPTR",    0x20, 16, MD(0)|MD(1)|MD(2)|MD(3)|MD(4) },
  35        {"LmMnDDBPTR",    0x22, 16, MD(0)|MD(1)|MD(2)|MD(3)|MD(4) },
  36        {"LmREQMBX",      0x30, 32, MODE_COMMON },
  37        {"LmRSPMBX",      0x34, 32, MODE_COMMON },
  38        {"LmMnINT",       0x38, 32, MODE_0_7 },
  39        {"LmMnINTEN",     0x3C, 32, MODE_0_7 },
  40        {"LmXMTPRIMD",    0x40, 32, MODE_COMMON },
  41        {"LmXMTPRIMCS",   0x44,  8, MODE_COMMON },
  42        {"LmCONSTAT",     0x45,  8, MODE_COMMON },
  43        {"LmMnDMAERRS",   0x46,  8, MD(0)|MD(1) },
  44        {"LmMnSGDMAERRS", 0x47,  8, MD(0)|MD(1) },
  45        {"LmMnEXPHDRP",   0x48,  8, MD(0) },
  46        {"LmMnSASAALIGN", 0x48,  8, MD(1) },
  47        {"LmMnMSKHDRP",   0x49,  8, MD(0) },
  48        {"LmMnSTPALIGN",  0x49,  8, MD(1) },
  49        {"LmMnRCVHDRP",   0x4A,  8, MD(0) },
  50        {"LmMnXMTHDRP",   0x4A,  8, MD(1) },
  51        {"LmALIGNMODE",   0x4B,  8, MD(1) },
  52        {"LmMnEXPRCVCNT", 0x4C, 32, MD(0) },
  53        {"LmMnXMTCNT",    0x4C, 32, MD(1) },
  54        {"LmMnCURRTAG",   0x54, 16, MD(0) },
  55        {"LmMnPREVTAG",   0x56, 16, MD(0) },
  56        {"LmMnACKOFS",    0x58,  8, MD(1) },
  57        {"LmMnXFRLVL",    0x59,  8, MD(0)|MD(1) },
  58        {"LmMnSGDMACTL",  0x5A,  8, MD(0)|MD(1) },
  59        {"LmMnSGDMASTAT", 0x5B,  8, MD(0)|MD(1) },
  60        {"LmMnDDMACTL",   0x5C,  8, MD(0)|MD(1) },
  61        {"LmMnDDMASTAT",  0x5D,  8, MD(0)|MD(1) },
  62        {"LmMnDDMAMODE",  0x5E, 16, MD(0)|MD(1) },
  63        {"LmMnPIPECTL",   0x61,  8, MD(0)|MD(1) },
  64        {"LmMnACTSCB",    0x62, 16, MD(0)|MD(1) },
  65        {"LmMnSGBHADR",   0x64,  8, MD(0)|MD(1) },
  66        {"LmMnSGBADR",    0x65,  8, MD(0)|MD(1) },
  67        {"LmMnSGDCNT",    0x66,  8, MD(0)|MD(1) },
  68        {"LmMnSGDMADR",   0x68, 32, MD(0)|MD(1) },
  69        {"LmMnSGDMADR",   0x6C, 32, MD(0)|MD(1) },
  70        {"LmMnXFRCNT",    0x70, 32, MD(0)|MD(1) },
  71        {"LmMnXMTCRC",    0x74, 32, MD(1) },
  72        {"LmCURRTAG",     0x74, 16, MD(0) },
  73        {"LmPREVTAG",     0x76, 16, MD(0) },
  74        {"LmMnDPSEL",     0x7B,  8, MD(0)|MD(1) },
  75        {"LmDPTHSTAT",    0x7C,  8, MODE_COMMON },
  76        {"LmMnHOLDLVL",   0x7D,  8, MD(0) },
  77        {"LmMnSATAFS",    0x7E,  8, MD(1) },
  78        {"LmMnCMPLTSTAT", 0x7F,  8, MD(0)|MD(1) },
  79        {"LmPRMSTAT0",    0x80, 32, MODE_COMMON },
  80        {"LmPRMSTAT1",    0x84, 32, MODE_COMMON },
  81        {"LmGPRMINT",     0x88,  8, MODE_COMMON },
  82        {"LmMnCURRSCB",   0x8A, 16, MD(0) },
  83        {"LmPRMICODE",    0x8C, 32, MODE_COMMON },
  84        {"LmMnRCVCNT",    0x90, 16, MD(0) },
  85        {"LmMnBUFSTAT",   0x92, 16, MD(0) },
  86        {"LmMnXMTHDRSIZE",0x92,  8, MD(1) },
  87        {"LmMnXMTSIZE",   0x93,  8, MD(1) },
  88        {"LmMnTGTXFRCNT", 0x94, 32, MD(0) },
  89        {"LmMnEXPROFS",   0x98, 32, MD(0) },
  90        {"LmMnXMTROFS",   0x98, 32, MD(1) },
  91        {"LmMnRCVROFS",   0x9C, 32, MD(0) },
  92        {"LmCONCTL",      0xA0, 16, MODE_COMMON },
  93        {"LmBITLTIMER",   0xA2, 16, MODE_COMMON },
  94        {"LmWWNLOW",      0xA8, 32, MODE_COMMON },
  95        {"LmWWNHIGH",     0xAC, 32, MODE_COMMON },
  96        {"LmMnFRMERR",    0xB0, 32, MD(0) },
  97        {"LmMnFRMERREN",  0xB4, 32, MD(0) },
  98        {"LmAWTIMER",     0xB8, 16, MODE_COMMON },
  99        {"LmAWTCTL",      0xBA,  8, MODE_COMMON },
 100        {"LmMnHDRCMPS",   0xC0, 32, MD(0) },
 101        {"LmMnXMTSTAT",   0xC4,  8, MD(1) },
 102        {"LmHWTSTATEN",   0xC5,  8, MODE_COMMON },
 103        {"LmMnRRDYRC",    0xC6,  8, MD(0) },
 104        {"LmMnRRDYTC",    0xC6,  8, MD(1) },
 105        {"LmHWTSTAT",     0xC7,  8, MODE_COMMON },
 106        {"LmMnDATABUFADR",0xC8, 16, MD(0)|MD(1) },
 107        {"LmDWSSTATUS",   0xCB,  8, MODE_COMMON },
 108        {"LmMnACTSTAT",   0xCE, 16, MD(0)|MD(1) },
 109        {"LmMnREQSCB",    0xD2, 16, MD(0)|MD(1) },
 110        {"LmXXXPRIM",     0xD4, 32, MODE_COMMON },
 111        {"LmRCVASTAT",    0xD9,  8, MODE_COMMON },
 112        {"LmINTDIS1",     0xDA,  8, MODE_COMMON },
 113        {"LmPSTORESEL",   0xDB,  8, MODE_COMMON },
 114        {"LmPSTORE",      0xDC, 32, MODE_COMMON },
 115        {"LmPRIMSTAT0EN", 0xE0, 32, MODE_COMMON },
 116        {"LmPRIMSTAT1EN", 0xE4, 32, MODE_COMMON },
 117        {"LmDONETCTL",    0xF2, 16, MODE_COMMON },
 118        {NULL, 0, 0, 0 }
 119};
 120/*
 121static struct lseq_cio_regs LSEQmOOBREGS[] = {
 122   {"OOB_BFLTR"        ,0x100, 8, MD(5)},
 123   {"OOB_INIT_MIN"     ,0x102,16, MD(5)},
 124   {"OOB_INIT_MAX"     ,0x104,16, MD(5)},
 125   {"OOB_INIT_NEG"     ,0x106,16, MD(5)},
 126   {"OOB_SAS_MIN"      ,0x108,16, MD(5)},
 127   {"OOB_SAS_MAX"      ,0x10A,16, MD(5)},
 128   {"OOB_SAS_NEG"      ,0x10C,16, MD(5)},
 129   {"OOB_WAKE_MIN"     ,0x10E,16, MD(5)},
 130   {"OOB_WAKE_MAX"     ,0x110,16, MD(5)},
 131   {"OOB_WAKE_NEG"     ,0x112,16, MD(5)},
 132   {"OOB_IDLE_MAX"     ,0x114,16, MD(5)},
 133   {"OOB_BURST_MAX"    ,0x116,16, MD(5)},
 134   {"OOB_XMIT_BURST"   ,0x118, 8, MD(5)},
 135   {"OOB_SEND_PAIRS"   ,0x119, 8, MD(5)},
 136   {"OOB_INIT_IDLE"    ,0x11A, 8, MD(5)},
 137   {"OOB_INIT_NEGO"    ,0x11C, 8, MD(5)},
 138   {"OOB_SAS_IDLE"     ,0x11E, 8, MD(5)},
 139   {"OOB_SAS_NEGO"     ,0x120, 8, MD(5)},
 140   {"OOB_WAKE_IDLE"    ,0x122, 8, MD(5)},
 141   {"OOB_WAKE_NEGO"    ,0x124, 8, MD(5)},
 142   {"OOB_DATA_KBITS"   ,0x126, 8, MD(5)},
 143   {"OOB_BURST_DATA"   ,0x128,32, MD(5)},
 144   {"OOB_ALIGN_0_DATA" ,0x12C,32, MD(5)},
 145   {"OOB_ALIGN_1_DATA" ,0x130,32, MD(5)},
 146   {"OOB_SYNC_DATA"    ,0x134,32, MD(5)},
 147   {"OOB_D10_2_DATA"   ,0x138,32, MD(5)},
 148   {"OOB_PHY_RST_CNT"  ,0x13C,32, MD(5)},
 149   {"OOB_SIG_GEN"      ,0x140, 8, MD(5)},
 150   {"OOB_XMIT"         ,0x141, 8, MD(5)},
 151   {"FUNCTION_MAKS"    ,0x142, 8, MD(5)},
 152   {"OOB_MODE"         ,0x143, 8, MD(5)},
 153   {"CURRENT_STATUS"   ,0x144, 8, MD(5)},
 154   {"SPEED_MASK"       ,0x145, 8, MD(5)},
 155   {"PRIM_COUNT"       ,0x146, 8, MD(5)},
 156   {"OOB_SIGNALS"      ,0x148, 8, MD(5)},
 157   {"OOB_DATA_DET"     ,0x149, 8, MD(5)},
 158   {"OOB_TIME_OUT"     ,0x14C, 8, MD(5)},
 159   {"OOB_TIMER_ENABLE" ,0x14D, 8, MD(5)},
 160   {"OOB_STATUS"       ,0x14E, 8, MD(5)},
 161   {"HOT_PLUG_DELAY"   ,0x150, 8, MD(5)},
 162   {"RCD_DELAY"        ,0x151, 8, MD(5)},
 163   {"COMSAS_TIMER"     ,0x152, 8, MD(5)},
 164   {"SNTT_DELAY"       ,0x153, 8, MD(5)},
 165   {"SPD_CHNG_DELAY"   ,0x154, 8, MD(5)},
 166   {"SNLT_DELAY"       ,0x155, 8, MD(5)},
 167   {"SNWT_DELAY"       ,0x156, 8, MD(5)},
 168   {"ALIGN_DELAY"      ,0x157, 8, MD(5)},
 169   {"INT_ENABLE_0"     ,0x158, 8, MD(5)},
 170   {"INT_ENABLE_1"     ,0x159, 8, MD(5)},
 171   {"INT_ENABLE_2"     ,0x15A, 8, MD(5)},
 172   {"INT_ENABLE_3"     ,0x15B, 8, MD(5)},
 173   {"OOB_TEST_REG"     ,0x15C, 8, MD(5)},
 174   {"PHY_CONTROL_0"    ,0x160, 8, MD(5)},
 175   {"PHY_CONTROL_1"    ,0x161, 8, MD(5)},
 176   {"PHY_CONTROL_2"    ,0x162, 8, MD(5)},
 177   {"PHY_CONTROL_3"    ,0x163, 8, MD(5)},
 178   {"PHY_OOB_CAL_TX"   ,0x164, 8, MD(5)},
 179   {"PHY_OOB_CAL_RX"   ,0x165, 8, MD(5)},
 180   {"OOB_PHY_CAL_TX"   ,0x166, 8, MD(5)},
 181   {"OOB_PHY_CAL_RX"   ,0x167, 8, MD(5)},
 182   {"PHY_CONTROL_4"    ,0x168, 8, MD(5)},
 183   {"PHY_TEST"         ,0x169, 8, MD(5)},
 184   {"PHY_PWR_CTL"      ,0x16A, 8, MD(5)},
 185   {"PHY_PWR_DELAY"    ,0x16B, 8, MD(5)},
 186   {"OOB_SM_CON"       ,0x16C, 8, MD(5)},
 187   {"ADDR_TRAP_1"      ,0x16D, 8, MD(5)},
 188   {"ADDR_NEXT_1"      ,0x16E, 8, MD(5)},
 189   {"NEXT_ST_1"        ,0x16F, 8, MD(5)},
 190   {"OOB_SM_STATE"     ,0x170, 8, MD(5)},
 191   {"ADDR_TRAP_2"      ,0x171, 8, MD(5)},
 192   {"ADDR_NEXT_2"      ,0x172, 8, MD(5)},
 193   {"NEXT_ST_2"        ,0x173, 8, MD(5)},
 194   {NULL, 0, 0, 0 }
 195};
 196*/
 197#define STR_8BIT   "   %30s[0x%04x]:0x%02x\n"
 198#define STR_16BIT  "   %30s[0x%04x]:0x%04x\n"
 199#define STR_32BIT  "   %30s[0x%04x]:0x%08x\n"
 200#define STR_64BIT  "   %30s[0x%04x]:0x%llx\n"
 201
 202#define PRINT_REG_8bit(_ha, _n, _r) asd_printk(STR_8BIT, #_n, _n,      \
 203                                             asd_read_reg_byte(_ha, _r))
 204#define PRINT_REG_16bit(_ha, _n, _r) asd_printk(STR_16BIT, #_n, _n,     \
 205                                              asd_read_reg_word(_ha, _r))
 206#define PRINT_REG_32bit(_ha, _n, _r) asd_printk(STR_32BIT, #_n, _n,      \
 207                                              asd_read_reg_dword(_ha, _r))
 208
 209#define PRINT_CREG_8bit(_ha, _n) asd_printk(STR_8BIT, #_n, _n,      \
 210                                             asd_read_reg_byte(_ha, C##_n))
 211#define PRINT_CREG_16bit(_ha, _n) asd_printk(STR_16BIT, #_n, _n,     \
 212                                              asd_read_reg_word(_ha, C##_n))
 213#define PRINT_CREG_32bit(_ha, _n) asd_printk(STR_32BIT, #_n, _n,      \
 214                                              asd_read_reg_dword(_ha, C##_n))
 215
 216#define MSTR_8BIT   "   Mode:%02d %30s[0x%04x]:0x%02x\n"
 217#define MSTR_16BIT  "   Mode:%02d %30s[0x%04x]:0x%04x\n"
 218#define MSTR_32BIT  "   Mode:%02d %30s[0x%04x]:0x%08x\n"
 219
 220#define PRINT_MREG_8bit(_ha, _m, _n, _r) asd_printk(MSTR_8BIT, _m, #_n, _n,   \
 221                                             asd_read_reg_byte(_ha, _r))
 222#define PRINT_MREG_16bit(_ha, _m, _n, _r) asd_printk(MSTR_16BIT, _m, #_n, _n, \
 223                                              asd_read_reg_word(_ha, _r))
 224#define PRINT_MREG_32bit(_ha, _m, _n, _r) asd_printk(MSTR_32BIT, _m, #_n, _n, \
 225                                              asd_read_reg_dword(_ha, _r))
 226
 227/* can also be used for MD when the register is mode aware already */
 228#define PRINT_MIS_byte(_ha, _n) asd_printk(STR_8BIT, #_n,CSEQ_##_n-CMAPPEDSCR,\
 229                                           asd_read_reg_byte(_ha, CSEQ_##_n))
 230#define PRINT_MIS_word(_ha, _n) asd_printk(STR_16BIT,#_n,CSEQ_##_n-CMAPPEDSCR,\
 231                                           asd_read_reg_word(_ha, CSEQ_##_n))
 232#define PRINT_MIS_dword(_ha, _n)                      \
 233        asd_printk(STR_32BIT,#_n,CSEQ_##_n-CMAPPEDSCR,\
 234                   asd_read_reg_dword(_ha, CSEQ_##_n))
 235#define PRINT_MIS_qword(_ha, _n)                                       \
 236        asd_printk(STR_64BIT, #_n,CSEQ_##_n-CMAPPEDSCR,                \
 237                   (unsigned long long)(((u64)asd_read_reg_dword(_ha, CSEQ_##_n))     \
 238                 | (((u64)asd_read_reg_dword(_ha, (CSEQ_##_n)+4))<<32)))
 239
 240#define CMDP_REG(_n, _m) (_m*(CSEQ_PAGE_SIZE*2)+CSEQ_##_n)
 241#define PRINT_CMDP_word(_ha, _n) \
 242asd_printk("%20s 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n", \
 243        #_n, \
 244        asd_read_reg_word(_ha, CMDP_REG(_n, 0)), \
 245        asd_read_reg_word(_ha, CMDP_REG(_n, 1)), \
 246        asd_read_reg_word(_ha, CMDP_REG(_n, 2)), \
 247        asd_read_reg_word(_ha, CMDP_REG(_n, 3)), \
 248        asd_read_reg_word(_ha, CMDP_REG(_n, 4)), \
 249        asd_read_reg_word(_ha, CMDP_REG(_n, 5)), \
 250        asd_read_reg_word(_ha, CMDP_REG(_n, 6)), \
 251        asd_read_reg_word(_ha, CMDP_REG(_n, 7)))
 252
 253#define PRINT_CMDP_byte(_ha, _n) \
 254asd_printk("%20s 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n", \
 255        #_n, \
 256        asd_read_reg_byte(_ha, CMDP_REG(_n, 0)), \
 257        asd_read_reg_byte(_ha, CMDP_REG(_n, 1)), \
 258        asd_read_reg_byte(_ha, CMDP_REG(_n, 2)), \
 259        asd_read_reg_byte(_ha, CMDP_REG(_n, 3)), \
 260        asd_read_reg_byte(_ha, CMDP_REG(_n, 4)), \
 261        asd_read_reg_byte(_ha, CMDP_REG(_n, 5)), \
 262        asd_read_reg_byte(_ha, CMDP_REG(_n, 6)), \
 263        asd_read_reg_byte(_ha, CMDP_REG(_n, 7)))
 264
 265static void asd_dump_cseq_state(struct asd_ha_struct *asd_ha)
 266{
 267        int mode;
 268
 269        asd_printk("CSEQ STATE\n");
 270
 271        asd_printk("ARP2 REGISTERS\n");
 272
 273        PRINT_CREG_32bit(asd_ha, ARP2CTL);
 274        PRINT_CREG_32bit(asd_ha, ARP2INT);
 275        PRINT_CREG_32bit(asd_ha, ARP2INTEN);
 276        PRINT_CREG_8bit(asd_ha, MODEPTR);
 277        PRINT_CREG_8bit(asd_ha, ALTMODE);
 278        PRINT_CREG_8bit(asd_ha, FLAG);
 279        PRINT_CREG_8bit(asd_ha, ARP2INTCTL);
 280        PRINT_CREG_16bit(asd_ha, STACK);
 281        PRINT_CREG_16bit(asd_ha, PRGMCNT);
 282        PRINT_CREG_16bit(asd_ha, ACCUM);
 283        PRINT_CREG_16bit(asd_ha, SINDEX);
 284        PRINT_CREG_16bit(asd_ha, DINDEX);
 285        PRINT_CREG_8bit(asd_ha, SINDIR);
 286        PRINT_CREG_8bit(asd_ha, DINDIR);
 287        PRINT_CREG_8bit(asd_ha, JUMLDIR);
 288        PRINT_CREG_8bit(asd_ha, ARP2HALTCODE);
 289        PRINT_CREG_16bit(asd_ha, CURRADDR);
 290        PRINT_CREG_16bit(asd_ha, LASTADDR);
 291        PRINT_CREG_16bit(asd_ha, NXTLADDR);
 292
 293        asd_printk("IOP REGISTERS\n");
 294
 295        PRINT_REG_32bit(asd_ha, BISTCTL1, CBISTCTL);
 296        PRINT_CREG_32bit(asd_ha, MAPPEDSCR);
 297
 298        asd_printk("CIO REGISTERS\n");
 299
 300        for (mode = 0; mode < 9; mode++)
 301                PRINT_MREG_16bit(asd_ha, mode, MnSCBPTR, CMnSCBPTR(mode));
 302        PRINT_MREG_16bit(asd_ha, 15, MnSCBPTR, CMnSCBPTR(15));
 303
 304        for (mode = 0; mode < 9; mode++)
 305                PRINT_MREG_16bit(asd_ha, mode, MnDDBPTR, CMnDDBPTR(mode));
 306        PRINT_MREG_16bit(asd_ha, 15, MnDDBPTR, CMnDDBPTR(15));
 307
 308        for (mode = 0; mode < 8; mode++)
 309                PRINT_MREG_32bit(asd_ha, mode, MnREQMBX, CMnREQMBX(mode));
 310        for (mode = 0; mode < 8; mode++)
 311                PRINT_MREG_32bit(asd_ha, mode, MnRSPMBX, CMnRSPMBX(mode));
 312        for (mode = 0; mode < 8; mode++)
 313                PRINT_MREG_32bit(asd_ha, mode, MnINT, CMnINT(mode));
 314        for (mode = 0; mode < 8; mode++)
 315                PRINT_MREG_32bit(asd_ha, mode, MnINTEN, CMnINTEN(mode));
 316
 317        PRINT_CREG_8bit(asd_ha, SCRATCHPAGE);
 318        for (mode = 0; mode < 8; mode++)
 319                PRINT_MREG_8bit(asd_ha, mode, MnSCRATCHPAGE,
 320                                CMnSCRATCHPAGE(mode));
 321
 322        PRINT_REG_32bit(asd_ha, CLINKCON, CLINKCON);
 323        PRINT_REG_8bit(asd_ha, CCONMSK, CCONMSK);
 324        PRINT_REG_8bit(asd_ha, CCONEXIST, CCONEXIST);
 325        PRINT_REG_16bit(asd_ha, CCONMODE, CCONMODE);
 326        PRINT_REG_32bit(asd_ha, CTIMERCALC, CTIMERCALC);
 327        PRINT_REG_8bit(asd_ha, CINTDIS, CINTDIS);
 328
 329        asd_printk("SCRATCH MEMORY\n");
 330
 331        asd_printk("MIP 4 >>>>>\n");
 332        PRINT_MIS_word(asd_ha, Q_EXE_HEAD);
 333        PRINT_MIS_word(asd_ha, Q_EXE_TAIL);
 334        PRINT_MIS_word(asd_ha, Q_DONE_HEAD);
 335        PRINT_MIS_word(asd_ha, Q_DONE_TAIL);
 336        PRINT_MIS_word(asd_ha, Q_SEND_HEAD);
 337        PRINT_MIS_word(asd_ha, Q_SEND_TAIL);
 338        PRINT_MIS_word(asd_ha, Q_DMA2CHIM_HEAD);
 339        PRINT_MIS_word(asd_ha, Q_DMA2CHIM_TAIL);
 340        PRINT_MIS_word(asd_ha, Q_COPY_HEAD);
 341        PRINT_MIS_word(asd_ha, Q_COPY_TAIL);
 342        PRINT_MIS_word(asd_ha, REG0);
 343        PRINT_MIS_word(asd_ha, REG1);
 344        PRINT_MIS_dword(asd_ha, REG2);
 345        PRINT_MIS_byte(asd_ha, LINK_CTL_Q_MAP);
 346        PRINT_MIS_byte(asd_ha, MAX_CSEQ_MODE);
 347        PRINT_MIS_byte(asd_ha, FREE_LIST_HACK_COUNT);
 348
 349        asd_printk("MIP 5 >>>>\n");
 350        PRINT_MIS_qword(asd_ha, EST_NEXUS_REQ_QUEUE);
 351        PRINT_MIS_qword(asd_ha, EST_NEXUS_REQ_COUNT);
 352        PRINT_MIS_word(asd_ha, Q_EST_NEXUS_HEAD);
 353        PRINT_MIS_word(asd_ha, Q_EST_NEXUS_TAIL);
 354        PRINT_MIS_word(asd_ha, NEED_EST_NEXUS_SCB);
 355        PRINT_MIS_byte(asd_ha, EST_NEXUS_REQ_HEAD);
 356        PRINT_MIS_byte(asd_ha, EST_NEXUS_REQ_TAIL);
 357        PRINT_MIS_byte(asd_ha, EST_NEXUS_SCB_OFFSET);
 358
 359        asd_printk("MIP 6 >>>>\n");
 360        PRINT_MIS_word(asd_ha, INT_ROUT_RET_ADDR0);
 361        PRINT_MIS_word(asd_ha, INT_ROUT_RET_ADDR1);
 362        PRINT_MIS_word(asd_ha, INT_ROUT_SCBPTR);
 363        PRINT_MIS_byte(asd_ha, INT_ROUT_MODE);
 364        PRINT_MIS_byte(asd_ha, ISR_SCRATCH_FLAGS);
 365        PRINT_MIS_word(asd_ha, ISR_SAVE_SINDEX);
 366        PRINT_MIS_word(asd_ha, ISR_SAVE_DINDEX);
 367        PRINT_MIS_word(asd_ha, Q_MONIRTT_HEAD);
 368        PRINT_MIS_word(asd_ha, Q_MONIRTT_TAIL);
 369        PRINT_MIS_byte(asd_ha, FREE_SCB_MASK);
 370        PRINT_MIS_word(asd_ha, BUILTIN_FREE_SCB_HEAD);
 371        PRINT_MIS_word(asd_ha, BUILTIN_FREE_SCB_TAIL);
 372        PRINT_MIS_word(asd_ha, EXTENDED_FREE_SCB_HEAD);
 373        PRINT_MIS_word(asd_ha, EXTENDED_FREE_SCB_TAIL);
 374
 375        asd_printk("MIP 7 >>>>\n");
 376        PRINT_MIS_qword(asd_ha, EMPTY_REQ_QUEUE);
 377        PRINT_MIS_qword(asd_ha, EMPTY_REQ_COUNT);
 378        PRINT_MIS_word(asd_ha, Q_EMPTY_HEAD);
 379        PRINT_MIS_word(asd_ha, Q_EMPTY_TAIL);
 380        PRINT_MIS_word(asd_ha, NEED_EMPTY_SCB);
 381        PRINT_MIS_byte(asd_ha, EMPTY_REQ_HEAD);
 382        PRINT_MIS_byte(asd_ha, EMPTY_REQ_TAIL);
 383        PRINT_MIS_byte(asd_ha, EMPTY_SCB_OFFSET);
 384        PRINT_MIS_word(asd_ha, PRIMITIVE_DATA);
 385        PRINT_MIS_dword(asd_ha, TIMEOUT_CONST);
 386
 387        asd_printk("MDP 0 >>>>\n");
 388        asd_printk("%-20s %6s %6s %6s %6s %6s %6s %6s %6s\n",
 389                   "Mode: ", "0", "1", "2", "3", "4", "5", "6", "7");
 390        PRINT_CMDP_word(asd_ha, LRM_SAVE_SINDEX);
 391        PRINT_CMDP_word(asd_ha, LRM_SAVE_SCBPTR);
 392        PRINT_CMDP_word(asd_ha, Q_LINK_HEAD);
 393        PRINT_CMDP_word(asd_ha, Q_LINK_TAIL);
 394        PRINT_CMDP_byte(asd_ha, LRM_SAVE_SCRPAGE);
 395
 396        asd_printk("MDP 0 Mode 8 >>>>\n");
 397        PRINT_MIS_word(asd_ha, RET_ADDR);
 398        PRINT_MIS_word(asd_ha, RET_SCBPTR);
 399        PRINT_MIS_word(asd_ha, SAVE_SCBPTR);
 400        PRINT_MIS_word(asd_ha, EMPTY_TRANS_CTX);
 401        PRINT_MIS_word(asd_ha, RESP_LEN);
 402        PRINT_MIS_word(asd_ha, TMF_SCBPTR);
 403        PRINT_MIS_word(asd_ha, GLOBAL_PREV_SCB);
 404        PRINT_MIS_word(asd_ha, GLOBAL_HEAD);
 405        PRINT_MIS_word(asd_ha, CLEAR_LU_HEAD);
 406        PRINT_MIS_byte(asd_ha, TMF_OPCODE);
 407        PRINT_MIS_byte(asd_ha, SCRATCH_FLAGS);
 408        PRINT_MIS_word(asd_ha, HSB_SITE);
 409        PRINT_MIS_word(asd_ha, FIRST_INV_SCB_SITE);
 410        PRINT_MIS_word(asd_ha, FIRST_INV_DDB_SITE);
 411
 412        asd_printk("MDP 1 Mode 8 >>>>\n");
 413        PRINT_MIS_qword(asd_ha, LUN_TO_CLEAR);
 414        PRINT_MIS_qword(asd_ha, LUN_TO_CHECK);
 415
 416        asd_printk("MDP 2 Mode 8 >>>>\n");
 417        PRINT_MIS_qword(asd_ha, HQ_NEW_POINTER);
 418        PRINT_MIS_qword(asd_ha, HQ_DONE_BASE);
 419        PRINT_MIS_dword(asd_ha, HQ_DONE_POINTER);
 420        PRINT_MIS_byte(asd_ha, HQ_DONE_PASS);
 421}
 422
 423#define PRINT_LREG_8bit(_h, _lseq, _n) \
 424        asd_printk(STR_8BIT, #_n, _n, asd_read_reg_byte(_h, Lm##_n(_lseq)))
 425#define PRINT_LREG_16bit(_h, _lseq, _n) \
 426        asd_printk(STR_16BIT, #_n, _n, asd_read_reg_word(_h, Lm##_n(_lseq)))
 427#define PRINT_LREG_32bit(_h, _lseq, _n) \
 428        asd_printk(STR_32BIT, #_n, _n, asd_read_reg_dword(_h, Lm##_n(_lseq)))
 429
 430#define PRINT_LMIP_byte(_h, _lseq, _n)                              \
 431        asd_printk(STR_8BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
 432                   asd_read_reg_byte(_h, LmSEQ_##_n(_lseq)))
 433#define PRINT_LMIP_word(_h, _lseq, _n)                              \
 434        asd_printk(STR_16BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
 435                   asd_read_reg_word(_h, LmSEQ_##_n(_lseq)))
 436#define PRINT_LMIP_dword(_h, _lseq, _n)                             \
 437        asd_printk(STR_32BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
 438                   asd_read_reg_dword(_h, LmSEQ_##_n(_lseq)))
 439#define PRINT_LMIP_qword(_h, _lseq, _n)                                \
 440        asd_printk(STR_64BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
 441                 (unsigned long long)(((unsigned long long) \
 442                 asd_read_reg_dword(_h, LmSEQ_##_n(_lseq))) \
 443                  | (((unsigned long long) \
 444                 asd_read_reg_dword(_h, LmSEQ_##_n(_lseq)+4))<<32)))
 445
 446static void asd_print_lseq_cio_reg(struct asd_ha_struct *asd_ha,
 447                                   u32 lseq_cio_addr, int i)
 448{
 449        switch (LSEQmCIOREGS[i].width) {
 450        case 8:
 451                asd_printk("%20s[0x%x]: 0x%02x\n", LSEQmCIOREGS[i].name,
 452                           LSEQmCIOREGS[i].offs,
 453                           asd_read_reg_byte(asd_ha, lseq_cio_addr +
 454                                             LSEQmCIOREGS[i].offs));
 455
 456                break;
 457        case 16:
 458                asd_printk("%20s[0x%x]: 0x%04x\n", LSEQmCIOREGS[i].name,
 459                           LSEQmCIOREGS[i].offs,
 460                           asd_read_reg_word(asd_ha, lseq_cio_addr +
 461                                             LSEQmCIOREGS[i].offs));
 462
 463                break;
 464        case 32:
 465                asd_printk("%20s[0x%x]: 0x%08x\n", LSEQmCIOREGS[i].name,
 466                           LSEQmCIOREGS[i].offs,
 467                           asd_read_reg_dword(asd_ha, lseq_cio_addr +
 468                                              LSEQmCIOREGS[i].offs));
 469                break;
 470        }
 471}
 472
 473static void asd_dump_lseq_state(struct asd_ha_struct *asd_ha, int lseq)
 474{
 475        u32 moffs;
 476        int mode;
 477
 478        asd_printk("LSEQ %d STATE\n", lseq);
 479
 480        asd_printk("LSEQ%d: ARP2 REGISTERS\n", lseq);
 481        PRINT_LREG_32bit(asd_ha, lseq, ARP2CTL);
 482        PRINT_LREG_32bit(asd_ha, lseq, ARP2INT);
 483        PRINT_LREG_32bit(asd_ha, lseq, ARP2INTEN);
 484        PRINT_LREG_8bit(asd_ha, lseq, MODEPTR);
 485        PRINT_LREG_8bit(asd_ha, lseq, ALTMODE);
 486        PRINT_LREG_8bit(asd_ha, lseq, FLAG);
 487        PRINT_LREG_8bit(asd_ha, lseq, ARP2INTCTL);
 488        PRINT_LREG_16bit(asd_ha, lseq, STACK);
 489        PRINT_LREG_16bit(asd_ha, lseq, PRGMCNT);
 490        PRINT_LREG_16bit(asd_ha, lseq, ACCUM);
 491        PRINT_LREG_16bit(asd_ha, lseq, SINDEX);
 492        PRINT_LREG_16bit(asd_ha, lseq, DINDEX);
 493        PRINT_LREG_8bit(asd_ha, lseq, SINDIR);
 494        PRINT_LREG_8bit(asd_ha, lseq, DINDIR);
 495        PRINT_LREG_8bit(asd_ha, lseq, JUMLDIR);
 496        PRINT_LREG_8bit(asd_ha, lseq, ARP2HALTCODE);
 497        PRINT_LREG_16bit(asd_ha, lseq, CURRADDR);
 498        PRINT_LREG_16bit(asd_ha, lseq, LASTADDR);
 499        PRINT_LREG_16bit(asd_ha, lseq, NXTLADDR);
 500
 501        asd_printk("LSEQ%d: IOP REGISTERS\n", lseq);
 502
 503        PRINT_LREG_32bit(asd_ha, lseq, MODECTL);
 504        PRINT_LREG_32bit(asd_ha, lseq, DBGMODE);
 505        PRINT_LREG_32bit(asd_ha, lseq, CONTROL);
 506        PRINT_REG_32bit(asd_ha, BISTCTL0, LmBISTCTL0(lseq));
 507        PRINT_REG_32bit(asd_ha, BISTCTL1, LmBISTCTL1(lseq));
 508
 509        asd_printk("LSEQ%d: CIO REGISTERS\n", lseq);
 510        asd_printk("Mode common:\n");
 511
 512        for (mode = 0; mode < 8; mode++) {
 513                u32 lseq_cio_addr = LmSEQ_PHY_BASE(mode, lseq);
 514                int i;
 515
 516                for (i = 0; LSEQmCIOREGS[i].name; i++)
 517                        if (LSEQmCIOREGS[i].mode == MODE_COMMON)
 518                                asd_print_lseq_cio_reg(asd_ha,lseq_cio_addr,i);
 519        }
 520
 521        asd_printk("Mode unique:\n");
 522        for (mode = 0; mode < 8; mode++) {
 523                u32 lseq_cio_addr = LmSEQ_PHY_BASE(mode, lseq);
 524                int i;
 525
 526                asd_printk("Mode %d\n", mode);
 527                for  (i = 0; LSEQmCIOREGS[i].name; i++) {
 528                        if (!(LSEQmCIOREGS[i].mode & (1 << mode)))
 529                                continue;
 530                        asd_print_lseq_cio_reg(asd_ha, lseq_cio_addr, i);
 531                }
 532        }
 533
 534        asd_printk("SCRATCH MEMORY\n");
 535
 536        asd_printk("LSEQ%d MIP 0 >>>>\n", lseq);
 537        PRINT_LMIP_word(asd_ha, lseq, Q_TGTXFR_HEAD);
 538        PRINT_LMIP_word(asd_ha, lseq, Q_TGTXFR_TAIL);
 539        PRINT_LMIP_byte(asd_ha, lseq, LINK_NUMBER);
 540        PRINT_LMIP_byte(asd_ha, lseq, SCRATCH_FLAGS);
 541        PRINT_LMIP_dword(asd_ha, lseq, CONNECTION_STATE);
 542        PRINT_LMIP_word(asd_ha, lseq, CONCTL);
 543        PRINT_LMIP_byte(asd_ha, lseq, CONSTAT);
 544        PRINT_LMIP_byte(asd_ha, lseq, CONNECTION_MODES);
 545        PRINT_LMIP_word(asd_ha, lseq, REG1_ISR);
 546        PRINT_LMIP_word(asd_ha, lseq, REG2_ISR);
 547        PRINT_LMIP_word(asd_ha, lseq, REG3_ISR);
 548        PRINT_LMIP_qword(asd_ha, lseq,REG0_ISR);
 549
 550        asd_printk("LSEQ%d MIP 1 >>>>\n", lseq);
 551        PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR0);
 552        PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR1);
 553        PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR2);
 554        PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR3);
 555        PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE0);
 556        PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE1);
 557        PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE2);
 558        PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE3);
 559        PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_HEAD);
 560        PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_TAIL);
 561        PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_BUF_AVAIL);
 562        PRINT_LMIP_dword(asd_ha, lseq, TIMEOUT_CONST);
 563        PRINT_LMIP_word(asd_ha, lseq, ISR_SAVE_SINDEX);
 564        PRINT_LMIP_word(asd_ha, lseq, ISR_SAVE_DINDEX);
 565
 566        asd_printk("LSEQ%d MIP 2 >>>>\n", lseq);
 567        PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR0);
 568        PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR1);
 569        PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR2);
 570        PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR3);
 571        PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD0);
 572        PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD1);
 573        PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD2);
 574        PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD3);
 575        PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_HEAD);
 576        PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_TAIL);
 577        PRINT_LMIP_byte(asd_ha, lseq, EMPTY_BUFS_AVAIL);
 578
 579        asd_printk("LSEQ%d MIP 3 >>>>\n", lseq);
 580        PRINT_LMIP_dword(asd_ha, lseq, DEV_PRES_TMR_TOUT_CONST);
 581        PRINT_LMIP_dword(asd_ha, lseq, SATA_INTERLOCK_TIMEOUT);
 582        PRINT_LMIP_dword(asd_ha, lseq, SRST_ASSERT_TIMEOUT);
 583        PRINT_LMIP_dword(asd_ha, lseq, RCV_FIS_TIMEOUT);
 584        PRINT_LMIP_dword(asd_ha, lseq, ONE_MILLISEC_TIMEOUT);
 585        PRINT_LMIP_dword(asd_ha, lseq, TEN_MS_COMINIT_TIMEOUT);
 586        PRINT_LMIP_dword(asd_ha, lseq, SMP_RCV_TIMEOUT);
 587
 588        for (mode = 0; mode < 3; mode++) {
 589                asd_printk("LSEQ%d MDP 0 MODE %d >>>>\n", lseq, mode);
 590                moffs = mode * LSEQ_MODE_SCRATCH_SIZE;
 591
 592                asd_printk(STR_16BIT, "RET_ADDR", 0,
 593                           asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR(lseq)
 594                                             + moffs));
 595                asd_printk(STR_16BIT, "REG0_MODE", 2,
 596                           asd_read_reg_word(asd_ha, LmSEQ_REG0_MODE(lseq)
 597                                             + moffs));
 598                asd_printk(STR_16BIT, "MODE_FLAGS", 4,
 599                           asd_read_reg_word(asd_ha, LmSEQ_MODE_FLAGS(lseq)
 600                                             + moffs));
 601                asd_printk(STR_16BIT, "RET_ADDR2", 0x6,
 602                           asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR2(lseq)
 603                                             + moffs));
 604                asd_printk(STR_16BIT, "RET_ADDR1", 0x8,
 605                           asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR1(lseq)
 606                                             + moffs));
 607                asd_printk(STR_8BIT, "OPCODE_TO_CSEQ", 0xB,
 608                           asd_read_reg_byte(asd_ha, LmSEQ_OPCODE_TO_CSEQ(lseq)
 609                                             + moffs));
 610                asd_printk(STR_16BIT, "DATA_TO_CSEQ", 0xC,
 611                           asd_read_reg_word(asd_ha, LmSEQ_DATA_TO_CSEQ(lseq)
 612                                             + moffs));
 613        }
 614
 615        asd_printk("LSEQ%d MDP 0 MODE 5 >>>>\n", lseq);
 616        moffs = LSEQ_MODE5_PAGE0_OFFSET;
 617        asd_printk(STR_16BIT, "RET_ADDR", 0,
 618                   asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR(lseq) + moffs));
 619        asd_printk(STR_16BIT, "REG0_MODE", 2,
 620                   asd_read_reg_word(asd_ha, LmSEQ_REG0_MODE(lseq) + moffs));
 621        asd_printk(STR_16BIT, "MODE_FLAGS", 4,
 622                   asd_read_reg_word(asd_ha, LmSEQ_MODE_FLAGS(lseq) + moffs));
 623        asd_printk(STR_16BIT, "RET_ADDR2", 0x6,
 624                   asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR2(lseq) + moffs));
 625        asd_printk(STR_16BIT, "RET_ADDR1", 0x8,
 626                   asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR1(lseq) + moffs));
 627        asd_printk(STR_8BIT, "OPCODE_TO_CSEQ", 0xB,
 628           asd_read_reg_byte(asd_ha, LmSEQ_OPCODE_TO_CSEQ(lseq) + moffs));
 629        asd_printk(STR_16BIT, "DATA_TO_CSEQ", 0xC,
 630           asd_read_reg_word(asd_ha, LmSEQ_DATA_TO_CSEQ(lseq) + moffs));
 631
 632        asd_printk("LSEQ%d MDP 0 MODE 0 >>>>\n", lseq);
 633        PRINT_LMIP_word(asd_ha, lseq, FIRST_INV_DDB_SITE);
 634        PRINT_LMIP_word(asd_ha, lseq, EMPTY_TRANS_CTX);
 635        PRINT_LMIP_word(asd_ha, lseq, RESP_LEN);
 636        PRINT_LMIP_word(asd_ha, lseq, FIRST_INV_SCB_SITE);
 637        PRINT_LMIP_dword(asd_ha, lseq, INTEN_SAVE);
 638        PRINT_LMIP_byte(asd_ha, lseq, LINK_RST_FRM_LEN);
 639        PRINT_LMIP_byte(asd_ha, lseq, LINK_RST_PROTOCOL);
 640        PRINT_LMIP_byte(asd_ha, lseq, RESP_STATUS);
 641        PRINT_LMIP_byte(asd_ha, lseq, LAST_LOADED_SGE);
 642        PRINT_LMIP_byte(asd_ha, lseq, SAVE_SCBPTR);
 643
 644        asd_printk("LSEQ%d MDP 0 MODE 1 >>>>\n", lseq);
 645        PRINT_LMIP_word(asd_ha, lseq, Q_XMIT_HEAD);
 646        PRINT_LMIP_word(asd_ha, lseq, M1_EMPTY_TRANS_CTX);
 647        PRINT_LMIP_word(asd_ha, lseq, INI_CONN_TAG);
 648        PRINT_LMIP_byte(asd_ha, lseq, FAILED_OPEN_STATUS);
 649        PRINT_LMIP_byte(asd_ha, lseq, XMIT_REQUEST_TYPE);
 650        PRINT_LMIP_byte(asd_ha, lseq, M1_RESP_STATUS);
 651        PRINT_LMIP_byte(asd_ha, lseq, M1_LAST_LOADED_SGE);
 652        PRINT_LMIP_word(asd_ha, lseq, M1_SAVE_SCBPTR);
 653
 654        asd_printk("LSEQ%d MDP 0 MODE 2 >>>>\n", lseq);
 655        PRINT_LMIP_word(asd_ha, lseq, PORT_COUNTER);
 656        PRINT_LMIP_word(asd_ha, lseq, PM_TABLE_PTR);
 657        PRINT_LMIP_word(asd_ha, lseq, SATA_INTERLOCK_TMR_SAVE);
 658        PRINT_LMIP_word(asd_ha, lseq, IP_BITL);
 659        PRINT_LMIP_word(asd_ha, lseq, COPY_SMP_CONN_TAG);
 660        PRINT_LMIP_byte(asd_ha, lseq, P0M2_OFFS1AH);
 661
 662        asd_printk("LSEQ%d MDP 0 MODE 4/5 >>>>\n", lseq);
 663        PRINT_LMIP_byte(asd_ha, lseq, SAVED_OOB_STATUS);
 664        PRINT_LMIP_byte(asd_ha, lseq, SAVED_OOB_MODE);
 665        PRINT_LMIP_word(asd_ha, lseq, Q_LINK_HEAD);
 666        PRINT_LMIP_byte(asd_ha, lseq, LINK_RST_ERR);
 667        PRINT_LMIP_byte(asd_ha, lseq, SAVED_OOB_SIGNALS);
 668        PRINT_LMIP_byte(asd_ha, lseq, SAS_RESET_MODE);
 669        PRINT_LMIP_byte(asd_ha, lseq, LINK_RESET_RETRY_COUNT);
 670        PRINT_LMIP_byte(asd_ha, lseq, NUM_LINK_RESET_RETRIES);
 671        PRINT_LMIP_word(asd_ha, lseq, OOB_INT_ENABLES);
 672        PRINT_LMIP_word(asd_ha, lseq, NOTIFY_TIMER_TIMEOUT);
 673        PRINT_LMIP_word(asd_ha, lseq, NOTIFY_TIMER_DOWN_COUNT);
 674
 675        asd_printk("LSEQ%d MDP 1 MODE 0 >>>>\n", lseq);
 676        PRINT_LMIP_qword(asd_ha, lseq, SG_LIST_PTR_ADDR0);
 677        PRINT_LMIP_qword(asd_ha, lseq, SG_LIST_PTR_ADDR1);
 678
 679        asd_printk("LSEQ%d MDP 1 MODE 1 >>>>\n", lseq);
 680        PRINT_LMIP_qword(asd_ha, lseq, M1_SG_LIST_PTR_ADDR0);
 681        PRINT_LMIP_qword(asd_ha, lseq, M1_SG_LIST_PTR_ADDR1);
 682
 683        asd_printk("LSEQ%d MDP 1 MODE 2 >>>>\n", lseq);
 684        PRINT_LMIP_dword(asd_ha, lseq, INVALID_DWORD_COUNT);
 685        PRINT_LMIP_dword(asd_ha, lseq, DISPARITY_ERROR_COUNT);
 686        PRINT_LMIP_dword(asd_ha, lseq, LOSS_OF_SYNC_COUNT);
 687
 688        asd_printk("LSEQ%d MDP 1 MODE 4/5 >>>>\n", lseq);
 689        PRINT_LMIP_dword(asd_ha, lseq, FRAME_TYPE_MASK);
 690        PRINT_LMIP_dword(asd_ha, lseq, HASHED_SRC_ADDR_MASK_PRINT);
 691        PRINT_LMIP_byte(asd_ha, lseq, NUM_FILL_BYTES_MASK);
 692        PRINT_LMIP_word(asd_ha, lseq, TAG_MASK);
 693        PRINT_LMIP_word(asd_ha, lseq, TARGET_PORT_XFER_TAG);
 694        PRINT_LMIP_dword(asd_ha, lseq, DATA_OFFSET);
 695
 696        asd_printk("LSEQ%d MDP 2 MODE 0 >>>>\n", lseq);
 697        PRINT_LMIP_dword(asd_ha, lseq, SMP_RCV_TIMER_TERM_TS);
 698        PRINT_LMIP_byte(asd_ha, lseq, DEVICE_BITS);
 699        PRINT_LMIP_word(asd_ha, lseq, SDB_DDB);
 700        PRINT_LMIP_word(asd_ha, lseq, SDB_NUM_TAGS);
 701        PRINT_LMIP_word(asd_ha, lseq, SDB_CURR_TAG);
 702
 703        asd_printk("LSEQ%d MDP 2 MODE 1 >>>>\n", lseq);
 704        PRINT_LMIP_qword(asd_ha, lseq, TX_ID_ADDR_FRAME);
 705        PRINT_LMIP_dword(asd_ha, lseq, OPEN_TIMER_TERM_TS);
 706        PRINT_LMIP_dword(asd_ha, lseq, SRST_AS_TIMER_TERM_TS);
 707        PRINT_LMIP_dword(asd_ha, lseq, LAST_LOADED_SG_EL);
 708
 709        asd_printk("LSEQ%d MDP 2 MODE 2 >>>>\n", lseq);
 710        PRINT_LMIP_dword(asd_ha, lseq, CLOSE_TIMER_TERM_TS);
 711        PRINT_LMIP_dword(asd_ha, lseq, BREAK_TIMER_TERM_TS);
 712        PRINT_LMIP_dword(asd_ha, lseq, DWS_RESET_TIMER_TERM_TS);
 713        PRINT_LMIP_dword(asd_ha, lseq, SATA_INTERLOCK_TIMER_TERM_TS);
 714        PRINT_LMIP_dword(asd_ha, lseq, MCTL_TIMER_TERM_TS);
 715
 716        asd_printk("LSEQ%d MDP 2 MODE 4/5 >>>>\n", lseq);
 717        PRINT_LMIP_dword(asd_ha, lseq, COMINIT_TIMER_TERM_TS);
 718        PRINT_LMIP_dword(asd_ha, lseq, RCV_ID_TIMER_TERM_TS);
 719        PRINT_LMIP_dword(asd_ha, lseq, RCV_FIS_TIMER_TERM_TS);
 720        PRINT_LMIP_dword(asd_ha, lseq, DEV_PRES_TIMER_TERM_TS);
 721}
 722
 723/**
 724 * asd_dump_seq_state -- dump CSEQ and LSEQ states
 725 * @asd_ha: pointer to host adapter structure
 726 * @lseq_mask: mask of LSEQs of interest
 727 */
 728void asd_dump_seq_state(struct asd_ha_struct *asd_ha, u8 lseq_mask)
 729{
 730        int lseq;
 731
 732        asd_dump_cseq_state(asd_ha);
 733
 734        if (lseq_mask != 0)
 735                for_each_sequencer(lseq_mask, lseq_mask, lseq)
 736                        asd_dump_lseq_state(asd_ha, lseq);
 737}
 738
 739void asd_dump_frame_rcvd(struct asd_phy *phy,
 740                         struct done_list_struct *dl)
 741{
 742        unsigned long flags;
 743        int i;
 744
 745        switch ((dl->status_block[1] & 0x70) >> 3) {
 746        case SAS_PROTOCOL_STP:
 747                ASD_DPRINTK("STP proto device-to-host FIS:\n");
 748                break;
 749        default:
 750        case SAS_PROTOCOL_SSP:
 751                ASD_DPRINTK("SAS proto IDENTIFY:\n");
 752                break;
 753        }
 754        spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags);
 755        for (i = 0; i < phy->sas_phy.frame_rcvd_size; i+=4)
 756                ASD_DPRINTK("%02x: %02x %02x %02x %02x\n",
 757                            i,
 758                            phy->frame_rcvd[i],
 759                            phy->frame_rcvd[i+1],
 760                            phy->frame_rcvd[i+2],
 761                            phy->frame_rcvd[i+3]);
 762        spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags);
 763}
 764
 765#endif /* ASD_DEBUG */
 766