linux/drivers/cpufreq/cpufreq-dt-platdev.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) 2016 Linaro.
   4 * Viresh Kumar <viresh.kumar@linaro.org>
   5 */
   6
   7#include <linux/err.h>
   8#include <linux/of.h>
   9#include <linux/of_device.h>
  10#include <linux/platform_device.h>
  11
  12#include "cpufreq-dt.h"
  13
  14/*
  15 * Machines for which the cpufreq device is *always* created, mostly used for
  16 * platforms using "operating-points" (V1) property.
  17 */
  18static const struct of_device_id whitelist[] __initconst = {
  19        { .compatible = "allwinner,sun4i-a10", },
  20        { .compatible = "allwinner,sun5i-a10s", },
  21        { .compatible = "allwinner,sun5i-a13", },
  22        { .compatible = "allwinner,sun5i-r8", },
  23        { .compatible = "allwinner,sun6i-a31", },
  24        { .compatible = "allwinner,sun6i-a31s", },
  25        { .compatible = "allwinner,sun7i-a20", },
  26        { .compatible = "allwinner,sun8i-a23", },
  27        { .compatible = "allwinner,sun8i-a83t", },
  28        { .compatible = "allwinner,sun8i-h3", },
  29
  30        { .compatible = "apm,xgene-shadowcat", },
  31
  32        { .compatible = "arm,integrator-ap", },
  33        { .compatible = "arm,integrator-cp", },
  34
  35        { .compatible = "hisilicon,hi3660", },
  36
  37        { .compatible = "fsl,imx27", },
  38        { .compatible = "fsl,imx51", },
  39        { .compatible = "fsl,imx53", },
  40
  41        { .compatible = "marvell,berlin", },
  42        { .compatible = "marvell,pxa250", },
  43        { .compatible = "marvell,pxa270", },
  44
  45        { .compatible = "samsung,exynos3250", },
  46        { .compatible = "samsung,exynos4210", },
  47        { .compatible = "samsung,exynos5250", },
  48#ifndef CONFIG_BL_SWITCHER
  49        { .compatible = "samsung,exynos5800", },
  50#endif
  51
  52        { .compatible = "renesas,emev2", },
  53        { .compatible = "renesas,r7s72100", },
  54        { .compatible = "renesas,r8a73a4", },
  55        { .compatible = "renesas,r8a7740", },
  56        { .compatible = "renesas,r8a7742", },
  57        { .compatible = "renesas,r8a7743", },
  58        { .compatible = "renesas,r8a7744", },
  59        { .compatible = "renesas,r8a7745", },
  60        { .compatible = "renesas,r8a7778", },
  61        { .compatible = "renesas,r8a7779", },
  62        { .compatible = "renesas,r8a7790", },
  63        { .compatible = "renesas,r8a7791", },
  64        { .compatible = "renesas,r8a7792", },
  65        { .compatible = "renesas,r8a7793", },
  66        { .compatible = "renesas,r8a7794", },
  67        { .compatible = "renesas,sh73a0", },
  68
  69        { .compatible = "rockchip,rk2928", },
  70        { .compatible = "rockchip,rk3036", },
  71        { .compatible = "rockchip,rk3066a", },
  72        { .compatible = "rockchip,rk3066b", },
  73        { .compatible = "rockchip,rk3188", },
  74        { .compatible = "rockchip,rk3228", },
  75        { .compatible = "rockchip,rk3288", },
  76        { .compatible = "rockchip,rk3328", },
  77        { .compatible = "rockchip,rk3366", },
  78        { .compatible = "rockchip,rk3368", },
  79        { .compatible = "rockchip,rk3399",
  80          .data = &(struct cpufreq_dt_platform_data)
  81                { .have_governor_per_policy = true, },
  82        },
  83
  84        { .compatible = "st-ericsson,u8500", },
  85        { .compatible = "st-ericsson,u8540", },
  86        { .compatible = "st-ericsson,u9500", },
  87        { .compatible = "st-ericsson,u9540", },
  88
  89        { .compatible = "ti,omap2", },
  90        { .compatible = "ti,omap4", },
  91        { .compatible = "ti,omap5", },
  92
  93        { .compatible = "xlnx,zynq-7000", },
  94        { .compatible = "xlnx,zynqmp", },
  95
  96        { }
  97};
  98
  99/*
 100 * Machines for which the cpufreq device is *not* created, mostly used for
 101 * platforms using "operating-points-v2" property.
 102 */
 103static const struct of_device_id blacklist[] __initconst = {
 104        { .compatible = "allwinner,sun50i-h6", },
 105
 106        { .compatible = "arm,vexpress", },
 107
 108        { .compatible = "calxeda,highbank", },
 109        { .compatible = "calxeda,ecx-2000", },
 110
 111        { .compatible = "fsl,imx7ulp", },
 112        { .compatible = "fsl,imx7d", },
 113        { .compatible = "fsl,imx8mq", },
 114        { .compatible = "fsl,imx8mm", },
 115        { .compatible = "fsl,imx8mn", },
 116        { .compatible = "fsl,imx8mp", },
 117
 118        { .compatible = "marvell,armadaxp", },
 119
 120        { .compatible = "mediatek,mt2701", },
 121        { .compatible = "mediatek,mt2712", },
 122        { .compatible = "mediatek,mt7622", },
 123        { .compatible = "mediatek,mt7623", },
 124        { .compatible = "mediatek,mt8167", },
 125        { .compatible = "mediatek,mt817x", },
 126        { .compatible = "mediatek,mt8173", },
 127        { .compatible = "mediatek,mt8176", },
 128        { .compatible = "mediatek,mt8183", },
 129        { .compatible = "mediatek,mt8516", },
 130
 131        { .compatible = "nvidia,tegra20", },
 132        { .compatible = "nvidia,tegra30", },
 133        { .compatible = "nvidia,tegra124", },
 134        { .compatible = "nvidia,tegra210", },
 135
 136        { .compatible = "qcom,apq8096", },
 137        { .compatible = "qcom,msm8996", },
 138        { .compatible = "qcom,qcs404", },
 139        { .compatible = "qcom,sc7180", },
 140        { .compatible = "qcom,sdm845", },
 141        { .compatible = "qcom,sm8150", },
 142
 143        { .compatible = "st,stih407", },
 144        { .compatible = "st,stih410", },
 145        { .compatible = "st,stih418", },
 146
 147        { .compatible = "ti,am33xx", },
 148        { .compatible = "ti,am43", },
 149        { .compatible = "ti,dra7", },
 150        { .compatible = "ti,omap3", },
 151
 152        { .compatible = "qcom,ipq8064", },
 153        { .compatible = "qcom,apq8064", },
 154        { .compatible = "qcom,msm8974", },
 155        { .compatible = "qcom,msm8960", },
 156
 157        { }
 158};
 159
 160static bool __init cpu0_node_has_opp_v2_prop(void)
 161{
 162        struct device_node *np = of_cpu_device_node_get(0);
 163        bool ret = false;
 164
 165        if (of_get_property(np, "operating-points-v2", NULL))
 166                ret = true;
 167
 168        of_node_put(np);
 169        return ret;
 170}
 171
 172static int __init cpufreq_dt_platdev_init(void)
 173{
 174        struct device_node *np = of_find_node_by_path("/");
 175        const struct of_device_id *match;
 176        const void *data = NULL;
 177
 178        if (!np)
 179                return -ENODEV;
 180
 181        match = of_match_node(whitelist, np);
 182        if (match) {
 183                data = match->data;
 184                goto create_pdev;
 185        }
 186
 187        if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np))
 188                goto create_pdev;
 189
 190        of_node_put(np);
 191        return -ENODEV;
 192
 193create_pdev:
 194        of_node_put(np);
 195        return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
 196                               -1, data,
 197                               sizeof(struct cpufreq_dt_platform_data)));
 198}
 199core_initcall(cpufreq_dt_platdev_init);
 200