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18#include <linux/kernel.h>
19#include <linux/of_fdt.h>
20#include <asm/machdep.h>
21#include <asm/time.h>
22#include <asm/udbg.h>
23#include <asm/mpic.h>
24#include <sysdev/fsl_soc.h>
25#include <sysdev/fsl_pci.h>
26#include "smp.h"
27#include "mpc85xx.h"
28
29void __init qemu_e500_pic_init(void)
30{
31 struct mpic *mpic;
32
33 mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU,
34 0, 256, " OpenPIC ");
35
36 BUG_ON(mpic == NULL);
37 mpic_init(mpic);
38}
39
40static void __init qemu_e500_setup_arch(void)
41{
42 ppc_md.progress("qemu_e500_setup_arch()", 0);
43
44 fsl_pci_assign_primary();
45 swiotlb_detect_4g();
46 mpc85xx_smp_init();
47}
48
49
50
51
52static int __init qemu_e500_probe(void)
53{
54 unsigned long root = of_get_flat_dt_root();
55
56 return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500");
57}
58
59machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices);
60
61define_machine(qemu_e500) {
62 .name = "QEMU e500",
63 .probe = qemu_e500_probe,
64 .setup_arch = qemu_e500_setup_arch,
65 .init_IRQ = qemu_e500_pic_init,
66#ifdef CONFIG_PCI
67 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
68#endif
69 .get_irq = mpic_get_irq,
70 .restart = fsl_rstcr_restart,
71 .calibrate_decr = generic_calibrate_decr,
72 .progress = udbg_progress,
73};
74