linux/arch/powerpc/platforms/iseries/pci.c
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   1/*
   2 * Copyright (C) 2001 Allan Trautman, IBM Corporation
   3 * Copyright (C) 2005,2007  Stephen Rothwell, IBM Corp
   4 *
   5 * iSeries specific routines for PCI.
   6 *
   7 * Based on code from pci.c and iSeries_pci.c 32bit
   8 *
   9 * This program is free software; you can redistribute it and/or modify
  10 * it under the terms of the GNU General Public License as published by
  11 * the Free Software Foundation; either version 2 of the License, or
  12 * (at your option) any later version.
  13 *
  14 * This program is distributed in the hope that it will be useful,
  15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 * GNU General Public License for more details.
  18 *
  19 * You should have received a copy of the GNU General Public License
  20 * along with this program; if not, write to the Free Software
  21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  22 */
  23
  24#undef DEBUG
  25
  26#include <linux/jiffies.h>
  27#include <linux/kernel.h>
  28#include <linux/list.h>
  29#include <linux/string.h>
  30#include <linux/slab.h>
  31#include <linux/init.h>
  32#include <linux/pci.h>
  33#include <linux/of.h>
  34#include <linux/ratelimit.h>
  35
  36#include <asm/types.h>
  37#include <asm/io.h>
  38#include <asm/irq.h>
  39#include <asm/prom.h>
  40#include <asm/machdep.h>
  41#include <asm/pci-bridge.h>
  42#include <asm/iommu.h>
  43#include <asm/abs_addr.h>
  44#include <asm/firmware.h>
  45
  46#include <asm/iseries/hv_types.h>
  47#include <asm/iseries/hv_call_xm.h>
  48#include <asm/iseries/mf.h>
  49#include <asm/iseries/iommu.h>
  50
  51#include <asm/ppc-pci.h>
  52
  53#include "irq.h"
  54#include "pci.h"
  55#include "call_pci.h"
  56
  57#define PCI_RETRY_MAX   3
  58static int limit_pci_retries = 1;       /* Set Retry Error on. */
  59
  60/*
  61 * Table defines
  62 * Each Entry size is 4 MB * 1024 Entries = 4GB I/O address space.
  63 */
  64#define IOMM_TABLE_MAX_ENTRIES  1024
  65#define IOMM_TABLE_ENTRY_SIZE   0x0000000000400000UL
  66#define BASE_IO_MEMORY          0xE000000000000000UL
  67#define END_IO_MEMORY           0xEFFFFFFFFFFFFFFFUL
  68
  69static unsigned long max_io_memory = BASE_IO_MEMORY;
  70static long current_iomm_table_entry;
  71
  72/*
  73 * Lookup Tables.
  74 */
  75static struct device_node *iomm_table[IOMM_TABLE_MAX_ENTRIES];
  76static u64 ds_addr_table[IOMM_TABLE_MAX_ENTRIES];
  77
  78static DEFINE_SPINLOCK(iomm_table_lock);
  79
  80/*
  81 * Generate a Direct Select Address for the Hypervisor
  82 */
  83static inline u64 iseries_ds_addr(struct device_node *node)
  84{
  85        struct pci_dn *pdn = PCI_DN(node);
  86        const u32 *sbp = of_get_property(node, "linux,subbus", NULL);
  87
  88        return ((u64)pdn->busno << 48) + ((u64)(sbp ? *sbp : 0) << 40)
  89                        + ((u64)0x10 << 32);
  90}
  91
  92/*
  93 * Size of Bus VPD data
  94 */
  95#define BUS_VPDSIZE      1024
  96
  97/*
  98 * Bus Vpd Tags
  99 */
 100#define VPD_END_OF_AREA         0x79
 101#define VPD_ID_STRING           0x82
 102#define VPD_VENDOR_AREA         0x84
 103
 104/*
 105 * Mfg Area Tags
 106 */
 107#define VPD_FRU_FRAME_ID        0x4649  /* "FI" */
 108#define VPD_SLOT_MAP_FORMAT     0x4D46  /* "MF" */
 109#define VPD_SLOT_MAP            0x534D  /* "SM" */
 110
 111/*
 112 * Structures of the areas
 113 */
 114struct mfg_vpd_area {
 115        u16     tag;
 116        u8      length;
 117        u8      data1;
 118        u8      data2;
 119};
 120#define MFG_ENTRY_SIZE   3
 121
 122struct slot_map {
 123        u8      agent;
 124        u8      secondary_agent;
 125        u8      phb;
 126        char    card_location[3];
 127        char    parms[8];
 128        char    reserved[2];
 129};
 130#define SLOT_ENTRY_SIZE   16
 131
 132/*
 133 * Parse the Slot Area
 134 */
 135static void __init iseries_parse_slot_area(struct slot_map *map, int len,
 136                HvAgentId agent, u8 *phb, char card[4])
 137{
 138        /*
 139         * Parse Slot label until we find the one requested
 140         */
 141        while (len > 0) {
 142                if (map->agent == agent) {
 143                        /*
 144                         * If Phb wasn't found, grab the entry first one found.
 145                         */
 146                        if (*phb == 0xff)
 147                                *phb = map->phb;
 148                        /* Found it, extract the data. */
 149                        if (map->phb == *phb) {
 150                                memcpy(card, &map->card_location, 3);
 151                                card[3]  = 0;
 152                                break;
 153                        }
 154                }
 155                /* Point to the next Slot */
 156                map = (struct slot_map *)((char *)map + SLOT_ENTRY_SIZE);
 157                len -= SLOT_ENTRY_SIZE;
 158        }
 159}
 160
 161/*
 162 * Parse the Mfg Area
 163 */
 164static void __init iseries_parse_mfg_area(struct mfg_vpd_area *area, int len,
 165                HvAgentId agent, u8 *phb, u8 *frame, char card[4])
 166{
 167        u16 slot_map_fmt = 0;
 168
 169        /* Parse Mfg Data */
 170        while (len > 0) {
 171                int mfg_tag_len = area->length;
 172                /* Frame ID         (FI 4649020310 ) */
 173                if (area->tag == VPD_FRU_FRAME_ID)
 174                        *frame = area->data1;
 175                /* Slot Map Format  (MF 4D46020004 ) */
 176                else if (area->tag == VPD_SLOT_MAP_FORMAT)
 177                        slot_map_fmt = (area->data1 * 256)
 178                                + area->data2;
 179                /* Slot Map         (SM 534D90 */
 180                else if (area->tag == VPD_SLOT_MAP) {
 181                        struct slot_map *slot_map;
 182
 183                        if (slot_map_fmt == 0x1004)
 184                                slot_map = (struct slot_map *)((char *)area
 185                                                + MFG_ENTRY_SIZE + 1);
 186                        else
 187                                slot_map = (struct slot_map *)((char *)area
 188                                                + MFG_ENTRY_SIZE);
 189                        iseries_parse_slot_area(slot_map, mfg_tag_len,
 190                                        agent, phb, card);
 191                }
 192                /*
 193                 * Point to the next Mfg Area
 194                 * Use defined size, sizeof give wrong answer
 195                 */
 196                area = (struct mfg_vpd_area *)((char *)area + mfg_tag_len
 197                                + MFG_ENTRY_SIZE);
 198                len -= (mfg_tag_len + MFG_ENTRY_SIZE);
 199        }
 200}
 201
 202/*
 203 * Look for "BUS".. Data is not Null terminated.
 204 * PHBID of 0xFF indicates PHB was not found in VPD Data.
 205 */
 206static u8 __init iseries_parse_phbid(u8 *area, int len)
 207{
 208        while (len > 0) {
 209                if ((*area == 'B') && (*(area + 1) == 'U')
 210                                && (*(area + 2) == 'S')) {
 211                        area += 3;
 212                        while (*area == ' ')
 213                                area++;
 214                        return *area & 0x0F;
 215                }
 216                area++;
 217                len--;
 218        }
 219        return 0xff;
 220}
 221
 222/*
 223 * Parse out the VPD Areas
 224 */
 225static void __init iseries_parse_vpd(u8 *data, int data_len,
 226                HvAgentId agent, u8 *frame, char card[4])
 227{
 228        u8 phb = 0xff;
 229
 230        while (data_len > 0) {
 231                int len;
 232                u8 tag = *data;
 233
 234                if (tag == VPD_END_OF_AREA)
 235                        break;
 236                len = *(data + 1) + (*(data + 2) * 256);
 237                data += 3;
 238                data_len -= 3;
 239                if (tag == VPD_ID_STRING)
 240                        phb = iseries_parse_phbid(data, len);
 241                else if (tag == VPD_VENDOR_AREA)
 242                        iseries_parse_mfg_area((struct mfg_vpd_area *)data, len,
 243                                        agent, &phb, frame, card);
 244                /* Point to next Area. */
 245                data += len;
 246                data_len -= len;
 247        }
 248}
 249
 250static int __init iseries_get_location_code(u16 bus, HvAgentId agent,
 251                u8 *frame, char card[4])
 252{
 253        int status = 0;
 254        int bus_vpd_len = 0;
 255        u8 *bus_vpd = kmalloc(BUS_VPDSIZE, GFP_KERNEL);
 256
 257        if (bus_vpd == NULL) {
 258                printk("PCI: Bus VPD Buffer allocation failure.\n");
 259                return 0;
 260        }
 261        bus_vpd_len = HvCallPci_getBusVpd(bus, iseries_hv_addr(bus_vpd),
 262                                        BUS_VPDSIZE);
 263        if (bus_vpd_len == 0) {
 264                printk("PCI: Bus VPD Buffer zero length.\n");
 265                goto out_free;
 266        }
 267        /* printk("PCI: bus_vpd: %p, %d\n",bus_vpd, bus_vpd_len); */
 268        /* Make sure this is what I think it is */
 269        if (*bus_vpd != VPD_ID_STRING) {
 270                printk("PCI: Bus VPD Buffer missing starting tag.\n");
 271                goto out_free;
 272        }
 273        iseries_parse_vpd(bus_vpd, bus_vpd_len, agent, frame, card);
 274        status = 1;
 275out_free:
 276        kfree(bus_vpd);
 277        return status;
 278}
 279
 280/*
 281 * Prints the device information.
 282 * - Pass in pci_dev* pointer to the device.
 283 * - Pass in the device count
 284 *
 285 * Format:
 286 * PCI: Bus  0, Device 26, Vendor 0x12AE  Frame  1, Card  C10  Ethernet
 287 * controller
 288 */
 289static void __init iseries_device_information(struct pci_dev *pdev,
 290                                              u16 bus, HvSubBusNumber subbus)
 291{
 292        u8 frame = 0;
 293        char card[4];
 294        HvAgentId agent;
 295
 296        agent = ISERIES_PCI_AGENTID(ISERIES_GET_DEVICE_FROM_SUBBUS(subbus),
 297                        ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus));
 298
 299        if (iseries_get_location_code(bus, agent, &frame, card)) {
 300                printk(KERN_INFO "PCI: %s, Vendor %04X Frame%3d, "
 301                       "Card %4s  0x%04X\n", pci_name(pdev), pdev->vendor,
 302                       frame, card, (int)(pdev->class >> 8));
 303        }
 304}
 305
 306/*
 307 * iomm_table_allocate_entry
 308 *
 309 * Adds pci_dev entry in address translation table
 310 *
 311 * - Allocates the number of entries required in table base on BAR
 312 *   size.
 313 * - Allocates starting at BASE_IO_MEMORY and increases.
 314 * - The size is round up to be a multiple of entry size.
 315 * - CurrentIndex is incremented to keep track of the last entry.
 316 * - Builds the resource entry for allocated BARs.
 317 */
 318static void __init iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
 319{
 320        struct resource *bar_res = &dev->resource[bar_num];
 321        long bar_size = pci_resource_len(dev, bar_num);
 322        struct device_node *dn = pci_device_to_OF_node(dev);
 323
 324        /*
 325         * No space to allocate, quick exit, skip Allocation.
 326         */
 327        if (bar_size == 0)
 328                return;
 329        /*
 330         * Set Resource values.
 331         */
 332        spin_lock(&iomm_table_lock);
 333        bar_res->start = BASE_IO_MEMORY +
 334                IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
 335        bar_res->end = bar_res->start + bar_size - 1;
 336        /*
 337         * Allocate the number of table entries needed for BAR.
 338         */
 339        while (bar_size > 0 ) {
 340                iomm_table[current_iomm_table_entry] = dn;
 341                ds_addr_table[current_iomm_table_entry] =
 342                        iseries_ds_addr(dn) | (bar_num << 24);
 343                bar_size -= IOMM_TABLE_ENTRY_SIZE;
 344                ++current_iomm_table_entry;
 345        }
 346        max_io_memory = BASE_IO_MEMORY +
 347                IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
 348        spin_unlock(&iomm_table_lock);
 349}
 350
 351/*
 352 * allocate_device_bars
 353 *
 354 * - Allocates ALL pci_dev BAR's and updates the resources with the
 355 *   BAR value.  BARS with zero length will have the resources
 356 *   The HvCallPci_getBarParms is used to get the size of the BAR
 357 *   space.  It calls iomm_table_allocate_entry to allocate
 358 *   each entry.
 359 * - Loops through The Bar resources(0 - 5) including the ROM
 360 *   is resource(6).
 361 */
 362static void __init allocate_device_bars(struct pci_dev *dev)
 363{
 364        int bar_num;
 365
 366        for (bar_num = 0; bar_num <= PCI_ROM_RESOURCE; ++bar_num)
 367                iomm_table_allocate_entry(dev, bar_num);
 368}
 369
 370/*
 371 * Log error information to system console.
 372 * Filter out the device not there errors.
 373 * PCI: EADs Connect Failed 0x18.58.10 Rc: 0x00xx
 374 * PCI: Read Vendor Failed 0x18.58.10 Rc: 0x00xx
 375 * PCI: Connect Bus Unit Failed 0x18.58.10 Rc: 0x00xx
 376 */
 377static void pci_log_error(char *error, int bus, int subbus,
 378                int agent, int hv_res)
 379{
 380        if (hv_res == 0x0302)
 381                return;
 382        printk(KERN_ERR "PCI: %s Failed: 0x%02X.%02X.%02X Rc: 0x%04X",
 383               error, bus, subbus, agent, hv_res);
 384}
 385
 386/*
 387 * Look down the chain to find the matching Device Device
 388 */
 389static struct device_node *find_device_node(int bus, int devfn)
 390{
 391        struct device_node *node;
 392
 393        for (node = NULL; (node = of_find_all_nodes(node)); ) {
 394                struct pci_dn *pdn = PCI_DN(node);
 395
 396                if (pdn && (bus == pdn->busno) && (devfn == pdn->devfn))
 397                        return node;
 398        }
 399        return NULL;
 400}
 401
 402/*
 403 * iSeries_pcibios_fixup_resources
 404 *
 405 * Fixes up all resources for devices
 406 */
 407void __init iSeries_pcibios_fixup_resources(struct pci_dev *pdev)
 408{
 409        const u32 *agent;
 410        const u32 *sub_bus;
 411        unsigned char bus = pdev->bus->number;
 412        struct device_node *node;
 413        int i;
 414
 415        node = pci_device_to_OF_node(pdev);
 416        pr_debug("PCI: iSeries %s, pdev %p, node %p\n",
 417                 pci_name(pdev), pdev, node);
 418        if (!node) {
 419                printk("PCI: %s disabled, device tree entry not found !\n",
 420                       pci_name(pdev));
 421                for (i = 0; i <= PCI_ROM_RESOURCE; i++)
 422                        pdev->resource[i].flags = 0;
 423                return;
 424        }
 425        sub_bus = of_get_property(node, "linux,subbus", NULL);
 426        agent = of_get_property(node, "linux,agent-id", NULL);
 427        if (agent && sub_bus) {
 428                u8 irq = iSeries_allocate_IRQ(bus, 0, *sub_bus);
 429                int err;
 430
 431                err = HvCallXm_connectBusUnit(bus, *sub_bus, *agent, irq);
 432                if (err)
 433                        pci_log_error("Connect Bus Unit",
 434                                      bus, *sub_bus, *agent, err);
 435                else {
 436                        err = HvCallPci_configStore8(bus, *sub_bus,
 437                                        *agent, PCI_INTERRUPT_LINE, irq);
 438                        if (err)
 439                                pci_log_error("PciCfgStore Irq Failed!",
 440                                                bus, *sub_bus, *agent, err);
 441                        else
 442                                pdev->irq = irq;
 443                }
 444        }
 445
 446        allocate_device_bars(pdev);
 447        if (likely(sub_bus))
 448                iseries_device_information(pdev, bus, *sub_bus);
 449        else
 450                printk(KERN_ERR "PCI: Device node %s has missing or invalid "
 451                                "linux,subbus property\n", node->full_name);
 452}
 453
 454/*
 455 * iSeries_pci_final_fixup(void)
 456 */
 457void __init iSeries_pci_final_fixup(void)
 458{
 459        /* Fix up at the device node and pci_dev relationship */
 460        mf_display_src(0xC9000100);
 461        iSeries_activate_IRQs();
 462        mf_display_src(0xC9000200);
 463}
 464
 465/*
 466 * Config space read and write functions.
 467 * For now at least, we look for the device node for the bus and devfn
 468 * that we are asked to access.  It may be possible to translate the devfn
 469 * to a subbus and deviceid more directly.
 470 */
 471static u64 hv_cfg_read_func[4]  = {
 472        HvCallPciConfigLoad8, HvCallPciConfigLoad16,
 473        HvCallPciConfigLoad32, HvCallPciConfigLoad32
 474};
 475
 476static u64 hv_cfg_write_func[4] = {
 477        HvCallPciConfigStore8, HvCallPciConfigStore16,
 478        HvCallPciConfigStore32, HvCallPciConfigStore32
 479};
 480
 481/*
 482 * Read PCI config space
 483 */
 484static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
 485                int offset, int size, u32 *val)
 486{
 487        struct device_node *node = find_device_node(bus->number, devfn);
 488        u64 fn;
 489        struct HvCallPci_LoadReturn ret;
 490
 491        if (node == NULL)
 492                return PCIBIOS_DEVICE_NOT_FOUND;
 493        if (offset > 255) {
 494                *val = ~0;
 495                return PCIBIOS_BAD_REGISTER_NUMBER;
 496        }
 497
 498        fn = hv_cfg_read_func[(size - 1) & 3];
 499        HvCall3Ret16(fn, &ret, iseries_ds_addr(node), offset, 0);
 500
 501        if (ret.rc != 0) {
 502                *val = ~0;
 503                return PCIBIOS_DEVICE_NOT_FOUND;        /* or something */
 504        }
 505
 506        *val = ret.value;
 507        return 0;
 508}
 509
 510/*
 511 * Write PCI config space
 512 */
 513
 514static int iSeries_pci_write_config(struct pci_bus *bus, unsigned int devfn,
 515                int offset, int size, u32 val)
 516{
 517        struct device_node *node = find_device_node(bus->number, devfn);
 518        u64 fn;
 519        u64 ret;
 520
 521        if (node == NULL)
 522                return PCIBIOS_DEVICE_NOT_FOUND;
 523        if (offset > 255)
 524                return PCIBIOS_BAD_REGISTER_NUMBER;
 525
 526        fn = hv_cfg_write_func[(size - 1) & 3];
 527        ret = HvCall4(fn, iseries_ds_addr(node), offset, val, 0);
 528
 529        if (ret != 0)
 530                return PCIBIOS_DEVICE_NOT_FOUND;
 531
 532        return 0;
 533}
 534
 535static struct pci_ops iSeries_pci_ops = {
 536        .read = iSeries_pci_read_config,
 537        .write = iSeries_pci_write_config
 538};
 539
 540/*
 541 * Check Return Code
 542 * -> On Failure, print and log information.
 543 *    Increment Retry Count, if exceeds max, panic partition.
 544 *
 545 * PCI: Device 23.90 ReadL I/O Error( 0): 0x1234
 546 * PCI: Device 23.90 ReadL Retry( 1)
 547 * PCI: Device 23.90 ReadL Retry Successful(1)
 548 */
 549static int check_return_code(char *type, struct device_node *dn,
 550                int *retry, u64 ret)
 551{
 552        if (ret != 0)  {
 553                struct pci_dn *pdn = PCI_DN(dn);
 554
 555                (*retry)++;
 556                printk("PCI: %s: Device 0x%04X:%02X  I/O Error(%2d): 0x%04X\n",
 557                                type, pdn->busno, pdn->devfn,
 558                                *retry, (int)ret);
 559                /*
 560                 * Bump the retry and check for retry count exceeded.
 561                 * If, Exceeded, panic the system.
 562                 */
 563                if (((*retry) > PCI_RETRY_MAX) &&
 564                                (limit_pci_retries > 0)) {
 565                        mf_display_src(0xB6000103);
 566                        panic_timeout = 0;
 567                        panic("PCI: Hardware I/O Error, SRC B6000103, "
 568                                        "Automatic Reboot Disabled.\n");
 569                }
 570                return -1;      /* Retry Try */
 571        }
 572        return 0;
 573}
 574
 575/*
 576 * Translate the I/O Address into a device node, bar, and bar offset.
 577 * Note: Make sure the passed variable end up on the stack to avoid
 578 * the exposure of being device global.
 579 */
 580static inline struct device_node *xlate_iomm_address(
 581                const volatile void __iomem *addr,
 582                u64 *dsaptr, u64 *bar_offset, const char *func)
 583{
 584        unsigned long orig_addr;
 585        unsigned long base_addr;
 586        unsigned long ind;
 587        struct device_node *dn;
 588
 589        orig_addr = (unsigned long __force)addr;
 590        if ((orig_addr < BASE_IO_MEMORY) || (orig_addr >= max_io_memory)) {
 591                static DEFINE_RATELIMIT_STATE(ratelimit, 60 * HZ, 10);
 592
 593                if (__ratelimit(&ratelimit))
 594                        printk(KERN_ERR
 595                                "iSeries_%s: invalid access at IO address %p\n",
 596                                func, addr);
 597                return NULL;
 598        }
 599        base_addr = orig_addr - BASE_IO_MEMORY;
 600        ind = base_addr / IOMM_TABLE_ENTRY_SIZE;
 601        dn = iomm_table[ind];
 602
 603        if (dn != NULL) {
 604                *dsaptr = ds_addr_table[ind];
 605                *bar_offset = base_addr % IOMM_TABLE_ENTRY_SIZE;
 606        } else
 607                panic("PCI: Invalid PCI IO address detected!\n");
 608        return dn;
 609}
 610
 611/*
 612 * Read MM I/O Instructions for the iSeries
 613 * On MM I/O error, all ones are returned and iSeries_pci_IoError is cal
 614 * else, data is returned in Big Endian format.
 615 */
 616static u8 iseries_readb(const volatile void __iomem *addr)
 617{
 618        u64 bar_offset;
 619        u64 dsa;
 620        int retry = 0;
 621        struct HvCallPci_LoadReturn ret;
 622        struct device_node *dn =
 623                xlate_iomm_address(addr, &dsa, &bar_offset, "read_byte");
 624
 625        if (dn == NULL)
 626                return 0xff;
 627        do {
 628                HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, bar_offset, 0);
 629        } while (check_return_code("RDB", dn, &retry, ret.rc) != 0);
 630
 631        return ret.value;
 632}
 633
 634static u16 iseries_readw_be(const volatile void __iomem *addr)
 635{
 636        u64 bar_offset;
 637        u64 dsa;
 638        int retry = 0;
 639        struct HvCallPci_LoadReturn ret;
 640        struct device_node *dn =
 641                xlate_iomm_address(addr, &dsa, &bar_offset, "read_word");
 642
 643        if (dn == NULL)
 644                return 0xffff;
 645        do {
 646                HvCall3Ret16(HvCallPciBarLoad16, &ret, dsa,
 647                                bar_offset, 0);
 648        } while (check_return_code("RDW", dn, &retry, ret.rc) != 0);
 649
 650        return ret.value;
 651}
 652
 653static u32 iseries_readl_be(const volatile void __iomem *addr)
 654{
 655        u64 bar_offset;
 656        u64 dsa;
 657        int retry = 0;
 658        struct HvCallPci_LoadReturn ret;
 659        struct device_node *dn =
 660                xlate_iomm_address(addr, &dsa, &bar_offset, "read_long");
 661
 662        if (dn == NULL)
 663                return 0xffffffff;
 664        do {
 665                HvCall3Ret16(HvCallPciBarLoad32, &ret, dsa,
 666                                bar_offset, 0);
 667        } while (check_return_code("RDL", dn, &retry, ret.rc) != 0);
 668
 669        return ret.value;
 670}
 671
 672/*
 673 * Write MM I/O Instructions for the iSeries
 674 *
 675 */
 676static void iseries_writeb(u8 data, volatile void __iomem *addr)
 677{
 678        u64 bar_offset;
 679        u64 dsa;
 680        int retry = 0;
 681        u64 rc;
 682        struct device_node *dn =
 683                xlate_iomm_address(addr, &dsa, &bar_offset, "write_byte");
 684
 685        if (dn == NULL)
 686                return;
 687        do {
 688                rc = HvCall4(HvCallPciBarStore8, dsa, bar_offset, data, 0);
 689        } while (check_return_code("WWB", dn, &retry, rc) != 0);
 690}
 691
 692static void iseries_writew_be(u16 data, volatile void __iomem *addr)
 693{
 694        u64 bar_offset;
 695        u64 dsa;
 696        int retry = 0;
 697        u64 rc;
 698        struct device_node *dn =
 699                xlate_iomm_address(addr, &dsa, &bar_offset, "write_word");
 700
 701        if (dn == NULL)
 702                return;
 703        do {
 704                rc = HvCall4(HvCallPciBarStore16, dsa, bar_offset, data, 0);
 705        } while (check_return_code("WWW", dn, &retry, rc) != 0);
 706}
 707
 708static void iseries_writel_be(u32 data, volatile void __iomem *addr)
 709{
 710        u64 bar_offset;
 711        u64 dsa;
 712        int retry = 0;
 713        u64 rc;
 714        struct device_node *dn =
 715                xlate_iomm_address(addr, &dsa, &bar_offset, "write_long");
 716
 717        if (dn == NULL)
 718                return;
 719        do {
 720                rc = HvCall4(HvCallPciBarStore32, dsa, bar_offset, data, 0);
 721        } while (check_return_code("WWL", dn, &retry, rc) != 0);
 722}
 723
 724static u16 iseries_readw(const volatile void __iomem *addr)
 725{
 726        return le16_to_cpu(iseries_readw_be(addr));
 727}
 728
 729static u32 iseries_readl(const volatile void __iomem *addr)
 730{
 731        return le32_to_cpu(iseries_readl_be(addr));
 732}
 733
 734static void iseries_writew(u16 data, volatile void __iomem *addr)
 735{
 736        iseries_writew_be(cpu_to_le16(data), addr);
 737}
 738
 739static void iseries_writel(u32 data, volatile void __iomem *addr)
 740{
 741        iseries_writel(cpu_to_le32(data), addr);
 742}
 743
 744static void iseries_readsb(const volatile void __iomem *addr, void *buf,
 745                           unsigned long count)
 746{
 747        u8 *dst = buf;
 748        while(count-- > 0)
 749                *(dst++) = iseries_readb(addr);
 750}
 751
 752static void iseries_readsw(const volatile void __iomem *addr, void *buf,
 753                           unsigned long count)
 754{
 755        u16 *dst = buf;
 756        while(count-- > 0)
 757                *(dst++) = iseries_readw_be(addr);
 758}
 759
 760static void iseries_readsl(const volatile void __iomem *addr, void *buf,
 761                           unsigned long count)
 762{
 763        u32 *dst = buf;
 764        while(count-- > 0)
 765                *(dst++) = iseries_readl_be(addr);
 766}
 767
 768static void iseries_writesb(volatile void __iomem *addr, const void *buf,
 769                            unsigned long count)
 770{
 771        const u8 *src = buf;
 772        while(count-- > 0)
 773                iseries_writeb(*(src++), addr);
 774}
 775
 776static void iseries_writesw(volatile void __iomem *addr, const void *buf,
 777                            unsigned long count)
 778{
 779        const u16 *src = buf;
 780        while(count-- > 0)
 781                iseries_writew_be(*(src++), addr);
 782}
 783
 784static void iseries_writesl(volatile void __iomem *addr, const void *buf,
 785                            unsigned long count)
 786{
 787        const u32 *src = buf;
 788        while(count-- > 0)
 789                iseries_writel_be(*(src++), addr);
 790}
 791
 792static void iseries_memset_io(volatile void __iomem *addr, int c,
 793                              unsigned long n)
 794{
 795        volatile char __iomem *d = addr;
 796
 797        while (n-- > 0)
 798                iseries_writeb(c, d++);
 799}
 800
 801static void iseries_memcpy_fromio(void *dest, const volatile void __iomem *src,
 802                                  unsigned long n)
 803{
 804        char *d = dest;
 805        const volatile char __iomem *s = src;
 806
 807        while (n-- > 0)
 808                *d++ = iseries_readb(s++);
 809}
 810
 811static void iseries_memcpy_toio(volatile void __iomem *dest, const void *src,
 812                                unsigned long n)
 813{
 814        const char *s = src;
 815        volatile char __iomem *d = dest;
 816
 817        while (n-- > 0)
 818                iseries_writeb(*s++, d++);
 819}
 820
 821/* We only set MMIO ops. The default PIO ops will be default
 822 * to the MMIO ops + pci_io_base which is 0 on iSeries as
 823 * expected so both should work.
 824 *
 825 * Note that we don't implement the readq/writeq versions as
 826 * I don't know of an HV call for doing so. Thus, the default
 827 * operation will be used instead, which will fault a the value
 828 * return by iSeries for MMIO addresses always hits a non mapped
 829 * area. This is as good as the BUG() we used to have there.
 830 */
 831static struct ppc_pci_io __initdata iseries_pci_io = {
 832        .readb = iseries_readb,
 833        .readw = iseries_readw,
 834        .readl = iseries_readl,
 835        .readw_be = iseries_readw_be,
 836        .readl_be = iseries_readl_be,
 837        .writeb = iseries_writeb,
 838        .writew = iseries_writew,
 839        .writel = iseries_writel,
 840        .writew_be = iseries_writew_be,
 841        .writel_be = iseries_writel_be,
 842        .readsb = iseries_readsb,
 843        .readsw = iseries_readsw,
 844        .readsl = iseries_readsl,
 845        .writesb = iseries_writesb,
 846        .writesw = iseries_writesw,
 847        .writesl = iseries_writesl,
 848        .memset_io = iseries_memset_io,
 849        .memcpy_fromio = iseries_memcpy_fromio,
 850        .memcpy_toio = iseries_memcpy_toio,
 851};
 852
 853/*
 854 * iSeries_pcibios_init
 855 *
 856 * Description:
 857 *   This function checks for all possible system PCI host bridges that connect
 858 *   PCI buses.  The system hypervisor is queried as to the guest partition
 859 *   ownership status.  A pci_controller is built for any bus which is partially
 860 *   owned or fully owned by this guest partition.
 861 */
 862void __init iSeries_pcibios_init(void)
 863{
 864        struct pci_controller *phb;
 865        struct device_node *root = of_find_node_by_path("/");
 866        struct device_node *node = NULL;
 867
 868        /* Install IO hooks */
 869        ppc_pci_io = iseries_pci_io;
 870
 871        pci_probe_only = 1;
 872
 873        /* iSeries has no IO space in the common sense, it needs to set
 874         * the IO base to 0
 875         */
 876        pci_io_base = 0;
 877
 878        if (root == NULL) {
 879                printk(KERN_CRIT "iSeries_pcibios_init: can't find root "
 880                                "of device tree\n");
 881                return;
 882        }
 883        while ((node = of_get_next_child(root, node)) != NULL) {
 884                HvBusNumber bus;
 885                const u32 *busp;
 886
 887                if ((node->type == NULL) || (strcmp(node->type, "pci") != 0))
 888                        continue;
 889
 890                busp = of_get_property(node, "bus-range", NULL);
 891                if (busp == NULL)
 892                        continue;
 893                bus = *busp;
 894                printk("bus %d appears to exist\n", bus);
 895                phb = pcibios_alloc_controller(node);
 896                if (phb == NULL)
 897                        continue;
 898                /* All legacy iSeries PHBs are in domain zero */
 899                phb->global_number = 0;
 900
 901                phb->first_busno = bus;
 902                phb->last_busno = bus;
 903                phb->ops = &iSeries_pci_ops;
 904                phb->io_base_virt = (void __iomem *)_IO_BASE;
 905                phb->io_resource.flags = IORESOURCE_IO;
 906                phb->io_resource.start = BASE_IO_MEMORY;
 907                phb->io_resource.end = END_IO_MEMORY;
 908                phb->io_resource.name = "iSeries PCI IO";
 909                phb->mem_resources[0].flags = IORESOURCE_MEM;
 910                phb->mem_resources[0].start = BASE_IO_MEMORY;
 911                phb->mem_resources[0].end = END_IO_MEMORY;
 912                phb->mem_resources[0].name = "Series PCI MEM";
 913        }
 914
 915        of_node_put(root);
 916
 917        pci_devs_phb_init();
 918}
 919
 920