linux/arch/powerpc/platforms/85xx/p3060_qds.c
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   1/*
   2 * P3060 QDS Setup
   3 *
   4 * Copyright 2011 Freescale Semiconductor Inc.
   5 *
   6 * This program is free software; you can redistribute  it and/or modify it
   7 * under  the terms of  the GNU General  Public License as published by the
   8 * Free Software Foundation;  either version 2 of the  License, or (at your
   9 * option) any later version.
  10 */
  11
  12#include <linux/kernel.h>
  13#include <linux/interrupt.h>
  14#include <linux/phy.h>
  15#include <asm/machdep.h>
  16#include <asm/udbg.h>
  17#include <asm/mpic.h>
  18#include <linux/of_platform.h>
  19#include <sysdev/fsl_soc.h>
  20#include <sysdev/fsl_pci.h>
  21#include <asm/ehv_pic.h>
  22#include "corenet_ds.h"
  23
  24/*
  25 * Called very early, device-tree isn't unflattened
  26 */
  27static int __init p3060_qds_probe(void)
  28{
  29        unsigned long root = of_get_flat_dt_root();
  30#ifdef CONFIG_SMP
  31        extern struct smp_ops_t smp_85xx_ops;
  32#endif
  33
  34        if (of_flat_dt_is_compatible(root, "fsl,P3060QDS"))
  35                return 1;
  36
  37        /* Check if we're running under the Freescale hypervisor */
  38        if (of_flat_dt_is_compatible(root, "fsl,P3060QDS-hv")) {
  39                ppc_md.init_IRQ = ehv_pic_init;
  40                ppc_md.get_irq = ehv_pic_get_irq;
  41                ppc_md.restart = fsl_hv_restart;
  42                ppc_md.power_off = fsl_hv_halt;
  43                ppc_md.halt = fsl_hv_halt;
  44#ifdef CONFIG_SMP
  45                /*
  46                 * Disable the timebase sync operations because we can't write
  47                 * to the timebase registers under the hypervisor.
  48                 */
  49                smp_85xx_ops.give_timebase = NULL;
  50                smp_85xx_ops.take_timebase = NULL;
  51#endif
  52                return 1;
  53        }
  54
  55        return 0;
  56}
  57
  58define_machine(p3060_qds) {
  59        .name                   = "P3060 QDS",
  60        .probe                  = p3060_qds_probe,
  61        .setup_arch             = corenet_ds_setup_arch,
  62        .init_IRQ               = corenet_ds_pic_init,
  63#ifdef CONFIG_PCI
  64        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
  65#endif
  66        .get_irq                = mpic_get_coreint_irq,
  67        .restart                = fsl_rstcr_restart,
  68        .calibrate_decr         = generic_calibrate_decr,
  69        .progress               = udbg_progress,
  70        .power_save             = e500_idle,
  71};
  72
  73machine_device_initcall(p3060_qds, corenet_ds_publish_devices);
  74
  75#ifdef CONFIG_SWIOTLB
  76machine_arch_initcall(p3060_qds, swiotlb_setup_bus_notifier);
  77#endif
  78