1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28#include <linux/init.h>
29#include <linux/module.h>
30#include <linux/pci.h>
31#include <linux/interrupt.h>
32#include <linux/dca.h>
33#include <linux/slab.h>
34#include "dma.h"
35#include "dma_v2.h"
36#include "registers.h"
37#include "hw.h"
38
39MODULE_VERSION(IOAT_DMA_VERSION);
40MODULE_LICENSE("Dual BSD/GPL");
41MODULE_AUTHOR("Intel Corporation");
42
43static struct pci_device_id ioat_pci_tbl[] = {
44
45 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT) },
46 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_CNB) },
47 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SCNB) },
48 { PCI_VDEVICE(UNISYS, PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR) },
49
50
51 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB) },
52
53
54 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG0) },
55 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG1) },
56 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG2) },
57 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG3) },
58 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG4) },
59 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG5) },
60 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG6) },
61 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG7) },
62
63
64 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF0) },
65 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF1) },
66 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF2) },
67 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF3) },
68 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF4) },
69 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF5) },
70 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF6) },
71 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF7) },
72 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF8) },
73 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF9) },
74
75 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB0) },
76 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB1) },
77 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB2) },
78 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB3) },
79 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB4) },
80 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB5) },
81 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB6) },
82 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB7) },
83 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB8) },
84 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB9) },
85
86 { 0, }
87};
88MODULE_DEVICE_TABLE(pci, ioat_pci_tbl);
89
90static int __devinit ioat_pci_probe(struct pci_dev *pdev,
91 const struct pci_device_id *id);
92static void __devexit ioat_remove(struct pci_dev *pdev);
93
94static int ioat_dca_enabled = 1;
95module_param(ioat_dca_enabled, int, 0644);
96MODULE_PARM_DESC(ioat_dca_enabled, "control support of dca service (default: 1)");
97
98struct kmem_cache *ioat2_cache;
99
100#define DRV_NAME "ioatdma"
101
102static struct pci_driver ioat_pci_driver = {
103 .name = DRV_NAME,
104 .id_table = ioat_pci_tbl,
105 .probe = ioat_pci_probe,
106 .remove = __devexit_p(ioat_remove),
107};
108
109static struct ioatdma_device *
110alloc_ioatdma(struct pci_dev *pdev, void __iomem *iobase)
111{
112 struct device *dev = &pdev->dev;
113 struct ioatdma_device *d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);
114
115 if (!d)
116 return NULL;
117 d->pdev = pdev;
118 d->reg_base = iobase;
119 return d;
120}
121
122static int __devinit ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
123{
124 void __iomem * const *iomap;
125 struct device *dev = &pdev->dev;
126 struct ioatdma_device *device;
127 int err;
128
129 err = pcim_enable_device(pdev);
130 if (err)
131 return err;
132
133 err = pcim_iomap_regions(pdev, 1 << IOAT_MMIO_BAR, DRV_NAME);
134 if (err)
135 return err;
136 iomap = pcim_iomap_table(pdev);
137 if (!iomap)
138 return -ENOMEM;
139
140 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
141 if (err)
142 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
143 if (err)
144 return err;
145
146 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
147 if (err)
148 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
149 if (err)
150 return err;
151
152 device = alloc_ioatdma(pdev, iomap[IOAT_MMIO_BAR]);
153 if (!device)
154 return -ENOMEM;
155 pci_set_master(pdev);
156 pci_set_drvdata(pdev, device);
157
158 device->version = readb(device->reg_base + IOAT_VER_OFFSET);
159 if (device->version == IOAT_VER_1_2)
160 err = ioat1_dma_probe(device, ioat_dca_enabled);
161 else if (device->version == IOAT_VER_2_0)
162 err = ioat2_dma_probe(device, ioat_dca_enabled);
163 else if (device->version >= IOAT_VER_3_0)
164 err = ioat3_dma_probe(device, ioat_dca_enabled);
165 else
166 return -ENODEV;
167
168 if (err) {
169 dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n");
170 return -ENODEV;
171 }
172
173 return 0;
174}
175
176static void __devexit ioat_remove(struct pci_dev *pdev)
177{
178 struct ioatdma_device *device = pci_get_drvdata(pdev);
179
180 if (!device)
181 return;
182
183 dev_err(&pdev->dev, "Removing dma and dca services\n");
184 if (device->dca) {
185 unregister_dca_provider(device->dca, &pdev->dev);
186 free_dca_provider(device->dca);
187 device->dca = NULL;
188 }
189 ioat_dma_remove(device);
190}
191
192static int __init ioat_init_module(void)
193{
194 int err;
195
196 pr_info("%s: Intel(R) QuickData Technology Driver %s\n",
197 DRV_NAME, IOAT_DMA_VERSION);
198
199 ioat2_cache = kmem_cache_create("ioat2", sizeof(struct ioat_ring_ent),
200 0, SLAB_HWCACHE_ALIGN, NULL);
201 if (!ioat2_cache)
202 return -ENOMEM;
203
204 err = pci_register_driver(&ioat_pci_driver);
205 if (err)
206 kmem_cache_destroy(ioat2_cache);
207
208 return err;
209}
210module_init(ioat_init_module);
211
212static void __exit ioat_exit_module(void)
213{
214 pci_unregister_driver(&ioat_pci_driver);
215 kmem_cache_destroy(ioat2_cache);
216}
217module_exit(ioat_exit_module);
218
