linux/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
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   1* Freescale 83xx DMA Controller
   2
   3Freescale PowerPC 83xx have on chip general purpose DMA controllers.
   4
   5Required properties:
   6
   7- compatible        : compatible list, contains 2 entries, first is
   8                 "fsl,CHIP-dma", where CHIP is the processor
   9                 (mpc8349, mpc8360, etc.) and the second is
  10                 "fsl,elo-dma"
  11- reg               : <registers mapping for DMA general status reg>
  12- ranges                : Should be defined as specified in 1) to describe the
  13                  DMA controller channels.
  14- cell-index        : controller index.  0 for controller @ 0x8100
  15- interrupts        : <interrupt mapping for DMA IRQ>
  16- interrupt-parent  : optional, if needed for interrupt mapping
  17
  18
  19- DMA channel nodes:
  20        - compatible        : compatible list, contains 2 entries, first is
  21                         "fsl,CHIP-dma-channel", where CHIP is the processor
  22                         (mpc8349, mpc8350, etc.) and the second is
  23                         "fsl,elo-dma-channel". However, see note below.
  24        - reg               : <registers mapping for channel>
  25        - cell-index        : dma channel index starts at 0.
  26
  27Optional properties:
  28        - interrupts        : <interrupt mapping for DMA channel IRQ>
  29                          (on 83xx this is expected to be identical to
  30                           the interrupts property of the parent node)
  31        - interrupt-parent  : optional, if needed for interrupt mapping
  32
  33Example:
  34        dma@82a8 {
  35                #address-cells = <1>;
  36                #size-cells = <1>;
  37                compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
  38                reg = <0x82a8 4>;
  39                ranges = <0 0x8100 0x1a4>;
  40                interrupt-parent = <&ipic>;
  41                interrupts = <71 8>;
  42                cell-index = <0>;
  43                dma-channel@0 {
  44                        compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  45                        cell-index = <0>;
  46                        reg = <0 0x80>;
  47                        interrupt-parent = <&ipic>;
  48                        interrupts = <71 8>;
  49                };
  50                dma-channel@80 {
  51                        compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  52                        cell-index = <1>;
  53                        reg = <0x80 0x80>;
  54                        interrupt-parent = <&ipic>;
  55                        interrupts = <71 8>;
  56                };
  57                dma-channel@100 {
  58                        compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  59                        cell-index = <2>;
  60                        reg = <0x100 0x80>;
  61                        interrupt-parent = <&ipic>;
  62                        interrupts = <71 8>;
  63                };
  64                dma-channel@180 {
  65                        compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  66                        cell-index = <3>;
  67                        reg = <0x180 0x80>;
  68                        interrupt-parent = <&ipic>;
  69                        interrupts = <71 8>;
  70                };
  71        };
  72
  73* Freescale 85xx/86xx DMA Controller
  74
  75Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
  76
  77Required properties:
  78
  79- compatible        : compatible list, contains 2 entries, first is
  80                 "fsl,CHIP-dma", where CHIP is the processor
  81                 (mpc8540, mpc8540, etc.) and the second is
  82                 "fsl,eloplus-dma"
  83- reg               : <registers mapping for DMA general status reg>
  84- cell-index        : controller index.  0 for controller @ 0x21000,
  85                                         1 for controller @ 0xc000
  86- ranges                : Should be defined as specified in 1) to describe the
  87                  DMA controller channels.
  88
  89- DMA channel nodes:
  90        - compatible        : compatible list, contains 2 entries, first is
  91                         "fsl,CHIP-dma-channel", where CHIP is the processor
  92                         (mpc8540, mpc8560, etc.) and the second is
  93                         "fsl,eloplus-dma-channel". However, see note below.
  94        - cell-index        : dma channel index starts at 0.
  95        - reg               : <registers mapping for channel>
  96        - interrupts        : <interrupt mapping for DMA channel IRQ>
  97        - interrupt-parent  : optional, if needed for interrupt mapping
  98
  99Example:
 100        dma@21300 {
 101                #address-cells = <1>;
 102                #size-cells = <1>;
 103                compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
 104                reg = <0x21300 4>;
 105                ranges = <0 0x21100 0x200>;
 106                cell-index = <0>;
 107                dma-channel@0 {
 108                        compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
 109                        reg = <0 0x80>;
 110                        cell-index = <0>;
 111                        interrupt-parent = <&mpic>;
 112                        interrupts = <20 2>;
 113                };
 114                dma-channel@80 {
 115                        compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
 116                        reg = <0x80 0x80>;
 117                        cell-index = <1>;
 118                        interrupt-parent = <&mpic>;
 119                        interrupts = <21 2>;
 120                };
 121                dma-channel@100 {
 122                        compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
 123                        reg = <0x100 0x80>;
 124                        cell-index = <2>;
 125                        interrupt-parent = <&mpic>;
 126                        interrupts = <22 2>;
 127                };
 128                dma-channel@180 {
 129                        compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
 130                        reg = <0x180 0x80>;
 131                        cell-index = <3>;
 132                        interrupt-parent = <&mpic>;
 133                        interrupts = <23 2>;
 134                };
 135        };
 136
 137Note on DMA channel compatible properties: The compatible property must say
 138"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
 139driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
 140DMA driver, such as the SSI sound drivers for the MPC8610.  Therefore, any DMA
 141channel that should be used for another driver should not use
 142"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel".  For the SSI drivers, for
 143example, the compatible property should be "fsl,ssi-dma-channel".  See ssi.txt
 144for more information.
 145