linux/Documentation/devicetree/bindings/clock/altr_socfpga.txt
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   1Device Tree Clock bindings for Altera's SoCFPGA platform
   2
   3This binding uses the common clock binding[1].
   4
   5[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
   6
   7Required properties:
   8- compatible : shall be one of the following:
   9        "altr,socfpga-pll-clock" - for a PLL clock
  10        "altr,socfpga-perip-clock" - The peripheral clock divided from the
  11                PLL clock.
  12- reg : shall be the control register offset from CLOCK_MANAGER's base for the clock.
  13- clocks : shall be the input parent clock phandle for the clock. This is
  14        either an oscillator or a pll output.
  15- #clock-cells : from common clock binding, shall be set to 0.
  16
  17Optional properties:
  18- fixed-divider : If clocks have a fixed divider value, use this property.
  19