linux/Documentation/devicetree/bindings/arm/calxeda/l2ecc.txt
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   1Calxeda Highbank L2 cache ECC
   2
   3Properties:
   4- compatible : Should be "calxeda,hb-sregs-l2-ecc"
   5- reg : Address and size for ECC error interrupt clear registers.
   6- interrupts : Should be single bit error interrupt, then double bit error
   7        interrupt.
   8
   9Example:
  10
  11        sregs@fff3c200 {
  12                compatible = "calxeda,hb-sregs-l2-ecc";
  13                reg = <0xfff3c200 0x100>;
  14                interrupts = <0 71 4  0 72 4>;
  15        };
  16