1perf-list(1) 2============ 3 4NAME 5---- 6perf-list - List all symbolic event types 7 8SYNOPSIS 9-------- 10[verse] 11'perf list' 12 13DESCRIPTION 14----------- 15This command displays the symbolic event types which can be selected in the 16various perf commands with the -e option. 17 18EVENT MODIFIERS 19--------------- 20 21Events can optionally have a modifer by appending a colon and one or 22more modifiers. Modifiers allow the user to restrict when events are 23counted with 'u' for user-space, 'k' for kernel, 'h' for hypervisor. 24 25The 'p' modifier can be used for specifying how precise the instruction 26address should be. The 'p' modifier is currently only implemented for 27Intel PEBS and can be specified multiple times: 28 0 - SAMPLE_IP can have arbitrary skid 29 1 - SAMPLE_IP must have constant skid 30 2 - SAMPLE_IP requested to have 0 skid 31 3 - SAMPLE_IP must have 0 skid 32 33The PEBS implementation now supports up to 2. 34 35RAW HARDWARE EVENT DESCRIPTOR 36----------------------------- 37Even when an event is not available in a symbolic form within perf right now, 38it can be encoded in a per processor specific way. 39 40For instance For x86 CPUs NNN represents the raw register encoding with the 41layout of IA32_PERFEVTSELx MSRs (see [Intel\xC2\xAE 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide] Figure 30-1 Layout 42of IA32_PERFEVTSELx MSRs) or AMD's PerfEvtSeln (see [AMD64 Architecture Programmer\xE2\x80\x99s Manual Volume 2: System Programming], Page 344, 43Figure 13-7 Performance Event-Select Register (PerfEvtSeln)). 44 45Example: 46 47If the Intel docs for a QM720 Core i7 describe an event as: 48 49 Event Umask Event Mask 50 Num. Value Mnemonic Description Comment 51 52 A8H 01H LSD.UOPS Counts the number of micro-ops Use cmask=1 and 53 delivered by loop stream detector invert to count 54 cycles 55 56raw encoding of 0x1A8 can be used: 57 58 perf stat -e r1a8 -a sleep 1 59 perf record -e r1a8 ... 60 61You should refer to the processor specific documentation for getting these 62details. Some of them are referenced in the SEE ALSO section below. 63 64OPTIONS 65------- 66None 67 68SEE ALSO 69-------- 70linkperf:perf-stat[1], linkperf:perf-top[1], 71linkperf:perf-record[1], 72http://www.intel.com/Assets/PDF/manual/253669.pdf[Intel\xC2\xAE 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide], 73http://support.amd.com/us/Processor_TechDocs/24593.pdf[AMD64 Architecture Programmer\xE2\x80\x99s Manual Volume 2: System Programming] 74