linux/drivers/serial/cpm_uart/cpm_uart_core.c
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   1/*
   2 *  linux/drivers/serial/cpm_uart.c
   3 *
   4 *  Driver for CPM (SCC/SMC) serial ports; core driver
   5 *
   6 *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
   7 *  Based on ppc8xx.c by Thomas Gleixner
   8 *  Based on drivers/serial/amba.c by Russell King
   9 *
  10 *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
  11 *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
  12 *
  13 *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
  14 *            (C) 2004 Intracom, S.A.
  15 *            (C) 2005-2006 MontaVista Software, Inc.
  16 *              Vitaly Bordug <vbordug@ru.mvista.com>
  17 *
  18 * This program is free software; you can redistribute it and/or modify
  19 * it under the terms of the GNU General Public License as published by
  20 * the Free Software Foundation; either version 2 of the License, or
  21 * (at your option) any later version.
  22 *
  23 * This program is distributed in the hope that it will be useful,
  24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26 * GNU General Public License for more details.
  27 *
  28 * You should have received a copy of the GNU General Public License
  29 * along with this program; if not, write to the Free Software
  30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  31 *
  32 */
  33
  34#include <linux/module.h>
  35#include <linux/tty.h>
  36#include <linux/ioport.h>
  37#include <linux/init.h>
  38#include <linux/serial.h>
  39#include <linux/console.h>
  40#include <linux/sysrq.h>
  41#include <linux/device.h>
  42#include <linux/bootmem.h>
  43#include <linux/dma-mapping.h>
  44#include <linux/fs_uart_pd.h>
  45#include <linux/of_platform.h>
  46#include <linux/gpio.h>
  47#include <linux/of_gpio.h>
  48#include <linux/clk.h>
  49
  50#include <asm/io.h>
  51#include <asm/irq.h>
  52#include <asm/delay.h>
  53#include <asm/fs_pd.h>
  54#include <asm/udbg.h>
  55
  56#if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  57#define SUPPORT_SYSRQ
  58#endif
  59
  60#include <linux/serial_core.h>
  61#include <linux/kernel.h>
  62
  63#include "cpm_uart.h"
  64
  65
  66/**************************************************************/
  67
  68static int  cpm_uart_tx_pump(struct uart_port *port);
  69static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
  70static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
  71static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
  72
  73/**************************************************************/
  74
  75/*
  76 * Check, if transmit buffers are processed
  77*/
  78static unsigned int cpm_uart_tx_empty(struct uart_port *port)
  79{
  80        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
  81        cbd_t __iomem *bdp = pinfo->tx_bd_base;
  82        int ret = 0;
  83
  84        while (1) {
  85                if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
  86                        break;
  87
  88                if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
  89                        ret = TIOCSER_TEMT;
  90                        break;
  91                }
  92                bdp++;
  93        }
  94
  95        pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
  96
  97        return ret;
  98}
  99
 100static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 101{
 102        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 103
 104        if (pinfo->gpios[GPIO_RTS] >= 0)
 105                gpio_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
 106
 107        if (pinfo->gpios[GPIO_DTR] >= 0)
 108                gpio_set_value(pinfo->gpios[GPIO_DTR], !(mctrl & TIOCM_DTR));
 109}
 110
 111static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
 112{
 113        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 114        unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 115
 116        if (pinfo->gpios[GPIO_CTS] >= 0) {
 117                if (gpio_get_value(pinfo->gpios[GPIO_CTS]))
 118                        mctrl &= ~TIOCM_CTS;
 119        }
 120
 121        if (pinfo->gpios[GPIO_DSR] >= 0) {
 122                if (gpio_get_value(pinfo->gpios[GPIO_DSR]))
 123                        mctrl &= ~TIOCM_DSR;
 124        }
 125
 126        if (pinfo->gpios[GPIO_DCD] >= 0) {
 127                if (gpio_get_value(pinfo->gpios[GPIO_DCD]))
 128                        mctrl &= ~TIOCM_CAR;
 129        }
 130
 131        if (pinfo->gpios[GPIO_RI] >= 0) {
 132                if (!gpio_get_value(pinfo->gpios[GPIO_RI]))
 133                        mctrl |= TIOCM_RNG;
 134        }
 135
 136        return mctrl;
 137}
 138
 139/*
 140 * Stop transmitter
 141 */
 142static void cpm_uart_stop_tx(struct uart_port *port)
 143{
 144        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 145        smc_t __iomem *smcp = pinfo->smcp;
 146        scc_t __iomem *sccp = pinfo->sccp;
 147
 148        pr_debug("CPM uart[%d]:stop tx\n", port->line);
 149
 150        if (IS_SMC(pinfo))
 151                clrbits8(&smcp->smc_smcm, SMCM_TX);
 152        else
 153                clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
 154}
 155
 156/*
 157 * Start transmitter
 158 */
 159static void cpm_uart_start_tx(struct uart_port *port)
 160{
 161        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 162        smc_t __iomem *smcp = pinfo->smcp;
 163        scc_t __iomem *sccp = pinfo->sccp;
 164
 165        pr_debug("CPM uart[%d]:start tx\n", port->line);
 166
 167        if (IS_SMC(pinfo)) {
 168                if (in_8(&smcp->smc_smcm) & SMCM_TX)
 169                        return;
 170        } else {
 171                if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
 172                        return;
 173        }
 174
 175        if (cpm_uart_tx_pump(port) != 0) {
 176                if (IS_SMC(pinfo)) {
 177                        setbits8(&smcp->smc_smcm, SMCM_TX);
 178                } else {
 179                        setbits16(&sccp->scc_sccm, UART_SCCM_TX);
 180                }
 181        }
 182}
 183
 184/*
 185 * Stop receiver
 186 */
 187static void cpm_uart_stop_rx(struct uart_port *port)
 188{
 189        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 190        smc_t __iomem *smcp = pinfo->smcp;
 191        scc_t __iomem *sccp = pinfo->sccp;
 192
 193        pr_debug("CPM uart[%d]:stop rx\n", port->line);
 194
 195        if (IS_SMC(pinfo))
 196                clrbits8(&smcp->smc_smcm, SMCM_RX);
 197        else
 198                clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
 199}
 200
 201/*
 202 * Enable Modem status interrupts
 203 */
 204static void cpm_uart_enable_ms(struct uart_port *port)
 205{
 206        pr_debug("CPM uart[%d]:enable ms\n", port->line);
 207}
 208
 209/*
 210 * Generate a break.
 211 */
 212static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
 213{
 214        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 215
 216        pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
 217                break_state);
 218
 219        if (break_state)
 220                cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 221        else
 222                cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
 223}
 224
 225/*
 226 * Transmit characters, refill buffer descriptor, if possible
 227 */
 228static void cpm_uart_int_tx(struct uart_port *port)
 229{
 230        pr_debug("CPM uart[%d]:TX INT\n", port->line);
 231
 232        cpm_uart_tx_pump(port);
 233}
 234
 235#ifdef CONFIG_CONSOLE_POLL
 236static int serial_polled;
 237#endif
 238
 239/*
 240 * Receive characters
 241 */
 242static void cpm_uart_int_rx(struct uart_port *port)
 243{
 244        int i;
 245        unsigned char ch;
 246        u8 *cp;
 247        struct tty_struct *tty = port->state->port.tty;
 248        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 249        cbd_t __iomem *bdp;
 250        u16 status;
 251        unsigned int flg;
 252
 253        pr_debug("CPM uart[%d]:RX INT\n", port->line);
 254
 255        /* Just loop through the closed BDs and copy the characters into
 256         * the buffer.
 257         */
 258        bdp = pinfo->rx_cur;
 259        for (;;) {
 260#ifdef CONFIG_CONSOLE_POLL
 261                if (unlikely(serial_polled)) {
 262                        serial_polled = 0;
 263                        return;
 264                }
 265#endif
 266                /* get status */
 267                status = in_be16(&bdp->cbd_sc);
 268                /* If this one is empty, return happy */
 269                if (status & BD_SC_EMPTY)
 270                        break;
 271
 272                /* get number of characters, and check spce in flip-buffer */
 273                i = in_be16(&bdp->cbd_datlen);
 274
 275                /* If we have not enough room in tty flip buffer, then we try
 276                 * later, which will be the next rx-interrupt or a timeout
 277                 */
 278                if(tty_buffer_request_room(tty, i) < i) {
 279                        printk(KERN_WARNING "No room in flip buffer\n");
 280                        return;
 281                }
 282
 283                /* get pointer */
 284                cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 285
 286                /* loop through the buffer */
 287                while (i-- > 0) {
 288                        ch = *cp++;
 289                        port->icount.rx++;
 290                        flg = TTY_NORMAL;
 291
 292                        if (status &
 293                            (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
 294                                goto handle_error;
 295                        if (uart_handle_sysrq_char(port, ch))
 296                                continue;
 297#ifdef CONFIG_CONSOLE_POLL
 298                        if (unlikely(serial_polled)) {
 299                                serial_polled = 0;
 300                                return;
 301                        }
 302#endif
 303                      error_return:
 304                        tty_insert_flip_char(tty, ch, flg);
 305
 306                }               /* End while (i--) */
 307
 308                /* This BD is ready to be used again. Clear status. get next */
 309                clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
 310                                        BD_SC_OV | BD_SC_ID);
 311                setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
 312
 313                if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 314                        bdp = pinfo->rx_bd_base;
 315                else
 316                        bdp++;
 317
 318        } /* End for (;;) */
 319
 320        /* Write back buffer pointer */
 321        pinfo->rx_cur = bdp;
 322
 323        /* activate BH processing */
 324        tty_flip_buffer_push(tty);
 325
 326        return;
 327
 328        /* Error processing */
 329
 330      handle_error:
 331        /* Statistics */
 332        if (status & BD_SC_BR)
 333                port->icount.brk++;
 334        if (status & BD_SC_PR)
 335                port->icount.parity++;
 336        if (status & BD_SC_FR)
 337                port->icount.frame++;
 338        if (status & BD_SC_OV)
 339                port->icount.overrun++;
 340
 341        /* Mask out ignored conditions */
 342        status &= port->read_status_mask;
 343
 344        /* Handle the remaining ones */
 345        if (status & BD_SC_BR)
 346                flg = TTY_BREAK;
 347        else if (status & BD_SC_PR)
 348                flg = TTY_PARITY;
 349        else if (status & BD_SC_FR)
 350                flg = TTY_FRAME;
 351
 352        /* overrun does not affect the current character ! */
 353        if (status & BD_SC_OV) {
 354                ch = 0;
 355                flg = TTY_OVERRUN;
 356                /* We skip this buffer */
 357                /* CHECK: Is really nothing senseful there */
 358                /* ASSUMPTION: it contains nothing valid */
 359                i = 0;
 360        }
 361#ifdef SUPPORT_SYSRQ
 362        port->sysrq = 0;
 363#endif
 364        goto error_return;
 365}
 366
 367/*
 368 * Asynchron mode interrupt handler
 369 */
 370static irqreturn_t cpm_uart_int(int irq, void *data)
 371{
 372        u8 events;
 373        struct uart_port *port = data;
 374        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 375        smc_t __iomem *smcp = pinfo->smcp;
 376        scc_t __iomem *sccp = pinfo->sccp;
 377
 378        pr_debug("CPM uart[%d]:IRQ\n", port->line);
 379
 380        if (IS_SMC(pinfo)) {
 381                events = in_8(&smcp->smc_smce);
 382                out_8(&smcp->smc_smce, events);
 383                if (events & SMCM_BRKE)
 384                        uart_handle_break(port);
 385                if (events & SMCM_RX)
 386                        cpm_uart_int_rx(port);
 387                if (events & SMCM_TX)
 388                        cpm_uart_int_tx(port);
 389        } else {
 390                events = in_be16(&sccp->scc_scce);
 391                out_be16(&sccp->scc_scce, events);
 392                if (events & UART_SCCM_BRKE)
 393                        uart_handle_break(port);
 394                if (events & UART_SCCM_RX)
 395                        cpm_uart_int_rx(port);
 396                if (events & UART_SCCM_TX)
 397                        cpm_uart_int_tx(port);
 398        }
 399        return (events) ? IRQ_HANDLED : IRQ_NONE;
 400}
 401
 402static int cpm_uart_startup(struct uart_port *port)
 403{
 404        int retval;
 405        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 406
 407        pr_debug("CPM uart[%d]:startup\n", port->line);
 408
 409        /* If the port is not the console, make sure rx is disabled. */
 410        if (!(pinfo->flags & FLAG_CONSOLE)) {
 411                /* Disable UART rx */
 412                if (IS_SMC(pinfo)) {
 413                        clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN);
 414                        clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 415                } else {
 416                        clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR);
 417                        clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 418                }
 419                cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 420        }
 421        /* Install interrupt handler. */
 422        retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
 423        if (retval)
 424                return retval;
 425
 426        /* Startup rx-int */
 427        if (IS_SMC(pinfo)) {
 428                setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 429                setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
 430        } else {
 431                setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 432                setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
 433        }
 434
 435        return 0;
 436}
 437
 438inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
 439{
 440        set_current_state(TASK_UNINTERRUPTIBLE);
 441        schedule_timeout(pinfo->wait_closing);
 442}
 443
 444/*
 445 * Shutdown the uart
 446 */
 447static void cpm_uart_shutdown(struct uart_port *port)
 448{
 449        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 450
 451        pr_debug("CPM uart[%d]:shutdown\n", port->line);
 452
 453        /* free interrupt handler */
 454        free_irq(port->irq, port);
 455
 456        /* If the port is not the console, disable Rx and Tx. */
 457        if (!(pinfo->flags & FLAG_CONSOLE)) {
 458                /* Wait for all the BDs marked sent */
 459                while(!cpm_uart_tx_empty(port)) {
 460                        set_current_state(TASK_UNINTERRUPTIBLE);
 461                        schedule_timeout(2);
 462                }
 463
 464                if (pinfo->wait_closing)
 465                        cpm_uart_wait_until_send(pinfo);
 466
 467                /* Stop uarts */
 468                if (IS_SMC(pinfo)) {
 469                        smc_t __iomem *smcp = pinfo->smcp;
 470                        clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 471                        clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
 472                } else {
 473                        scc_t __iomem *sccp = pinfo->sccp;
 474                        clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 475                        clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 476                }
 477
 478                /* Shut them really down and reinit buffer descriptors */
 479                if (IS_SMC(pinfo)) {
 480                        out_be16(&pinfo->smcup->smc_brkcr, 0);
 481                        cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 482                } else {
 483                        out_be16(&pinfo->sccup->scc_brkcr, 0);
 484                        cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
 485                }
 486
 487                cpm_uart_initbd(pinfo);
 488        }
 489}
 490
 491static void cpm_uart_set_termios(struct uart_port *port,
 492                                 struct ktermios *termios,
 493                                 struct ktermios *old)
 494{
 495        int baud;
 496        unsigned long flags;
 497        u16 cval, scval, prev_mode;
 498        int bits, sbits;
 499        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 500        smc_t __iomem *smcp = pinfo->smcp;
 501        scc_t __iomem *sccp = pinfo->sccp;
 502
 503        pr_debug("CPM uart[%d]:set_termios\n", port->line);
 504
 505        baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 506
 507        /* Character length programmed into the mode register is the
 508         * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
 509         * 1 or 2 stop bits, minus 1.
 510         * The value 'bits' counts this for us.
 511         */
 512        cval = 0;
 513        scval = 0;
 514
 515        /* byte size */
 516        switch (termios->c_cflag & CSIZE) {
 517        case CS5:
 518                bits = 5;
 519                break;
 520        case CS6:
 521                bits = 6;
 522                break;
 523        case CS7:
 524                bits = 7;
 525                break;
 526        case CS8:
 527                bits = 8;
 528                break;
 529                /* Never happens, but GCC is too dumb to figure it out */
 530        default:
 531                bits = 8;
 532                break;
 533        }
 534        sbits = bits - 5;
 535
 536        if (termios->c_cflag & CSTOPB) {
 537                cval |= SMCMR_SL;       /* Two stops */
 538                scval |= SCU_PSMR_SL;
 539                bits++;
 540        }
 541
 542        if (termios->c_cflag & PARENB) {
 543                cval |= SMCMR_PEN;
 544                scval |= SCU_PSMR_PEN;
 545                bits++;
 546                if (!(termios->c_cflag & PARODD)) {
 547                        cval |= SMCMR_PM_EVEN;
 548                        scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
 549                }
 550        }
 551
 552        /*
 553         * Update the timeout
 554         */
 555        uart_update_timeout(port, termios->c_cflag, baud);
 556
 557        /*
 558         * Set up parity check flag
 559         */
 560#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 561
 562        port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
 563        if (termios->c_iflag & INPCK)
 564                port->read_status_mask |= BD_SC_FR | BD_SC_PR;
 565        if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
 566                port->read_status_mask |= BD_SC_BR;
 567
 568        /*
 569         * Characters to ignore
 570         */
 571        port->ignore_status_mask = 0;
 572        if (termios->c_iflag & IGNPAR)
 573                port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
 574        if (termios->c_iflag & IGNBRK) {
 575                port->ignore_status_mask |= BD_SC_BR;
 576                /*
 577                 * If we're ignore parity and break indicators, ignore
 578                 * overruns too.  (For real raw support).
 579                 */
 580                if (termios->c_iflag & IGNPAR)
 581                        port->ignore_status_mask |= BD_SC_OV;
 582        }
 583        /*
 584         * !!! ignore all characters if CREAD is not set
 585         */
 586        if ((termios->c_cflag & CREAD) == 0)
 587                port->read_status_mask &= ~BD_SC_EMPTY;
 588
 589        spin_lock_irqsave(&port->lock, flags);
 590
 591        /* Start bit has not been added (so don't, because we would just
 592         * subtract it later), and we need to add one for the number of
 593         * stops bits (there is always at least one).
 594         */
 595        bits++;
 596        if (IS_SMC(pinfo)) {
 597                /* Set the mode register.  We want to keep a copy of the
 598                 * enables, because we want to put them back if they were
 599                 * present.
 600                 */
 601                prev_mode = in_be16(&smcp->smc_smcmr) & (SMCMR_REN | SMCMR_TEN);
 602                /* Output in *one* operation, so we don't interrupt RX/TX if they
 603                 * were already enabled. */
 604                out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval |
 605                    SMCMR_SM_UART | prev_mode);
 606        } else {
 607                out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
 608        }
 609
 610        if (pinfo->clk)
 611                clk_set_rate(pinfo->clk, baud);
 612        else
 613                cpm_set_brg(pinfo->brg - 1, baud);
 614        spin_unlock_irqrestore(&port->lock, flags);
 615}
 616
 617static const char *cpm_uart_type(struct uart_port *port)
 618{
 619        pr_debug("CPM uart[%d]:uart_type\n", port->line);
 620
 621        return port->type == PORT_CPM ? "CPM UART" : NULL;
 622}
 623
 624/*
 625 * verify the new serial_struct (for TIOCSSERIAL).
 626 */
 627static int cpm_uart_verify_port(struct uart_port *port,
 628                                struct serial_struct *ser)
 629{
 630        int ret = 0;
 631
 632        pr_debug("CPM uart[%d]:verify_port\n", port->line);
 633
 634        if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
 635                ret = -EINVAL;
 636        if (ser->irq < 0 || ser->irq >= nr_irqs)
 637                ret = -EINVAL;
 638        if (ser->baud_base < 9600)
 639                ret = -EINVAL;
 640        return ret;
 641}
 642
 643/*
 644 * Transmit characters, refill buffer descriptor, if possible
 645 */
 646static int cpm_uart_tx_pump(struct uart_port *port)
 647{
 648        cbd_t __iomem *bdp;
 649        u8 *p;
 650        int count;
 651        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 652        struct circ_buf *xmit = &port->state->xmit;
 653
 654        /* Handle xon/xoff */
 655        if (port->x_char) {
 656                /* Pick next descriptor and fill from buffer */
 657                bdp = pinfo->tx_cur;
 658
 659                p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 660
 661                *p++ = port->x_char;
 662
 663                out_be16(&bdp->cbd_datlen, 1);
 664                setbits16(&bdp->cbd_sc, BD_SC_READY);
 665                /* Get next BD. */
 666                if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 667                        bdp = pinfo->tx_bd_base;
 668                else
 669                        bdp++;
 670                pinfo->tx_cur = bdp;
 671
 672                port->icount.tx++;
 673                port->x_char = 0;
 674                return 1;
 675        }
 676
 677        if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 678                cpm_uart_stop_tx(port);
 679                return 0;
 680        }
 681
 682        /* Pick next descriptor and fill from buffer */
 683        bdp = pinfo->tx_cur;
 684
 685        while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
 686               xmit->tail != xmit->head) {
 687                count = 0;
 688                p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 689                while (count < pinfo->tx_fifosize) {
 690                        *p++ = xmit->buf[xmit->tail];
 691                        xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 692                        port->icount.tx++;
 693                        count++;
 694                        if (xmit->head == xmit->tail)
 695                                break;
 696                }
 697                out_be16(&bdp->cbd_datlen, count);
 698                setbits16(&bdp->cbd_sc, BD_SC_READY);
 699                /* Get next BD. */
 700                if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 701                        bdp = pinfo->tx_bd_base;
 702                else
 703                        bdp++;
 704        }
 705        pinfo->tx_cur = bdp;
 706
 707        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 708                uart_write_wakeup(port);
 709
 710        if (uart_circ_empty(xmit)) {
 711                cpm_uart_stop_tx(port);
 712                return 0;
 713        }
 714
 715        return 1;
 716}
 717
 718/*
 719 * init buffer descriptors
 720 */
 721static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
 722{
 723        int i;
 724        u8 *mem_addr;
 725        cbd_t __iomem *bdp;
 726
 727        pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
 728
 729        /* Set the physical address of the host memory
 730         * buffers in the buffer descriptors, and the
 731         * virtual address for us to work with.
 732         */
 733        mem_addr = pinfo->mem_addr;
 734        bdp = pinfo->rx_cur = pinfo->rx_bd_base;
 735        for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
 736                out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 737                out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
 738                mem_addr += pinfo->rx_fifosize;
 739        }
 740
 741        out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 742        out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
 743
 744        /* Set the physical address of the host memory
 745         * buffers in the buffer descriptors, and the
 746         * virtual address for us to work with.
 747         */
 748        mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
 749        bdp = pinfo->tx_cur = pinfo->tx_bd_base;
 750        for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
 751                out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 752                out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
 753                mem_addr += pinfo->tx_fifosize;
 754        }
 755
 756        out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 757        out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
 758}
 759
 760static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 761{
 762        scc_t __iomem *scp;
 763        scc_uart_t __iomem *sup;
 764
 765        pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
 766
 767        scp = pinfo->sccp;
 768        sup = pinfo->sccup;
 769
 770        /* Store address */
 771        out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
 772                 (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 773        out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
 774                 (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 775
 776        /* Set up the uart parameters in the
 777         * parameter ram.
 778         */
 779
 780        cpm_set_scc_fcr(sup);
 781
 782        out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 783        out_be16(&sup->scc_maxidl, pinfo->rx_fifosize);
 784        out_be16(&sup->scc_brkcr, 1);
 785        out_be16(&sup->scc_parec, 0);
 786        out_be16(&sup->scc_frmec, 0);
 787        out_be16(&sup->scc_nosec, 0);
 788        out_be16(&sup->scc_brkec, 0);
 789        out_be16(&sup->scc_uaddr1, 0);
 790        out_be16(&sup->scc_uaddr2, 0);
 791        out_be16(&sup->scc_toseq, 0);
 792        out_be16(&sup->scc_char1, 0x8000);
 793        out_be16(&sup->scc_char2, 0x8000);
 794        out_be16(&sup->scc_char3, 0x8000);
 795        out_be16(&sup->scc_char4, 0x8000);
 796        out_be16(&sup->scc_char5, 0x8000);
 797        out_be16(&sup->scc_char6, 0x8000);
 798        out_be16(&sup->scc_char7, 0x8000);
 799        out_be16(&sup->scc_char8, 0x8000);
 800        out_be16(&sup->scc_rccm, 0xc0ff);
 801
 802        /* Send the CPM an initialize command.
 803         */
 804        cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 805
 806        /* Set UART mode, 8 bit, no parity, one stop.
 807         * Enable receive and transmit.
 808         */
 809        out_be32(&scp->scc_gsmrh, 0);
 810        out_be32(&scp->scc_gsmrl,
 811                 SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
 812
 813        /* Enable rx interrupts  and clear all pending events.  */
 814        out_be16(&scp->scc_sccm, 0);
 815        out_be16(&scp->scc_scce, 0xffff);
 816        out_be16(&scp->scc_dsr, 0x7e7e);
 817        out_be16(&scp->scc_psmr, 0x3000);
 818
 819        setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 820}
 821
 822static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
 823{
 824        smc_t __iomem *sp;
 825        smc_uart_t __iomem *up;
 826
 827        pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
 828
 829        sp = pinfo->smcp;
 830        up = pinfo->smcup;
 831
 832        /* Store address */
 833        out_be16(&pinfo->smcup->smc_rbase,
 834                 (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 835        out_be16(&pinfo->smcup->smc_tbase,
 836                 (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 837
 838/*
 839 *  In case SMC1 is being relocated...
 840 */
 841#if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
 842        out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
 843        out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
 844        out_be32(&up->smc_rstate, 0);
 845        out_be32(&up->smc_tstate, 0);
 846        out_be16(&up->smc_brkcr, 1);              /* number of break chars */
 847        out_be16(&up->smc_brkec, 0);
 848#endif
 849
 850        /* Set up the uart parameters in the
 851         * parameter ram.
 852         */
 853        cpm_set_smc_fcr(up);
 854
 855        /* Using idle charater time requires some additional tuning.  */
 856        out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
 857        out_be16(&up->smc_maxidl, pinfo->rx_fifosize);
 858        out_be16(&up->smc_brklen, 0);
 859        out_be16(&up->smc_brkec, 0);
 860        out_be16(&up->smc_brkcr, 1);
 861
 862        cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 863
 864        /* Set UART mode, 8 bit, no parity, one stop.
 865         * Enable receive and transmit.
 866         */
 867        out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
 868
 869        /* Enable only rx interrupts clear all pending events. */
 870        out_8(&sp->smc_smcm, 0);
 871        out_8(&sp->smc_smce, 0xff);
 872
 873        setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 874}
 875
 876/*
 877 * Initialize port. This is called from early_console stuff
 878 * so we have to be careful here !
 879 */
 880static int cpm_uart_request_port(struct uart_port *port)
 881{
 882        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 883        int ret;
 884
 885        pr_debug("CPM uart[%d]:request port\n", port->line);
 886
 887        if (pinfo->flags & FLAG_CONSOLE)
 888                return 0;
 889
 890        if (IS_SMC(pinfo)) {
 891                clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
 892                clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 893        } else {
 894                clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 895                clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 896        }
 897
 898        ret = cpm_uart_allocbuf(pinfo, 0);
 899
 900        if (ret)
 901                return ret;
 902
 903        cpm_uart_initbd(pinfo);
 904        if (IS_SMC(pinfo))
 905                cpm_uart_init_smc(pinfo);
 906        else
 907                cpm_uart_init_scc(pinfo);
 908
 909        return 0;
 910}
 911
 912static void cpm_uart_release_port(struct uart_port *port)
 913{
 914        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 915
 916        if (!(pinfo->flags & FLAG_CONSOLE))
 917                cpm_uart_freebuf(pinfo);
 918}
 919
 920/*
 921 * Configure/autoconfigure the port.
 922 */
 923static void cpm_uart_config_port(struct uart_port *port, int flags)
 924{
 925        pr_debug("CPM uart[%d]:config_port\n", port->line);
 926
 927        if (flags & UART_CONFIG_TYPE) {
 928                port->type = PORT_CPM;
 929                cpm_uart_request_port(port);
 930        }
 931}
 932
 933#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_CPM_CONSOLE)
 934/*
 935 * Write a string to the serial port
 936 * Note that this is called with interrupts already disabled
 937 */
 938static void cpm_uart_early_write(struct uart_cpm_port *pinfo,
 939                const char *string, u_int count)
 940{
 941        unsigned int i;
 942        cbd_t __iomem *bdp, *bdbase;
 943        unsigned char *cpm_outp_addr;
 944
 945        /* Get the address of the host memory buffer.
 946         */
 947        bdp = pinfo->tx_cur;
 948        bdbase = pinfo->tx_bd_base;
 949
 950        /*
 951         * Now, do each character.  This is not as bad as it looks
 952         * since this is a holding FIFO and not a transmitting FIFO.
 953         * We could add the complexity of filling the entire transmit
 954         * buffer, but we would just wait longer between accesses......
 955         */
 956        for (i = 0; i < count; i++, string++) {
 957                /* Wait for transmitter fifo to empty.
 958                 * Ready indicates output is ready, and xmt is doing
 959                 * that, not that it is ready for us to send.
 960                 */
 961                while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
 962                        ;
 963
 964                /* Send the character out.
 965                 * If the buffer address is in the CPM DPRAM, don't
 966                 * convert it.
 967                 */
 968                cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
 969                                        pinfo);
 970                *cpm_outp_addr = *string;
 971
 972                out_be16(&bdp->cbd_datlen, 1);
 973                setbits16(&bdp->cbd_sc, BD_SC_READY);
 974
 975                if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 976                        bdp = bdbase;
 977                else
 978                        bdp++;
 979
 980                /* if a LF, also do CR... */
 981                if (*string == 10) {
 982                        while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
 983                                ;
 984
 985                        cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
 986                                                pinfo);
 987                        *cpm_outp_addr = 13;
 988
 989                        out_be16(&bdp->cbd_datlen, 1);
 990                        setbits16(&bdp->cbd_sc, BD_SC_READY);
 991
 992                        if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 993                                bdp = bdbase;
 994                        else
 995                                bdp++;
 996                }
 997        }
 998
 999        /*
1000         * Finally, Wait for transmitter & holding register to empty
1001         *  and restore the IER
1002         */
1003        while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1004                ;
1005
1006        pinfo->tx_cur = bdp;
1007}
1008#endif
1009
1010#ifdef CONFIG_CONSOLE_POLL
1011/* Serial polling routines for writing and reading from the uart while
1012 * in an interrupt or debug context.
1013 */
1014
1015#define GDB_BUF_SIZE    512     /* power of 2, please */
1016
1017static char poll_buf[GDB_BUF_SIZE];
1018static char *pollp;
1019static int poll_chars;
1020
1021static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
1022{
1023        u_char          c, *cp;
1024        volatile cbd_t  *bdp;
1025        int             i;
1026
1027        /* Get the address of the host memory buffer.
1028         */
1029        bdp = pinfo->rx_cur;
1030        while (bdp->cbd_sc & BD_SC_EMPTY)
1031                ;
1032
1033        /* If the buffer address is in the CPM DPRAM, don't
1034         * convert it.
1035         */
1036        cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1037
1038        if (obuf) {
1039                i = c = bdp->cbd_datlen;
1040                while (i-- > 0)
1041                        *obuf++ = *cp++;
1042        } else
1043                c = *cp;
1044        bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
1045        bdp->cbd_sc |= BD_SC_EMPTY;
1046
1047        if (bdp->cbd_sc & BD_SC_WRAP)
1048                bdp = pinfo->rx_bd_base;
1049        else
1050                bdp++;
1051        pinfo->rx_cur = (cbd_t *)bdp;
1052
1053        return (int)c;
1054}
1055
1056static int cpm_get_poll_char(struct uart_port *port)
1057{
1058        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
1059
1060        if (!serial_polled) {
1061                serial_polled = 1;
1062                poll_chars = 0;
1063        }
1064        if (poll_chars <= 0) {
1065                poll_chars = poll_wait_key(poll_buf, pinfo);
1066                pollp = poll_buf;
1067        }
1068        poll_chars--;
1069        return *pollp++;
1070}
1071
1072static void cpm_put_poll_char(struct uart_port *port,
1073                         unsigned char c)
1074{
1075        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
1076        static char ch[2];
1077
1078        ch[0] = (char)c;
1079        cpm_uart_early_write(pinfo, ch, 1);
1080}
1081#endif /* CONFIG_CONSOLE_POLL */
1082
1083static struct uart_ops cpm_uart_pops = {
1084        .tx_empty       = cpm_uart_tx_empty,
1085        .set_mctrl      = cpm_uart_set_mctrl,
1086        .get_mctrl      = cpm_uart_get_mctrl,
1087        .stop_tx        = cpm_uart_stop_tx,
1088        .start_tx       = cpm_uart_start_tx,
1089        .stop_rx        = cpm_uart_stop_rx,
1090        .enable_ms      = cpm_uart_enable_ms,
1091        .break_ctl      = cpm_uart_break_ctl,
1092        .startup        = cpm_uart_startup,
1093        .shutdown       = cpm_uart_shutdown,
1094        .set_termios    = cpm_uart_set_termios,
1095        .type           = cpm_uart_type,
1096        .release_port   = cpm_uart_release_port,
1097        .request_port   = cpm_uart_request_port,
1098        .config_port    = cpm_uart_config_port,
1099        .verify_port    = cpm_uart_verify_port,
1100#ifdef CONFIG_CONSOLE_POLL
1101        .poll_get_char = cpm_get_poll_char,
1102        .poll_put_char = cpm_put_poll_char,
1103#endif
1104};
1105
1106struct uart_cpm_port cpm_uart_ports[UART_NR];
1107
1108static int cpm_uart_init_port(struct device_node *np,
1109                              struct uart_cpm_port *pinfo)
1110{
1111        const u32 *data;
1112        void __iomem *mem, *pram;
1113        int len;
1114        int ret;
1115        int i;
1116
1117        data = of_get_property(np, "clock", NULL);
1118        if (data) {
1119                struct clk *clk = clk_get(NULL, (const char*)data);
1120                if (!IS_ERR(clk))
1121                        pinfo->clk = clk;
1122        }
1123        if (!pinfo->clk) {
1124                data = of_get_property(np, "fsl,cpm-brg", &len);
1125                if (!data || len != 4) {
1126                        printk(KERN_ERR "CPM UART %s has no/invalid "
1127                                        "fsl,cpm-brg property.\n", np->name);
1128                        return -EINVAL;
1129                }
1130                pinfo->brg = *data;
1131        }
1132
1133        data = of_get_property(np, "fsl,cpm-command", &len);
1134        if (!data || len != 4) {
1135                printk(KERN_ERR "CPM UART %s has no/invalid "
1136                                "fsl,cpm-command property.\n", np->name);
1137                return -EINVAL;
1138        }
1139        pinfo->command = *data;
1140
1141        mem = of_iomap(np, 0);
1142        if (!mem)
1143                return -ENOMEM;
1144
1145        if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
1146            of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
1147                pinfo->sccp = mem;
1148                pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1149        } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
1150                   of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
1151                pinfo->flags |= FLAG_SMC;
1152                pinfo->smcp = mem;
1153                pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1154        } else {
1155                ret = -ENODEV;
1156                goto out_mem;
1157        }
1158
1159        if (!pram) {
1160                ret = -ENOMEM;
1161                goto out_mem;
1162        }
1163
1164        pinfo->tx_nrfifos = TX_NUM_FIFO;
1165        pinfo->tx_fifosize = TX_BUF_SIZE;
1166        pinfo->rx_nrfifos = RX_NUM_FIFO;
1167        pinfo->rx_fifosize = RX_BUF_SIZE;
1168
1169        pinfo->port.uartclk = ppc_proc_freq;
1170        pinfo->port.mapbase = (unsigned long)mem;
1171        pinfo->port.type = PORT_CPM;
1172        pinfo->port.ops = &cpm_uart_pops,
1173        pinfo->port.iotype = UPIO_MEM;
1174        pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1175        spin_lock_init(&pinfo->port.lock);
1176
1177        pinfo->port.irq = of_irq_to_resource(np, 0, NULL);
1178        if (pinfo->port.irq == NO_IRQ) {
1179                ret = -EINVAL;
1180                goto out_pram;
1181        }
1182
1183        for (i = 0; i < NUM_GPIOS; i++)
1184                pinfo->gpios[i] = of_get_gpio(np, i);
1185
1186#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1187        udbg_putc = NULL;
1188#endif
1189
1190        return cpm_uart_request_port(&pinfo->port);
1191
1192out_pram:
1193        cpm_uart_unmap_pram(pinfo, pram);
1194out_mem:
1195        iounmap(mem);
1196        return ret;
1197}
1198
1199#ifdef CONFIG_SERIAL_CPM_CONSOLE
1200/*
1201 *      Print a string to the serial port trying not to disturb
1202 *      any possible real use of the port...
1203 *
1204 *      Note that this is called with interrupts already disabled
1205 */
1206static void cpm_uart_console_write(struct console *co, const char *s,
1207                                   u_int count)
1208{
1209        struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1210        unsigned long flags;
1211        int nolock = oops_in_progress;
1212
1213        if (unlikely(nolock)) {
1214                local_irq_save(flags);
1215        } else {
1216                spin_lock_irqsave(&pinfo->port.lock, flags);
1217        }
1218
1219        cpm_uart_early_write(pinfo, s, count);
1220
1221        if (unlikely(nolock)) {
1222                local_irq_restore(flags);
1223        } else {
1224                spin_unlock_irqrestore(&pinfo->port.lock, flags);
1225        }
1226}
1227
1228
1229static int __init cpm_uart_console_setup(struct console *co, char *options)
1230{
1231        int baud = 38400;
1232        int bits = 8;
1233        int parity = 'n';
1234        int flow = 'n';
1235        int ret;
1236        struct uart_cpm_port *pinfo;
1237        struct uart_port *port;
1238
1239        struct device_node *np = NULL;
1240        int i = 0;
1241
1242        if (co->index >= UART_NR) {
1243                printk(KERN_ERR "cpm_uart: console index %d too high\n",
1244                       co->index);
1245                return -ENODEV;
1246        }
1247
1248        do {
1249                np = of_find_node_by_type(np, "serial");
1250                if (!np)
1251                        return -ENODEV;
1252
1253                if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1254                    !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1255                    !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1256                    !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1257                        i--;
1258        } while (i++ != co->index);
1259
1260        pinfo = &cpm_uart_ports[co->index];
1261
1262        pinfo->flags |= FLAG_CONSOLE;
1263        port = &pinfo->port;
1264
1265        ret = cpm_uart_init_port(np, pinfo);
1266        of_node_put(np);
1267        if (ret)
1268                return ret;
1269
1270        if (options) {
1271                uart_parse_options(options, &baud, &parity, &bits, &flow);
1272        } else {
1273                if ((baud = uart_baudrate()) == -1)
1274                        baud = 9600;
1275        }
1276
1277        if (IS_SMC(pinfo)) {
1278                out_be16(&pinfo->smcup->smc_brkcr, 0);
1279                cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1280                clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1281                clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1282        } else {
1283                out_be16(&pinfo->sccup->scc_brkcr, 0);
1284                cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
1285                clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1286                clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1287        }
1288
1289        ret = cpm_uart_allocbuf(pinfo, 1);
1290
1291        if (ret)
1292                return ret;
1293
1294        cpm_uart_initbd(pinfo);
1295
1296        if (IS_SMC(pinfo))
1297                cpm_uart_init_smc(pinfo);
1298        else
1299                cpm_uart_init_scc(pinfo);
1300
1301        uart_set_options(port, co, baud, parity, bits, flow);
1302        cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1303
1304        return 0;
1305}
1306
1307static struct uart_driver cpm_reg;
1308static struct console cpm_scc_uart_console = {
1309        .name           = "ttyCPM",
1310        .write          = cpm_uart_console_write,
1311        .device         = uart_console_device,
1312        .setup          = cpm_uart_console_setup,
1313        .flags          = CON_PRINTBUFFER,
1314        .index          = -1,
1315        .data           = &cpm_reg,
1316};
1317
1318static int __init cpm_uart_console_init(void)
1319{
1320        register_console(&cpm_scc_uart_console);
1321        return 0;
1322}
1323
1324console_initcall(cpm_uart_console_init);
1325
1326#define CPM_UART_CONSOLE        &cpm_scc_uart_console
1327#else
1328#define CPM_UART_CONSOLE        NULL
1329#endif
1330
1331static struct uart_driver cpm_reg = {
1332        .owner          = THIS_MODULE,
1333        .driver_name    = "ttyCPM",
1334        .dev_name       = "ttyCPM",
1335        .major          = SERIAL_CPM_MAJOR,
1336        .minor          = SERIAL_CPM_MINOR,
1337        .cons           = CPM_UART_CONSOLE,
1338        .nr             = UART_NR,
1339};
1340
1341static int probe_index;
1342
1343static int __devinit cpm_uart_probe(struct of_device *ofdev,
1344                                    const struct of_device_id *match)
1345{
1346        int index = probe_index++;
1347        struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1348        int ret;
1349
1350        pinfo->port.line = index;
1351
1352        if (index >= UART_NR)
1353                return -ENODEV;
1354
1355        dev_set_drvdata(&ofdev->dev, pinfo);
1356
1357        /* initialize the device pointer for the port */
1358        pinfo->port.dev = &ofdev->dev;
1359
1360        ret = cpm_uart_init_port(ofdev->dev.of_node, pinfo);
1361        if (ret)
1362                return ret;
1363
1364        return uart_add_one_port(&cpm_reg, &pinfo->port);
1365}
1366
1367static int __devexit cpm_uart_remove(struct of_device *ofdev)
1368{
1369        struct uart_cpm_port *pinfo = dev_get_drvdata(&ofdev->dev);
1370        return uart_remove_one_port(&cpm_reg, &pinfo->port);
1371}
1372
1373static struct of_device_id cpm_uart_match[] = {
1374        {
1375                .compatible = "fsl,cpm1-smc-uart",
1376        },
1377        {
1378                .compatible = "fsl,cpm1-scc-uart",
1379        },
1380        {
1381                .compatible = "fsl,cpm2-smc-uart",
1382        },
1383        {
1384                .compatible = "fsl,cpm2-scc-uart",
1385        },
1386        {}
1387};
1388
1389static struct of_platform_driver cpm_uart_driver = {
1390        .driver = {
1391                .name = "cpm_uart",
1392                .owner = THIS_MODULE,
1393                .of_match_table = cpm_uart_match,
1394        },
1395        .probe = cpm_uart_probe,
1396        .remove = cpm_uart_remove,
1397 };
1398
1399static int __init cpm_uart_init(void)
1400{
1401        int ret = uart_register_driver(&cpm_reg);
1402        if (ret)
1403                return ret;
1404
1405        ret = of_register_platform_driver(&cpm_uart_driver);
1406        if (ret)
1407                uart_unregister_driver(&cpm_reg);
1408
1409        return ret;
1410}
1411
1412static void __exit cpm_uart_exit(void)
1413{
1414        of_unregister_platform_driver(&cpm_uart_driver);
1415        uart_unregister_driver(&cpm_reg);
1416}
1417
1418module_init(cpm_uart_init);
1419module_exit(cpm_uart_exit);
1420
1421MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1422MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1423MODULE_LICENSE("GPL");
1424MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);
1425