linux/drivers/media/video/cx25840/cx25840-core.c
<<
>>
Prefs
   1/* cx25840 - Conexant CX25840 audio/video decoder driver
   2 *
   3 * Copyright (C) 2004 Ulf Eklund
   4 *
   5 * Based on the saa7115 driver and on the first verison of Chris Kennedy's
   6 * cx25840 driver.
   7 *
   8 * Changes by Tyler Trafford <tatrafford@comcast.net>
   9 *    - cleanup/rewrite for V4L2 API (2005)
  10 *
  11 * VBI support by Hans Verkuil <hverkuil@xs4all.nl>.
  12 *
  13 * NTSC sliced VBI support by Christopher Neufeld <television@cneufeld.ca>
  14 * with additional fixes by Hans Verkuil <hverkuil@xs4all.nl>.
  15 *
  16 * CX23885 support by Steven Toth <stoth@linuxtv.org>.
  17 *
  18 * This program is free software; you can redistribute it and/or
  19 * modify it under the terms of the GNU General Public License
  20 * as published by the Free Software Foundation; either version 2
  21 * of the License, or (at your option) any later version.
  22 *
  23 * This program is distributed in the hope that it will be useful,
  24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26 * GNU General Public License for more details.
  27 *
  28 * You should have received a copy of the GNU General Public License
  29 * along with this program; if not, write to the Free Software
  30 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  31 */
  32
  33
  34#include <linux/kernel.h>
  35#include <linux/module.h>
  36#include <linux/slab.h>
  37#include <linux/videodev2.h>
  38#include <linux/i2c.h>
  39#include <linux/delay.h>
  40#include <media/v4l2-common.h>
  41#include <media/v4l2-chip-ident.h>
  42#include <media/v4l2-i2c-drv.h>
  43#include <media/cx25840.h>
  44
  45#include "cx25840-core.h"
  46
  47MODULE_DESCRIPTION("Conexant CX25840 audio/video decoder driver");
  48MODULE_AUTHOR("Ulf Eklund, Chris Kennedy, Hans Verkuil, Tyler Trafford");
  49MODULE_LICENSE("GPL");
  50
  51static int cx25840_debug;
  52
  53module_param_named(debug,cx25840_debug, int, 0644);
  54
  55MODULE_PARM_DESC(debug, "Debugging messages [0=Off (default) 1=On]");
  56
  57
  58/* ----------------------------------------------------------------------- */
  59
  60int cx25840_write(struct i2c_client *client, u16 addr, u8 value)
  61{
  62        u8 buffer[3];
  63        buffer[0] = addr >> 8;
  64        buffer[1] = addr & 0xff;
  65        buffer[2] = value;
  66        return i2c_master_send(client, buffer, 3);
  67}
  68
  69int cx25840_write4(struct i2c_client *client, u16 addr, u32 value)
  70{
  71        u8 buffer[6];
  72        buffer[0] = addr >> 8;
  73        buffer[1] = addr & 0xff;
  74        buffer[2] = value & 0xff;
  75        buffer[3] = (value >> 8) & 0xff;
  76        buffer[4] = (value >> 16) & 0xff;
  77        buffer[5] = value >> 24;
  78        return i2c_master_send(client, buffer, 6);
  79}
  80
  81u8 cx25840_read(struct i2c_client * client, u16 addr)
  82{
  83        u8 buffer[2];
  84        buffer[0] = addr >> 8;
  85        buffer[1] = addr & 0xff;
  86
  87        if (i2c_master_send(client, buffer, 2) < 2)
  88                return 0;
  89
  90        if (i2c_master_recv(client, buffer, 1) < 1)
  91                return 0;
  92
  93        return buffer[0];
  94}
  95
  96u32 cx25840_read4(struct i2c_client * client, u16 addr)
  97{
  98        u8 buffer[4];
  99        buffer[0] = addr >> 8;
 100        buffer[1] = addr & 0xff;
 101
 102        if (i2c_master_send(client, buffer, 2) < 2)
 103                return 0;
 104
 105        if (i2c_master_recv(client, buffer, 4) < 4)
 106                return 0;
 107
 108        return (buffer[3] << 24) | (buffer[2] << 16) |
 109            (buffer[1] << 8) | buffer[0];
 110}
 111
 112int cx25840_and_or(struct i2c_client *client, u16 addr, unsigned and_mask,
 113                   u8 or_value)
 114{
 115        return cx25840_write(client, addr,
 116                             (cx25840_read(client, addr) & and_mask) |
 117                             or_value);
 118}
 119
 120/* ----------------------------------------------------------------------- */
 121
 122static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
 123                                                enum cx25840_audio_input aud_input);
 124
 125/* ----------------------------------------------------------------------- */
 126
 127static void init_dll1(struct i2c_client *client)
 128{
 129        /* This is the Hauppauge sequence used to
 130         * initialize the Delay Lock Loop 1 (ADC DLL). */
 131        cx25840_write(client, 0x159, 0x23);
 132        cx25840_write(client, 0x15a, 0x87);
 133        cx25840_write(client, 0x15b, 0x06);
 134        udelay(10);
 135        cx25840_write(client, 0x159, 0xe1);
 136        udelay(10);
 137        cx25840_write(client, 0x15a, 0x86);
 138        cx25840_write(client, 0x159, 0xe0);
 139        cx25840_write(client, 0x159, 0xe1);
 140        cx25840_write(client, 0x15b, 0x10);
 141}
 142
 143static void init_dll2(struct i2c_client *client)
 144{
 145        /* This is the Hauppauge sequence used to
 146         * initialize the Delay Lock Loop 2 (ADC DLL). */
 147        cx25840_write(client, 0x15d, 0xe3);
 148        cx25840_write(client, 0x15e, 0x86);
 149        cx25840_write(client, 0x15f, 0x06);
 150        udelay(10);
 151        cx25840_write(client, 0x15d, 0xe1);
 152        cx25840_write(client, 0x15d, 0xe0);
 153        cx25840_write(client, 0x15d, 0xe1);
 154}
 155
 156static void cx25836_initialize(struct i2c_client *client)
 157{
 158        /* reset configuration is described on page 3-77 of the CX25836 datasheet */
 159        /* 2. */
 160        cx25840_and_or(client, 0x000, ~0x01, 0x01);
 161        cx25840_and_or(client, 0x000, ~0x01, 0x00);
 162        /* 3a. */
 163        cx25840_and_or(client, 0x15a, ~0x70, 0x00);
 164        /* 3b. */
 165        cx25840_and_or(client, 0x15b, ~0x1e, 0x06);
 166        /* 3c. */
 167        cx25840_and_or(client, 0x159, ~0x02, 0x02);
 168        /* 3d. */
 169        udelay(10);
 170        /* 3e. */
 171        cx25840_and_or(client, 0x159, ~0x02, 0x00);
 172        /* 3f. */
 173        cx25840_and_or(client, 0x159, ~0xc0, 0xc0);
 174        /* 3g. */
 175        cx25840_and_or(client, 0x159, ~0x01, 0x00);
 176        cx25840_and_or(client, 0x159, ~0x01, 0x01);
 177        /* 3h. */
 178        cx25840_and_or(client, 0x15b, ~0x1e, 0x10);
 179}
 180
 181static void cx25840_work_handler(struct work_struct *work)
 182{
 183        struct cx25840_state *state = container_of(work, struct cx25840_state, fw_work);
 184        cx25840_loadfw(state->c);
 185        wake_up(&state->fw_wait);
 186}
 187
 188static void cx25840_initialize(struct i2c_client *client)
 189{
 190        DEFINE_WAIT(wait);
 191        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 192        struct workqueue_struct *q;
 193
 194        /* datasheet startup in numbered steps, refer to page 3-77 */
 195        /* 2. */
 196        cx25840_and_or(client, 0x803, ~0x10, 0x00);
 197        /* The default of this register should be 4, but I get 0 instead.
 198         * Set this register to 4 manually. */
 199        cx25840_write(client, 0x000, 0x04);
 200        /* 3. */
 201        init_dll1(client);
 202        init_dll2(client);
 203        cx25840_write(client, 0x136, 0x0a);
 204        /* 4. */
 205        cx25840_write(client, 0x13c, 0x01);
 206        cx25840_write(client, 0x13c, 0x00);
 207        /* 5. */
 208        /* Do the firmware load in a work handler to prevent.
 209           Otherwise the kernel is blocked waiting for the
 210           bit-banging i2c interface to finish uploading the
 211           firmware. */
 212        INIT_WORK(&state->fw_work, cx25840_work_handler);
 213        init_waitqueue_head(&state->fw_wait);
 214        q = create_singlethread_workqueue("cx25840_fw");
 215        prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
 216        queue_work(q, &state->fw_work);
 217        schedule();
 218        finish_wait(&state->fw_wait, &wait);
 219        destroy_workqueue(q);
 220
 221        /* 6. */
 222        cx25840_write(client, 0x115, 0x8c);
 223        cx25840_write(client, 0x116, 0x07);
 224        cx25840_write(client, 0x118, 0x02);
 225        /* 7. */
 226        cx25840_write(client, 0x4a5, 0x80);
 227        cx25840_write(client, 0x4a5, 0x00);
 228        cx25840_write(client, 0x402, 0x00);
 229        /* 8. */
 230        cx25840_and_or(client, 0x401, ~0x18, 0);
 231        cx25840_and_or(client, 0x4a2, ~0x10, 0x10);
 232        /* steps 8c and 8d are done in change_input() */
 233        /* 10. */
 234        cx25840_write(client, 0x8d3, 0x1f);
 235        cx25840_write(client, 0x8e3, 0x03);
 236
 237        cx25840_std_setup(client);
 238
 239        /* trial and error says these are needed to get audio */
 240        cx25840_write(client, 0x914, 0xa0);
 241        cx25840_write(client, 0x918, 0xa0);
 242        cx25840_write(client, 0x919, 0x01);
 243
 244        /* stereo prefered */
 245        cx25840_write(client, 0x809, 0x04);
 246        /* AC97 shift */
 247        cx25840_write(client, 0x8cf, 0x0f);
 248
 249        /* (re)set input */
 250        set_input(client, state->vid_input, state->aud_input);
 251
 252        /* start microcontroller */
 253        cx25840_and_or(client, 0x803, ~0x10, 0x10);
 254}
 255
 256static void cx23885_initialize(struct i2c_client *client)
 257{
 258        DEFINE_WAIT(wait);
 259        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 260        struct workqueue_struct *q;
 261
 262        /*
 263         * Come out of digital power down
 264         * The CX23888, at least, needs this, otherwise registers aside from
 265         * 0x0-0x2 can't be read or written.
 266         */
 267        cx25840_write(client, 0x000, 0);
 268
 269        /* Internal Reset */
 270        cx25840_and_or(client, 0x102, ~0x01, 0x01);
 271        cx25840_and_or(client, 0x102, ~0x01, 0x00);
 272
 273        /* Stop microcontroller */
 274        cx25840_and_or(client, 0x803, ~0x10, 0x00);
 275
 276        /* DIF in reset? */
 277        cx25840_write(client, 0x398, 0);
 278
 279        /*
 280         * Trust the default xtal, no division
 281         * '885: 28.636363... MHz
 282         * '887: 25.000000 MHz
 283         * '888: 50.000000 MHz
 284         */
 285        cx25840_write(client, 0x2, 0x76);
 286
 287        /* Power up all the PLL's and DLL */
 288        cx25840_write(client, 0x1, 0x40);
 289
 290        /* Sys PLL */
 291        switch (state->id) {
 292        case V4L2_IDENT_CX23888_AV:
 293                /*
 294                 * 50.0 MHz * (0xb + 0xe8ba26/0x2000000)/4 = 5 * 28.636363 MHz
 295                 * 572.73 MHz before post divide
 296                 */
 297                cx25840_write4(client, 0x11c, 0x00e8ba26);
 298                cx25840_write4(client, 0x118, 0x0000040b);
 299                break;
 300        case V4L2_IDENT_CX23887_AV:
 301                /*
 302                 * 25.0 MHz * (0x16 + 0x1d1744c/0x2000000)/4 = 5 * 28.636363 MHz
 303                 * 572.73 MHz before post divide
 304                 */
 305                cx25840_write4(client, 0x11c, 0x01d1744c);
 306                cx25840_write4(client, 0x118, 0x00000416);
 307                break;
 308        case V4L2_IDENT_CX23885_AV:
 309        default:
 310                /*
 311                 * 28.636363 MHz * (0x14 + 0x0/0x2000000)/4 = 5 * 28.636363 MHz
 312                 * 572.73 MHz before post divide
 313                 */
 314                cx25840_write4(client, 0x11c, 0x00000000);
 315                cx25840_write4(client, 0x118, 0x00000414);
 316                break;
 317        }
 318
 319        /* Disable DIF bypass */
 320        cx25840_write4(client, 0x33c, 0x00000001);
 321
 322        /* DIF Src phase inc */
 323        cx25840_write4(client, 0x340, 0x0df7df83);
 324
 325        /*
 326         * Vid PLL
 327         * Setup for a BT.656 pixel clock of 13.5 Mpixels/second
 328         *
 329         * 28.636363 MHz * (0xf + 0x02be2c9/0x2000000)/4 = 8 * 13.5 MHz
 330         * 432.0 MHz before post divide
 331         */
 332        cx25840_write4(client, 0x10c, 0x002be2c9);
 333        cx25840_write4(client, 0x108, 0x0000040f);
 334
 335        /* Luma */
 336        cx25840_write4(client, 0x414, 0x00107d12);
 337
 338        /* Chroma */
 339        cx25840_write4(client, 0x420, 0x3d008282);
 340
 341        /*
 342         * Aux PLL
 343         * Initial setup for audio sample clock:
 344         * 48 ksps, 16 bits/sample, x160 multiplier = 122.88 MHz
 345         * Intial I2S output/master clock(?):
 346         * 48 ksps, 16 bits/sample, x16 multiplier = 12.288 MHz
 347         */
 348        switch (state->id) {
 349        case V4L2_IDENT_CX23888_AV:
 350                /*
 351                 * 50.0 MHz * (0x7 + 0x0bedfa4/0x2000000)/3 = 122.88 MHz
 352                 * 368.64 MHz before post divide
 353                 * 122.88 MHz / 0xa = 12.288 MHz
 354                 */
 355                cx25840_write4(client, 0x114, 0x00bedfa4);
 356                cx25840_write4(client, 0x110, 0x000a0307);
 357                break;
 358        case V4L2_IDENT_CX23887_AV:
 359                /*
 360                 * 25.0 MHz * (0xe + 0x17dbf48/0x2000000)/3 = 122.88 MHz
 361                 * 368.64 MHz before post divide
 362                 * 122.88 MHz / 0xa = 12.288 MHz
 363                 */
 364                cx25840_write4(client, 0x114, 0x017dbf48);
 365                cx25840_write4(client, 0x110, 0x000a030e);
 366                break;
 367        case V4L2_IDENT_CX23885_AV:
 368        default:
 369                /*
 370                 * 28.636363 MHz * (0xc + 0x1bf0c9e/0x2000000)/3 = 122.88 MHz
 371                 * 368.64 MHz before post divide
 372                 * 122.88 MHz / 0xa = 12.288 MHz
 373                 */
 374                cx25840_write4(client, 0x114, 0x01bf0c9e);
 375                cx25840_write4(client, 0x110, 0x000a030c);
 376                break;
 377        };
 378
 379        /* ADC2 input select */
 380        cx25840_write(client, 0x102, 0x10);
 381
 382        /* VIN1 & VIN5 */
 383        cx25840_write(client, 0x103, 0x11);
 384
 385        /* Enable format auto detect */
 386        cx25840_write(client, 0x400, 0);
 387        /* Fast subchroma lock */
 388        /* White crush, Chroma AGC & Chroma Killer enabled */
 389        cx25840_write(client, 0x401, 0xe8);
 390
 391        /* Select AFE clock pad output source */
 392        cx25840_write(client, 0x144, 0x05);
 393
 394        /* Drive GPIO2 direction and values for HVR1700
 395         * where an onboard mux selects the output of demodulator
 396         * vs the 417. Failure to set this results in no DTV.
 397         * It's safe to set this across all Hauppauge boards
 398         * currently, regardless of the board type.
 399         */
 400        cx25840_write(client, 0x160, 0x1d);
 401        cx25840_write(client, 0x164, 0x00);
 402
 403        /* Do the firmware load in a work handler to prevent.
 404           Otherwise the kernel is blocked waiting for the
 405           bit-banging i2c interface to finish uploading the
 406           firmware. */
 407        INIT_WORK(&state->fw_work, cx25840_work_handler);
 408        init_waitqueue_head(&state->fw_wait);
 409        q = create_singlethread_workqueue("cx25840_fw");
 410        prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
 411        queue_work(q, &state->fw_work);
 412        schedule();
 413        finish_wait(&state->fw_wait, &wait);
 414        destroy_workqueue(q);
 415
 416        cx25840_std_setup(client);
 417
 418        /* (re)set input */
 419        set_input(client, state->vid_input, state->aud_input);
 420
 421        /* start microcontroller */
 422        cx25840_and_or(client, 0x803, ~0x10, 0x10);
 423}
 424
 425/* ----------------------------------------------------------------------- */
 426
 427static void cx231xx_initialize(struct i2c_client *client)
 428{
 429        DEFINE_WAIT(wait);
 430        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 431        struct workqueue_struct *q;
 432
 433        /* Internal Reset */
 434        cx25840_and_or(client, 0x102, ~0x01, 0x01);
 435        cx25840_and_or(client, 0x102, ~0x01, 0x00);
 436
 437        /* Stop microcontroller */
 438        cx25840_and_or(client, 0x803, ~0x10, 0x00);
 439
 440        /* DIF in reset? */
 441        cx25840_write(client, 0x398, 0);
 442
 443        /* Trust the default xtal, no division */
 444        /* This changes for the cx23888 products */
 445        cx25840_write(client, 0x2, 0x76);
 446
 447        /* Bring down the regulator for AUX clk */
 448        cx25840_write(client, 0x1, 0x40);
 449
 450        /* Disable DIF bypass */
 451        cx25840_write4(client, 0x33c, 0x00000001);
 452
 453        /* DIF Src phase inc */
 454        cx25840_write4(client, 0x340, 0x0df7df83);
 455
 456        /* Luma */
 457        cx25840_write4(client, 0x414, 0x00107d12);
 458
 459        /* Chroma */
 460        cx25840_write4(client, 0x420, 0x3d008282);
 461
 462        /* ADC2 input select */
 463        cx25840_write(client, 0x102, 0x10);
 464
 465        /* VIN1 & VIN5 */
 466        cx25840_write(client, 0x103, 0x11);
 467
 468        /* Enable format auto detect */
 469        cx25840_write(client, 0x400, 0);
 470        /* Fast subchroma lock */
 471        /* White crush, Chroma AGC & Chroma Killer enabled */
 472        cx25840_write(client, 0x401, 0xe8);
 473
 474        /* Do the firmware load in a work handler to prevent.
 475           Otherwise the kernel is blocked waiting for the
 476           bit-banging i2c interface to finish uploading the
 477           firmware. */
 478        INIT_WORK(&state->fw_work, cx25840_work_handler);
 479        init_waitqueue_head(&state->fw_wait);
 480        q = create_singlethread_workqueue("cx25840_fw");
 481        prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
 482        queue_work(q, &state->fw_work);
 483        schedule();
 484        finish_wait(&state->fw_wait, &wait);
 485        destroy_workqueue(q);
 486
 487        cx25840_std_setup(client);
 488
 489        /* (re)set input */
 490        set_input(client, state->vid_input, state->aud_input);
 491
 492        /* start microcontroller */
 493        cx25840_and_or(client, 0x803, ~0x10, 0x10);
 494}
 495
 496/* ----------------------------------------------------------------------- */
 497
 498void cx25840_std_setup(struct i2c_client *client)
 499{
 500        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 501        v4l2_std_id std = state->std;
 502        int hblank, hactive, burst, vblank, vactive, sc;
 503        int vblank656, src_decimation;
 504        int luma_lpf, uv_lpf, comb;
 505        u32 pll_int, pll_frac, pll_post;
 506
 507        /* datasheet startup, step 8d */
 508        if (std & ~V4L2_STD_NTSC)
 509                cx25840_write(client, 0x49f, 0x11);
 510        else
 511                cx25840_write(client, 0x49f, 0x14);
 512
 513        if (std & V4L2_STD_625_50) {
 514                hblank = 132;
 515                hactive = 720;
 516                burst = 93;
 517                vblank = 36;
 518                vactive = 580;
 519                vblank656 = 40;
 520                src_decimation = 0x21f;
 521                luma_lpf = 2;
 522
 523                if (std & V4L2_STD_SECAM) {
 524                        uv_lpf = 0;
 525                        comb = 0;
 526                        sc = 0x0a425f;
 527                } else if (std == V4L2_STD_PAL_Nc) {
 528                        uv_lpf = 1;
 529                        comb = 0x20;
 530                        sc = 556453;
 531                } else {
 532                        uv_lpf = 1;
 533                        comb = 0x20;
 534                        sc = 688739;
 535                }
 536        } else {
 537                hactive = 720;
 538                hblank = 122;
 539                vactive = 487;
 540                luma_lpf = 1;
 541                uv_lpf = 1;
 542
 543                src_decimation = 0x21f;
 544                if (std == V4L2_STD_PAL_60) {
 545                        vblank = 26;
 546                        vblank656 = 26;
 547                        burst = 0x5b;
 548                        luma_lpf = 2;
 549                        comb = 0x20;
 550                        sc = 688739;
 551                } else if (std == V4L2_STD_PAL_M) {
 552                        vblank = 20;
 553                        vblank656 = 24;
 554                        burst = 0x61;
 555                        comb = 0x20;
 556                        sc = 555452;
 557                } else {
 558                        vblank = 26;
 559                        vblank656 = 26;
 560                        burst = 0x5b;
 561                        comb = 0x66;
 562                        sc = 556063;
 563                }
 564        }
 565
 566        /* DEBUG: Displays configured PLL frequency */
 567        if (!is_cx231xx(state)) {
 568                pll_int = cx25840_read(client, 0x108);
 569                pll_frac = cx25840_read4(client, 0x10c) & 0x1ffffff;
 570                pll_post = cx25840_read(client, 0x109);
 571                v4l_dbg(1, cx25840_debug, client,
 572                        "PLL regs = int: %u, frac: %u, post: %u\n",
 573                        pll_int, pll_frac, pll_post);
 574
 575                if (pll_post) {
 576                        int fin, fsc;
 577                        int pll = (28636363L * ((((u64)pll_int) << 25L) + pll_frac)) >> 25L;
 578
 579                        pll /= pll_post;
 580                        v4l_dbg(1, cx25840_debug, client, "PLL = %d.%06d MHz\n",
 581                                        pll / 1000000, pll % 1000000);
 582                        v4l_dbg(1, cx25840_debug, client, "PLL/8 = %d.%06d MHz\n",
 583                                        pll / 8000000, (pll / 8) % 1000000);
 584
 585                        fin = ((u64)src_decimation * pll) >> 12;
 586                        v4l_dbg(1, cx25840_debug, client,
 587                                        "ADC Sampling freq = %d.%06d MHz\n",
 588                                        fin / 1000000, fin % 1000000);
 589
 590                        fsc = (((u64)sc) * pll) >> 24L;
 591                        v4l_dbg(1, cx25840_debug, client,
 592                                        "Chroma sub-carrier freq = %d.%06d MHz\n",
 593                                        fsc / 1000000, fsc % 1000000);
 594
 595                        v4l_dbg(1, cx25840_debug, client, "hblank %i, hactive %i, "
 596                                "vblank %i, vactive %i, vblank656 %i, src_dec %i, "
 597                                "burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x, "
 598                                "sc 0x%06x\n",
 599                                hblank, hactive, vblank, vactive, vblank656,
 600                                src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
 601                }
 602        }
 603
 604        /* Sets horizontal blanking delay and active lines */
 605        cx25840_write(client, 0x470, hblank);
 606        cx25840_write(client, 0x471,
 607                        0xff & (((hblank >> 8) & 0x3) | (hactive << 4)));
 608        cx25840_write(client, 0x472, hactive >> 4);
 609
 610        /* Sets burst gate delay */
 611        cx25840_write(client, 0x473, burst);
 612
 613        /* Sets vertical blanking delay and active duration */
 614        cx25840_write(client, 0x474, vblank);
 615        cx25840_write(client, 0x475,
 616                        0xff & (((vblank >> 8) & 0x3) | (vactive << 4)));
 617        cx25840_write(client, 0x476, vactive >> 4);
 618        cx25840_write(client, 0x477, vblank656);
 619
 620        /* Sets src decimation rate */
 621        cx25840_write(client, 0x478, 0xff & src_decimation);
 622        cx25840_write(client, 0x479, 0xff & (src_decimation >> 8));
 623
 624        /* Sets Luma and UV Low pass filters */
 625        cx25840_write(client, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
 626
 627        /* Enables comb filters */
 628        cx25840_write(client, 0x47b, comb);
 629
 630        /* Sets SC Step*/
 631        cx25840_write(client, 0x47c, sc);
 632        cx25840_write(client, 0x47d, 0xff & sc >> 8);
 633        cx25840_write(client, 0x47e, 0xff & sc >> 16);
 634
 635        /* Sets VBI parameters */
 636        if (std & V4L2_STD_625_50) {
 637                cx25840_write(client, 0x47f, 0x01);
 638                state->vbi_line_offset = 5;
 639        } else {
 640                cx25840_write(client, 0x47f, 0x00);
 641                state->vbi_line_offset = 8;
 642        }
 643}
 644
 645/* ----------------------------------------------------------------------- */
 646
 647static void input_change(struct i2c_client *client)
 648{
 649        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 650        v4l2_std_id std = state->std;
 651
 652        /* Follow step 8c and 8d of section 3.16 in the cx25840 datasheet */
 653        if (std & V4L2_STD_SECAM) {
 654                cx25840_write(client, 0x402, 0);
 655        }
 656        else {
 657                cx25840_write(client, 0x402, 0x04);
 658                cx25840_write(client, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
 659        }
 660        cx25840_and_or(client, 0x401, ~0x60, 0);
 661        cx25840_and_or(client, 0x401, ~0x60, 0x60);
 662        cx25840_and_or(client, 0x810, ~0x01, 1);
 663
 664        if (state->radio) {
 665                cx25840_write(client, 0x808, 0xf9);
 666                cx25840_write(client, 0x80b, 0x00);
 667        }
 668        else if (std & V4L2_STD_525_60) {
 669                /* Certain Hauppauge PVR150 models have a hardware bug
 670                   that causes audio to drop out. For these models the
 671                   audio standard must be set explicitly.
 672                   To be precise: it affects cards with tuner models
 673                   85, 99 and 112 (model numbers from tveeprom). */
 674                int hw_fix = state->pvr150_workaround;
 675
 676                if (std == V4L2_STD_NTSC_M_JP) {
 677                        /* Japan uses EIAJ audio standard */
 678                        cx25840_write(client, 0x808, hw_fix ? 0x2f : 0xf7);
 679                } else if (std == V4L2_STD_NTSC_M_KR) {
 680                        /* South Korea uses A2 audio standard */
 681                        cx25840_write(client, 0x808, hw_fix ? 0x3f : 0xf8);
 682                } else {
 683                        /* Others use the BTSC audio standard */
 684                        cx25840_write(client, 0x808, hw_fix ? 0x1f : 0xf6);
 685                }
 686                cx25840_write(client, 0x80b, 0x00);
 687        } else if (std & V4L2_STD_PAL) {
 688                /* Autodetect audio standard and audio system */
 689                cx25840_write(client, 0x808, 0xff);
 690                /* Since system PAL-L is pretty much non-existant and
 691                   not used by any public broadcast network, force
 692                   6.5 MHz carrier to be interpreted as System DK,
 693                   this avoids DK audio detection instability */
 694               cx25840_write(client, 0x80b, 0x00);
 695        } else if (std & V4L2_STD_SECAM) {
 696                /* Autodetect audio standard and audio system */
 697                cx25840_write(client, 0x808, 0xff);
 698                /* If only one of SECAM-DK / SECAM-L is required, then force
 699                  6.5MHz carrier, else autodetect it */
 700                if ((std & V4L2_STD_SECAM_DK) &&
 701                    !(std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC))) {
 702                        /* 6.5 MHz carrier to be interpreted as System DK */
 703                        cx25840_write(client, 0x80b, 0x00);
 704               } else if (!(std & V4L2_STD_SECAM_DK) &&
 705                          (std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC))) {
 706                        /* 6.5 MHz carrier to be interpreted as System L */
 707                        cx25840_write(client, 0x80b, 0x08);
 708               } else {
 709                        /* 6.5 MHz carrier to be autodetected */
 710                        cx25840_write(client, 0x80b, 0x10);
 711               }
 712        }
 713
 714        cx25840_and_or(client, 0x810, ~0x01, 0);
 715}
 716
 717static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
 718                                                enum cx25840_audio_input aud_input)
 719{
 720        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 721        u8 is_composite = (vid_input >= CX25840_COMPOSITE1 &&
 722                           vid_input <= CX25840_COMPOSITE8);
 723        u8 is_component = (vid_input & CX25840_COMPONENT_ON) ==
 724                        CX25840_COMPONENT_ON;
 725        int luma = vid_input & 0xf0;
 726        int chroma = vid_input & 0xf00;
 727        u8 reg;
 728
 729        v4l_dbg(1, cx25840_debug, client,
 730                "decoder set video input %d, audio input %d\n",
 731                vid_input, aud_input);
 732
 733        if (vid_input >= CX25840_VIN1_CH1) {
 734                v4l_dbg(1, cx25840_debug, client, "vid_input 0x%x\n",
 735                        vid_input);
 736                reg = vid_input & 0xff;
 737                is_composite = !is_component &&
 738                        ((vid_input & CX25840_SVIDEO_ON) != CX25840_SVIDEO_ON);
 739
 740                v4l_dbg(1, cx25840_debug, client, "mux cfg 0x%x comp=%d\n",
 741                        reg, is_composite);
 742        } else if (is_composite) {
 743                reg = 0xf0 + (vid_input - CX25840_COMPOSITE1);
 744        } else {
 745                if ((vid_input & ~0xff0) ||
 746                    luma < CX25840_SVIDEO_LUMA1 || luma > CX25840_SVIDEO_LUMA8 ||
 747                    chroma < CX25840_SVIDEO_CHROMA4 || chroma > CX25840_SVIDEO_CHROMA8) {
 748                        v4l_err(client, "0x%04x is not a valid video input!\n",
 749                                vid_input);
 750                        return -EINVAL;
 751                }
 752                reg = 0xf0 + ((luma - CX25840_SVIDEO_LUMA1) >> 4);
 753                if (chroma >= CX25840_SVIDEO_CHROMA7) {
 754                        reg &= 0x3f;
 755                        reg |= (chroma - CX25840_SVIDEO_CHROMA7) >> 2;
 756                } else {
 757                        reg &= 0xcf;
 758                        reg |= (chroma - CX25840_SVIDEO_CHROMA4) >> 4;
 759                }
 760        }
 761
 762        /* The caller has previously prepared the correct routing
 763         * configuration in reg (for the cx23885) so we have no
 764         * need to attempt to flip bits for earlier av decoders.
 765         */
 766        if (!is_cx2388x(state) && !is_cx231xx(state)) {
 767                switch (aud_input) {
 768                case CX25840_AUDIO_SERIAL:
 769                        /* do nothing, use serial audio input */
 770                        break;
 771                case CX25840_AUDIO4: reg &= ~0x30; break;
 772                case CX25840_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
 773                case CX25840_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
 774                case CX25840_AUDIO7: reg &= ~0xc0; break;
 775                case CX25840_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
 776
 777                default:
 778                        v4l_err(client, "0x%04x is not a valid audio input!\n",
 779                                aud_input);
 780                        return -EINVAL;
 781                }
 782        }
 783
 784        cx25840_write(client, 0x103, reg);
 785
 786        /* Set INPUT_MODE to Composite, S-Video or Component */
 787        if (is_component)
 788                cx25840_and_or(client, 0x401, ~0x6, 0x6);
 789        else
 790                cx25840_and_or(client, 0x401, ~0x6, is_composite ? 0 : 0x02);
 791
 792        if (!is_cx2388x(state) && !is_cx231xx(state)) {
 793                /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
 794                cx25840_and_or(client, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
 795                /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2&CH3 */
 796                if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
 797                        cx25840_and_or(client, 0x102, ~0x4, 4);
 798                else
 799                        cx25840_and_or(client, 0x102, ~0x4, 0);
 800        } else {
 801                /* Set DUAL_MODE_ADC2 to 1 if component*/
 802                cx25840_and_or(client, 0x102, ~0x4, is_component ? 0x4 : 0x0);
 803                if (is_composite) {
 804                        /* ADC2 input select channel 2 */
 805                        cx25840_and_or(client, 0x102, ~0x2, 0);
 806                } else if (!is_component) {
 807                        /* S-Video */
 808                        if (chroma >= CX25840_SVIDEO_CHROMA7) {
 809                                /* ADC2 input select channel 3 */
 810                                cx25840_and_or(client, 0x102, ~0x2, 2);
 811                        } else {
 812                                /* ADC2 input select channel 2 */
 813                                cx25840_and_or(client, 0x102, ~0x2, 0);
 814                        }
 815                }
 816        }
 817
 818        state->vid_input = vid_input;
 819        state->aud_input = aud_input;
 820        if (!is_cx2583x(state)) {
 821                cx25840_audio_set_path(client);
 822                input_change(client);
 823        }
 824
 825        if (is_cx2388x(state)) {
 826                /* Audio channel 1 src : Parallel 1 */
 827                cx25840_write(client, 0x124, 0x03);
 828
 829                /* Select AFE clock pad output source */
 830                cx25840_write(client, 0x144, 0x05);
 831
 832                /* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
 833                cx25840_write(client, 0x914, 0xa0);
 834
 835                /* I2S_OUT_CTL:
 836                 * I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
 837                 * I2S_OUT_MASTER_MODE = Master
 838                 */
 839                cx25840_write(client, 0x918, 0xa0);
 840                cx25840_write(client, 0x919, 0x01);
 841        } else if (is_cx231xx(state)) {
 842                /* Audio channel 1 src : Parallel 1 */
 843                cx25840_write(client, 0x124, 0x03);
 844
 845                /* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
 846                cx25840_write(client, 0x914, 0xa0);
 847
 848                /* I2S_OUT_CTL:
 849                 * I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
 850                 * I2S_OUT_MASTER_MODE = Master
 851                 */
 852                cx25840_write(client, 0x918, 0xa0);
 853                cx25840_write(client, 0x919, 0x01);
 854        }
 855
 856        return 0;
 857}
 858
 859/* ----------------------------------------------------------------------- */
 860
 861static int set_v4lstd(struct i2c_client *client)
 862{
 863        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 864        u8 fmt = 0;     /* zero is autodetect */
 865        u8 pal_m = 0;
 866
 867        /* First tests should be against specific std */
 868        if (state->std == V4L2_STD_NTSC_M_JP) {
 869                fmt = 0x2;
 870        } else if (state->std == V4L2_STD_NTSC_443) {
 871                fmt = 0x3;
 872        } else if (state->std == V4L2_STD_PAL_M) {
 873                pal_m = 1;
 874                fmt = 0x5;
 875        } else if (state->std == V4L2_STD_PAL_N) {
 876                fmt = 0x6;
 877        } else if (state->std == V4L2_STD_PAL_Nc) {
 878                fmt = 0x7;
 879        } else if (state->std == V4L2_STD_PAL_60) {
 880                fmt = 0x8;
 881        } else {
 882                /* Then, test against generic ones */
 883                if (state->std & V4L2_STD_NTSC)
 884                        fmt = 0x1;
 885                else if (state->std & V4L2_STD_PAL)
 886                        fmt = 0x4;
 887                else if (state->std & V4L2_STD_SECAM)
 888                        fmt = 0xc;
 889        }
 890
 891        v4l_dbg(1, cx25840_debug, client, "changing video std to fmt %i\n",fmt);
 892
 893        /* Follow step 9 of section 3.16 in the cx25840 datasheet.
 894           Without this PAL may display a vertical ghosting effect.
 895           This happens for example with the Yuan MPC622. */
 896        if (fmt >= 4 && fmt < 8) {
 897                /* Set format to NTSC-M */
 898                cx25840_and_or(client, 0x400, ~0xf, 1);
 899                /* Turn off LCOMB */
 900                cx25840_and_or(client, 0x47b, ~6, 0);
 901        }
 902        cx25840_and_or(client, 0x400, ~0xf, fmt);
 903        cx25840_and_or(client, 0x403, ~0x3, pal_m);
 904        cx25840_std_setup(client);
 905        if (!is_cx2583x(state))
 906                input_change(client);
 907        return 0;
 908}
 909
 910/* ----------------------------------------------------------------------- */
 911
 912static int cx25840_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 913{
 914        struct cx25840_state *state = to_state(sd);
 915        struct i2c_client *client = v4l2_get_subdevdata(sd);
 916
 917        switch (ctrl->id) {
 918        case CX25840_CID_ENABLE_PVR150_WORKAROUND:
 919                state->pvr150_workaround = ctrl->value;
 920                set_input(client, state->vid_input, state->aud_input);
 921                break;
 922
 923        case V4L2_CID_BRIGHTNESS:
 924                if (ctrl->value < 0 || ctrl->value > 255) {
 925                        v4l_err(client, "invalid brightness setting %d\n",
 926                                    ctrl->value);
 927                        return -ERANGE;
 928                }
 929
 930                cx25840_write(client, 0x414, ctrl->value - 128);
 931                break;
 932
 933        case V4L2_CID_CONTRAST:
 934                if (ctrl->value < 0 || ctrl->value > 127) {
 935                        v4l_err(client, "invalid contrast setting %d\n",
 936                                    ctrl->value);
 937                        return -ERANGE;
 938                }
 939
 940                cx25840_write(client, 0x415, ctrl->value << 1);
 941                break;
 942
 943        case V4L2_CID_SATURATION:
 944                if (ctrl->value < 0 || ctrl->value > 127) {
 945                        v4l_err(client, "invalid saturation setting %d\n",
 946                                    ctrl->value);
 947                        return -ERANGE;
 948                }
 949
 950                cx25840_write(client, 0x420, ctrl->value << 1);
 951                cx25840_write(client, 0x421, ctrl->value << 1);
 952                break;
 953
 954        case V4L2_CID_HUE:
 955                if (ctrl->value < -128 || ctrl->value > 127) {
 956                        v4l_err(client, "invalid hue setting %d\n", ctrl->value);
 957                        return -ERANGE;
 958                }
 959
 960                cx25840_write(client, 0x422, ctrl->value);
 961                break;
 962
 963        case V4L2_CID_AUDIO_VOLUME:
 964        case V4L2_CID_AUDIO_BASS:
 965        case V4L2_CID_AUDIO_TREBLE:
 966        case V4L2_CID_AUDIO_BALANCE:
 967        case V4L2_CID_AUDIO_MUTE:
 968                if (is_cx2583x(state))
 969                        return -EINVAL;
 970                return cx25840_audio_s_ctrl(sd, ctrl);
 971
 972        default:
 973                return -EINVAL;
 974        }
 975
 976        return 0;
 977}
 978
 979static int cx25840_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 980{
 981        struct cx25840_state *state = to_state(sd);
 982        struct i2c_client *client = v4l2_get_subdevdata(sd);
 983
 984        switch (ctrl->id) {
 985        case CX25840_CID_ENABLE_PVR150_WORKAROUND:
 986                ctrl->value = state->pvr150_workaround;
 987                break;
 988        case V4L2_CID_BRIGHTNESS:
 989                ctrl->value = (s8)cx25840_read(client, 0x414) + 128;
 990                break;
 991        case V4L2_CID_CONTRAST:
 992                ctrl->value = cx25840_read(client, 0x415) >> 1;
 993                break;
 994        case V4L2_CID_SATURATION:
 995                ctrl->value = cx25840_read(client, 0x420) >> 1;
 996                break;
 997        case V4L2_CID_HUE:
 998                ctrl->value = (s8)cx25840_read(client, 0x422);
 999                break;
1000        case V4L2_CID_AUDIO_VOLUME:
1001        case V4L2_CID_AUDIO_BASS:
1002        case V4L2_CID_AUDIO_TREBLE:
1003        case V4L2_CID_AUDIO_BALANCE:
1004        case V4L2_CID_AUDIO_MUTE:
1005                if (is_cx2583x(state))
1006                        return -EINVAL;
1007                return cx25840_audio_g_ctrl(sd, ctrl);
1008        default:
1009                return -EINVAL;
1010        }
1011
1012        return 0;
1013}
1014
1015/* ----------------------------------------------------------------------- */
1016
1017static int cx25840_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
1018{
1019        struct cx25840_state *state = to_state(sd);
1020        struct i2c_client *client = v4l2_get_subdevdata(sd);
1021        int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
1022        int is_50Hz = !(state->std & V4L2_STD_525_60);
1023
1024        if (fmt->code != V4L2_MBUS_FMT_FIXED)
1025                return -EINVAL;
1026
1027        fmt->field = V4L2_FIELD_INTERLACED;
1028        fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
1029
1030        Vsrc = (cx25840_read(client, 0x476) & 0x3f) << 4;
1031        Vsrc |= (cx25840_read(client, 0x475) & 0xf0) >> 4;
1032
1033        Hsrc = (cx25840_read(client, 0x472) & 0x3f) << 4;
1034        Hsrc |= (cx25840_read(client, 0x471) & 0xf0) >> 4;
1035
1036        Vlines = fmt->height + (is_50Hz ? 4 : 7);
1037
1038        if ((fmt->width * 16 < Hsrc) || (Hsrc < fmt->width) ||
1039                        (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
1040                v4l_err(client, "%dx%d is not a valid size!\n",
1041                                fmt->width, fmt->height);
1042                return -ERANGE;
1043        }
1044
1045        HSC = (Hsrc * (1 << 20)) / fmt->width - (1 << 20);
1046        VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
1047        VSC &= 0x1fff;
1048
1049        if (fmt->width >= 385)
1050                filter = 0;
1051        else if (fmt->width > 192)
1052                filter = 1;
1053        else if (fmt->width > 96)
1054                filter = 2;
1055        else
1056                filter = 3;
1057
1058        v4l_dbg(1, cx25840_debug, client, "decoder set size %dx%d -> scale  %ux%u\n",
1059                        fmt->width, fmt->height, HSC, VSC);
1060
1061        /* HSCALE=HSC */
1062        cx25840_write(client, 0x418, HSC & 0xff);
1063        cx25840_write(client, 0x419, (HSC >> 8) & 0xff);
1064        cx25840_write(client, 0x41a, HSC >> 16);
1065        /* VSCALE=VSC */
1066        cx25840_write(client, 0x41c, VSC & 0xff);
1067        cx25840_write(client, 0x41d, VSC >> 8);
1068        /* VS_INTRLACE=1 VFILT=filter */
1069        cx25840_write(client, 0x41e, 0x8 | filter);
1070        return 0;
1071}
1072
1073/* ----------------------------------------------------------------------- */
1074
1075static void log_video_status(struct i2c_client *client)
1076{
1077        static const char *const fmt_strs[] = {
1078                "0x0",
1079                "NTSC-M", "NTSC-J", "NTSC-4.43",
1080                "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
1081                "0x9", "0xA", "0xB",
1082                "SECAM",
1083                "0xD", "0xE", "0xF"
1084        };
1085
1086        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
1087        u8 vidfmt_sel = cx25840_read(client, 0x400) & 0xf;
1088        u8 gen_stat1 = cx25840_read(client, 0x40d);
1089        u8 gen_stat2 = cx25840_read(client, 0x40e);
1090        int vid_input = state->vid_input;
1091
1092        v4l_info(client, "Video signal:              %spresent\n",
1093                    (gen_stat2 & 0x20) ? "" : "not ");
1094        v4l_info(client, "Detected format:           %s\n",
1095                    fmt_strs[gen_stat1 & 0xf]);
1096
1097        v4l_info(client, "Specified standard:        %s\n",
1098                    vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
1099
1100        if (vid_input >= CX25840_COMPOSITE1 &&
1101            vid_input <= CX25840_COMPOSITE8) {
1102                v4l_info(client, "Specified video input:     Composite %d\n",
1103                        vid_input - CX25840_COMPOSITE1 + 1);
1104        } else {
1105                v4l_info(client, "Specified video input:     S-Video (Luma In%d, Chroma In%d)\n",
1106                        (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
1107        }
1108
1109        v4l_info(client, "Specified audioclock freq: %d Hz\n", state->audclk_freq);
1110}
1111
1112/* ----------------------------------------------------------------------- */
1113
1114static void log_audio_status(struct i2c_client *client)
1115{
1116        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
1117        u8 download_ctl = cx25840_read(client, 0x803);
1118        u8 mod_det_stat0 = cx25840_read(client, 0x804);
1119        u8 mod_det_stat1 = cx25840_read(client, 0x805);
1120        u8 audio_config = cx25840_read(client, 0x808);
1121        u8 pref_mode = cx25840_read(client, 0x809);
1122        u8 afc0 = cx25840_read(client, 0x80b);
1123        u8 mute_ctl = cx25840_read(client, 0x8d3);
1124        int aud_input = state->aud_input;
1125        char *p;
1126
1127        switch (mod_det_stat0) {
1128        case 0x00: p = "mono"; break;
1129        case 0x01: p = "stereo"; break;
1130        case 0x02: p = "dual"; break;
1131        case 0x04: p = "tri"; break;
1132        case 0x10: p = "mono with SAP"; break;
1133        case 0x11: p = "stereo with SAP"; break;
1134        case 0x12: p = "dual with SAP"; break;
1135        case 0x14: p = "tri with SAP"; break;
1136        case 0xfe: p = "forced mode"; break;
1137        default: p = "not defined";
1138        }
1139        v4l_info(client, "Detected audio mode:       %s\n", p);
1140
1141        switch (mod_det_stat1) {
1142        case 0x00: p = "not defined"; break;
1143        case 0x01: p = "EIAJ"; break;
1144        case 0x02: p = "A2-M"; break;
1145        case 0x03: p = "A2-BG"; break;
1146        case 0x04: p = "A2-DK1"; break;
1147        case 0x05: p = "A2-DK2"; break;
1148        case 0x06: p = "A2-DK3"; break;
1149        case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
1150        case 0x08: p = "AM-L"; break;
1151        case 0x09: p = "NICAM-BG"; break;
1152        case 0x0a: p = "NICAM-DK"; break;
1153        case 0x0b: p = "NICAM-I"; break;
1154        case 0x0c: p = "NICAM-L"; break;
1155        case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
1156        case 0x0e: p = "IF FM Radio"; break;
1157        case 0x0f: p = "BTSC"; break;
1158        case 0x10: p = "high-deviation FM"; break;
1159        case 0x11: p = "very high-deviation FM"; break;
1160        case 0xfd: p = "unknown audio standard"; break;
1161        case 0xfe: p = "forced audio standard"; break;
1162        case 0xff: p = "no detected audio standard"; break;
1163        default: p = "not defined";
1164        }
1165        v4l_info(client, "Detected audio standard:   %s\n", p);
1166        v4l_info(client, "Audio muted:               %s\n",
1167                    (state->unmute_volume >= 0) ? "yes" : "no");
1168        v4l_info(client, "Audio microcontroller:     %s\n",
1169                    (download_ctl & 0x10) ?
1170                                ((mute_ctl & 0x2) ? "detecting" : "running") : "stopped");
1171
1172        switch (audio_config >> 4) {
1173        case 0x00: p = "undefined"; break;
1174        case 0x01: p = "BTSC"; break;
1175        case 0x02: p = "EIAJ"; break;
1176        case 0x03: p = "A2-M"; break;
1177        case 0x04: p = "A2-BG"; break;
1178        case 0x05: p = "A2-DK1"; break;
1179        case 0x06: p = "A2-DK2"; break;
1180        case 0x07: p = "A2-DK3"; break;
1181        case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
1182        case 0x09: p = "AM-L"; break;
1183        case 0x0a: p = "NICAM-BG"; break;
1184        case 0x0b: p = "NICAM-DK"; break;
1185        case 0x0c: p = "NICAM-I"; break;
1186        case 0x0d: p = "NICAM-L"; break;
1187        case 0x0e: p = "FM radio"; break;
1188        case 0x0f: p = "automatic detection"; break;
1189        default: p = "undefined";
1190        }
1191        v4l_info(client, "Configured audio standard: %s\n", p);
1192
1193        if ((audio_config >> 4) < 0xF) {
1194                switch (audio_config & 0xF) {
1195                case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
1196                case 0x01: p = "MONO2 (LANGUAGE B)"; break;
1197                case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
1198                case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
1199                case 0x04: p = "STEREO"; break;
1200                case 0x05: p = "DUAL1 (AB)"; break;
1201                case 0x06: p = "DUAL2 (AC) (FM)"; break;
1202                case 0x07: p = "DUAL3 (BC) (FM)"; break;
1203                case 0x08: p = "DUAL4 (AC) (AM)"; break;
1204                case 0x09: p = "DUAL5 (BC) (AM)"; break;
1205                case 0x0a: p = "SAP"; break;
1206                default: p = "undefined";
1207                }
1208                v4l_info(client, "Configured audio mode:     %s\n", p);
1209        } else {
1210                switch (audio_config & 0xF) {
1211                case 0x00: p = "BG"; break;
1212                case 0x01: p = "DK1"; break;
1213                case 0x02: p = "DK2"; break;
1214                case 0x03: p = "DK3"; break;
1215                case 0x04: p = "I"; break;
1216                case 0x05: p = "L"; break;
1217                case 0x06: p = "BTSC"; break;
1218                case 0x07: p = "EIAJ"; break;
1219                case 0x08: p = "A2-M"; break;
1220                case 0x09: p = "FM Radio"; break;
1221                case 0x0f: p = "automatic standard and mode detection"; break;
1222                default: p = "undefined";
1223                }
1224                v4l_info(client, "Configured audio system:   %s\n", p);
1225        }
1226
1227        if (aud_input) {
1228                v4l_info(client, "Specified audio input:     Tuner (In%d)\n", aud_input);
1229        } else {
1230                v4l_info(client, "Specified audio input:     External\n");
1231        }
1232
1233        switch (pref_mode & 0xf) {
1234        case 0: p = "mono/language A"; break;
1235        case 1: p = "language B"; break;
1236        case 2: p = "language C"; break;
1237        case 3: p = "analog fallback"; break;
1238        case 4: p = "stereo"; break;
1239        case 5: p = "language AC"; break;
1240        case 6: p = "language BC"; break;
1241        case 7: p = "language AB"; break;
1242        default: p = "undefined";
1243        }
1244        v4l_info(client, "Preferred audio mode:      %s\n", p);
1245
1246        if ((audio_config & 0xf) == 0xf) {
1247                switch ((afc0 >> 3) & 0x3) {
1248                case 0: p = "system DK"; break;
1249                case 1: p = "system L"; break;
1250                case 2: p = "autodetect"; break;
1251                default: p = "undefined";
1252                }
1253                v4l_info(client, "Selected 65 MHz format:    %s\n", p);
1254
1255                switch (afc0 & 0x7) {
1256                case 0: p = "chroma"; break;
1257                case 1: p = "BTSC"; break;
1258                case 2: p = "EIAJ"; break;
1259                case 3: p = "A2-M"; break;
1260                case 4: p = "autodetect"; break;
1261                default: p = "undefined";
1262                }
1263                v4l_info(client, "Selected 45 MHz format:    %s\n", p);
1264        }
1265}
1266
1267/* ----------------------------------------------------------------------- */
1268
1269/* This load_fw operation must be called to load the driver's firmware.
1270   Without this the audio standard detection will fail and you will
1271   only get mono.
1272
1273   Since loading the firmware is often problematic when the driver is
1274   compiled into the kernel I recommend postponing calling this function
1275   until the first open of the video device. Another reason for
1276   postponing it is that loading this firmware takes a long time (seconds)
1277   due to the slow i2c bus speed. So it will speed up the boot process if
1278   you can avoid loading the fw as long as the video device isn't used.  */
1279static int cx25840_load_fw(struct v4l2_subdev *sd)
1280{
1281        struct cx25840_state *state = to_state(sd);
1282        struct i2c_client *client = v4l2_get_subdevdata(sd);
1283
1284        if (!state->is_initialized) {
1285                /* initialize and load firmware */
1286                state->is_initialized = 1;
1287                if (is_cx2583x(state))
1288                        cx25836_initialize(client);
1289                else if (is_cx2388x(state))
1290                        cx23885_initialize(client);
1291                else if (is_cx231xx(state))
1292                        cx231xx_initialize(client);
1293                else
1294                        cx25840_initialize(client);
1295        }
1296        return 0;
1297}
1298
1299#ifdef CONFIG_VIDEO_ADV_DEBUG
1300static int cx25840_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
1301{
1302        struct i2c_client *client = v4l2_get_subdevdata(sd);
1303
1304        if (!v4l2_chip_match_i2c_client(client, &reg->match))
1305                return -EINVAL;
1306        if (!capable(CAP_SYS_ADMIN))
1307                return -EPERM;
1308        reg->size = 1;
1309        reg->val = cx25840_read(client, reg->reg & 0x0fff);
1310        return 0;
1311}
1312
1313static int cx25840_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
1314{
1315        struct i2c_client *client = v4l2_get_subdevdata(sd);
1316
1317        if (!v4l2_chip_match_i2c_client(client, &reg->match))
1318                return -EINVAL;
1319        if (!capable(CAP_SYS_ADMIN))
1320                return -EPERM;
1321        cx25840_write(client, reg->reg & 0x0fff, reg->val & 0xff);
1322        return 0;
1323}
1324#endif
1325
1326static int cx25840_s_audio_stream(struct v4l2_subdev *sd, int enable)
1327{
1328        struct cx25840_state *state = to_state(sd);
1329        struct i2c_client *client = v4l2_get_subdevdata(sd);
1330        u8 v;
1331
1332        if (is_cx2583x(state) || is_cx2388x(state) || is_cx231xx(state))
1333                return 0;
1334
1335        v4l_dbg(1, cx25840_debug, client, "%s audio output\n",
1336                        enable ? "enable" : "disable");
1337
1338        if (enable) {
1339                v = cx25840_read(client, 0x115) | 0x80;
1340                cx25840_write(client, 0x115, v);
1341                v = cx25840_read(client, 0x116) | 0x03;
1342                cx25840_write(client, 0x116, v);
1343        } else {
1344                v = cx25840_read(client, 0x115) & ~(0x80);
1345                cx25840_write(client, 0x115, v);
1346                v = cx25840_read(client, 0x116) & ~(0x03);
1347                cx25840_write(client, 0x116, v);
1348        }
1349        return 0;
1350}
1351
1352static int cx25840_s_stream(struct v4l2_subdev *sd, int enable)
1353{
1354        struct cx25840_state *state = to_state(sd);
1355        struct i2c_client *client = v4l2_get_subdevdata(sd);
1356        u8 v;
1357
1358        v4l_dbg(1, cx25840_debug, client, "%s video output\n",
1359                        enable ? "enable" : "disable");
1360        if (enable) {
1361                if (is_cx2388x(state) || is_cx231xx(state)) {
1362                        v = cx25840_read(client, 0x421) | 0x0b;
1363                        cx25840_write(client, 0x421, v);
1364                } else {
1365                        v = cx25840_read(client, 0x115) | 0x0c;
1366                        cx25840_write(client, 0x115, v);
1367                        v = cx25840_read(client, 0x116) | 0x04;
1368                        cx25840_write(client, 0x116, v);
1369                }
1370        } else {
1371                if (is_cx2388x(state) || is_cx231xx(state)) {
1372                        v = cx25840_read(client, 0x421) & ~(0x0b);
1373                        cx25840_write(client, 0x421, v);
1374                } else {
1375                        v = cx25840_read(client, 0x115) & ~(0x0c);
1376                        cx25840_write(client, 0x115, v);
1377                        v = cx25840_read(client, 0x116) & ~(0x04);
1378                        cx25840_write(client, 0x116, v);
1379                }
1380        }
1381        return 0;
1382}
1383
1384static int cx25840_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1385{
1386        struct cx25840_state *state = to_state(sd);
1387
1388        switch (qc->id) {
1389        case V4L2_CID_BRIGHTNESS:
1390                return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128);
1391        case V4L2_CID_CONTRAST:
1392        case V4L2_CID_SATURATION:
1393                return v4l2_ctrl_query_fill(qc, 0, 127, 1, 64);
1394        case V4L2_CID_HUE:
1395                return v4l2_ctrl_query_fill(qc, -128, 127, 1, 0);
1396        default:
1397                break;
1398        }
1399        if (is_cx2583x(state))
1400                return -EINVAL;
1401
1402        switch (qc->id) {
1403        case V4L2_CID_AUDIO_VOLUME:
1404                return v4l2_ctrl_query_fill(qc, 0, 65535,
1405                                65535 / 100, state->default_volume);
1406        case V4L2_CID_AUDIO_MUTE:
1407                return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1408        case V4L2_CID_AUDIO_BALANCE:
1409        case V4L2_CID_AUDIO_BASS:
1410        case V4L2_CID_AUDIO_TREBLE:
1411                return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1412        default:
1413                return -EINVAL;
1414        }
1415        return -EINVAL;
1416}
1417
1418static int cx25840_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1419{
1420        struct cx25840_state *state = to_state(sd);
1421        struct i2c_client *client = v4l2_get_subdevdata(sd);
1422
1423        if (state->radio == 0 && state->std == std)
1424                return 0;
1425        state->radio = 0;
1426        state->std = std;
1427        return set_v4lstd(client);
1428}
1429
1430static int cx25840_s_radio(struct v4l2_subdev *sd)
1431{
1432        struct cx25840_state *state = to_state(sd);
1433
1434        state->radio = 1;
1435        return 0;
1436}
1437
1438static int cx25840_s_video_routing(struct v4l2_subdev *sd,
1439                                   u32 input, u32 output, u32 config)
1440{
1441        struct cx25840_state *state = to_state(sd);
1442        struct i2c_client *client = v4l2_get_subdevdata(sd);
1443
1444        return set_input(client, input, state->aud_input);
1445}
1446
1447static int cx25840_s_audio_routing(struct v4l2_subdev *sd,
1448                                   u32 input, u32 output, u32 config)
1449{
1450        struct cx25840_state *state = to_state(sd);
1451        struct i2c_client *client = v4l2_get_subdevdata(sd);
1452
1453        if (is_cx2583x(state))
1454                return -EINVAL;
1455        return set_input(client, state->vid_input, input);
1456}
1457
1458static int cx25840_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1459{
1460        struct cx25840_state *state = to_state(sd);
1461        struct i2c_client *client = v4l2_get_subdevdata(sd);
1462
1463        if (!is_cx2583x(state))
1464                input_change(client);
1465        return 0;
1466}
1467
1468static int cx25840_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1469{
1470        struct cx25840_state *state = to_state(sd);
1471        struct i2c_client *client = v4l2_get_subdevdata(sd);
1472        u8 vpres = cx25840_read(client, 0x40e) & 0x20;
1473        u8 mode;
1474        int val = 0;
1475
1476        if (state->radio)
1477                return 0;
1478
1479        vt->signal = vpres ? 0xffff : 0x0;
1480        if (is_cx2583x(state))
1481                return 0;
1482
1483        vt->capability |=
1484                V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
1485                V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
1486
1487        mode = cx25840_read(client, 0x804);
1488
1489        /* get rxsubchans and audmode */
1490        if ((mode & 0xf) == 1)
1491                val |= V4L2_TUNER_SUB_STEREO;
1492        else
1493                val |= V4L2_TUNER_SUB_MONO;
1494
1495        if (mode == 2 || mode == 4)
1496                val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
1497
1498        if (mode & 0x10)
1499                val |= V4L2_TUNER_SUB_SAP;
1500
1501        vt->rxsubchans = val;
1502        vt->audmode = state->audmode;
1503        return 0;
1504}
1505
1506static int cx25840_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1507{
1508        struct cx25840_state *state = to_state(sd);
1509        struct i2c_client *client = v4l2_get_subdevdata(sd);
1510
1511        if (state->radio || is_cx2583x(state))
1512                return 0;
1513
1514        switch (vt->audmode) {
1515                case V4L2_TUNER_MODE_MONO:
1516                        /* mono      -> mono
1517                           stereo    -> mono
1518                           bilingual -> lang1 */
1519                        cx25840_and_or(client, 0x809, ~0xf, 0x00);
1520                        break;
1521                case V4L2_TUNER_MODE_STEREO:
1522                case V4L2_TUNER_MODE_LANG1:
1523                        /* mono      -> mono
1524                           stereo    -> stereo
1525                           bilingual -> lang1 */
1526                        cx25840_and_or(client, 0x809, ~0xf, 0x04);
1527                        break;
1528                case V4L2_TUNER_MODE_LANG1_LANG2:
1529                        /* mono      -> mono
1530                           stereo    -> stereo
1531                           bilingual -> lang1/lang2 */
1532                        cx25840_and_or(client, 0x809, ~0xf, 0x07);
1533                        break;
1534                case V4L2_TUNER_MODE_LANG2:
1535                        /* mono      -> mono
1536                           stereo    -> stereo
1537                           bilingual -> lang2 */
1538                        cx25840_and_or(client, 0x809, ~0xf, 0x01);
1539                        break;
1540                default:
1541                        return -EINVAL;
1542        }
1543        state->audmode = vt->audmode;
1544        return 0;
1545}
1546
1547static int cx25840_reset(struct v4l2_subdev *sd, u32 val)
1548{
1549        struct cx25840_state *state = to_state(sd);
1550        struct i2c_client *client = v4l2_get_subdevdata(sd);
1551
1552        if (is_cx2583x(state))
1553                cx25836_initialize(client);
1554        else if (is_cx2388x(state))
1555                cx23885_initialize(client);
1556        else if (is_cx231xx(state))
1557                cx231xx_initialize(client);
1558        else
1559                cx25840_initialize(client);
1560        return 0;
1561}
1562
1563static int cx25840_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1564{
1565        struct cx25840_state *state = to_state(sd);
1566        struct i2c_client *client = v4l2_get_subdevdata(sd);
1567
1568        return v4l2_chip_ident_i2c_client(client, chip, state->id, state->rev);
1569}
1570
1571static int cx25840_log_status(struct v4l2_subdev *sd)
1572{
1573        struct cx25840_state *state = to_state(sd);
1574        struct i2c_client *client = v4l2_get_subdevdata(sd);
1575
1576        log_video_status(client);
1577        if (!is_cx2583x(state))
1578                log_audio_status(client);
1579        return 0;
1580}
1581
1582/* ----------------------------------------------------------------------- */
1583
1584static const struct v4l2_subdev_core_ops cx25840_core_ops = {
1585        .log_status = cx25840_log_status,
1586        .g_chip_ident = cx25840_g_chip_ident,
1587        .g_ctrl = cx25840_g_ctrl,
1588        .s_ctrl = cx25840_s_ctrl,
1589        .queryctrl = cx25840_queryctrl,
1590        .s_std = cx25840_s_std,
1591        .reset = cx25840_reset,
1592        .load_fw = cx25840_load_fw,
1593#ifdef CONFIG_VIDEO_ADV_DEBUG
1594        .g_register = cx25840_g_register,
1595        .s_register = cx25840_s_register,
1596#endif
1597};
1598
1599static const struct v4l2_subdev_tuner_ops cx25840_tuner_ops = {
1600        .s_frequency = cx25840_s_frequency,
1601        .s_radio = cx25840_s_radio,
1602        .g_tuner = cx25840_g_tuner,
1603        .s_tuner = cx25840_s_tuner,
1604};
1605
1606static const struct v4l2_subdev_audio_ops cx25840_audio_ops = {
1607        .s_clock_freq = cx25840_s_clock_freq,
1608        .s_routing = cx25840_s_audio_routing,
1609        .s_stream = cx25840_s_audio_stream,
1610};
1611
1612static const struct v4l2_subdev_video_ops cx25840_video_ops = {
1613        .s_routing = cx25840_s_video_routing,
1614        .s_mbus_fmt = cx25840_s_mbus_fmt,
1615        .s_stream = cx25840_s_stream,
1616};
1617
1618static const struct v4l2_subdev_vbi_ops cx25840_vbi_ops = {
1619        .decode_vbi_line = cx25840_decode_vbi_line,
1620        .s_raw_fmt = cx25840_s_raw_fmt,
1621        .s_sliced_fmt = cx25840_s_sliced_fmt,
1622        .g_sliced_fmt = cx25840_g_sliced_fmt,
1623};
1624
1625static const struct v4l2_subdev_ops cx25840_ops = {
1626        .core = &cx25840_core_ops,
1627        .tuner = &cx25840_tuner_ops,
1628        .audio = &cx25840_audio_ops,
1629        .video = &cx25840_video_ops,
1630        .vbi = &cx25840_vbi_ops,
1631};
1632
1633/* ----------------------------------------------------------------------- */
1634
1635static u32 get_cx2388x_ident(struct i2c_client *client)
1636{
1637        u32 ret;
1638
1639        /* Come out of digital power down */
1640        cx25840_write(client, 0x000, 0);
1641
1642        /* Detecting whether the part is cx23885/7/8 is more
1643         * difficult than it needs to be. No ID register. Instead we
1644         * probe certain registers indicated in the datasheets to look
1645         * for specific defaults that differ between the silicon designs. */
1646
1647        /* It's either 885/7 if the IR Tx Clk Divider register exists */
1648        if (cx25840_read4(client, 0x204) & 0xffff) {
1649                /* CX23885 returns bogus repetitive byte values for the DIF,
1650                 * which doesn't exist for it. (Ex. 8a8a8a8a or 31313131) */
1651                ret = cx25840_read4(client, 0x300);
1652                if (((ret & 0xffff0000) >> 16) == (ret & 0xffff)) {
1653                        /* No DIF */
1654                        ret = V4L2_IDENT_CX23885_AV;
1655                } else {
1656                        /* CX23887 has a broken DIF, but the registers
1657                         * appear valid (but unsed), good enough to detect. */
1658                        ret = V4L2_IDENT_CX23887_AV;
1659                }
1660        } else if (cx25840_read4(client, 0x300) & 0x0fffffff) {
1661                /* DIF PLL Freq Word reg exists; chip must be a CX23888 */
1662                ret = V4L2_IDENT_CX23888_AV;
1663        } else {
1664                v4l_err(client, "Unable to detect h/w, assuming cx23887\n");
1665                ret = V4L2_IDENT_CX23887_AV;
1666        }
1667
1668        /* Back into digital power down */
1669        cx25840_write(client, 0x000, 2);
1670        return ret;
1671}
1672
1673static int cx25840_probe(struct i2c_client *client,
1674                         const struct i2c_device_id *did)
1675{
1676        struct cx25840_state *state;
1677        struct v4l2_subdev *sd;
1678        u32 id = V4L2_IDENT_NONE;
1679        u16 device_id;
1680
1681        /* Check if the adapter supports the needed features */
1682        if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1683                return -EIO;
1684
1685        v4l_dbg(1, cx25840_debug, client, "detecting cx25840 client on address 0x%x\n", client->addr << 1);
1686
1687        device_id = cx25840_read(client, 0x101) << 8;
1688        device_id |= cx25840_read(client, 0x100);
1689        v4l_dbg(1, cx25840_debug, client, "device_id = 0x%04x\n", device_id);
1690
1691        /* The high byte of the device ID should be
1692         * 0x83 for the cx2583x and 0x84 for the cx2584x */
1693        if ((device_id & 0xff00) == 0x8300) {
1694                id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
1695        } else if ((device_id & 0xff00) == 0x8400) {
1696                id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
1697        } else if (device_id == 0x0000) {
1698                id = get_cx2388x_ident(client);
1699        } else if ((device_id & 0xfff0) == 0x5A30) {
1700                /* The CX23100 (0x5A3C = 23100) doesn't have an A/V decoder */
1701                id = V4L2_IDENT_CX2310X_AV;
1702        } else if ((device_id & 0xff) == (device_id >> 8)) {
1703                v4l_err(client,
1704                        "likely a confused/unresponsive cx2388[578] A/V decoder"
1705                        " found @ 0x%x (%s)\n",
1706                        client->addr << 1, client->adapter->name);
1707                v4l_err(client, "A method to reset it from the cx25840 driver"
1708                        " software is not known at this time\n");
1709                return -ENODEV;
1710        } else {
1711                v4l_dbg(1, cx25840_debug, client, "cx25840 not found\n");
1712                return -ENODEV;
1713        }
1714
1715        state = kzalloc(sizeof(struct cx25840_state), GFP_KERNEL);
1716        if (state == NULL)
1717                return -ENOMEM;
1718
1719        sd = &state->sd;
1720        v4l2_i2c_subdev_init(sd, client, &cx25840_ops);
1721        switch (id) {
1722        case V4L2_IDENT_CX23885_AV:
1723                v4l_info(client, "cx23885 A/V decoder found @ 0x%x (%s)\n",
1724                         client->addr << 1, client->adapter->name);
1725                break;
1726        case V4L2_IDENT_CX23887_AV:
1727                v4l_info(client, "cx23887 A/V decoder found @ 0x%x (%s)\n",
1728                         client->addr << 1, client->adapter->name);
1729                break;
1730        case V4L2_IDENT_CX23888_AV:
1731                v4l_info(client, "cx23888 A/V decoder found @ 0x%x (%s)\n",
1732                         client->addr << 1, client->adapter->name);
1733                break;
1734        case V4L2_IDENT_CX2310X_AV:
1735                v4l_info(client, "cx%d A/V decoder found @ 0x%x (%s)\n",
1736                         device_id, client->addr << 1, client->adapter->name);
1737                break;
1738        case V4L2_IDENT_CX25840:
1739        case V4L2_IDENT_CX25841:
1740        case V4L2_IDENT_CX25842:
1741        case V4L2_IDENT_CX25843:
1742                /* Note: revision '(device_id & 0x0f) == 2' was never built. The
1743                   marking skips from 0x1 == 22 to 0x3 == 23. */
1744                v4l_info(client, "cx25%3x-2%x found @ 0x%x (%s)\n",
1745                         (device_id & 0xfff0) >> 4,
1746                         (device_id & 0x0f) < 3 ? (device_id & 0x0f) + 1
1747                                                : (device_id & 0x0f),
1748                         client->addr << 1, client->adapter->name);
1749                break;
1750        case V4L2_IDENT_CX25836:
1751        case V4L2_IDENT_CX25837:
1752        default:
1753                v4l_info(client, "cx25%3x-%x found @ 0x%x (%s)\n",
1754                         (device_id & 0xfff0) >> 4, device_id & 0x0f,
1755                         client->addr << 1, client->adapter->name);
1756                break;
1757        }
1758
1759        state->c = client;
1760        state->vid_input = CX25840_COMPOSITE7;
1761        state->aud_input = CX25840_AUDIO8;
1762        state->audclk_freq = 48000;
1763        state->pvr150_workaround = 0;
1764        state->audmode = V4L2_TUNER_MODE_LANG1;
1765        state->unmute_volume = -1;
1766        state->default_volume = 228 - cx25840_read(client, 0x8d4);
1767        state->default_volume = ((state->default_volume / 2) + 23) << 9;
1768        state->vbi_line_offset = 8;
1769        state->id = id;
1770        state->rev = device_id;
1771
1772        return 0;
1773}
1774
1775static int cx25840_remove(struct i2c_client *client)
1776{
1777        struct v4l2_subdev *sd = i2c_get_clientdata(client);
1778
1779        v4l2_device_unregister_subdev(sd);
1780        kfree(to_state(sd));
1781        return 0;
1782}
1783
1784static const struct i2c_device_id cx25840_id[] = {
1785        { "cx25840", 0 },
1786        { }
1787};
1788MODULE_DEVICE_TABLE(i2c, cx25840_id);
1789
1790static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1791        .name = "cx25840",
1792        .probe = cx25840_probe,
1793        .remove = cx25840_remove,
1794        .id_table = cx25840_id,
1795};
1796