1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31#define LIS_DOUBLE_ID 0x3A
32
33#define LIS_SINGLE_ID 0x3B
34
35enum lis3lv02d_reg {
36 WHO_AM_I = 0x0F,
37 OFFSET_X = 0x16,
38 OFFSET_Y = 0x17,
39 OFFSET_Z = 0x18,
40 GAIN_X = 0x19,
41 GAIN_Y = 0x1A,
42 GAIN_Z = 0x1B,
43 CTRL_REG1 = 0x20,
44 CTRL_REG2 = 0x21,
45 CTRL_REG3 = 0x22,
46 HP_FILTER_RESET = 0x23,
47 STATUS_REG = 0x27,
48 OUTX_L = 0x28,
49 OUTX_H = 0x29,
50 OUTX = 0x29,
51 OUTY_L = 0x2A,
52 OUTY_H = 0x2B,
53 OUTY = 0x2B,
54 OUTZ_L = 0x2C,
55 OUTZ_H = 0x2D,
56 OUTZ = 0x2D,
57 FF_WU_CFG = 0x30,
58 FF_WU_SRC = 0x31,
59 FF_WU_ACK = 0x32,
60 FF_WU_THS_L = 0x34,
61 FF_WU_THS_H = 0x35,
62 FF_WU_DURATION = 0x36,
63 DD_CFG = 0x38,
64 DD_SRC = 0x39,
65 DD_ACK = 0x3A,
66 DD_THSI_L = 0x3C,
67 DD_THSI_H = 0x3D,
68 DD_THSE_L = 0x3E,
69 DD_THSE_H = 0x3F,
70};
71
72enum lis3lv02d_ctrl1 {
73 CTRL1_Xen = 0x01,
74 CTRL1_Yen = 0x02,
75 CTRL1_Zen = 0x04,
76 CTRL1_ST = 0x08,
77 CTRL1_DF0 = 0x10,
78 CTRL1_DF1 = 0x20,
79 CTRL1_PD0 = 0x40,
80 CTRL1_PD1 = 0x80,
81};
82enum lis3lv02d_ctrl2 {
83 CTRL2_DAS = 0x01,
84 CTRL2_SIM = 0x02,
85 CTRL2_DRDY = 0x04,
86 CTRL2_IEN = 0x08,
87 CTRL2_BOOT = 0x10,
88 CTRL2_BLE = 0x20,
89 CTRL2_BDU = 0x40,
90 CTRL2_FS = 0x80,
91};
92
93
94enum lis3lv02d_ctrl3 {
95 CTRL3_CFS0 = 0x01,
96 CTRL3_CFS1 = 0x02,
97 CTRL3_FDS = 0x10,
98 CTRL3_HPFF = 0x20,
99 CTRL3_HPDD = 0x40,
100 CTRL3_ECK = 0x80,
101};
102
103enum lis3lv02d_status_reg {
104 STATUS_XDA = 0x01,
105 STATUS_YDA = 0x02,
106 STATUS_ZDA = 0x04,
107 STATUS_XYZDA = 0x08,
108 STATUS_XOR = 0x10,
109 STATUS_YOR = 0x20,
110 STATUS_ZOR = 0x40,
111 STATUS_XYZOR = 0x80,
112};
113
114enum lis3lv02d_ff_wu_cfg {
115 FF_WU_CFG_XLIE = 0x01,
116 FF_WU_CFG_XHIE = 0x02,
117 FF_WU_CFG_YLIE = 0x04,
118 FF_WU_CFG_YHIE = 0x08,
119 FF_WU_CFG_ZLIE = 0x10,
120 FF_WU_CFG_ZHIE = 0x20,
121 FF_WU_CFG_LIR = 0x40,
122 FF_WU_CFG_AOI = 0x80,
123};
124
125enum lis3lv02d_ff_wu_src {
126 FF_WU_SRC_XL = 0x01,
127 FF_WU_SRC_XH = 0x02,
128 FF_WU_SRC_YL = 0x04,
129 FF_WU_SRC_YH = 0x08,
130 FF_WU_SRC_ZL = 0x10,
131 FF_WU_SRC_ZH = 0x20,
132 FF_WU_SRC_IA = 0x40,
133};
134
135enum lis3lv02d_dd_cfg {
136 DD_CFG_XLIE = 0x01,
137 DD_CFG_XHIE = 0x02,
138 DD_CFG_YLIE = 0x04,
139 DD_CFG_YHIE = 0x08,
140 DD_CFG_ZLIE = 0x10,
141 DD_CFG_ZHIE = 0x20,
142 DD_CFG_LIR = 0x40,
143 DD_CFG_IEND = 0x80,
144};
145
146enum lis3lv02d_dd_src {
147 DD_SRC_XL = 0x01,
148 DD_SRC_XH = 0x02,
149 DD_SRC_YL = 0x04,
150 DD_SRC_YH = 0x08,
151 DD_SRC_ZL = 0x10,
152 DD_SRC_ZH = 0x20,
153 DD_SRC_IA = 0x40,
154};
155
156struct axis_conversion {
157 s8 x;
158 s8 y;
159 s8 z;
160};
161
162struct lis3lv02d {
163 void *bus_priv;
164 int (*init) (struct lis3lv02d *lis3);
165 int (*write) (struct lis3lv02d *lis3, int reg, u8 val);
166 int (*read) (struct lis3lv02d *lis3, int reg, u8 *ret);
167
168 u8 whoami;
169 s16 (*read_data) (struct lis3lv02d *lis3, int reg);
170 int mdps_max_val;
171
172 struct input_dev *idev;
173 struct task_struct *kthread;
174 struct mutex lock;
175 struct platform_device *pdev;
176 atomic_t count;
177 int xcalib;
178 int ycalib;
179 int zcalib;
180 unsigned char is_on;
181 unsigned char usage;
182 struct axis_conversion ac;
183
184 u32 irq;
185 struct fasync_struct *async_queue;
186 wait_queue_head_t misc_wait;
187 unsigned long misc_opened;
188};
189
190int lis3lv02d_init_device(struct lis3lv02d *lis3);
191int lis3lv02d_joystick_enable(void);
192void lis3lv02d_joystick_disable(void);
193void lis3lv02d_poweroff(struct lis3lv02d *lis3);
194void lis3lv02d_poweron(struct lis3lv02d *lis3);
195int lis3lv02d_remove_fs(void);
196
197extern struct lis3lv02d lis3_dev;
198