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11#include <linux/compat.h>
12#include <linux/types.h>
13#include <linux/sched.h>
14#include <linux/mm.h>
15#include <linux/interrupt.h>
16#include <linux/kbuild.h>
17#include <asm/ptrace.h>
18#include <asm/processor.h>
19
20void output_ptreg_defines(void)
21{
22 COMMENT("MIPS pt_regs offsets.");
23 OFFSET(PT_R0, pt_regs, regs[0]);
24 OFFSET(PT_R1, pt_regs, regs[1]);
25 OFFSET(PT_R2, pt_regs, regs[2]);
26 OFFSET(PT_R3, pt_regs, regs[3]);
27 OFFSET(PT_R4, pt_regs, regs[4]);
28 OFFSET(PT_R5, pt_regs, regs[5]);
29 OFFSET(PT_R6, pt_regs, regs[6]);
30 OFFSET(PT_R7, pt_regs, regs[7]);
31 OFFSET(PT_R8, pt_regs, regs[8]);
32 OFFSET(PT_R9, pt_regs, regs[9]);
33 OFFSET(PT_R10, pt_regs, regs[10]);
34 OFFSET(PT_R11, pt_regs, regs[11]);
35 OFFSET(PT_R12, pt_regs, regs[12]);
36 OFFSET(PT_R13, pt_regs, regs[13]);
37 OFFSET(PT_R14, pt_regs, regs[14]);
38 OFFSET(PT_R15, pt_regs, regs[15]);
39 OFFSET(PT_R16, pt_regs, regs[16]);
40 OFFSET(PT_R17, pt_regs, regs[17]);
41 OFFSET(PT_R18, pt_regs, regs[18]);
42 OFFSET(PT_R19, pt_regs, regs[19]);
43 OFFSET(PT_R20, pt_regs, regs[20]);
44 OFFSET(PT_R21, pt_regs, regs[21]);
45 OFFSET(PT_R22, pt_regs, regs[22]);
46 OFFSET(PT_R23, pt_regs, regs[23]);
47 OFFSET(PT_R24, pt_regs, regs[24]);
48 OFFSET(PT_R25, pt_regs, regs[25]);
49 OFFSET(PT_R26, pt_regs, regs[26]);
50 OFFSET(PT_R27, pt_regs, regs[27]);
51 OFFSET(PT_R28, pt_regs, regs[28]);
52 OFFSET(PT_R29, pt_regs, regs[29]);
53 OFFSET(PT_R30, pt_regs, regs[30]);
54 OFFSET(PT_R31, pt_regs, regs[31]);
55 OFFSET(PT_LO, pt_regs, lo);
56 OFFSET(PT_HI, pt_regs, hi);
57#ifdef CONFIG_CPU_HAS_SMARTMIPS
58 OFFSET(PT_ACX, pt_regs, acx);
59#endif
60 OFFSET(PT_EPC, pt_regs, cp0_epc);
61 OFFSET(PT_BVADDR, pt_regs, cp0_badvaddr);
62 OFFSET(PT_STATUS, pt_regs, cp0_status);
63 OFFSET(PT_CAUSE, pt_regs, cp0_cause);
64#ifdef CONFIG_MIPS_MT_SMTC
65 OFFSET(PT_TCSTATUS, pt_regs, cp0_tcstatus);
66#endif
67#ifdef CONFIG_CPU_CAVIUM_OCTEON
68 OFFSET(PT_MPL, pt_regs, mpl);
69 OFFSET(PT_MTP, pt_regs, mtp);
70#endif
71 DEFINE(PT_SIZE, sizeof(struct pt_regs));
72 BLANK();
73}
74
75void output_task_defines(void)
76{
77 COMMENT("MIPS task_struct offsets.");
78 OFFSET(TASK_STATE, task_struct, state);
79 OFFSET(TASK_THREAD_INFO, task_struct, stack);
80 OFFSET(TASK_FLAGS, task_struct, flags);
81 OFFSET(TASK_MM, task_struct, mm);
82 OFFSET(TASK_PID, task_struct, pid);
83 DEFINE(TASK_STRUCT_SIZE, sizeof(struct task_struct));
84 BLANK();
85}
86
87void output_thread_info_defines(void)
88{
89 COMMENT("MIPS thread_info offsets.");
90 OFFSET(TI_TASK, thread_info, task);
91 OFFSET(TI_EXEC_DOMAIN, thread_info, exec_domain);
92 OFFSET(TI_FLAGS, thread_info, flags);
93 OFFSET(TI_TP_VALUE, thread_info, tp_value);
94 OFFSET(TI_CPU, thread_info, cpu);
95 OFFSET(TI_PRE_COUNT, thread_info, preempt_count);
96 OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit);
97 OFFSET(TI_RESTART_BLOCK, thread_info, restart_block);
98 OFFSET(TI_REGS, thread_info, regs);
99 DEFINE(_THREAD_SIZE, THREAD_SIZE);
100 DEFINE(_THREAD_MASK, THREAD_MASK);
101 BLANK();
102}
103
104void output_thread_defines(void)
105{
106 COMMENT("MIPS specific thread_struct offsets.");
107 OFFSET(THREAD_REG16, task_struct, thread.reg16);
108 OFFSET(THREAD_REG17, task_struct, thread.reg17);
109 OFFSET(THREAD_REG18, task_struct, thread.reg18);
110 OFFSET(THREAD_REG19, task_struct, thread.reg19);
111 OFFSET(THREAD_REG20, task_struct, thread.reg20);
112 OFFSET(THREAD_REG21, task_struct, thread.reg21);
113 OFFSET(THREAD_REG22, task_struct, thread.reg22);
114 OFFSET(THREAD_REG23, task_struct, thread.reg23);
115 OFFSET(THREAD_REG29, task_struct, thread.reg29);
116 OFFSET(THREAD_REG30, task_struct, thread.reg30);
117 OFFSET(THREAD_REG31, task_struct, thread.reg31);
118 OFFSET(THREAD_STATUS, task_struct,
119 thread.cp0_status);
120 OFFSET(THREAD_FPU, task_struct, thread.fpu);
121
122 OFFSET(THREAD_BVADDR, task_struct, \
123 thread.cp0_badvaddr);
124 OFFSET(THREAD_BUADDR, task_struct, \
125 thread.cp0_baduaddr);
126 OFFSET(THREAD_ECODE, task_struct, \
127 thread.error_code);
128 OFFSET(THREAD_TRAPNO, task_struct, thread.trap_no);
129 OFFSET(THREAD_TRAMP, task_struct, \
130 thread.irix_trampoline);
131 OFFSET(THREAD_OLDCTX, task_struct, \
132 thread.irix_oldctx);
133 BLANK();
134}
135
136void output_thread_fpu_defines(void)
137{
138 OFFSET(THREAD_FPR0, task_struct, thread.fpu.fpr[0]);
139 OFFSET(THREAD_FPR1, task_struct, thread.fpu.fpr[1]);
140 OFFSET(THREAD_FPR2, task_struct, thread.fpu.fpr[2]);
141 OFFSET(THREAD_FPR3, task_struct, thread.fpu.fpr[3]);
142 OFFSET(THREAD_FPR4, task_struct, thread.fpu.fpr[4]);
143 OFFSET(THREAD_FPR5, task_struct, thread.fpu.fpr[5]);
144 OFFSET(THREAD_FPR6, task_struct, thread.fpu.fpr[6]);
145 OFFSET(THREAD_FPR7, task_struct, thread.fpu.fpr[7]);
146 OFFSET(THREAD_FPR8, task_struct, thread.fpu.fpr[8]);
147 OFFSET(THREAD_FPR9, task_struct, thread.fpu.fpr[9]);
148 OFFSET(THREAD_FPR10, task_struct, thread.fpu.fpr[10]);
149 OFFSET(THREAD_FPR11, task_struct, thread.fpu.fpr[11]);
150 OFFSET(THREAD_FPR12, task_struct, thread.fpu.fpr[12]);
151 OFFSET(THREAD_FPR13, task_struct, thread.fpu.fpr[13]);
152 OFFSET(THREAD_FPR14, task_struct, thread.fpu.fpr[14]);
153 OFFSET(THREAD_FPR15, task_struct, thread.fpu.fpr[15]);
154 OFFSET(THREAD_FPR16, task_struct, thread.fpu.fpr[16]);
155 OFFSET(THREAD_FPR17, task_struct, thread.fpu.fpr[17]);
156 OFFSET(THREAD_FPR18, task_struct, thread.fpu.fpr[18]);
157 OFFSET(THREAD_FPR19, task_struct, thread.fpu.fpr[19]);
158 OFFSET(THREAD_FPR20, task_struct, thread.fpu.fpr[20]);
159 OFFSET(THREAD_FPR21, task_struct, thread.fpu.fpr[21]);
160 OFFSET(THREAD_FPR22, task_struct, thread.fpu.fpr[22]);
161 OFFSET(THREAD_FPR23, task_struct, thread.fpu.fpr[23]);
162 OFFSET(THREAD_FPR24, task_struct, thread.fpu.fpr[24]);
163 OFFSET(THREAD_FPR25, task_struct, thread.fpu.fpr[25]);
164 OFFSET(THREAD_FPR26, task_struct, thread.fpu.fpr[26]);
165 OFFSET(THREAD_FPR27, task_struct, thread.fpu.fpr[27]);
166 OFFSET(THREAD_FPR28, task_struct, thread.fpu.fpr[28]);
167 OFFSET(THREAD_FPR29, task_struct, thread.fpu.fpr[29]);
168 OFFSET(THREAD_FPR30, task_struct, thread.fpu.fpr[30]);
169 OFFSET(THREAD_FPR31, task_struct, thread.fpu.fpr[31]);
170
171 OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31);
172 BLANK();
173}
174
175void output_mm_defines(void)
176{
177 COMMENT("Size of struct page");
178 DEFINE(STRUCT_PAGE_SIZE, sizeof(struct page));
179 BLANK();
180 COMMENT("Linux mm_struct offsets.");
181 OFFSET(MM_USERS, mm_struct, mm_users);
182 OFFSET(MM_PGD, mm_struct, pgd);
183 OFFSET(MM_CONTEXT, mm_struct, context);
184 BLANK();
185 DEFINE(_PAGE_SIZE, PAGE_SIZE);
186 DEFINE(_PAGE_SHIFT, PAGE_SHIFT);
187 BLANK();
188 DEFINE(_PGD_T_SIZE, sizeof(pgd_t));
189 DEFINE(_PMD_T_SIZE, sizeof(pmd_t));
190 DEFINE(_PTE_T_SIZE, sizeof(pte_t));
191 BLANK();
192 DEFINE(_PGD_T_LOG2, PGD_T_LOG2);
193 DEFINE(_PMD_T_LOG2, PMD_T_LOG2);
194 DEFINE(_PTE_T_LOG2, PTE_T_LOG2);
195 BLANK();
196 DEFINE(_PGD_ORDER, PGD_ORDER);
197 DEFINE(_PMD_ORDER, PMD_ORDER);
198 DEFINE(_PTE_ORDER, PTE_ORDER);
199 BLANK();
200 DEFINE(_PMD_SHIFT, PMD_SHIFT);
201 DEFINE(_PGDIR_SHIFT, PGDIR_SHIFT);
202 BLANK();
203 DEFINE(_PTRS_PER_PGD, PTRS_PER_PGD);
204 DEFINE(_PTRS_PER_PMD, PTRS_PER_PMD);
205 DEFINE(_PTRS_PER_PTE, PTRS_PER_PTE);
206 BLANK();
207}
208
209#ifdef CONFIG_32BIT
210void output_sc_defines(void)
211{
212 COMMENT("Linux sigcontext offsets.");
213 OFFSET(SC_REGS, sigcontext, sc_regs);
214 OFFSET(SC_FPREGS, sigcontext, sc_fpregs);
215 OFFSET(SC_ACX, sigcontext, sc_acx);
216 OFFSET(SC_MDHI, sigcontext, sc_mdhi);
217 OFFSET(SC_MDLO, sigcontext, sc_mdlo);
218 OFFSET(SC_PC, sigcontext, sc_pc);
219 OFFSET(SC_FPC_CSR, sigcontext, sc_fpc_csr);
220 OFFSET(SC_FPC_EIR, sigcontext, sc_fpc_eir);
221 OFFSET(SC_HI1, sigcontext, sc_hi1);
222 OFFSET(SC_LO1, sigcontext, sc_lo1);
223 OFFSET(SC_HI2, sigcontext, sc_hi2);
224 OFFSET(SC_LO2, sigcontext, sc_lo2);
225 OFFSET(SC_HI3, sigcontext, sc_hi3);
226 OFFSET(SC_LO3, sigcontext, sc_lo3);
227 BLANK();
228}
229#endif
230
231#ifdef CONFIG_64BIT
232void output_sc_defines(void)
233{
234 COMMENT("Linux sigcontext offsets.");
235 OFFSET(SC_REGS, sigcontext, sc_regs);
236 OFFSET(SC_FPREGS, sigcontext, sc_fpregs);
237 OFFSET(SC_MDHI, sigcontext, sc_mdhi);
238 OFFSET(SC_MDLO, sigcontext, sc_mdlo);
239 OFFSET(SC_PC, sigcontext, sc_pc);
240 OFFSET(SC_FPC_CSR, sigcontext, sc_fpc_csr);
241 BLANK();
242}
243#endif
244
245#ifdef CONFIG_MIPS32_COMPAT
246void output_sc32_defines(void)
247{
248 COMMENT("Linux 32-bit sigcontext offsets.");
249 OFFSET(SC32_FPREGS, sigcontext32, sc_fpregs);
250 OFFSET(SC32_FPC_CSR, sigcontext32, sc_fpc_csr);
251 OFFSET(SC32_FPC_EIR, sigcontext32, sc_fpc_eir);
252 BLANK();
253}
254#endif
255
256void output_signal_defined(void)
257{
258 COMMENT("Linux signal numbers.");
259 DEFINE(_SIGHUP, SIGHUP);
260 DEFINE(_SIGINT, SIGINT);
261 DEFINE(_SIGQUIT, SIGQUIT);
262 DEFINE(_SIGILL, SIGILL);
263 DEFINE(_SIGTRAP, SIGTRAP);
264 DEFINE(_SIGIOT, SIGIOT);
265 DEFINE(_SIGABRT, SIGABRT);
266 DEFINE(_SIGEMT, SIGEMT);
267 DEFINE(_SIGFPE, SIGFPE);
268 DEFINE(_SIGKILL, SIGKILL);
269 DEFINE(_SIGBUS, SIGBUS);
270 DEFINE(_SIGSEGV, SIGSEGV);
271 DEFINE(_SIGSYS, SIGSYS);
272 DEFINE(_SIGPIPE, SIGPIPE);
273 DEFINE(_SIGALRM, SIGALRM);
274 DEFINE(_SIGTERM, SIGTERM);
275 DEFINE(_SIGUSR1, SIGUSR1);
276 DEFINE(_SIGUSR2, SIGUSR2);
277 DEFINE(_SIGCHLD, SIGCHLD);
278 DEFINE(_SIGPWR, SIGPWR);
279 DEFINE(_SIGWINCH, SIGWINCH);
280 DEFINE(_SIGURG, SIGURG);
281 DEFINE(_SIGIO, SIGIO);
282 DEFINE(_SIGSTOP, SIGSTOP);
283 DEFINE(_SIGTSTP, SIGTSTP);
284 DEFINE(_SIGCONT, SIGCONT);
285 DEFINE(_SIGTTIN, SIGTTIN);
286 DEFINE(_SIGTTOU, SIGTTOU);
287 DEFINE(_SIGVTALRM, SIGVTALRM);
288 DEFINE(_SIGPROF, SIGPROF);
289 DEFINE(_SIGXCPU, SIGXCPU);
290 DEFINE(_SIGXFSZ, SIGXFSZ);
291 BLANK();
292}
293
294void output_irq_cpustat_t_defines(void)
295{
296 COMMENT("Linux irq_cpustat_t offsets.");
297 DEFINE(IC_SOFTIRQ_PENDING,
298 offsetof(irq_cpustat_t, __softirq_pending));
299 DEFINE(IC_IRQ_CPUSTAT_T, sizeof(irq_cpustat_t));
300 BLANK();
301}
302
303#ifdef CONFIG_CPU_CAVIUM_OCTEON
304void output_octeon_cop2_state_defines(void)
305{
306 COMMENT("Octeon specific octeon_cop2_state offsets.");
307 OFFSET(OCTEON_CP2_CRC_IV, octeon_cop2_state, cop2_crc_iv);
308 OFFSET(OCTEON_CP2_CRC_LENGTH, octeon_cop2_state, cop2_crc_length);
309 OFFSET(OCTEON_CP2_CRC_POLY, octeon_cop2_state, cop2_crc_poly);
310 OFFSET(OCTEON_CP2_LLM_DAT, octeon_cop2_state, cop2_llm_dat);
311 OFFSET(OCTEON_CP2_3DES_IV, octeon_cop2_state, cop2_3des_iv);
312 OFFSET(OCTEON_CP2_3DES_KEY, octeon_cop2_state, cop2_3des_key);
313 OFFSET(OCTEON_CP2_3DES_RESULT, octeon_cop2_state, cop2_3des_result);
314 OFFSET(OCTEON_CP2_AES_INP0, octeon_cop2_state, cop2_aes_inp0);
315 OFFSET(OCTEON_CP2_AES_IV, octeon_cop2_state, cop2_aes_iv);
316 OFFSET(OCTEON_CP2_AES_KEY, octeon_cop2_state, cop2_aes_key);
317 OFFSET(OCTEON_CP2_AES_KEYLEN, octeon_cop2_state, cop2_aes_keylen);
318 OFFSET(OCTEON_CP2_AES_RESULT, octeon_cop2_state, cop2_aes_result);
319 OFFSET(OCTEON_CP2_GFM_MULT, octeon_cop2_state, cop2_gfm_mult);
320 OFFSET(OCTEON_CP2_GFM_POLY, octeon_cop2_state, cop2_gfm_poly);
321 OFFSET(OCTEON_CP2_GFM_RESULT, octeon_cop2_state, cop2_gfm_result);
322 OFFSET(OCTEON_CP2_HSH_DATW, octeon_cop2_state, cop2_hsh_datw);
323 OFFSET(OCTEON_CP2_HSH_IVW, octeon_cop2_state, cop2_hsh_ivw);
324 OFFSET(THREAD_CP2, task_struct, thread.cp2);
325 OFFSET(THREAD_CVMSEG, task_struct, thread.cvmseg.cvmseg);
326 BLANK();
327}
328#endif
329
