LXR linux/drivers/mfd/wm8400-core.c

   1/*
   2 * Core driver for WM8400.
   3 *
   4 * Copyright 2008 Wolfson Microelectronics PLC.
   5 *
   6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of the
  11 * License, or (at your option) any later version.
  12 *
  13 */
  14
  15#include <linux/bug.h>
  16#include <linux/i2c.h>
  17#include <linux/kernel.h>
  18#include <linux/mfd/core.h>
  19#include <linux/mfd/wm8400-private.h>
  20#include <linux/mfd/wm8400-audio.h>
  21
  22static struct {
  23        u16  readable;    /* Mask of readable bits */
  24        u16  writable;    /* Mask of writable bits */
  25        u16  vol;         /* Mask of volatile bits */
  26        int  is_codec;    /* Register controlled by codec reset */
  27        u16  default_val; /* Value on reset */
  28} reg_data[] = {
  29        { 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */
  30        { 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */
  31        { 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */
  32        { 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */
  33        { 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4  */
  34        { 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5  */
  35        { 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6  */
  36        { 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7  */
  37        { 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8  */
  38        { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9  */
  39        { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */
  40        { 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */
  41        { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */
  42        { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */
  43        { 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */
  44        { 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */
  45        { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */
  46        { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */
  47        { 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */
  48        { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */
  49        { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */
  50        { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */
  51        { 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */
  52        { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */
  53        { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */
  54        { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */
  55        { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */
  56        { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */
  57        { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */
  58        { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */
  59        { 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */
  60        { 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */
  61        { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */
  62        { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */
  63        { 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */
  64        { 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */
  65        { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */
  66        { 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */
  67        { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */
  68        { 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */
  69        { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */
  70        { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */
  71        { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */
  72        { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */
  73        { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */
  74        { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */
  75        { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */
  76        { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */
  77        { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */
  78        { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */
  79        { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */
  80        { 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */
  81        { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */
  82        { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */
  83        { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */
  84        { 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */
  85        { 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */
  86        { 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */
  87        { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */
  88        { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */
  89        { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */
  90        { 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */
  91        { 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */
  92        { 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */
  93        { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */
  94        { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */
  95        { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */
  96        { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */
  97        { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */
  98        { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */
  99        { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */
 100        { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */
 101        { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */
 102        { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */
 103        { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */
 104        { 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */
 105        { 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */
 106        { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */
 107        { 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */
 108        { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */
 109        { 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */
 110        { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */
 111        { 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */
 112        { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */
 113        { 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */
 114};
 115
 116static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest)
 117{
 118        int i, ret = 0;
 119
 120        BUG_ON(reg + num_regs - 1 > ARRAY_SIZE(wm8400->reg_cache));
 121
 122        /* If there are any volatile reads then read back the entire block */
 123        for (i = reg; i < reg + num_regs; i++)
 124                if (reg_data[i].vol) {
 125                        ret = wm8400->read_dev(wm8400->io_data, reg,
 126                                               num_regs, dest);
 127                        if (ret != 0)
 128                                return ret;
 129                        for (i = 0; i < num_regs; i++)
 130                                dest[i] = be16_to_cpu(dest[i]);
 131
 132                        return 0;
 133                }
 134
 135        /* Otherwise use the cache */
 136        memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16));
 137
 138        return 0;
 139}
 140
 141static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,
 142                        u16 *src)
 143{
 144        int ret, i;
 145
 146        BUG_ON(reg + num_regs - 1 > ARRAY_SIZE(wm8400->reg_cache));
 147
 148        for (i = 0; i < num_regs; i++) {
 149                BUG_ON(!reg_data[reg + i].writable);
 150                wm8400->reg_cache[reg + i] = src[i];
 151                src[i] = cpu_to_be16(src[i]);
 152        }
 153
 154        /* Do the actual I/O */
 155        ret = wm8400->write_dev(wm8400->io_data, reg, num_regs, src);
 156        if (ret != 0)
 157                return -EIO;
 158
 159        return 0;
 160}
 161
 162/**
 163 * wm8400_reg_read - Single register read
 164 *
 165 * @wm8400: Pointer to wm8400 control structure
 166 * @reg:    Register to read
 167 *
 168 * @return  Read value
 169 */
 170u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg)
 171{
 172        u16 val;
 173
 174        mutex_lock(&wm8400->io_lock);
 175
 176        wm8400_read(wm8400, reg, 1, &val);
 177
 178        mutex_unlock(&wm8400->io_lock);
 179
 180        return val;
 181}
 182EXPORT_SYMBOL_GPL(wm8400_reg_read);
 183
 184int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data)
 185{
 186        int ret;
 187
 188        mutex_lock(&wm8400->io_lock);
 189
 190        ret = wm8400_read(wm8400, reg, count, data);
 191
 192        mutex_unlock(&wm8400->io_lock);
 193
 194        return ret;
 195}
 196EXPORT_SYMBOL_GPL(wm8400_block_read);
 197
 198/**
 199 * wm8400_set_bits - Bitmask write
 200 *
 201 * @wm8400: Pointer to wm8400 control structure
 202 * @reg:    Register to access
 203 * @mask:   Mask of bits to change
 204 * @val:    Value to set for masked bits
 205 */
 206int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val)
 207{
 208        u16 tmp;
 209        int ret;
 210
 211        mutex_lock(&wm8400->io_lock);
 212
 213        ret = wm8400_read(wm8400, reg, 1, &tmp);
 214        tmp = (tmp & ~mask) | val;
 215        if (ret == 0)
 216                ret = wm8400_write(wm8400, reg, 1, &tmp);
 217
 218        mutex_unlock(&wm8400->io_lock);
 219
 220        return ret;
 221}
 222EXPORT_SYMBOL_GPL(wm8400_set_bits);
 223
 224/**
 225 * wm8400_reset_codec_reg_cache - Reset cached codec registers to
 226 * their default values.
 227 */
 228void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
 229{
 230        int i;
 231
 232        mutex_lock(&wm8400->io_lock);
 233
 234        /* Reset all codec registers to their initial value */
 235        for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
 236                if (reg_data[i].is_codec)
 237                        wm8400->reg_cache[i] = reg_data[i].default_val;
 238
 239        mutex_unlock(&wm8400->io_lock);
 240}
 241EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
 242
 243static int wm8400_register_codec(struct wm8400 *wm8400)
 244{
 245        struct mfd_cell cell = {
 246                .name = "wm8400-codec",
 247                .driver_data = wm8400,
 248        };
 249
 250        return mfd_add_devices(wm8400->dev, -1, &cell, 1, NULL, 0);
 251}
 252
 253/*
 254 * wm8400_init - Generic initialisation
 255 *
 256 * The WM8400 can be configured as either an I2C or SPI device.  Probe
 257 * functions for each bus set up the accessors then call into this to
 258 * set up the device itself.
 259 */
 260static int wm8400_init(struct wm8400 *wm8400,
 261                       struct wm8400_platform_data *pdata)
 262{
 263        u16 reg;
 264        int ret, i;
 265
 266        mutex_init(&wm8400->io_lock);
 267
 268        wm8400->dev->driver_data = wm8400;
 269
 270        /* Check that this is actually a WM8400 */
 271        ret = wm8400->read_dev(wm8400->io_data, WM8400_RESET_ID, 1, &reg);
 272        if (ret != 0) {
 273                dev_err(wm8400->dev, "Chip ID register read failed\n");
 274                return -EIO;
 275        }
 276        if (be16_to_cpu(reg) != reg_data[WM8400_RESET_ID].default_val) {
 277                dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n",
 278                        be16_to_cpu(reg));
 279                return -ENODEV;
 280        }
 281
 282        /* We don't know what state the hardware is in and since this
 283         * is a PMIC we can't reset it safely so initialise the register
 284         * cache from the hardware.
 285         */
 286        ret = wm8400->read_dev(wm8400->io_data, 0,
 287                               ARRAY_SIZE(wm8400->reg_cache),
 288                               wm8400->reg_cache);
 289        if (ret != 0) {
 290                dev_err(wm8400->dev, "Register cache read failed\n");
 291                return -EIO;
 292        }
 293        for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
 294                wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]);
 295
 296        /* If the codec is in reset use hard coded values */
 297        if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA))
 298                for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
 299                        if (reg_data[i].is_codec)
 300                                wm8400->reg_cache[i] = reg_data[i].default_val;
 301
 302        ret = wm8400_read(wm8400, WM8400_ID, 1, &reg);
 303        if (ret != 0) {
 304                dev_err(wm8400->dev, "ID register read failed: %d\n", ret);
 305                return ret;
 306        }
 307        reg = (reg & WM8400_CHIP_REV_MASK) >> WM8400_CHIP_REV_SHIFT;
 308        dev_info(wm8400->dev, "WM8400 revision %x\n", reg);
 309
 310        ret = wm8400_register_codec(wm8400);
 311        if (ret != 0) {
 312                dev_err(wm8400->dev, "Failed to register codec\n");
 313                goto err_children;
 314        }
 315
 316        if (pdata && pdata->platform_init) {
 317                ret = pdata->platform_init(wm8400->dev);
 318                if (ret != 0) {
 319                        dev_err(wm8400->dev, "Platform init failed: %d\n",
 320                                ret);
 321                        goto err_children;
 322                }
 323        } else
 324                dev_warn(wm8400->dev, "No platform initialisation supplied\n");
 325
 326        return 0;
 327
 328err_children:
 329        mfd_remove_devices(wm8400->dev);
 330        return ret;
 331}
 332
 333static void wm8400_release(struct wm8400 *wm8400)
 334{
 335        mfd_remove_devices(wm8400->dev);
 336}
 337
 338#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 339static int wm8400_i2c_read(void *io_data, char reg, int count, u16 *dest)
 340{
 341        struct i2c_client *i2c = io_data;
 342        struct i2c_msg xfer[2];
 343        int ret;
 344
 345        /* Write register */
 346        xfer[0].addr = i2c->addr;
 347        xfer[0].flags = 0;
 348        xfer[0].len = 1;
 349        xfer[0].buf = &reg;
 350
 351        /* Read data */
 352        xfer[1].addr = i2c->addr;
 353        xfer[1].flags = I2C_M_RD;
 354        xfer[1].len = count * sizeof(u16);
 355        xfer[1].buf = (u8 *)dest;
 356
 357        ret = i2c_transfer(i2c->adapter, xfer, 2);
 358        if (ret == 2)
 359                ret = 0;
 360        else if (ret >= 0)
 361                ret = -EIO;
 362
 363        return ret;
 364}
 365
 366static int wm8400_i2c_write(void *io_data, char reg, int count, const u16 *src)
 367{
 368        struct i2c_client *i2c = io_data;
 369        u8 *msg;
 370        int ret;
 371
 372        /* We add 1 byte for device register - ideally I2C would gather. */
 373        msg = kmalloc((count * sizeof(u16)) + 1, GFP_KERNEL);
 374        if (msg == NULL)
 375                return -ENOMEM;
 376
 377        msg[0] = reg;
 378        memcpy(&msg[1], src, count * sizeof(u16));
 379
 380        ret = i2c_master_send(i2c, msg, (count * sizeof(u16)) + 1);
 381
 382        if (ret == (count * 2) + 1)
 383                ret = 0;
 384        else if (ret >= 0)
 385                ret = -EIO;
 386
 387        kfree(msg);
 388
 389        return ret;
 390}
 391
 392static int wm8400_i2c_probe(struct i2c_client *i2c,
 393                            const struct i2c_device_id *id)
 394{
 395        struct wm8400 *wm8400;
 396        int ret;
 397
 398        wm8400 = kzalloc(sizeof(struct wm8400), GFP_KERNEL);
 399        if (wm8400 == NULL) {
 400                ret = -ENOMEM;
 401                goto err;
 402        }
 403
 404        wm8400->io_data = i2c;
 405        wm8400->read_dev = wm8400_i2c_read;
 406        wm8400->write_dev = wm8400_i2c_write;
 407        wm8400->dev = &i2c->dev;
 408        i2c_set_clientdata(i2c, wm8400);
 409
 410        ret = wm8400_init(wm8400, i2c->dev.platform_data);
 411        if (ret != 0)
 412                goto struct_err;
 413
 414        return 0;
 415
 416struct_err:
 417        i2c_set_clientdata(i2c, NULL);
 418        kfree(wm8400);
 419err:
 420        return ret;
 421}
 422
 423static int wm8400_i2c_remove(struct i2c_client *i2c)
 424{
 425        struct wm8400 *wm8400 = i2c_get_clientdata(i2c);
 426
 427        wm8400_release(wm8400);
 428        i2c_set_clientdata(i2c, NULL);
 429        kfree(wm8400);
 430
 431        return 0;
 432}
 433
 434static const struct i2c_device_id wm8400_i2c_id[] = {
 435       { "wm8400", 0 },
 436       { }
 437};
 438MODULE_DEVICE_TABLE(i2c, wm8400_i2c_id);
 439
 440static struct i2c_driver wm8400_i2c_driver = {
 441        .driver = {
 442                .name = "WM8400",
 443                .owner = THIS_MODULE,
 444        },
 445        .probe    = wm8400_i2c_probe,
 446        .remove   = wm8400_i2c_remove,
 447        .id_table = wm8400_i2c_id,
 448};
 449#endif
 450
 451static int __init wm8400_module_init(void)
 452{
 453        int ret = -ENODEV;
 454
 455#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 456        ret = i2c_add_driver(&wm8400_i2c_driver);
 457        if (ret != 0)
 458                pr_err("Failed to register I2C driver: %d\n", ret);
 459#endif
 460
 461        return ret;
 462}
 463module_init(wm8400_module_init);
 464
 465static void __exit wm8400_module_exit(void)
 466{
 467#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 468        i2c_del_driver(&wm8400_i2c_driver);
 469#endif
 470}
 471module_exit(wm8400_module_exit);
 472
 473MODULE_LICENSE("GPL");
 474MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
 475