1#ifndef _ASM_POWERPC_EXCEPTION_H
2#define _ASM_POWERPC_EXCEPTION_H
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38#define EX_R9 0
39#define EX_R10 8
40#define EX_R11 16
41#define EX_R12 24
42#define EX_R13 32
43#define EX_SRR0 40
44#define EX_DAR 48
45#define EX_DSISR 56
46#define EX_CCR 60
47#define EX_R3 64
48#define EX_LR 72
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55
56#define LOAD_HANDLER(reg, label) \
57 addi reg,reg,(label)-_stext;
58
59#define EXCEPTION_PROLOG_1(area) \
60 mfspr r13,SPRN_SPRG3; \
61 std r9,area+EX_R9(r13); \
62 std r10,area+EX_R10(r13); \
63 std r11,area+EX_R11(r13); \
64 std r12,area+EX_R12(r13); \
65 mfspr r9,SPRN_SPRG1; \
66 std r9,area+EX_R13(r13); \
67 mfcr r9
68
69#define EXCEPTION_PROLOG_PSERIES(area, label) \
70 EXCEPTION_PROLOG_1(area); \
71 ld r12,PACAKBASE(r13); \
72 ld r10,PACAKMSR(r13); \
73 mfspr r11,SPRN_SRR0; \
74 LOAD_HANDLER(r12,label) \
75 mtspr SPRN_SRR0,r12; \
76 mfspr r12,SPRN_SRR1; \
77 mtspr SPRN_SRR1,r10; \
78 rfid; \
79 b .
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91#define EXCEPTION_PROLOG_COMMON(n, area) \
92 andi. r10,r12,MSR_PR; \
93 mr r10,r1; \
94 subi r1,r1,INT_FRAME_SIZE; \
95 beq- 1f; \
96 ld r1,PACAKSAVE(r13); \
971: cmpdi cr1,r1,0; \
98 bge- cr1,2f; \
99 b 3f; \
1002: li r1,(n); \
101 sth r1,PACA_TRAP_SAVE(r13); \
102 b bad_stack; \
1033: std r9,_CCR(r1); \
104 std r11,_NIP(r1); \
105 std r12,_MSR(r1); \
106 std r10,0(r1); \
107 std r0,GPR0(r1); \
108 std r10,GPR1(r1); \
109 ACCOUNT_CPU_USER_ENTRY(r9, r10); \
110 std r2,GPR2(r1); \
111 SAVE_4GPRS(3, r1); \
112 SAVE_2GPRS(7, r1); \
113 ld r9,area+EX_R9(r13); \
114 ld r10,area+EX_R10(r13); \
115 std r9,GPR9(r1); \
116 std r10,GPR10(r1); \
117 ld r9,area+EX_R11(r13); \
118 ld r10,area+EX_R12(r13); \
119 ld r11,area+EX_R13(r13); \
120 std r9,GPR11(r1); \
121 std r10,GPR12(r1); \
122 std r11,GPR13(r1); \
123 ld r2,PACATOC(r13); \
124 mflr r9; \
125 std r9,_LINK(r1); \
126 mfctr r10; \
127 std r10,_CTR(r1); \
128 lbz r10,PACASOFTIRQEN(r13); \
129 mfspr r11,SPRN_XER; \
130 std r10,SOFTE(r1); \
131 std r11,_XER(r1); \
132 li r9,(n)+1; \
133 std r9,_TRAP(r1); \
134 li r10,0; \
135 ld r11,exception_marker@toc(r2); \
136 std r10,RESULT(r1); \
137 std r11,STACK_FRAME_OVERHEAD-16(r1);
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141
142#define STD_EXCEPTION_PSERIES(n, label) \
143 . = n; \
144 .globl label##_pSeries; \
145label##_pSeries: \
146 HMT_MEDIUM; \
147 mtspr SPRN_SPRG1,r13; \
148 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
149
150#define HSTD_EXCEPTION_PSERIES(n, label) \
151 . = n; \
152 .globl label##_pSeries; \
153label##_pSeries: \
154 HMT_MEDIUM; \
155 mtspr SPRN_SPRG1,r20; \
156 mfspr r20,SPRN_HSRR0; \
157 mtspr SPRN_SRR0,r20; \
158 mfspr r20,SPRN_HSRR1; \
159 mtspr SPRN_SRR1,r20; \
160 mfspr r20,SPRN_SPRG1; \
161 mtspr SPRN_SPRG1,r13; \
162 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
163
164
165#define MASKABLE_EXCEPTION_PSERIES(n, label) \
166 . = n; \
167 .globl label##_pSeries; \
168label##_pSeries: \
169 HMT_MEDIUM; \
170 mtspr SPRN_SPRG1,r13; \
171 mfspr r13,SPRN_SPRG3; \
172 std r9,PACA_EXGEN+EX_R9(r13); \
173 std r10,PACA_EXGEN+EX_R10(r13); \
174 lbz r10,PACASOFTIRQEN(r13); \
175 mfcr r9; \
176 cmpwi r10,0; \
177 beq masked_interrupt; \
178 mfspr r10,SPRN_SPRG1; \
179 std r10,PACA_EXGEN+EX_R13(r13); \
180 std r11,PACA_EXGEN+EX_R11(r13); \
181 std r12,PACA_EXGEN+EX_R12(r13); \
182 ld r12,PACAKBASE(r13); \
183 ld r10,PACAKMSR(r13); \
184 mfspr r11,SPRN_SRR0; \
185 LOAD_HANDLER(r12,label##_common) \
186 mtspr SPRN_SRR0,r12; \
187 mfspr r12,SPRN_SRR1; \
188 mtspr SPRN_SRR1,r10; \
189 rfid; \
190 b .
191
192#ifdef CONFIG_PPC_ISERIES
193#define DISABLE_INTS \
194 li r11,0; \
195 stb r11,PACASOFTIRQEN(r13); \
196BEGIN_FW_FTR_SECTION; \
197 stb r11,PACAHARDIRQEN(r13); \
198END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \
199 TRACE_DISABLE_INTS; \
200BEGIN_FW_FTR_SECTION; \
201 mfmsr r10; \
202 ori r10,r10,MSR_EE; \
203 mtmsrd r10,1; \
204END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
205#else
206#define DISABLE_INTS \
207 li r11,0; \
208 stb r11,PACASOFTIRQEN(r13); \
209 stb r11,PACAHARDIRQEN(r13); \
210 TRACE_DISABLE_INTS
211#endif
212
213#define ENABLE_INTS \
214 ld r12,_MSR(r1); \
215 mfmsr r11; \
216 rlwimi r11,r12,0,MSR_EE; \
217 mtmsrd r11,1
218
219#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
220 .align 7; \
221 .globl label##_common; \
222label##_common: \
223 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
224 DISABLE_INTS; \
225 bl .save_nvgprs; \
226 addi r3,r1,STACK_FRAME_OVERHEAD; \
227 bl hdlr; \
228 b .ret_from_except
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234#define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr) \
235 .align 7; \
236 .globl label##_common; \
237label##_common: \
238 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
239 FINISH_NAP; \
240 DISABLE_INTS; \
241 bl .save_nvgprs; \
242 addi r3,r1,STACK_FRAME_OVERHEAD; \
243 bl hdlr; \
244 b .ret_from_except
245
246#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \
247 .align 7; \
248 .globl label##_common; \
249label##_common: \
250 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
251 FINISH_NAP; \
252 DISABLE_INTS; \
253BEGIN_FTR_SECTION \
254 bl .ppc64_runlatch_on; \
255END_FTR_SECTION_IFSET(CPU_FTR_CTRL) \
256 addi r3,r1,STACK_FRAME_OVERHEAD; \
257 bl hdlr; \
258 b .ret_from_except_lite
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267#ifdef CONFIG_PPC_970_NAP
268#define FINISH_NAP \
269BEGIN_FTR_SECTION \
270 clrrdi r11,r1,THREAD_SHIFT; \
271 ld r9,TI_LOCAL_FLAGS(r11); \
272 andi. r10,r9,_TLF_NAPPING; \
273 bnel power4_fixup_nap; \
274END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
275#else
276#define FINISH_NAP
277#endif
278
279#endif
280