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24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/pci.h>
27#include <linux/pci_ids.h>
28#include <linux/slab.h>
29#include <linux/edac.h>
30#include "edac_core.h"
31
32#define MODULE_NAME "pasemi_edac"
33
34#define MCCFG_MCEN 0x300
35#define MCCFG_MCEN_MMC_EN 0x00000001
36#define MCCFG_ERRCOR 0x388
37#define MCCFG_ERRCOR_RNK_FAIL_DET_EN 0x00000100
38#define MCCFG_ERRCOR_ECC_GEN_EN 0x00000010
39#define MCCFG_ERRCOR_ECC_CRR_EN 0x00000001
40#define MCCFG_SCRUB 0x384
41#define MCCFG_SCRUB_RGLR_SCRB_EN 0x00000001
42#define MCDEBUG_ERRCTL1 0x728
43#define MCDEBUG_ERRCTL1_RFL_LOG_EN 0x00080000
44#define MCDEBUG_ERRCTL1_MBE_LOG_EN 0x00040000
45#define MCDEBUG_ERRCTL1_SBE_LOG_EN 0x00020000
46#define MCDEBUG_ERRSTA 0x730
47#define MCDEBUG_ERRSTA_RFL_STATUS 0x00000004
48#define MCDEBUG_ERRSTA_MBE_STATUS 0x00000002
49#define MCDEBUG_ERRSTA_SBE_STATUS 0x00000001
50#define MCDEBUG_ERRCNT1 0x734
51#define MCDEBUG_ERRCNT1_SBE_CNT_OVRFLO 0x00000080
52#define MCDEBUG_ERRLOG1A 0x738
53#define MCDEBUG_ERRLOG1A_MERR_TYPE_M 0x30000000
54#define MCDEBUG_ERRLOG1A_MERR_TYPE_NONE 0x00000000
55#define MCDEBUG_ERRLOG1A_MERR_TYPE_SBE 0x10000000
56#define MCDEBUG_ERRLOG1A_MERR_TYPE_MBE 0x20000000
57#define MCDEBUG_ERRLOG1A_MERR_TYPE_RFL 0x30000000
58#define MCDEBUG_ERRLOG1A_MERR_BA_M 0x00700000
59#define MCDEBUG_ERRLOG1A_MERR_BA_S 20
60#define MCDEBUG_ERRLOG1A_MERR_CS_M 0x00070000
61#define MCDEBUG_ERRLOG1A_MERR_CS_S 16
62#define MCDEBUG_ERRLOG1A_SYNDROME_M 0x0000ffff
63#define MCDRAM_RANKCFG 0x114
64#define MCDRAM_RANKCFG_EN 0x00000001
65#define MCDRAM_RANKCFG_TYPE_SIZE_M 0x000001c0
66#define MCDRAM_RANKCFG_TYPE_SIZE_S 6
67
68#define PASEMI_EDAC_NR_CSROWS 8
69#define PASEMI_EDAC_NR_CHANS 1
70#define PASEMI_EDAC_ERROR_GRAIN 64
71
72static int last_page_in_mmc;
73static int system_mmc_id;
74
75
76static u32 pasemi_edac_get_error_info(struct mem_ctl_info *mci)
77{
78 struct pci_dev *pdev = to_pci_dev(mci->dev);
79 u32 tmp;
80
81 pci_read_config_dword(pdev, MCDEBUG_ERRSTA,
82 &tmp);
83
84 tmp &= (MCDEBUG_ERRSTA_RFL_STATUS | MCDEBUG_ERRSTA_MBE_STATUS
85 | MCDEBUG_ERRSTA_SBE_STATUS);
86
87 if (tmp) {
88 if (tmp & MCDEBUG_ERRSTA_SBE_STATUS)
89 pci_write_config_dword(pdev, MCDEBUG_ERRCNT1,
90 MCDEBUG_ERRCNT1_SBE_CNT_OVRFLO);
91 pci_write_config_dword(pdev, MCDEBUG_ERRSTA, tmp);
92 }
93
94 return tmp;
95}
96
97static void pasemi_edac_process_error_info(struct mem_ctl_info *mci, u32 errsta)
98{
99 struct pci_dev *pdev = to_pci_dev(mci->dev);
100 u32 errlog1a;
101 u32 cs;
102
103 if (!errsta)
104 return;
105
106 pci_read_config_dword(pdev, MCDEBUG_ERRLOG1A, &errlog1a);
107
108 cs = (errlog1a & MCDEBUG_ERRLOG1A_MERR_CS_M) >>
109 MCDEBUG_ERRLOG1A_MERR_CS_S;
110
111
112 if (errsta & (MCDEBUG_ERRSTA_MBE_STATUS |
113 MCDEBUG_ERRSTA_RFL_STATUS)) {
114 edac_mc_handle_ue(mci, mci->csrows[cs].first_page, 0,
115 cs, mci->ctl_name);
116 }
117
118
119 if (errsta & MCDEBUG_ERRSTA_SBE_STATUS) {
120 edac_mc_handle_ce(mci, mci->csrows[cs].first_page, 0,
121 0, cs, 0, mci->ctl_name);
122 }
123}
124
125static void pasemi_edac_check(struct mem_ctl_info *mci)
126{
127 u32 errsta;
128
129 errsta = pasemi_edac_get_error_info(mci);
130 if (errsta)
131 pasemi_edac_process_error_info(mci, errsta);
132}
133
134static int pasemi_edac_init_csrows(struct mem_ctl_info *mci,
135 struct pci_dev *pdev,
136 enum edac_type edac_mode)
137{
138 struct csrow_info *csrow;
139 u32 rankcfg;
140 int index;
141
142 for (index = 0; index < mci->nr_csrows; index++) {
143 csrow = &mci->csrows[index];
144
145 pci_read_config_dword(pdev,
146 MCDRAM_RANKCFG + (index * 12),
147 &rankcfg);
148
149 if (!(rankcfg & MCDRAM_RANKCFG_EN))
150 continue;
151
152 switch ((rankcfg & MCDRAM_RANKCFG_TYPE_SIZE_M) >>
153 MCDRAM_RANKCFG_TYPE_SIZE_S) {
154 case 0:
155 csrow->nr_pages = 128 << (20 - PAGE_SHIFT);
156 break;
157 case 1:
158 csrow->nr_pages = 256 << (20 - PAGE_SHIFT);
159 break;
160 case 2:
161 case 3:
162 csrow->nr_pages = 512 << (20 - PAGE_SHIFT);
163 break;
164 case 4:
165 csrow->nr_pages = 1024 << (20 - PAGE_SHIFT);
166 break;
167 case 5:
168 csrow->nr_pages = 2048 << (20 - PAGE_SHIFT);
169 break;
170 default:
171 edac_mc_printk(mci, KERN_ERR,
172 "Unrecognized Rank Config. rankcfg=%u\n",
173 rankcfg);
174 return -EINVAL;
175 }
176
177 csrow->first_page = last_page_in_mmc;
178 csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
179 last_page_in_mmc += csrow->nr_pages;
180 csrow->page_mask = 0;
181 csrow->grain = PASEMI_EDAC_ERROR_GRAIN;
182 csrow->mtype = MEM_DDR;
183 csrow->dtype = DEV_UNKNOWN;
184 csrow->edac_mode = edac_mode;
185 }
186 return 0;
187}
188
189static int __devinit pasemi_edac_probe(struct pci_dev *pdev,
190 const struct pci_device_id *ent)
191{
192 struct mem_ctl_info *mci = NULL;
193 u32 errctl1, errcor, scrub, mcen;
194
195 pci_read_config_dword(pdev, MCCFG_MCEN, &mcen);
196 if (!(mcen & MCCFG_MCEN_MMC_EN))
197 return -ENODEV;
198
199
200
201
202
203 pci_read_config_dword(pdev, MCDEBUG_ERRCTL1, &errctl1);
204 errctl1 |= MCDEBUG_ERRCTL1_SBE_LOG_EN |
205 MCDEBUG_ERRCTL1_MBE_LOG_EN |
206 MCDEBUG_ERRCTL1_RFL_LOG_EN;
207 pci_write_config_dword(pdev, MCDEBUG_ERRCTL1, errctl1);
208
209 mci = edac_mc_alloc(0, PASEMI_EDAC_NR_CSROWS, PASEMI_EDAC_NR_CHANS,
210 system_mmc_id++);
211
212 if (mci == NULL)
213 return -ENOMEM;
214
215 pci_read_config_dword(pdev, MCCFG_ERRCOR, &errcor);
216 errcor |= MCCFG_ERRCOR_RNK_FAIL_DET_EN |
217 MCCFG_ERRCOR_ECC_GEN_EN |
218 MCCFG_ERRCOR_ECC_CRR_EN;
219
220 mci->dev = &pdev->dev;
221 mci->mtype_cap = MEM_FLAG_DDR | MEM_FLAG_RDDR;
222 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
223 mci->edac_cap = (errcor & MCCFG_ERRCOR_ECC_GEN_EN) ?
224 ((errcor & MCCFG_ERRCOR_ECC_CRR_EN) ?
225 (EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_EC) :
226 EDAC_FLAG_NONE;
227 mci->mod_name = MODULE_NAME;
228 mci->dev_name = pci_name(pdev);
229 mci->ctl_name = "pasemi,pwrficient-mc";
230 mci->edac_check = pasemi_edac_check;
231 mci->ctl_page_to_phys = NULL;
232 pci_read_config_dword(pdev, MCCFG_SCRUB, &scrub);
233 mci->scrub_cap = SCRUB_FLAG_HW_PROG | SCRUB_FLAG_HW_SRC;
234 mci->scrub_mode =
235 ((errcor & MCCFG_ERRCOR_ECC_CRR_EN) ? SCRUB_FLAG_HW_SRC : 0) |
236 ((scrub & MCCFG_SCRUB_RGLR_SCRB_EN) ? SCRUB_FLAG_HW_PROG : 0);
237
238 if (pasemi_edac_init_csrows(mci, pdev,
239 (mci->edac_cap & EDAC_FLAG_SECDED) ?
240 EDAC_SECDED :
241 ((mci->edac_cap & EDAC_FLAG_EC) ?
242 EDAC_EC : EDAC_NONE)))
243 goto fail;
244
245
246
247
248 pasemi_edac_get_error_info(mci);
249
250 if (edac_mc_add_mc(mci))
251 goto fail;
252
253
254 return 0;
255
256fail:
257 edac_mc_free(mci);
258 return -ENODEV;
259}
260
261static void __devexit pasemi_edac_remove(struct pci_dev *pdev)
262{
263 struct mem_ctl_info *mci = edac_mc_del_mc(&pdev->dev);
264
265 if (!mci)
266 return;
267
268 edac_mc_free(mci);
269}
270
271
272static const struct pci_device_id pasemi_edac_pci_tbl[] = {
273 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa00a) },
274 { }
275};
276
277MODULE_DEVICE_TABLE(pci, pasemi_edac_pci_tbl);
278
279static struct pci_driver pasemi_edac_driver = {
280 .name = MODULE_NAME,
281 .probe = pasemi_edac_probe,
282 .remove = __devexit_p(pasemi_edac_remove),
283 .id_table = pasemi_edac_pci_tbl,
284};
285
286static int __init pasemi_edac_init(void)
287{
288
289 opstate_init();
290
291 return pci_register_driver(&pasemi_edac_driver);
292}
293
294static void __exit pasemi_edac_exit(void)
295{
296 pci_unregister_driver(&pasemi_edac_driver);
297}
298
299module_init(pasemi_edac_init);
300module_exit(pasemi_edac_exit);
301
302MODULE_LICENSE("GPL");
303MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
304MODULE_DESCRIPTION("MC support for PA Semi PWRficient memory controller");
305module_param(edac_op_state, int, 0444);
306MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
307
308
