linux/sound/pci/es1968.c
<<
>>
Prefs
   1/*
   2 *  Driver for ESS Maestro 1/2/2E Sound Card (started 21.8.99)
   3 *  Copyright (c) by Matze Braun <MatzeBraun@gmx.de>.
   4 *                   Takashi Iwai <tiwai@suse.de>
   5 *                  
   6 *  Most of the driver code comes from Zach Brown(zab@redhat.com)
   7 *      Alan Cox OSS Driver
   8 *  Rewritted from card-es1938.c source.
   9 *
  10 *  TODO:
  11 *   Perhaps Synth
  12 *
  13 *   This program is free software; you can redistribute it and/or modify
  14 *   it under the terms of the GNU General Public License as published by
  15 *   the Free Software Foundation; either version 2 of the License, or
  16 *   (at your option) any later version.
  17 *
  18 *   This program is distributed in the hope that it will be useful,
  19 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21 *   GNU General Public License for more details.
  22 *
  23 *   You should have received a copy of the GNU General Public License
  24 *   along with this program; if not, write to the Free Software
  25 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26 *
  27 *
  28 *  Notes from Zach Brown about the driver code
  29 *
  30 *  Hardware Description
  31 *
  32 *      A working Maestro setup contains the Maestro chip wired to a 
  33 *      codec or 2.  In the Maestro we have the APUs, the ASSP, and the
  34 *      Wavecache.  The APUs can be though of as virtual audio routing
  35 *      channels.  They can take data from a number of sources and perform
  36 *      basic encodings of the data.  The wavecache is a storehouse for
  37 *      PCM data.  Typically it deals with PCI and interracts with the
  38 *      APUs.  The ASSP is a wacky DSP like device that ESS is loth
  39 *      to release docs on.  Thankfully it isn't required on the Maestro
  40 *      until you start doing insane things like FM emulation and surround
  41 *      encoding.  The codecs are almost always AC-97 compliant codecs, 
  42 *      but it appears that early Maestros may have had PT101 (an ESS
  43 *      part?) wired to them.  The only real difference in the Maestro
  44 *      families is external goop like docking capability, memory for
  45 *      the ASSP, and initialization differences.
  46 *
  47 *  Driver Operation
  48 *
  49 *      We only drive the APU/Wavecache as typical DACs and drive the
  50 *      mixers in the codecs.  There are 64 APUs.  We assign 6 to each
  51 *      /dev/dsp? device.  2 channels for output, and 4 channels for
  52 *      input.
  53 *
  54 *      Each APU can do a number of things, but we only really use
  55 *      3 basic functions.  For playback we use them to convert PCM
  56 *      data fetched over PCI by the wavecahche into analog data that
  57 *      is handed to the codec.  One APU for mono, and a pair for stereo.
  58 *      When in stereo, the combination of smarts in the APU and Wavecache
  59 *      decide which wavecache gets the left or right channel.
  60 *
  61 *      For record we still use the old overly mono system.  For each in
  62 *      coming channel the data comes in from the codec, through a 'input'
  63 *      APU, through another rate converter APU, and then into memory via
  64 *      the wavecache and PCI.  If its stereo, we mash it back into LRLR in
  65 *      software.  The pass between the 2 APUs is supposedly what requires us
  66 *      to have a 512 byte buffer sitting around in wavecache/memory.
  67 *
  68 *      The wavecache makes our life even more fun.  First off, it can
  69 *      only address the first 28 bits of PCI address space, making it
  70 *      useless on quite a few architectures.  Secondly, its insane.
  71 *      It claims to fetch from 4 regions of PCI space, each 4 meg in length.
  72 *      But that doesn't really work.  You can only use 1 region.  So all our
  73 *      allocations have to be in 4meg of each other.  Booo.  Hiss.
  74 *      So we have a module parameter, dsps_order, that is the order of
  75 *      the number of dsps to provide.  All their buffer space is allocated
  76 *      on open time.  The sonicvibes OSS routines we inherited really want
  77 *      power of 2 buffers, so we have all those next to each other, then
  78 *      512 byte regions for the recording wavecaches.  This ends up
  79 *      wasting quite a bit of memory.  The only fixes I can see would be 
  80 *      getting a kernel allocator that could work in zones, or figuring out
  81 *      just how to coerce the WP into doing what we want.
  82 *
  83 *      The indirection of the various registers means we have to spinlock
  84 *      nearly all register accesses.  We have the main register indirection
  85 *      like the wave cache, maestro registers, etc.  Then we have beasts
  86 *      like the APU interface that is indirect registers gotten at through
  87 *      the main maestro indirection.  Ouch.  We spinlock around the actual
  88 *      ports on a per card basis.  This means spinlock activity at each IO
  89 *      operation, but the only IO operation clusters are in non critical 
  90 *      paths and it makes the code far easier to follow.  Interrupts are
  91 *      blocked while holding the locks because the int handler has to
  92 *      get at some of them :(.  The mixer interface doesn't, however.
  93 *      We also have an OSS state lock that is thrown around in a few
  94 *      places.
  95 */
  96
  97#include <asm/io.h>
  98#include <linux/delay.h>
  99#include <linux/interrupt.h>
 100#include <linux/init.h>
 101#include <linux/pci.h>
 102#include <linux/dma-mapping.h>
 103#include <linux/slab.h>
 104#include <linux/gameport.h>
 105#include <linux/moduleparam.h>
 106#include <linux/mutex.h>
 107
 108#include <sound/core.h>
 109#include <sound/pcm.h>
 110#include <sound/mpu401.h>
 111#include <sound/ac97_codec.h>
 112#include <sound/initval.h>
 113
 114#define CARD_NAME "ESS Maestro1/2"
 115#define DRIVER_NAME "ES1968"
 116
 117MODULE_DESCRIPTION("ESS Maestro");
 118MODULE_LICENSE("GPL");
 119MODULE_SUPPORTED_DEVICE("{{ESS,Maestro 2e},"
 120                "{ESS,Maestro 2},"
 121                "{ESS,Maestro 1},"
 122                "{TerraTec,DMX}}");
 123
 124#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 125#define SUPPORT_JOYSTICK 1
 126#endif
 127
 128static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 1-MAX */
 129static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
 130static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
 131static int total_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1024 };
 132static int pcm_substreams_p[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4 };
 133static int pcm_substreams_c[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1 };
 134static int clock[SNDRV_CARDS];
 135static int use_pm[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
 136static int enable_mpu[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
 137#ifdef SUPPORT_JOYSTICK
 138static int joystick[SNDRV_CARDS];
 139#endif
 140
 141module_param_array(index, int, NULL, 0444);
 142MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
 143module_param_array(id, charp, NULL, 0444);
 144MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
 145module_param_array(enable, bool, NULL, 0444);
 146MODULE_PARM_DESC(enable, "Enable " CARD_NAME " soundcard.");
 147module_param_array(total_bufsize, int, NULL, 0444);
 148MODULE_PARM_DESC(total_bufsize, "Total buffer size in kB.");
 149module_param_array(pcm_substreams_p, int, NULL, 0444);
 150MODULE_PARM_DESC(pcm_substreams_p, "PCM Playback substreams for " CARD_NAME " soundcard.");
 151module_param_array(pcm_substreams_c, int, NULL, 0444);
 152MODULE_PARM_DESC(pcm_substreams_c, "PCM Capture substreams for " CARD_NAME " soundcard.");
 153module_param_array(clock, int, NULL, 0444);
 154MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard.  (0 = auto-detect)");
 155module_param_array(use_pm, int, NULL, 0444);
 156MODULE_PARM_DESC(use_pm, "Toggle power-management.  (0 = off, 1 = on, 2 = auto)");
 157module_param_array(enable_mpu, int, NULL, 0444);
 158MODULE_PARM_DESC(enable_mpu, "Enable MPU401.  (0 = off, 1 = on, 2 = auto)");
 159#ifdef SUPPORT_JOYSTICK
 160module_param_array(joystick, bool, NULL, 0444);
 161MODULE_PARM_DESC(joystick, "Enable joystick.");
 162#endif
 163
 164
 165#define NR_APUS                 64
 166#define NR_APU_REGS             16
 167
 168/* NEC Versas ? */
 169#define NEC_VERSA_SUBID1        0x80581033
 170#define NEC_VERSA_SUBID2        0x803c1033
 171
 172/* Mode Flags */
 173#define ESS_FMT_STEREO          0x01
 174#define ESS_FMT_16BIT           0x02
 175
 176#define DAC_RUNNING             1
 177#define ADC_RUNNING             2
 178
 179/* Values for the ESM_LEGACY_AUDIO_CONTROL */
 180
 181#define ESS_DISABLE_AUDIO       0x8000
 182#define ESS_ENABLE_SERIAL_IRQ   0x4000
 183#define IO_ADRESS_ALIAS         0x0020
 184#define MPU401_IRQ_ENABLE       0x0010
 185#define MPU401_IO_ENABLE        0x0008
 186#define GAME_IO_ENABLE          0x0004
 187#define FM_IO_ENABLE            0x0002
 188#define SB_IO_ENABLE            0x0001
 189
 190/* Values for the ESM_CONFIG_A */
 191
 192#define PIC_SNOOP1              0x4000
 193#define PIC_SNOOP2              0x2000
 194#define SAFEGUARD               0x0800
 195#define DMA_CLEAR               0x0700
 196#define DMA_DDMA                0x0000
 197#define DMA_TDMA                0x0100
 198#define DMA_PCPCI               0x0200
 199#define POST_WRITE              0x0080
 200#define PCI_TIMING              0x0040
 201#define SWAP_LR                 0x0020
 202#define SUBTR_DECODE            0x0002
 203
 204/* Values for the ESM_CONFIG_B */
 205
 206#define SPDIF_CONFB             0x0100
 207#define HWV_CONFB               0x0080
 208#define DEBOUNCE                0x0040
 209#define GPIO_CONFB              0x0020
 210#define CHI_CONFB               0x0010
 211#define IDMA_CONFB              0x0008  /*undoc */
 212#define MIDI_FIX                0x0004  /*undoc */
 213#define IRQ_TO_ISA              0x0001  /*undoc */
 214
 215/* Values for Ring Bus Control B */
 216#define RINGB_2CODEC_ID_MASK    0x0003
 217#define RINGB_DIS_VALIDATION    0x0008
 218#define RINGB_EN_SPDIF          0x0010
 219#define RINGB_EN_2CODEC         0x0020
 220#define RINGB_SING_BIT_DUAL     0x0040
 221
 222/* ****Port Adresses**** */
 223
 224/*   Write & Read */
 225#define ESM_INDEX               0x02
 226#define ESM_DATA                0x00
 227
 228/*   AC97 + RingBus */
 229#define ESM_AC97_INDEX          0x30
 230#define ESM_AC97_DATA           0x32
 231#define ESM_RING_BUS_DEST       0x34
 232#define ESM_RING_BUS_CONTR_A    0x36
 233#define ESM_RING_BUS_CONTR_B    0x38
 234#define ESM_RING_BUS_SDO        0x3A
 235
 236/*   WaveCache*/
 237#define WC_INDEX                0x10
 238#define WC_DATA                 0x12
 239#define WC_CONTROL              0x14
 240
 241/*   ASSP*/
 242#define ASSP_INDEX              0x80
 243#define ASSP_MEMORY             0x82
 244#define ASSP_DATA               0x84
 245#define ASSP_CONTROL_A          0xA2
 246#define ASSP_CONTROL_B          0xA4
 247#define ASSP_CONTROL_C          0xA6
 248#define ASSP_HOSTW_INDEX        0xA8
 249#define ASSP_HOSTW_DATA         0xAA
 250#define ASSP_HOSTW_IRQ          0xAC
 251/* Midi */
 252#define ESM_MPU401_PORT         0x98
 253/* Others */
 254#define ESM_PORT_HOST_IRQ       0x18
 255
 256#define IDR0_DATA_PORT          0x00
 257#define IDR1_CRAM_POINTER       0x01
 258#define IDR2_CRAM_DATA          0x02
 259#define IDR3_WAVE_DATA          0x03
 260#define IDR4_WAVE_PTR_LOW       0x04
 261#define IDR5_WAVE_PTR_HI        0x05
 262#define IDR6_TIMER_CTRL         0x06
 263#define IDR7_WAVE_ROMRAM        0x07
 264
 265#define WRITEABLE_MAP           0xEFFFFF
 266#define READABLE_MAP            0x64003F
 267
 268/* PCI Register */
 269
 270#define ESM_LEGACY_AUDIO_CONTROL 0x40
 271#define ESM_ACPI_COMMAND        0x54
 272#define ESM_CONFIG_A            0x50
 273#define ESM_CONFIG_B            0x52
 274#define ESM_DDMA                0x60
 275
 276/* Bob Bits */
 277#define ESM_BOB_ENABLE          0x0001
 278#define ESM_BOB_START           0x0001
 279
 280/* Host IRQ Control Bits */
 281#define ESM_RESET_MAESTRO       0x8000
 282#define ESM_RESET_DIRECTSOUND   0x4000
 283#define ESM_HIRQ_ClkRun         0x0100
 284#define ESM_HIRQ_HW_VOLUME      0x0040
 285#define ESM_HIRQ_HARPO          0x0030  /* What's that? */
 286#define ESM_HIRQ_ASSP           0x0010
 287#define ESM_HIRQ_DSIE           0x0004
 288#define ESM_HIRQ_MPU401         0x0002
 289#define ESM_HIRQ_SB             0x0001
 290
 291/* Host IRQ Status Bits */
 292#define ESM_MPU401_IRQ          0x02
 293#define ESM_SB_IRQ              0x01
 294#define ESM_SOUND_IRQ           0x04
 295#define ESM_ASSP_IRQ            0x10
 296#define ESM_HWVOL_IRQ           0x40
 297
 298#define ESS_SYSCLK              50000000
 299#define ESM_BOB_FREQ            200
 300#define ESM_BOB_FREQ_MAX        800
 301
 302#define ESM_FREQ_ESM1           (49152000L / 1024L)     /* default rate 48000 */
 303#define ESM_FREQ_ESM2           (50000000L / 1024L)
 304
 305/* APU Modes: reg 0x00, bit 4-7 */
 306#define ESM_APU_MODE_SHIFT      4
 307#define ESM_APU_MODE_MASK       (0xf << 4)
 308#define ESM_APU_OFF             0x00
 309#define ESM_APU_16BITLINEAR     0x01    /* 16-Bit Linear Sample Player */
 310#define ESM_APU_16BITSTEREO     0x02    /* 16-Bit Stereo Sample Player */
 311#define ESM_APU_8BITLINEAR      0x03    /* 8-Bit Linear Sample Player */
 312#define ESM_APU_8BITSTEREO      0x04    /* 8-Bit Stereo Sample Player */
 313#define ESM_APU_8BITDIFF        0x05    /* 8-Bit Differential Sample Playrer */
 314#define ESM_APU_DIGITALDELAY    0x06    /* Digital Delay Line */
 315#define ESM_APU_DUALTAP         0x07    /* Dual Tap Reader */
 316#define ESM_APU_CORRELATOR      0x08    /* Correlator */
 317#define ESM_APU_INPUTMIXER      0x09    /* Input Mixer */
 318#define ESM_APU_WAVETABLE       0x0A    /* Wave Table Mode */
 319#define ESM_APU_SRCONVERTOR     0x0B    /* Sample Rate Convertor */
 320#define ESM_APU_16BITPINGPONG   0x0C    /* 16-Bit Ping-Pong Sample Player */
 321#define ESM_APU_RESERVED1       0x0D    /* Reserved 1 */
 322#define ESM_APU_RESERVED2       0x0E    /* Reserved 2 */
 323#define ESM_APU_RESERVED3       0x0F    /* Reserved 3 */
 324
 325/* reg 0x00 */
 326#define ESM_APU_FILTER_Q_SHIFT          0
 327#define ESM_APU_FILTER_Q_MASK           (3 << 0)
 328/* APU Filtey Q Control */
 329#define ESM_APU_FILTER_LESSQ    0x00
 330#define ESM_APU_FILTER_MOREQ    0x03
 331
 332#define ESM_APU_FILTER_TYPE_SHIFT       2
 333#define ESM_APU_FILTER_TYPE_MASK        (3 << 2)
 334#define ESM_APU_ENV_TYPE_SHIFT          8
 335#define ESM_APU_ENV_TYPE_MASK           (3 << 8)
 336#define ESM_APU_ENV_STATE_SHIFT         10
 337#define ESM_APU_ENV_STATE_MASK          (3 << 10)
 338#define ESM_APU_END_CURVE               (1 << 12)
 339#define ESM_APU_INT_ON_LOOP             (1 << 13)
 340#define ESM_APU_DMA_ENABLE              (1 << 14)
 341
 342/* reg 0x02 */
 343#define ESM_APU_SUBMIX_GROUP_SHIRT      0
 344#define ESM_APU_SUBMIX_GROUP_MASK       (7 << 0)
 345#define ESM_APU_SUBMIX_MODE             (1 << 3)
 346#define ESM_APU_6dB                     (1 << 4)
 347#define ESM_APU_DUAL_EFFECT             (1 << 5)
 348#define ESM_APU_EFFECT_CHANNELS_SHIFT   6
 349#define ESM_APU_EFFECT_CHANNELS_MASK    (3 << 6)
 350
 351/* reg 0x03 */
 352#define ESM_APU_STEP_SIZE_MASK          0x0fff
 353
 354/* reg 0x04 */
 355#define ESM_APU_PHASE_SHIFT             0
 356#define ESM_APU_PHASE_MASK              (0xff << 0)
 357#define ESM_APU_WAVE64K_PAGE_SHIFT      8       /* most 8bit of wave start offset */
 358#define ESM_APU_WAVE64K_PAGE_MASK       (0xff << 8)
 359
 360/* reg 0x05 - wave start offset */
 361/* reg 0x06 - wave end offset */
 362/* reg 0x07 - wave loop length */
 363
 364/* reg 0x08 */
 365#define ESM_APU_EFFECT_GAIN_SHIFT       0
 366#define ESM_APU_EFFECT_GAIN_MASK        (0xff << 0)
 367#define ESM_APU_TREMOLO_DEPTH_SHIFT     8
 368#define ESM_APU_TREMOLO_DEPTH_MASK      (0xf << 8)
 369#define ESM_APU_TREMOLO_RATE_SHIFT      12
 370#define ESM_APU_TREMOLO_RATE_MASK       (0xf << 12)
 371
 372/* reg 0x09 */
 373/* bit 0-7 amplitude dest? */
 374#define ESM_APU_AMPLITUDE_NOW_SHIFT     8
 375#define ESM_APU_AMPLITUDE_NOW_MASK      (0xff << 8)
 376
 377/* reg 0x0a */
 378#define ESM_APU_POLAR_PAN_SHIFT         0
 379#define ESM_APU_POLAR_PAN_MASK          (0x3f << 0)
 380/* Polar Pan Control */
 381#define ESM_APU_PAN_CENTER_CIRCLE               0x00
 382#define ESM_APU_PAN_MIDDLE_RADIUS               0x01
 383#define ESM_APU_PAN_OUTSIDE_RADIUS              0x02
 384
 385#define ESM_APU_FILTER_TUNING_SHIFT     8
 386#define ESM_APU_FILTER_TUNING_MASK      (0xff << 8)
 387
 388/* reg 0x0b */
 389#define ESM_APU_DATA_SRC_A_SHIFT        0
 390#define ESM_APU_DATA_SRC_A_MASK         (0x7f << 0)
 391#define ESM_APU_INV_POL_A               (1 << 7)
 392#define ESM_APU_DATA_SRC_B_SHIFT        8
 393#define ESM_APU_DATA_SRC_B_MASK         (0x7f << 8)
 394#define ESM_APU_INV_POL_B               (1 << 15)
 395
 396#define ESM_APU_VIBRATO_RATE_SHIFT      0
 397#define ESM_APU_VIBRATO_RATE_MASK       (0xf << 0)
 398#define ESM_APU_VIBRATO_DEPTH_SHIFT     4
 399#define ESM_APU_VIBRATO_DEPTH_MASK      (0xf << 4)
 400#define ESM_APU_VIBRATO_PHASE_SHIFT     8
 401#define ESM_APU_VIBRATO_PHASE_MASK      (0xff << 8)
 402
 403/* reg 0x0c */
 404#define ESM_APU_RADIUS_SELECT           (1 << 6)
 405
 406/* APU Filter Control */
 407#define ESM_APU_FILTER_2POLE_LOPASS     0x00
 408#define ESM_APU_FILTER_2POLE_BANDPASS   0x01
 409#define ESM_APU_FILTER_2POLE_HIPASS     0x02
 410#define ESM_APU_FILTER_1POLE_LOPASS     0x03
 411#define ESM_APU_FILTER_1POLE_HIPASS     0x04
 412#define ESM_APU_FILTER_OFF              0x05
 413
 414/* APU ATFP Type */
 415#define ESM_APU_ATFP_AMPLITUDE                  0x00
 416#define ESM_APU_ATFP_TREMELO                    0x01
 417#define ESM_APU_ATFP_FILTER                     0x02
 418#define ESM_APU_ATFP_PAN                        0x03
 419
 420/* APU ATFP Flags */
 421#define ESM_APU_ATFP_FLG_OFF                    0x00
 422#define ESM_APU_ATFP_FLG_WAIT                   0x01
 423#define ESM_APU_ATFP_FLG_DONE                   0x02
 424#define ESM_APU_ATFP_FLG_INPROCESS              0x03
 425
 426
 427/* capture mixing buffer size */
 428#define ESM_MEM_ALIGN           0x1000
 429#define ESM_MIXBUF_SIZE         0x400
 430
 431#define ESM_MODE_PLAY           0
 432#define ESM_MODE_CAPTURE        1
 433
 434
 435/* APU use in the driver */
 436enum snd_enum_apu_type {
 437        ESM_APU_PCM_PLAY,
 438        ESM_APU_PCM_CAPTURE,
 439        ESM_APU_PCM_RATECONV,
 440        ESM_APU_FREE
 441};
 442
 443/* chip type */
 444enum {
 445        TYPE_MAESTRO, TYPE_MAESTRO2, TYPE_MAESTRO2E
 446};
 447
 448/* DMA Hack! */
 449struct esm_memory {
 450        struct snd_dma_buffer buf;
 451        int empty;      /* status */
 452        struct list_head list;
 453};
 454
 455/* Playback Channel */
 456struct esschan {
 457        int running;
 458
 459        u8 apu[4];
 460        u8 apu_mode[4];
 461
 462        /* playback/capture pcm buffer */
 463        struct esm_memory *memory;
 464        /* capture mixer buffer */
 465        struct esm_memory *mixbuf;
 466
 467        unsigned int hwptr;     /* current hw pointer in bytes */
 468        unsigned int count;     /* sample counter in bytes */
 469        unsigned int dma_size;  /* total buffer size in bytes */
 470        unsigned int frag_size; /* period size in bytes */
 471        unsigned int wav_shift;
 472        u16 base[4];            /* offset for ptr */
 473
 474        /* stereo/16bit flag */
 475        unsigned char fmt;
 476        int mode;       /* playback / capture */
 477
 478        int bob_freq;   /* required timer frequency */
 479
 480        struct snd_pcm_substream *substream;
 481
 482        /* linked list */
 483        struct list_head list;
 484
 485#ifdef CONFIG_PM
 486        u16 wc_map[4];
 487#endif
 488};
 489
 490struct es1968 {
 491        /* Module Config */
 492        int total_bufsize;                      /* in bytes */
 493
 494        int playback_streams, capture_streams;
 495
 496        unsigned int clock;             /* clock */
 497        /* for clock measurement */
 498        unsigned int in_measurement: 1;
 499        unsigned int measure_apu;
 500        unsigned int measure_lastpos;
 501        unsigned int measure_count;
 502
 503        /* buffer */
 504        struct snd_dma_buffer dma;
 505
 506        /* Resources... */
 507        int irq;
 508        unsigned long io_port;
 509        int type;
 510        struct pci_dev *pci;
 511        struct snd_card *card;
 512        struct snd_pcm *pcm;
 513        int do_pm;              /* power-management enabled */
 514
 515        /* DMA memory block */
 516        struct list_head buf_list;
 517
 518        /* ALSA Stuff */
 519        struct snd_ac97 *ac97;
 520        struct snd_kcontrol *master_switch; /* for h/w volume control */
 521        struct snd_kcontrol *master_volume;
 522
 523        struct snd_rawmidi *rmidi;
 524
 525        spinlock_t reg_lock;
 526        spinlock_t ac97_lock;
 527        struct tasklet_struct hwvol_tq;
 528        unsigned int in_suspend;
 529
 530        /* Maestro Stuff */
 531        u16 maestro_map[32];
 532        int bobclient;          /* active timer instancs */
 533        int bob_freq;           /* timer frequency */
 534        struct mutex memory_mutex;      /* memory lock */
 535
 536        /* APU states */
 537        unsigned char apu[NR_APUS];
 538
 539        /* active substreams */
 540        struct list_head substream_list;
 541        spinlock_t substream_lock;
 542
 543#ifdef CONFIG_PM
 544        u16 apu_map[NR_APUS][NR_APU_REGS];
 545#endif
 546
 547#ifdef SUPPORT_JOYSTICK
 548        struct gameport *gameport;
 549#endif
 550};
 551
 552static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id);
 553
 554static struct pci_device_id snd_es1968_ids[] = {
 555        /* Maestro 1 */
 556        { 0x1285, 0x0100, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO },
 557        /* Maestro 2 */
 558        { 0x125d, 0x1968, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2 },
 559        /* Maestro 2E */
 560        { 0x125d, 0x1978, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2E },
 561        { 0, }
 562};
 563
 564MODULE_DEVICE_TABLE(pci, snd_es1968_ids);
 565
 566/* *********************
 567   * Low Level Funcs!  *
 568   *********************/
 569
 570/* no spinlock */
 571static void __maestro_write(struct es1968 *chip, u16 reg, u16 data)
 572{
 573        outw(reg, chip->io_port + ESM_INDEX);
 574        outw(data, chip->io_port + ESM_DATA);
 575        chip->maestro_map[reg] = data;
 576}
 577
 578static inline void maestro_write(struct es1968 *chip, u16 reg, u16 data)
 579{
 580        unsigned long flags;
 581        spin_lock_irqsave(&chip->reg_lock, flags);
 582        __maestro_write(chip, reg, data);
 583        spin_unlock_irqrestore(&chip->reg_lock, flags);
 584}
 585
 586/* no spinlock */
 587static u16 __maestro_read(struct es1968 *chip, u16 reg)
 588{
 589        if (READABLE_MAP & (1 << reg)) {
 590                outw(reg, chip->io_port + ESM_INDEX);
 591                chip->maestro_map[reg] = inw(chip->io_port + ESM_DATA);
 592        }
 593        return chip->maestro_map[reg];
 594}
 595
 596static inline u16 maestro_read(struct es1968 *chip, u16 reg)
 597{
 598        unsigned long flags;
 599        u16 result;
 600        spin_lock_irqsave(&chip->reg_lock, flags);
 601        result = __maestro_read(chip, reg);
 602        spin_unlock_irqrestore(&chip->reg_lock, flags);
 603        return result;
 604}
 605
 606/* Wait for the codec bus to be free */
 607static int snd_es1968_ac97_wait(struct es1968 *chip)
 608{
 609        int timeout = 100000;
 610
 611        while (timeout-- > 0) {
 612                if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))
 613                        return 0;
 614                cond_resched();
 615        }
 616        snd_printd("es1968: ac97 timeout\n");
 617        return 1; /* timeout */
 618}
 619
 620static int snd_es1968_ac97_wait_poll(struct es1968 *chip)
 621{
 622        int timeout = 100000;
 623
 624        while (timeout-- > 0) {
 625                if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))
 626                        return 0;
 627        }
 628        snd_printd("es1968: ac97 timeout\n");
 629        return 1; /* timeout */
 630}
 631
 632static void snd_es1968_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
 633{
 634        struct es1968 *chip = ac97->private_data;
 635        unsigned long flags;
 636
 637        snd_es1968_ac97_wait(chip);
 638
 639        /* Write the bus */
 640        spin_lock_irqsave(&chip->ac97_lock, flags);
 641        outw(val, chip->io_port + ESM_AC97_DATA);
 642        /*msleep(1);*/
 643        outb(reg, chip->io_port + ESM_AC97_INDEX);
 644        /*msleep(1);*/
 645        spin_unlock_irqrestore(&chip->ac97_lock, flags);
 646}
 647
 648static unsigned short snd_es1968_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
 649{
 650        u16 data = 0;
 651        struct es1968 *chip = ac97->private_data;
 652        unsigned long flags;
 653
 654        snd_es1968_ac97_wait(chip);
 655
 656        spin_lock_irqsave(&chip->ac97_lock, flags);
 657        outb(reg | 0x80, chip->io_port + ESM_AC97_INDEX);
 658        /*msleep(1);*/
 659
 660        if (!snd_es1968_ac97_wait_poll(chip)) {
 661                data = inw(chip->io_port + ESM_AC97_DATA);
 662                /*msleep(1);*/
 663        }
 664        spin_unlock_irqrestore(&chip->ac97_lock, flags);
 665
 666        return data;
 667}
 668
 669/* no spinlock */
 670static void apu_index_set(struct es1968 *chip, u16 index)
 671{
 672        int i;
 673        __maestro_write(chip, IDR1_CRAM_POINTER, index);
 674        for (i = 0; i < 1000; i++)
 675                if (__maestro_read(chip, IDR1_CRAM_POINTER) == index)
 676                        return;
 677        snd_printd("es1968: APU register select failed. (Timeout)\n");
 678}
 679
 680/* no spinlock */
 681static void apu_data_set(struct es1968 *chip, u16 data)
 682{
 683        int i;
 684        for (i = 0; i < 1000; i++) {
 685                if (__maestro_read(chip, IDR0_DATA_PORT) == data)
 686                        return;
 687                __maestro_write(chip, IDR0_DATA_PORT, data);
 688        }
 689        snd_printd("es1968: APU register set probably failed (Timeout)!\n");
 690}
 691
 692/* no spinlock */
 693static void __apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)
 694{
 695        if (snd_BUG_ON(channel >= NR_APUS))
 696                return;
 697#ifdef CONFIG_PM
 698        chip->apu_map[channel][reg] = data;
 699#endif
 700        reg |= (channel << 4);
 701        apu_index_set(chip, reg);
 702        apu_data_set(chip, data);
 703}
 704
 705static void apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)
 706{
 707        unsigned long flags;
 708        spin_lock_irqsave(&chip->reg_lock, flags);
 709        __apu_set_register(chip, channel, reg, data);
 710        spin_unlock_irqrestore(&chip->reg_lock, flags);
 711}
 712
 713static u16 __apu_get_register(struct es1968 *chip, u16 channel, u8 reg)
 714{
 715        if (snd_BUG_ON(channel >= NR_APUS))
 716                return 0;
 717        reg |= (channel << 4);
 718        apu_index_set(chip, reg);
 719        return __maestro_read(chip, IDR0_DATA_PORT);
 720}
 721
 722static u16 apu_get_register(struct es1968 *chip, u16 channel, u8 reg)
 723{
 724        unsigned long flags;
 725        u16 v;
 726        spin_lock_irqsave(&chip->reg_lock, flags);
 727        v = __apu_get_register(chip, channel, reg);
 728        spin_unlock_irqrestore(&chip->reg_lock, flags);
 729        return v;
 730}
 731
 732#if 0 /* ASSP is not supported */
 733
 734static void assp_set_register(struct es1968 *chip, u32 reg, u32 value)
 735{
 736        unsigned long flags;
 737
 738        spin_lock_irqsave(&chip->reg_lock, flags);
 739        outl(reg, chip->io_port + ASSP_INDEX);
 740        outl(value, chip->io_port + ASSP_DATA);
 741        spin_unlock_irqrestore(&chip->reg_lock, flags);
 742}
 743
 744static u32 assp_get_register(struct es1968 *chip, u32 reg)
 745{
 746        unsigned long flags;
 747        u32 value;
 748
 749        spin_lock_irqsave(&chip->reg_lock, flags);
 750        outl(reg, chip->io_port + ASSP_INDEX);
 751        value = inl(chip->io_port + ASSP_DATA);
 752        spin_unlock_irqrestore(&chip->reg_lock, flags);
 753
 754        return value;
 755}
 756
 757#endif
 758
 759static void wave_set_register(struct es1968 *chip, u16 reg, u16 value)
 760{
 761        unsigned long flags;
 762
 763        spin_lock_irqsave(&chip->reg_lock, flags);
 764        outw(reg, chip->io_port + WC_INDEX);
 765        outw(value, chip->io_port + WC_DATA);
 766        spin_unlock_irqrestore(&chip->reg_lock, flags);
 767}
 768
 769static u16 wave_get_register(struct es1968 *chip, u16 reg)
 770{
 771        unsigned long flags;
 772        u16 value;
 773
 774        spin_lock_irqsave(&chip->reg_lock, flags);
 775        outw(reg, chip->io_port + WC_INDEX);
 776        value = inw(chip->io_port + WC_DATA);
 777        spin_unlock_irqrestore(&chip->reg_lock, flags);
 778
 779        return value;
 780}
 781
 782/* *******************
 783   * Bob the Timer!  *
 784   *******************/
 785
 786static void snd_es1968_bob_stop(struct es1968 *chip)
 787{
 788        u16 reg;
 789
 790        reg = __maestro_read(chip, 0x11);
 791        reg &= ~ESM_BOB_ENABLE;
 792        __maestro_write(chip, 0x11, reg);
 793        reg = __maestro_read(chip, 0x17);
 794        reg &= ~ESM_BOB_START;
 795        __maestro_write(chip, 0x17, reg);
 796}
 797
 798static void snd_es1968_bob_start(struct es1968 *chip)
 799{
 800        int prescale;
 801        int divide;
 802
 803        /* compute ideal interrupt frequency for buffer size & play rate */
 804        /* first, find best prescaler value to match freq */
 805        for (prescale = 5; prescale < 12; prescale++)
 806                if (chip->bob_freq > (ESS_SYSCLK >> (prescale + 9)))
 807                        break;
 808
 809        /* next, back off prescaler whilst getting divider into optimum range */
 810        divide = 1;
 811        while ((prescale > 5) && (divide < 32)) {
 812                prescale--;
 813                divide <<= 1;
 814        }
 815        divide >>= 1;
 816
 817        /* now fine-tune the divider for best match */
 818        for (; divide < 31; divide++)
 819                if (chip->bob_freq >
 820                    ((ESS_SYSCLK >> (prescale + 9)) / (divide + 1))) break;
 821
 822        /* divide = 0 is illegal, but don't let prescale = 4! */
 823        if (divide == 0) {
 824                divide++;
 825                if (prescale > 5)
 826                        prescale--;
 827        } else if (divide > 1)
 828                divide--;
 829
 830        __maestro_write(chip, 6, 0x9000 | (prescale << 5) | divide);    /* set reg */
 831
 832        /* Now set IDR 11/17 */
 833        __maestro_write(chip, 0x11, __maestro_read(chip, 0x11) | 1);
 834        __maestro_write(chip, 0x17, __maestro_read(chip, 0x17) | 1);
 835}
 836
 837/* call with substream spinlock */
 838static void snd_es1968_bob_inc(struct es1968 *chip, int freq)
 839{
 840        chip->bobclient++;
 841        if (chip->bobclient == 1) {
 842                chip->bob_freq = freq;
 843                snd_es1968_bob_start(chip);
 844        } else if (chip->bob_freq < freq) {
 845                snd_es1968_bob_stop(chip);
 846                chip->bob_freq = freq;
 847                snd_es1968_bob_start(chip);
 848        }
 849}
 850
 851/* call with substream spinlock */
 852static void snd_es1968_bob_dec(struct es1968 *chip)
 853{
 854        chip->bobclient--;
 855        if (chip->bobclient <= 0)
 856                snd_es1968_bob_stop(chip);
 857        else if (chip->bob_freq > ESM_BOB_FREQ) {
 858                /* check reduction of timer frequency */
 859                int max_freq = ESM_BOB_FREQ;
 860                struct esschan *es;
 861                list_for_each_entry(es, &chip->substream_list, list) {
 862                        if (max_freq < es->bob_freq)
 863                                max_freq = es->bob_freq;
 864                }
 865                if (max_freq != chip->bob_freq) {
 866                        snd_es1968_bob_stop(chip);
 867                        chip->bob_freq = max_freq;
 868                        snd_es1968_bob_start(chip);
 869                }
 870        }
 871}
 872
 873static int
 874snd_es1968_calc_bob_rate(struct es1968 *chip, struct esschan *es,
 875                         struct snd_pcm_runtime *runtime)
 876{
 877        /* we acquire 4 interrupts per period for precise control.. */
 878        int freq = runtime->rate * 4;
 879        if (es->fmt & ESS_FMT_STEREO)
 880                freq <<= 1;
 881        if (es->fmt & ESS_FMT_16BIT)
 882                freq <<= 1;
 883        freq /= es->frag_size;
 884        if (freq < ESM_BOB_FREQ)
 885                freq = ESM_BOB_FREQ;
 886        else if (freq > ESM_BOB_FREQ_MAX)
 887                freq = ESM_BOB_FREQ_MAX;
 888        return freq;
 889}
 890
 891
 892/*************
 893 *  PCM Part *
 894 *************/
 895
 896static u32 snd_es1968_compute_rate(struct es1968 *chip, u32 freq)
 897{
 898        u32 rate = (freq << 16) / chip->clock;
 899#if 0 /* XXX: do we need this? */ 
 900        if (rate > 0x10000)
 901                rate = 0x10000;
 902#endif
 903        return rate;
 904}
 905
 906/* get current pointer */
 907static inline unsigned int
 908snd_es1968_get_dma_ptr(struct es1968 *chip, struct esschan *es)
 909{
 910        unsigned int offset;
 911
 912        offset = apu_get_register(chip, es->apu[0], 5);
 913
 914        offset -= es->base[0];
 915
 916        return (offset & 0xFFFE);       /* hardware is in words */
 917}
 918
 919static void snd_es1968_apu_set_freq(struct es1968 *chip, int apu, int freq)
 920{
 921        apu_set_register(chip, apu, 2,
 922                           (apu_get_register(chip, apu, 2) & 0x00FF) |
 923                           ((freq & 0xff) << 8) | 0x10);
 924        apu_set_register(chip, apu, 3, freq >> 8);
 925}
 926
 927/* spin lock held */
 928static inline void snd_es1968_trigger_apu(struct es1968 *esm, int apu, int mode)
 929{
 930        /* set the APU mode */
 931        __apu_set_register(esm, apu, 0,
 932                           (__apu_get_register(esm, apu, 0) & 0xff0f) |
 933                           (mode << 4));
 934}
 935
 936static void snd_es1968_pcm_start(struct es1968 *chip, struct esschan *es)
 937{
 938        spin_lock(&chip->reg_lock);
 939        __apu_set_register(chip, es->apu[0], 5, es->base[0]);
 940        snd_es1968_trigger_apu(chip, es->apu[0], es->apu_mode[0]);
 941        if (es->mode == ESM_MODE_CAPTURE) {
 942                __apu_set_register(chip, es->apu[2], 5, es->base[2]);
 943                snd_es1968_trigger_apu(chip, es->apu[2], es->apu_mode[2]);
 944        }
 945        if (es->fmt & ESS_FMT_STEREO) {
 946                __apu_set_register(chip, es->apu[1], 5, es->base[1]);
 947                snd_es1968_trigger_apu(chip, es->apu[1], es->apu_mode[1]);
 948                if (es->mode == ESM_MODE_CAPTURE) {
 949                        __apu_set_register(chip, es->apu[3], 5, es->base[3]);
 950                        snd_es1968_trigger_apu(chip, es->apu[3], es->apu_mode[3]);
 951                }
 952        }
 953        spin_unlock(&chip->reg_lock);
 954}
 955
 956static void snd_es1968_pcm_stop(struct es1968 *chip, struct esschan *es)
 957{
 958        spin_lock(&chip->reg_lock);
 959        snd_es1968_trigger_apu(chip, es->apu[0], 0);
 960        snd_es1968_trigger_apu(chip, es->apu[1], 0);
 961        if (es->mode == ESM_MODE_CAPTURE) {
 962                snd_es1968_trigger_apu(chip, es->apu[2], 0);
 963                snd_es1968_trigger_apu(chip, es->apu[3], 0);
 964        }
 965        spin_unlock(&chip->reg_lock);
 966}
 967
 968/* set the wavecache control reg */
 969static void snd_es1968_program_wavecache(struct es1968 *chip, struct esschan *es,
 970                                         int channel, u32 addr, int capture)
 971{
 972        u32 tmpval = (addr - 0x10) & 0xFFF8;
 973
 974        if (! capture) {
 975                if (!(es->fmt & ESS_FMT_16BIT))
 976                        tmpval |= 4;    /* 8bit */
 977                if (es->fmt & ESS_FMT_STEREO)
 978                        tmpval |= 2;    /* stereo */
 979        }
 980
 981        /* set the wavecache control reg */
 982        wave_set_register(chip, es->apu[channel] << 3, tmpval);
 983
 984#ifdef CONFIG_PM
 985        es->wc_map[channel] = tmpval;
 986#endif
 987}
 988
 989
 990static void snd_es1968_playback_setup(struct es1968 *chip, struct esschan *es,
 991                                      struct snd_pcm_runtime *runtime)
 992{
 993        u32 pa;
 994        int high_apu = 0;
 995        int channel, apu;
 996        int i, size;
 997        unsigned long flags;
 998        u32 freq;
 999
1000        size = es->dma_size >> es->wav_shift;
1001
1002        if (es->fmt & ESS_FMT_STEREO)
1003                high_apu++;
1004
1005        for (channel = 0; channel <= high_apu; channel++) {
1006                apu = es->apu[channel];
1007
1008                snd_es1968_program_wavecache(chip, es, channel, es->memory->buf.addr, 0);
1009
1010                /* Offset to PCMBAR */
1011                pa = es->memory->buf.addr;
1012                pa -= chip->dma.addr;
1013                pa >>= 1;       /* words */
1014
1015                pa |= 0x00400000;       /* System RAM (Bit 22) */
1016
1017                if (es->fmt & ESS_FMT_STEREO) {
1018                        /* Enable stereo */
1019                        if (channel)
1020                                pa |= 0x00800000;       /* (Bit 23) */
1021                        if (es->fmt & ESS_FMT_16BIT)
1022                                pa >>= 1;
1023                }
1024
1025                /* base offset of dma calcs when reading the pointer
1026                   on this left one */
1027                es->base[channel] = pa & 0xFFFF;
1028
1029                for (i = 0; i < 16; i++)
1030                        apu_set_register(chip, apu, i, 0x0000);
1031
1032                /* Load the buffer into the wave engine */
1033                apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);
1034                apu_set_register(chip, apu, 5, pa & 0xFFFF);
1035                apu_set_register(chip, apu, 6, (pa + size) & 0xFFFF);
1036                /* setting loop == sample len */
1037                apu_set_register(chip, apu, 7, size);
1038
1039                /* clear effects/env.. */
1040                apu_set_register(chip, apu, 8, 0x0000);
1041                /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */
1042                apu_set_register(chip, apu, 9, 0xD000);
1043
1044                /* clear routing stuff */
1045                apu_set_register(chip, apu, 11, 0x0000);
1046                /* dma on, no envelopes, filter to all 1s) */
1047                apu_set_register(chip, apu, 0, 0x400F);
1048
1049                if (es->fmt & ESS_FMT_16BIT)
1050                        es->apu_mode[channel] = ESM_APU_16BITLINEAR;
1051                else
1052                        es->apu_mode[channel] = ESM_APU_8BITLINEAR;
1053
1054                if (es->fmt & ESS_FMT_STEREO) {
1055                        /* set panning: left or right */
1056                        /* Check: different panning. On my Canyon 3D Chipset the
1057                           Channels are swapped. I don't know, about the output
1058                           to the SPDif Link. Perhaps you have to change this
1059                           and not the APU Regs 4-5. */
1060                        apu_set_register(chip, apu, 10,
1061                                         0x8F00 | (channel ? 0 : 0x10));
1062                        es->apu_mode[channel] += 1;     /* stereo */
1063                } else
1064                        apu_set_register(chip, apu, 10, 0x8F08);
1065        }
1066
1067        spin_lock_irqsave(&chip->reg_lock, flags);
1068        /* clear WP interrupts */
1069        outw(1, chip->io_port + 0x04);
1070        /* enable WP ints */
1071        outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
1072        spin_unlock_irqrestore(&chip->reg_lock, flags);
1073
1074        freq = runtime->rate;
1075        /* set frequency */
1076        if (freq > 48000)
1077                freq = 48000;
1078        if (freq < 4000)
1079                freq = 4000;
1080
1081        /* hmmm.. */
1082        if (!(es->fmt & ESS_FMT_16BIT) && !(es->fmt & ESS_FMT_STEREO))
1083                freq >>= 1;
1084
1085        freq = snd_es1968_compute_rate(chip, freq);
1086
1087        /* Load the frequency, turn on 6dB */
1088        snd_es1968_apu_set_freq(chip, es->apu[0], freq);
1089        snd_es1968_apu_set_freq(chip, es->apu[1], freq);
1090}
1091
1092
1093static void init_capture_apu(struct es1968 *chip, struct esschan *es, int channel,
1094                             unsigned int pa, unsigned int bsize,
1095                             int mode, int route)
1096{
1097        int i, apu = es->apu[channel];
1098
1099        es->apu_mode[channel] = mode;
1100
1101        /* set the wavecache control reg */
1102        snd_es1968_program_wavecache(chip, es, channel, pa, 1);
1103
1104        /* Offset to PCMBAR */
1105        pa -= chip->dma.addr;
1106        pa >>= 1;       /* words */
1107
1108        /* base offset of dma calcs when reading the pointer
1109           on this left one */
1110        es->base[channel] = pa & 0xFFFF;
1111        pa |= 0x00400000;       /* bit 22 -> System RAM */
1112
1113        /* Begin loading the APU */
1114        for (i = 0; i < 16; i++)
1115                apu_set_register(chip, apu, i, 0x0000);
1116
1117        /* need to enable subgroups.. and we should probably
1118           have different groups for different /dev/dsps..  */
1119        apu_set_register(chip, apu, 2, 0x8);
1120
1121        /* Load the buffer into the wave engine */
1122        apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);
1123        apu_set_register(chip, apu, 5, pa & 0xFFFF);
1124        apu_set_register(chip, apu, 6, (pa + bsize) & 0xFFFF);
1125        apu_set_register(chip, apu, 7, bsize);
1126        /* clear effects/env.. */
1127        apu_set_register(chip, apu, 8, 0x00F0);
1128        /* amplitude now?  sure.  why not.  */
1129        apu_set_register(chip, apu, 9, 0x0000);
1130        /* set filter tune, radius, polar pan */
1131        apu_set_register(chip, apu, 10, 0x8F08);
1132        /* route input */
1133        apu_set_register(chip, apu, 11, route);
1134        /* dma on, no envelopes, filter to all 1s) */
1135        apu_set_register(chip, apu, 0, 0x400F);
1136}
1137
1138static void snd_es1968_capture_setup(struct es1968 *chip, struct esschan *es,
1139                                     struct snd_pcm_runtime *runtime)
1140{
1141        int size;
1142        u32 freq;
1143        unsigned long flags;
1144
1145        size = es->dma_size >> es->wav_shift;
1146
1147        /* APU assignments:
1148           0 = mono/left SRC
1149           1 = right SRC
1150           2 = mono/left Input Mixer
1151           3 = right Input Mixer
1152        */
1153        /* data seems to flow from the codec, through an apu into
1154           the 'mixbuf' bit of page, then through the SRC apu
1155           and out to the real 'buffer'.  ok.  sure.  */
1156
1157        /* input mixer (left/mono) */
1158        /* parallel in crap, see maestro reg 0xC [8-11] */
1159        init_capture_apu(chip, es, 2,
1160                         es->mixbuf->buf.addr, ESM_MIXBUF_SIZE/4, /* in words */
1161                         ESM_APU_INPUTMIXER, 0x14);
1162        /* SRC (left/mono); get input from inputing apu */
1163        init_capture_apu(chip, es, 0, es->memory->buf.addr, size,
1164                         ESM_APU_SRCONVERTOR, es->apu[2]);
1165        if (es->fmt & ESS_FMT_STEREO) {
1166                /* input mixer (right) */
1167                init_capture_apu(chip, es, 3,
1168                                 es->mixbuf->buf.addr + ESM_MIXBUF_SIZE/2,
1169                                 ESM_MIXBUF_SIZE/4, /* in words */
1170                                 ESM_APU_INPUTMIXER, 0x15);
1171                /* SRC (right) */
1172                init_capture_apu(chip, es, 1,
1173                                 es->memory->buf.addr + size*2, size,
1174                                 ESM_APU_SRCONVERTOR, es->apu[3]);
1175        }
1176
1177        freq = runtime->rate;
1178        /* Sample Rate conversion APUs don't like 0x10000 for their rate */
1179        if (freq > 47999)
1180                freq = 47999;
1181        if (freq < 4000)
1182                freq = 4000;
1183
1184        freq = snd_es1968_compute_rate(chip, freq);
1185
1186        /* Load the frequency, turn on 6dB */
1187        snd_es1968_apu_set_freq(chip, es->apu[0], freq);
1188        snd_es1968_apu_set_freq(chip, es->apu[1], freq);
1189
1190        /* fix mixer rate at 48khz.  and its _must_ be 0x10000. */
1191        freq = 0x10000;
1192        snd_es1968_apu_set_freq(chip, es->apu[2], freq);
1193        snd_es1968_apu_set_freq(chip, es->apu[3], freq);
1194
1195        spin_lock_irqsave(&chip->reg_lock, flags);
1196        /* clear WP interrupts */
1197        outw(1, chip->io_port + 0x04);
1198        /* enable WP ints */
1199        outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
1200        spin_unlock_irqrestore(&chip->reg_lock, flags);
1201}
1202
1203/*******************
1204 *  ALSA Interface *
1205 *******************/
1206
1207static int snd_es1968_pcm_prepare(struct snd_pcm_substream *substream)
1208{
1209        struct es1968 *chip = snd_pcm_substream_chip(substream);
1210        struct snd_pcm_runtime *runtime = substream->runtime;
1211        struct esschan *es = runtime->private_data;
1212
1213        es->dma_size = snd_pcm_lib_buffer_bytes(substream);
1214        es->frag_size = snd_pcm_lib_period_bytes(substream);
1215
1216        es->wav_shift = 1; /* maestro handles always 16bit */
1217        es->fmt = 0;
1218        if (snd_pcm_format_width(runtime->format) == 16)
1219                es->fmt |= ESS_FMT_16BIT;
1220        if (runtime->channels > 1) {
1221                es->fmt |= ESS_FMT_STEREO;
1222                if (es->fmt & ESS_FMT_16BIT) /* 8bit is already word shifted */
1223                        es->wav_shift++;
1224        }
1225        es->bob_freq = snd_es1968_calc_bob_rate(chip, es, runtime);
1226
1227        switch (es->mode) {
1228        case ESM_MODE_PLAY:
1229                snd_es1968_playback_setup(chip, es, runtime);
1230                break;
1231        case ESM_MODE_CAPTURE:
1232                snd_es1968_capture_setup(chip, es, runtime);
1233                break;
1234        }
1235
1236        return 0;
1237}
1238
1239static int snd_es1968_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1240{
1241        struct es1968 *chip = snd_pcm_substream_chip(substream);
1242        struct esschan *es = substream->runtime->private_data;
1243
1244        spin_lock(&chip->substream_lock);
1245        switch (cmd) {
1246        case SNDRV_PCM_TRIGGER_START:
1247        case SNDRV_PCM_TRIGGER_RESUME:
1248                if (es->running)
1249                        break;
1250                snd_es1968_bob_inc(chip, es->bob_freq);
1251                es->count = 0;
1252                es->hwptr = 0;
1253                snd_es1968_pcm_start(chip, es);
1254                es->running = 1;
1255                break;
1256        case SNDRV_PCM_TRIGGER_STOP:
1257        case SNDRV_PCM_TRIGGER_SUSPEND:
1258                if (! es->running)
1259                        break;
1260                snd_es1968_pcm_stop(chip, es);
1261                es->running = 0;
1262                snd_es1968_bob_dec(chip);
1263                break;
1264        }
1265        spin_unlock(&chip->substream_lock);
1266        return 0;
1267}
1268
1269static snd_pcm_uframes_t snd_es1968_pcm_pointer(struct snd_pcm_substream *substream)
1270{
1271        struct es1968 *chip = snd_pcm_substream_chip(substream);
1272        struct esschan *es = substream->runtime->private_data;
1273        unsigned int ptr;
1274
1275        ptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;
1276        
1277        return bytes_to_frames(substream->runtime, ptr % es->dma_size);
1278}
1279
1280static struct snd_pcm_hardware snd_es1968_playback = {
1281        .info =                 (SNDRV_PCM_INFO_MMAP |
1282                                 SNDRV_PCM_INFO_MMAP_VALID |
1283                                 SNDRV_PCM_INFO_INTERLEAVED |
1284                                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1285                                 /*SNDRV_PCM_INFO_PAUSE |*/
1286                                 SNDRV_PCM_INFO_RESUME),
1287        .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1288        .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1289        .rate_min =             4000,
1290        .rate_max =             48000,
1291        .channels_min =         1,
1292        .channels_max =         2,
1293        .buffer_bytes_max =     65536,
1294        .period_bytes_min =     256,
1295        .period_bytes_max =     65536,
1296        .periods_min =          1,
1297        .periods_max =          1024,
1298        .fifo_size =            0,
1299};
1300
1301static struct snd_pcm_hardware snd_es1968_capture = {
1302        .info =                 (SNDRV_PCM_INFO_NONINTERLEAVED |
1303                                 SNDRV_PCM_INFO_MMAP |
1304                                 SNDRV_PCM_INFO_MMAP_VALID |
1305                                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1306                                 /*SNDRV_PCM_INFO_PAUSE |*/
1307                                 SNDRV_PCM_INFO_RESUME),
1308        .formats =              /*SNDRV_PCM_FMTBIT_U8 |*/ SNDRV_PCM_FMTBIT_S16_LE,
1309        .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1310        .rate_min =             4000,
1311        .rate_max =             48000,
1312        .channels_min =         1,
1313        .channels_max =         2,
1314        .buffer_bytes_max =     65536,
1315        .period_bytes_min =     256,
1316        .period_bytes_max =     65536,
1317        .periods_min =          1,
1318        .periods_max =          1024,
1319        .fifo_size =            0,
1320};
1321
1322/* *************************
1323   * DMA memory management *
1324   *************************/
1325
1326/* Because the Maestro can only take addresses relative to the PCM base address
1327   register :( */
1328
1329static int calc_available_memory_size(struct es1968 *chip)
1330{
1331        int max_size = 0;
1332        struct esm_memory *buf;
1333
1334        mutex_lock(&chip->memory_mutex);
1335        list_for_each_entry(buf, &chip->buf_list, list) {
1336                if (buf->empty && buf->buf.bytes > max_size)
1337                        max_size = buf->buf.bytes;
1338        }
1339        mutex_unlock(&chip->memory_mutex);
1340        if (max_size >= 128*1024)
1341                max_size = 127*1024;
1342        return max_size;
1343}
1344
1345/* allocate a new memory chunk with the specified size */
1346static struct esm_memory *snd_es1968_new_memory(struct es1968 *chip, int size)
1347{
1348        struct esm_memory *buf;
1349
1350        size = ALIGN(size, ESM_MEM_ALIGN);
1351        mutex_lock(&chip->memory_mutex);
1352        list_for_each_entry(buf, &chip->buf_list, list) {
1353                if (buf->empty && buf->buf.bytes >= size)
1354                        goto __found;
1355        }
1356        mutex_unlock(&chip->memory_mutex);
1357        return NULL;
1358
1359__found:
1360        if (buf->buf.bytes > size) {
1361                struct esm_memory *chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);
1362                if (chunk == NULL) {
1363                        mutex_unlock(&chip->memory_mutex);
1364                        return NULL;
1365                }
1366                chunk->buf = buf->buf;
1367                chunk->buf.bytes -= size;
1368                chunk->buf.area += size;
1369                chunk->buf.addr += size;
1370                chunk->empty = 1;
1371                buf->buf.bytes = size;
1372                list_add(&chunk->list, &buf->list);
1373        }
1374        buf->empty = 0;
1375        mutex_unlock(&chip->memory_mutex);
1376        return buf;
1377}
1378
1379/* free a memory chunk */
1380static void snd_es1968_free_memory(struct es1968 *chip, struct esm_memory *buf)
1381{
1382        struct esm_memory *chunk;
1383
1384        mutex_lock(&chip->memory_mutex);
1385        buf->empty = 1;
1386        if (buf->list.prev != &chip->buf_list) {
1387                chunk = list_entry(buf->list.prev, struct esm_memory, list);
1388                if (chunk->empty) {
1389                        chunk->buf.bytes += buf->buf.bytes;
1390                        list_del(&buf->list);
1391                        kfree(buf);
1392                        buf = chunk;
1393                }
1394        }
1395        if (buf->list.next != &chip->buf_list) {
1396                chunk = list_entry(buf->list.next, struct esm_memory, list);
1397                if (chunk->empty) {
1398                        buf->buf.bytes += chunk->buf.bytes;
1399                        list_del(&chunk->list);
1400                        kfree(chunk);
1401                }
1402        }
1403        mutex_unlock(&chip->memory_mutex);
1404}
1405
1406static void snd_es1968_free_dmabuf(struct es1968 *chip)
1407{
1408        struct list_head *p;
1409
1410        if (! chip->dma.area)
1411                return;
1412        snd_dma_reserve_buf(&chip->dma, snd_dma_pci_buf_id(chip->pci));
1413        while ((p = chip->buf_list.next) != &chip->buf_list) {
1414                struct esm_memory *chunk = list_entry(p, struct esm_memory, list);
1415                list_del(p);
1416                kfree(chunk);
1417        }
1418}
1419
1420static int __devinit
1421snd_es1968_init_dmabuf(struct es1968 *chip)
1422{
1423        int err;
1424        struct esm_memory *chunk;
1425
1426        chip->dma.dev.type = SNDRV_DMA_TYPE_DEV;
1427        chip->dma.dev.dev = snd_dma_pci_data(chip->pci);
1428        if (! snd_dma_get_reserved_buf(&chip->dma, snd_dma_pci_buf_id(chip->pci))) {
1429                err = snd_dma_alloc_pages_fallback(SNDRV_DMA_TYPE_DEV,
1430                                                   snd_dma_pci_data(chip->pci),
1431                                                   chip->total_bufsize, &chip->dma);
1432                if (err < 0 || ! chip->dma.area) {
1433                        snd_printk(KERN_ERR "es1968: can't allocate dma pages for size %d\n",
1434                                   chip->total_bufsize);
1435                        return -ENOMEM;
1436                }
1437                if ((chip->dma.addr + chip->dma.bytes - 1) & ~((1 << 28) - 1)) {
1438                        snd_dma_free_pages(&chip->dma);
1439                        snd_printk(KERN_ERR "es1968: DMA buffer beyond 256MB.\n");
1440                        return -ENOMEM;
1441                }
1442        }
1443
1444        INIT_LIST_HEAD(&chip->buf_list);
1445        /* allocate an empty chunk */
1446        chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);
1447        if (chunk == NULL) {
1448                snd_es1968_free_dmabuf(chip);
1449                return -ENOMEM;
1450        }
1451        memset(chip->dma.area, 0, ESM_MEM_ALIGN);
1452        chunk->buf = chip->dma;
1453        chunk->buf.area += ESM_MEM_ALIGN;
1454        chunk->buf.addr += ESM_MEM_ALIGN;
1455        chunk->buf.bytes -= ESM_MEM_ALIGN;
1456        chunk->empty = 1;
1457        list_add(&chunk->list, &chip->buf_list);
1458
1459        return 0;
1460}
1461
1462/* setup the dma_areas */
1463/* buffer is extracted from the pre-allocated memory chunk */
1464static int snd_es1968_hw_params(struct snd_pcm_substream *substream,
1465                                struct snd_pcm_hw_params *hw_params)
1466{
1467        struct es1968 *chip = snd_pcm_substream_chip(substream);
1468        struct snd_pcm_runtime *runtime = substream->runtime;
1469        struct esschan *chan = runtime->private_data;
1470        int size = params_buffer_bytes(hw_params);
1471
1472        if (chan->memory) {
1473                if (chan->memory->buf.bytes >= size) {
1474                        runtime->dma_bytes = size;
1475                        return 0;
1476                }
1477                snd_es1968_free_memory(chip, chan->memory);
1478        }
1479        chan->memory = snd_es1968_new_memory(chip, size);
1480        if (chan->memory == NULL) {
1481                // snd_printd("cannot allocate dma buffer: size = %d\n", size);
1482                return -ENOMEM;
1483        }
1484        snd_pcm_set_runtime_buffer(substream, &chan->memory->buf);
1485        return 1; /* area was changed */
1486}
1487
1488/* remove dma areas if allocated */
1489static int snd_es1968_hw_free(struct snd_pcm_substream *substream)
1490{
1491        struct es1968 *chip = snd_pcm_substream_chip(substream);
1492        struct snd_pcm_runtime *runtime = substream->runtime;
1493        struct esschan *chan;
1494        
1495        if (runtime->private_data == NULL)
1496                return 0;
1497        chan = runtime->private_data;
1498        if (chan->memory) {
1499                snd_es1968_free_memory(chip, chan->memory);
1500                chan->memory = NULL;
1501        }
1502        return 0;
1503}
1504
1505
1506/*
1507 * allocate APU pair
1508 */
1509static int snd_es1968_alloc_apu_pair(struct es1968 *chip, int type)
1510{
1511        int apu;
1512
1513        for (apu = 0; apu < NR_APUS; apu += 2) {
1514                if (chip->apu[apu] == ESM_APU_FREE &&
1515                    chip->apu[apu + 1] == ESM_APU_FREE) {
1516                        chip->apu[apu] = chip->apu[apu + 1] = type;
1517                        return apu;
1518                }
1519        }
1520        return -EBUSY;
1521}
1522
1523/*
1524 * release APU pair
1525 */
1526static void snd_es1968_free_apu_pair(struct es1968 *chip, int apu)
1527{
1528        chip->apu[apu] = chip->apu[apu + 1] = ESM_APU_FREE;
1529}
1530
1531
1532/******************
1533 * PCM open/close *
1534 ******************/
1535
1536static int snd_es1968_playback_open(struct snd_pcm_substream *substream)
1537{
1538        struct es1968 *chip = snd_pcm_substream_chip(substream);
1539        struct snd_pcm_runtime *runtime = substream->runtime;
1540        struct esschan *es;
1541        int apu1;
1542
1543        /* search 2 APUs */
1544        apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY);
1545        if (apu1 < 0)
1546                return apu1;
1547
1548        es = kzalloc(sizeof(*es), GFP_KERNEL);
1549        if (!es) {
1550                snd_es1968_free_apu_pair(chip, apu1);
1551                return -ENOMEM;
1552        }
1553
1554        es->apu[0] = apu1;
1555        es->apu[1] = apu1 + 1;
1556        es->apu_mode[0] = 0;
1557        es->apu_mode[1] = 0;
1558        es->running = 0;
1559        es->substream = substream;
1560        es->mode = ESM_MODE_PLAY;
1561
1562        runtime->private_data = es;
1563        runtime->hw = snd_es1968_playback;
1564        runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =
1565                calc_available_memory_size(chip);
1566
1567        spin_lock_irq(&chip->substream_lock);
1568        list_add(&es->list, &chip->substream_list);
1569        spin_unlock_irq(&chip->substream_lock);
1570
1571        return 0;
1572}
1573
1574static int snd_es1968_capture_open(struct snd_pcm_substream *substream)
1575{
1576        struct snd_pcm_runtime *runtime = substream->runtime;
1577        struct es1968 *chip = snd_pcm_substream_chip(substream);
1578        struct esschan *es;
1579        int apu1, apu2;
1580
1581        apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_CAPTURE);
1582        if (apu1 < 0)
1583                return apu1;
1584        apu2 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_RATECONV);
1585        if (apu2 < 0) {
1586                snd_es1968_free_apu_pair(chip, apu1);
1587                return apu2;
1588        }
1589        
1590        es = kzalloc(sizeof(*es), GFP_KERNEL);
1591        if (!es) {
1592                snd_es1968_free_apu_pair(chip, apu1);
1593                snd_es1968_free_apu_pair(chip, apu2);
1594                return -ENOMEM;
1595        }
1596
1597        es->apu[0] = apu1;
1598        es->apu[1] = apu1 + 1;
1599        es->apu[2] = apu2;
1600        es->apu[3] = apu2 + 1;
1601        es->apu_mode[0] = 0;
1602        es->apu_mode[1] = 0;
1603        es->apu_mode[2] = 0;
1604        es->apu_mode[3] = 0;
1605        es->running = 0;
1606        es->substream = substream;
1607        es->mode = ESM_MODE_CAPTURE;
1608
1609        /* get mixbuffer */
1610        if ((es->mixbuf = snd_es1968_new_memory(chip, ESM_MIXBUF_SIZE)) == NULL) {
1611                snd_es1968_free_apu_pair(chip, apu1);
1612                snd_es1968_free_apu_pair(chip, apu2);
1613                kfree(es);
1614                return -ENOMEM;
1615        }
1616        memset(es->mixbuf->buf.area, 0, ESM_MIXBUF_SIZE);
1617
1618        runtime->private_data = es;
1619        runtime->hw = snd_es1968_capture;
1620        runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =
1621                calc_available_memory_size(chip) - 1024; /* keep MIXBUF size */
1622        snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES);
1623
1624        spin_lock_irq(&chip->substream_lock);
1625        list_add(&es->list, &chip->substream_list);
1626        spin_unlock_irq(&chip->substream_lock);
1627
1628        return 0;
1629}
1630
1631static int snd_es1968_playback_close(struct snd_pcm_substream *substream)
1632{
1633        struct es1968 *chip = snd_pcm_substream_chip(substream);
1634        struct esschan *es;
1635
1636        if (substream->runtime->private_data == NULL)
1637                return 0;
1638        es = substream->runtime->private_data;
1639        spin_lock_irq(&chip->substream_lock);
1640        list_del(&es->list);
1641        spin_unlock_irq(&chip->substream_lock);
1642        snd_es1968_free_apu_pair(chip, es->apu[0]);
1643        kfree(es);
1644
1645        return 0;
1646}
1647
1648static int snd_es1968_capture_close(struct snd_pcm_substream *substream)
1649{
1650        struct es1968 *chip = snd_pcm_substream_chip(substream);
1651        struct esschan *es;
1652
1653        if (substream->runtime->private_data == NULL)
1654                return 0;
1655        es = substream->runtime->private_data;
1656        spin_lock_irq(&chip->substream_lock);
1657        list_del(&es->list);
1658        spin_unlock_irq(&chip->substream_lock);
1659        snd_es1968_free_memory(chip, es->mixbuf);
1660        snd_es1968_free_apu_pair(chip, es->apu[0]);
1661        snd_es1968_free_apu_pair(chip, es->apu[2]);
1662        kfree(es);
1663
1664        return 0;
1665}
1666
1667static struct snd_pcm_ops snd_es1968_playback_ops = {
1668        .open =         snd_es1968_playback_open,
1669        .close =        snd_es1968_playback_close,
1670        .ioctl =        snd_pcm_lib_ioctl,
1671        .hw_params =    snd_es1968_hw_params,
1672        .hw_free =      snd_es1968_hw_free,
1673        .prepare =      snd_es1968_pcm_prepare,
1674        .trigger =      snd_es1968_pcm_trigger,
1675        .pointer =      snd_es1968_pcm_pointer,
1676};
1677
1678static struct snd_pcm_ops snd_es1968_capture_ops = {
1679        .open =         snd_es1968_capture_open,
1680        .close =        snd_es1968_capture_close,
1681        .ioctl =        snd_pcm_lib_ioctl,
1682        .hw_params =    snd_es1968_hw_params,
1683        .hw_free =      snd_es1968_hw_free,
1684        .prepare =      snd_es1968_pcm_prepare,
1685        .trigger =      snd_es1968_pcm_trigger,
1686        .pointer =      snd_es1968_pcm_pointer,
1687};
1688
1689
1690/*
1691 * measure clock
1692 */
1693#define CLOCK_MEASURE_BUFSIZE   16768   /* enough large for a single shot */
1694
1695static void __devinit es1968_measure_clock(struct es1968 *chip)
1696{
1697        int i, apu;
1698        unsigned int pa, offset, t;
1699        struct esm_memory *memory;
1700        struct timeval start_time, stop_time;
1701
1702        if (chip->clock == 0)
1703                chip->clock = 48000; /* default clock value */
1704
1705        /* search 2 APUs (although one apu is enough) */
1706        if ((apu = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY)) < 0) {
1707                snd_printk(KERN_ERR "Hmm, cannot find empty APU pair!?\n");
1708                return;
1709        }
1710        if ((memory = snd_es1968_new_memory(chip, CLOCK_MEASURE_BUFSIZE)) == NULL) {
1711                snd_printk(KERN_ERR "cannot allocate dma buffer - using default clock %d\n", chip->clock);
1712                snd_es1968_free_apu_pair(chip, apu);
1713                return;
1714        }
1715
1716        memset(memory->buf.area, 0, CLOCK_MEASURE_BUFSIZE);
1717
1718        wave_set_register(chip, apu << 3, (memory->buf.addr - 0x10) & 0xfff8);
1719
1720        pa = (unsigned int)((memory->buf.addr - chip->dma.addr) >> 1);
1721        pa |= 0x00400000;       /* System RAM (Bit 22) */
1722
1723        /* initialize apu */
1724        for (i = 0; i < 16; i++)
1725                apu_set_register(chip, apu, i, 0x0000);
1726
1727        apu_set_register(chip, apu, 0, 0x400f);
1728        apu_set_register(chip, apu, 4, ((pa >> 16) & 0xff) << 8);
1729        apu_set_register(chip, apu, 5, pa & 0xffff);
1730        apu_set_register(chip, apu, 6, (pa + CLOCK_MEASURE_BUFSIZE/2) & 0xffff);
1731        apu_set_register(chip, apu, 7, CLOCK_MEASURE_BUFSIZE/2);
1732        apu_set_register(chip, apu, 8, 0x0000);
1733        apu_set_register(chip, apu, 9, 0xD000);
1734        apu_set_register(chip, apu, 10, 0x8F08);
1735        apu_set_register(chip, apu, 11, 0x0000);
1736        spin_lock_irq(&chip->reg_lock);
1737        outw(1, chip->io_port + 0x04); /* clear WP interrupts */
1738        outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); /* enable WP ints */
1739        spin_unlock_irq(&chip->reg_lock);
1740
1741        snd_es1968_apu_set_freq(chip, apu, ((unsigned int)48000 << 16) / chip->clock); /* 48000 Hz */
1742
1743        chip->in_measurement = 1;
1744        chip->measure_apu = apu;
1745        spin_lock_irq(&chip->reg_lock);
1746        snd_es1968_bob_inc(chip, ESM_BOB_FREQ);
1747        __apu_set_register(chip, apu, 5, pa & 0xffff);
1748        snd_es1968_trigger_apu(chip, apu, ESM_APU_16BITLINEAR);
1749        do_gettimeofday(&start_time);
1750        spin_unlock_irq(&chip->reg_lock);
1751        msleep(50);
1752        spin_lock_irq(&chip->reg_lock);
1753        offset = __apu_get_register(chip, apu, 5);
1754        do_gettimeofday(&stop_time);
1755        snd_es1968_trigger_apu(chip, apu, 0); /* stop */
1756        snd_es1968_bob_dec(chip);
1757        chip->in_measurement = 0;
1758        spin_unlock_irq(&chip->reg_lock);
1759
1760        /* check the current position */
1761        offset -= (pa & 0xffff);
1762        offset &= 0xfffe;
1763        offset += chip->measure_count * (CLOCK_MEASURE_BUFSIZE/2);
1764
1765        t = stop_time.tv_sec - start_time.tv_sec;
1766        t *= 1000000;
1767        if (stop_time.tv_usec < start_time.tv_usec)
1768                t -= start_time.tv_usec - stop_time.tv_usec;
1769        else
1770                t += stop_time.tv_usec - start_time.tv_usec;
1771        if (t == 0) {
1772                snd_printk(KERN_ERR "?? calculation error..\n");
1773        } else {
1774                offset *= 1000;
1775                offset = (offset / t) * 1000 + ((offset % t) * 1000) / t;
1776                if (offset < 47500 || offset > 48500) {
1777                        if (offset >= 40000 && offset <= 50000)
1778                                chip->clock = (chip->clock * offset) / 48000;
1779                }
1780                printk(KERN_INFO "es1968: clocking to %d\n", chip->clock);
1781        }
1782        snd_es1968_free_memory(chip, memory);
1783        snd_es1968_free_apu_pair(chip, apu);
1784}
1785
1786
1787/*
1788 */
1789
1790static void snd_es1968_pcm_free(struct snd_pcm *pcm)
1791{
1792        struct es1968 *esm = pcm->private_data;
1793        snd_es1968_free_dmabuf(esm);
1794        esm->pcm = NULL;
1795}
1796
1797static int __devinit
1798snd_es1968_pcm(struct es1968 *chip, int device)
1799{
1800        struct snd_pcm *pcm;
1801        int err;
1802
1803        /* get DMA buffer */
1804        if ((err = snd_es1968_init_dmabuf(chip)) < 0)
1805                return err;
1806
1807        /* set PCMBAR */
1808        wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);
1809        wave_set_register(chip, 0x01FD, chip->dma.addr >> 12);
1810        wave_set_register(chip, 0x01FE, chip->dma.addr >> 12);
1811        wave_set_register(chip, 0x01FF, chip->dma.addr >> 12);
1812
1813        if ((err = snd_pcm_new(chip->card, "ESS Maestro", device,
1814                               chip->playback_streams,
1815                               chip->capture_streams, &pcm)) < 0)
1816                return err;
1817
1818        pcm->private_data = chip;
1819        pcm->private_free = snd_es1968_pcm_free;
1820
1821        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1968_playback_ops);
1822        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1968_capture_ops);
1823
1824        pcm->info_flags = 0;
1825
1826        strcpy(pcm->name, "ESS Maestro");
1827
1828        chip->pcm = pcm;
1829
1830        return 0;
1831}
1832/*
1833 * suppress jitter on some maestros when playing stereo
1834 */
1835static void snd_es1968_suppress_jitter(struct es1968 *chip, struct esschan *es)
1836{
1837        unsigned int cp1;
1838        unsigned int cp2;
1839        unsigned int diff;
1840
1841        cp1 = __apu_get_register(chip, 0, 5);
1842        cp2 = __apu_get_register(chip, 1, 5);
1843        diff = (cp1 > cp2 ? cp1 - cp2 : cp2 - cp1);
1844
1845        if (diff > 1)
1846                __maestro_write(chip, IDR0_DATA_PORT, cp1);
1847}
1848
1849/*
1850 * update pointer
1851 */
1852static void snd_es1968_update_pcm(struct es1968 *chip, struct esschan *es)
1853{
1854        unsigned int hwptr;
1855        unsigned int diff;
1856        struct snd_pcm_substream *subs = es->substream;
1857        
1858        if (subs == NULL || !es->running)
1859                return;
1860
1861        hwptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;
1862        hwptr %= es->dma_size;
1863
1864        diff = (es->dma_size + hwptr - es->hwptr) % es->dma_size;
1865
1866        es->hwptr = hwptr;
1867        es->count += diff;
1868
1869        if (es->count > es->frag_size) {
1870                spin_unlock(&chip->substream_lock);
1871                snd_pcm_period_elapsed(subs);
1872                spin_lock(&chip->substream_lock);
1873                es->count %= es->frag_size;
1874        }
1875}
1876
1877/*
1878 */
1879static void es1968_update_hw_volume(unsigned long private_data)
1880{
1881        struct es1968 *chip = (struct es1968 *) private_data;
1882        int x, val;
1883        unsigned long flags;
1884
1885        /* Figure out which volume control button was pushed,
1886           based on differences from the default register
1887           values. */
1888        x = inb(chip->io_port + 0x1c) & 0xee;
1889        /* Reset the volume control registers. */
1890        outb(0x88, chip->io_port + 0x1c);
1891        outb(0x88, chip->io_port + 0x1d);
1892        outb(0x88, chip->io_port + 0x1e);
1893        outb(0x88, chip->io_port + 0x1f);
1894
1895        if (chip->in_suspend)
1896                return;
1897
1898        if (! chip->master_switch || ! chip->master_volume)
1899                return;
1900
1901        /* FIXME: we can't call snd_ac97_* functions since here is in tasklet. */
1902        spin_lock_irqsave(&chip->ac97_lock, flags);
1903        val = chip->ac97->regs[AC97_MASTER];
1904        switch (x) {
1905        case 0x88:
1906                /* mute */
1907                val ^= 0x8000;
1908                chip->ac97->regs[AC97_MASTER] = val;
1909                outw(val, chip->io_port + ESM_AC97_DATA);
1910                outb(AC97_MASTER, chip->io_port + ESM_AC97_INDEX);
1911                snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1912                               &chip->master_switch->id);
1913                break;
1914        case 0xaa:
1915                /* volume up */
1916                if ((val & 0x7f) > 0)
1917                        val--;
1918                if ((val & 0x7f00) > 0)
1919                        val -= 0x0100;
1920                chip->ac97->regs[AC97_MASTER] = val;
1921                outw(val, chip->io_port + ESM_AC97_DATA);
1922                outb(AC97_MASTER, chip->io_port + ESM_AC97_INDEX);
1923                snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1924                               &chip->master_volume->id);
1925                break;
1926        case 0x66:
1927                /* volume down */
1928                if ((val & 0x7f) < 0x1f)
1929                        val++;
1930                if ((val & 0x7f00) < 0x1f00)
1931                        val += 0x0100;
1932                chip->ac97->regs[AC97_MASTER] = val;
1933                outw(val, chip->io_port + ESM_AC97_DATA);
1934                outb(AC97_MASTER, chip->io_port + ESM_AC97_INDEX);
1935                snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1936                               &chip->master_volume->id);
1937                break;
1938        }
1939        spin_unlock_irqrestore(&chip->ac97_lock, flags);
1940}
1941
1942/*
1943 * interrupt handler
1944 */
1945static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id)
1946{
1947        struct es1968 *chip = dev_id;
1948        u32 event;
1949
1950        if (!(event = inb(chip->io_port + 0x1A)))
1951                return IRQ_NONE;
1952
1953        outw(inw(chip->io_port + 4) & 1, chip->io_port + 4);
1954
1955        if (event & ESM_HWVOL_IRQ)
1956                tasklet_schedule(&chip->hwvol_tq); /* we'll do this later */
1957
1958        /* else ack 'em all, i imagine */
1959        outb(0xFF, chip->io_port + 0x1A);
1960
1961        if ((event & ESM_MPU401_IRQ) && chip->rmidi) {
1962                snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1963        }
1964
1965        if (event & ESM_SOUND_IRQ) {
1966                struct esschan *es;
1967                spin_lock(&chip->substream_lock);
1968                list_for_each_entry(es, &chip->substream_list, list) {
1969                        if (es->running) {
1970                                snd_es1968_update_pcm(chip, es);
1971                                if (es->fmt & ESS_FMT_STEREO)
1972                                        snd_es1968_suppress_jitter(chip, es);
1973                        }
1974                }
1975                spin_unlock(&chip->substream_lock);
1976                if (chip->in_measurement) {
1977                        unsigned int curp = __apu_get_register(chip, chip->measure_apu, 5);
1978                        if (curp < chip->measure_lastpos)
1979                                chip->measure_count++;
1980                        chip->measure_lastpos = curp;
1981                }
1982        }
1983
1984        return IRQ_HANDLED;
1985}
1986
1987/*
1988 *  Mixer stuff
1989 */
1990
1991static int __devinit
1992snd_es1968_mixer(struct es1968 *chip)
1993{
1994        struct snd_ac97_bus *pbus;
1995        struct snd_ac97_template ac97;
1996        struct snd_ctl_elem_id elem_id;
1997        int err;
1998        static struct snd_ac97_bus_ops ops = {
1999                .write = snd_es1968_ac97_write,
2000                .read = snd_es1968_ac97_read,
2001        };
2002
2003        if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
2004                return err;
2005        pbus->no_vra = 1; /* ES1968 doesn't need VRA */
2006
2007        memset(&ac97, 0, sizeof(ac97));
2008        ac97.private_data = chip;
2009        if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97)) < 0)
2010                return err;
2011
2012        /* attach master switch / volumes for h/w volume control */
2013        memset(&elem_id, 0, sizeof(elem_id));
2014        elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2015        strcpy(elem_id.name, "Master Playback Switch");
2016        chip->master_switch = snd_ctl_find_id(chip->card, &elem_id);
2017        memset(&elem_id, 0, sizeof(elem_id));
2018        elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2019        strcpy(elem_id.name, "Master Playback Volume");
2020        chip->master_volume = snd_ctl_find_id(chip->card, &elem_id);
2021
2022        return 0;
2023}
2024
2025/*
2026 * reset ac97 codec
2027 */
2028
2029static void snd_es1968_ac97_reset(struct es1968 *chip)
2030{
2031        unsigned long ioaddr = chip->io_port;
2032
2033        unsigned short save_ringbus_a;
2034        unsigned short save_68;
2035        unsigned short w;
2036        unsigned int vend;
2037
2038        /* save configuration */
2039        save_ringbus_a = inw(ioaddr + 0x36);
2040
2041        //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); /* clear second codec id? */
2042        /* set command/status address i/o to 1st codec */
2043        outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
2044        outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
2045
2046        /* disable ac link */
2047        outw(0x0000, ioaddr + 0x36);
2048        save_68 = inw(ioaddr + 0x68);
2049        pci_read_config_word(chip->pci, 0x58, &w);      /* something magical with gpio and bus arb. */
2050        pci_read_config_dword(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2051        if (w & 1)
2052                save_68 |= 0x10;
2053        outw(0xfffe, ioaddr + 0x64);    /* unmask gpio 0 */
2054        outw(0x0001, ioaddr + 0x68);    /* gpio write */
2055        outw(0x0000, ioaddr + 0x60);    /* write 0 to gpio 0 */
2056        udelay(20);
2057        outw(0x0001, ioaddr + 0x60);    /* write 1 to gpio 1 */
2058        msleep(20);
2059
2060        outw(save_68 | 0x1, ioaddr + 0x68);     /* now restore .. */
2061        outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38);
2062        outw((inw(ioaddr + 0x3a) & 0xfffc) | 0x1, ioaddr + 0x3a);
2063        outw((inw(ioaddr + 0x3c) & 0xfffc) | 0x1, ioaddr + 0x3c);
2064
2065        /* now the second codec */
2066        /* disable ac link */
2067        outw(0x0000, ioaddr + 0x36);
2068        outw(0xfff7, ioaddr + 0x64);    /* unmask gpio 3 */
2069        save_68 = inw(ioaddr + 0x68);
2070        outw(0x0009, ioaddr + 0x68);    /* gpio write 0 & 3 ?? */
2071        outw(0x0001, ioaddr + 0x60);    /* write 1 to gpio */
2072        udelay(20);
2073        outw(0x0009, ioaddr + 0x60);    /* write 9 to gpio */
2074        msleep(500);
2075        //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
2076        outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
2077        outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
2078
2079#if 0                           /* the loop here needs to be much better if we want it.. */
2080        snd_printk(KERN_INFO "trying software reset\n");
2081        /* try and do a software reset */
2082        outb(0x80 | 0x7c, ioaddr + 0x30);
2083        for (w = 0;; w++) {
2084                if ((inw(ioaddr + 0x30) & 1) == 0) {
2085                        if (inb(ioaddr + 0x32) != 0)
2086                                break;
2087
2088                        outb(0x80 | 0x7d, ioaddr + 0x30);
2089                        if (((inw(ioaddr + 0x30) & 1) == 0)
2090                            && (inb(ioaddr + 0x32) != 0))
2091                                break;
2092                        outb(0x80 | 0x7f, ioaddr + 0x30);
2093                        if (((inw(ioaddr + 0x30) & 1) == 0)
2094                            && (inb(ioaddr + 0x32) != 0))
2095                                break;
2096                }
2097
2098                if (w > 10000) {
2099                        outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */
2100                        msleep(500);    /* oh my.. */
2101                        outb(inb(ioaddr + 0x37) & ~0x08,
2102                                ioaddr + 0x37);
2103                        udelay(1);
2104                        outw(0x80, ioaddr + 0x30);
2105                        for (w = 0; w < 10000; w++) {
2106                                if ((inw(ioaddr + 0x30) & 1) == 0)
2107                                        break;
2108                        }
2109                }
2110        }
2111#endif
2112        if (vend == NEC_VERSA_SUBID1 || vend == NEC_VERSA_SUBID2) {
2113                /* turn on external amp? */
2114                outw(0xf9ff, ioaddr + 0x64);
2115                outw(inw(ioaddr + 0x68) | 0x600, ioaddr + 0x68);
2116                outw(0x0209, ioaddr + 0x60);
2117        }
2118
2119        /* restore.. */
2120        outw(save_ringbus_a, ioaddr + 0x36);
2121
2122        /* Turn on the 978 docking chip.
2123           First frob the "master output enable" bit,
2124           then set most of the playback volume control registers to max. */
2125        outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0);
2126        outb(0xff, ioaddr+0xc3);
2127        outb(0xff, ioaddr+0xc4);
2128        outb(0xff, ioaddr+0xc6);
2129        outb(0xff, ioaddr+0xc8);
2130        outb(0x3f, ioaddr+0xcf);
2131        outb(0x3f, ioaddr+0xd0);
2132}
2133
2134static void snd_es1968_reset(struct es1968 *chip)
2135{
2136        /* Reset */
2137        outw(ESM_RESET_MAESTRO | ESM_RESET_DIRECTSOUND,
2138             chip->io_port + ESM_PORT_HOST_IRQ);
2139        udelay(10);
2140        outw(0x0000, chip->io_port + ESM_PORT_HOST_IRQ);
2141        udelay(10);
2142}
2143
2144/*
2145 * initialize maestro chip
2146 */
2147static void snd_es1968_chip_init(struct es1968 *chip)
2148{
2149        struct pci_dev *pci = chip->pci;
2150        int i;
2151        unsigned long iobase  = chip->io_port;
2152        u16 w;
2153        u32 n;
2154
2155        /* We used to muck around with pci config space that
2156         * we had no business messing with.  We don't know enough
2157         * about the machine to know which DMA mode is appropriate, 
2158         * etc.  We were guessing wrong on some machines and making
2159         * them unhappy.  We now trust in the BIOS to do things right,
2160         * which almost certainly means a new host of problems will
2161         * arise with broken BIOS implementations.  screw 'em. 
2162         * We're already intolerant of machines that don't assign
2163         * IRQs.
2164         */
2165        
2166        /* Config Reg A */
2167        pci_read_config_word(pci, ESM_CONFIG_A, &w);
2168
2169        w &= ~DMA_CLEAR;        /* Clear DMA bits */
2170        w &= ~(PIC_SNOOP1 | PIC_SNOOP2);        /* Clear Pic Snoop Mode Bits */
2171        w &= ~SAFEGUARD;        /* Safeguard off */
2172        w |= POST_WRITE;        /* Posted write */
2173        w |= PCI_TIMING;        /* PCI timing on */
2174        /* XXX huh?  claims to be reserved.. */
2175        w &= ~SWAP_LR;          /* swap left/right 
2176                                   seems to only have effect on SB
2177                                   Emulation */
2178        w &= ~SUBTR_DECODE;     /* Subtractive decode off */
2179
2180        pci_write_config_word(pci, ESM_CONFIG_A, w);
2181
2182        /* Config Reg B */
2183
2184        pci_read_config_word(pci, ESM_CONFIG_B, &w);
2185
2186        w &= ~(1 << 15);        /* Turn off internal clock multiplier */
2187        /* XXX how do we know which to use? */
2188        w &= ~(1 << 14);        /* External clock */
2189
2190        w &= ~SPDIF_CONFB;      /* disable S/PDIF output */
2191        w |= HWV_CONFB;         /* HWV on */
2192        w |= DEBOUNCE;          /* Debounce off: easier to push the HW buttons */
2193        w &= ~GPIO_CONFB;       /* GPIO 4:5 */
2194        w |= CHI_CONFB;         /* Disconnect from the CHI.  Enabling this made a dell 7500 work. */
2195        w &= ~IDMA_CONFB;       /* IDMA off (undocumented) */
2196        w &= ~MIDI_FIX;         /* MIDI fix off (undoc) */
2197        w &= ~(1 << 1);         /* reserved, always write 0 */
2198        w &= ~IRQ_TO_ISA;       /* IRQ to ISA off (undoc) */
2199
2200        pci_write_config_word(pci, ESM_CONFIG_B, w);
2201
2202        /* DDMA off */
2203
2204        pci_read_config_word(pci, ESM_DDMA, &w);
2205        w &= ~(1 << 0);
2206        pci_write_config_word(pci, ESM_DDMA, w);
2207
2208        /*
2209         *      Legacy mode
2210         */
2211
2212        pci_read_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, &w);
2213
2214        w |= ESS_DISABLE_AUDIO; /* Disable Legacy Audio */
2215        w &= ~ESS_ENABLE_SERIAL_IRQ;    /* Disable SIRQ */
2216        w &= ~(0x1f);           /* disable mpu irq/io, game port, fm, SB */
2217
2218        pci_write_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, w);
2219
2220        /* Set up 978 docking control chip. */
2221        pci_read_config_word(pci, 0x58, &w);
2222        w|=1<<2;        /* Enable 978. */
2223        w|=1<<3;        /* Turn on 978 hardware volume control. */
2224        w&=~(1<<11);    /* Turn on 978 mixer volume control. */
2225        pci_write_config_word(pci, 0x58, w);
2226        
2227        /* Sound Reset */
2228
2229        snd_es1968_reset(chip);
2230
2231        /*
2232         *      Ring Bus Setup
2233         */
2234
2235        /* setup usual 0x34 stuff.. 0x36 may be chip specific */
2236        outw(0xC090, iobase + ESM_RING_BUS_DEST); /* direct sound, stereo */
2237        udelay(20);
2238        outw(0x3000, iobase + ESM_RING_BUS_CONTR_A); /* enable ringbus/serial */
2239        udelay(20);
2240
2241        /*
2242         *      Reset the CODEC
2243         */
2244         
2245        snd_es1968_ac97_reset(chip);
2246
2247        /* Ring Bus Control B */
2248
2249        n = inl(iobase + ESM_RING_BUS_CONTR_B);
2250        n &= ~RINGB_EN_SPDIF;   /* SPDIF off */
2251        //w |= RINGB_EN_2CODEC; /* enable 2nd codec */
2252        outl(n, iobase + ESM_RING_BUS_CONTR_B);
2253
2254        /* Set hardware volume control registers to midpoints.
2255           We can tell which button was pushed based on how they change. */
2256        outb(0x88, iobase+0x1c);
2257        outb(0x88, iobase+0x1d);
2258        outb(0x88, iobase+0x1e);
2259        outb(0x88, iobase+0x1f);
2260
2261        /* it appears some maestros (dell 7500) only work if these are set,
2262           regardless of wether we use the assp or not. */
2263
2264        outb(0, iobase + ASSP_CONTROL_B);
2265        outb(3, iobase + ASSP_CONTROL_A);       /* M: Reserved bits... */
2266        outb(0, iobase + ASSP_CONTROL_C);       /* M: Disable ASSP, ASSP IRQ's and FM Port */
2267
2268        /*
2269         * set up wavecache
2270         */
2271        for (i = 0; i < 16; i++) {
2272                /* Write 0 into the buffer area 0x1E0->1EF */
2273                outw(0x01E0 + i, iobase + WC_INDEX);
2274                outw(0x0000, iobase + WC_DATA);
2275
2276                /* The 1.10 test program seem to write 0 into the buffer area
2277                 * 0x1D0-0x1DF too.*/
2278                outw(0x01D0 + i, iobase + WC_INDEX);
2279                outw(0x0000, iobase + WC_DATA);
2280        }
2281        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2282                          (wave_get_register(chip, IDR7_WAVE_ROMRAM) & 0xFF00));
2283        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2284                          wave_get_register(chip, IDR7_WAVE_ROMRAM) | 0x100);
2285        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2286                          wave_get_register(chip, IDR7_WAVE_ROMRAM) & ~0x200);
2287        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2288                          wave_get_register(chip, IDR7_WAVE_ROMRAM) | ~0x400);
2289
2290
2291        maestro_write(chip, IDR2_CRAM_DATA, 0x0000);
2292        /* Now back to the DirectSound stuff */
2293        /* audio serial configuration.. ? */
2294        maestro_write(chip, 0x08, 0xB004);
2295        maestro_write(chip, 0x09, 0x001B);
2296        maestro_write(chip, 0x0A, 0x8000);
2297        maestro_write(chip, 0x0B, 0x3F37);
2298        maestro_write(chip, 0x0C, 0x0098);
2299
2300        /* parallel in, has something to do with recording :) */
2301        maestro_write(chip, 0x0C,
2302                      (maestro_read(chip, 0x0C) & ~0xF000) | 0x8000);
2303        /* parallel out */
2304        maestro_write(chip, 0x0C,
2305                      (maestro_read(chip, 0x0C) & ~0x0F00) | 0x0500);
2306
2307        maestro_write(chip, 0x0D, 0x7632);
2308
2309        /* Wave cache control on - test off, sg off, 
2310           enable, enable extra chans 1Mb */
2311
2312        w = inw(iobase + WC_CONTROL);
2313
2314        w &= ~0xFA00;           /* Seems to be reserved? I don't know */
2315        w |= 0xA000;            /* reserved... I don't know */
2316        w &= ~0x0200;           /* Channels 56,57,58,59 as Extra Play,Rec Channel enable
2317                                   Seems to crash the Computer if enabled... */
2318        w |= 0x0100;            /* Wave Cache Operation Enabled */
2319        w |= 0x0080;            /* Channels 60/61 as Placback/Record enabled */
2320        w &= ~0x0060;           /* Clear Wavtable Size */
2321        w |= 0x0020;            /* Wavetable Size : 1MB */
2322        /* Bit 4 is reserved */
2323        w &= ~0x000C;           /* DMA Stuff? I don't understand what the datasheet means */
2324        /* Bit 1 is reserved */
2325        w &= ~0x0001;           /* Test Mode off */
2326
2327        outw(w, iobase + WC_CONTROL);
2328
2329        /* Now clear the APU control ram */
2330        for (i = 0; i < NR_APUS; i++) {
2331                for (w = 0; w < NR_APU_REGS; w++)
2332                        apu_set_register(chip, i, w, 0);
2333
2334        }
2335}
2336
2337/* Enable IRQ's */
2338static void snd_es1968_start_irq(struct es1968 *chip)
2339{
2340        unsigned short w;
2341        w = ESM_HIRQ_DSIE | ESM_HIRQ_HW_VOLUME;
2342        if (chip->rmidi)
2343                w |= ESM_HIRQ_MPU401;
2344        outw(w, chip->io_port + ESM_PORT_HOST_IRQ);
2345}
2346
2347#ifdef CONFIG_PM
2348/*
2349 * PM support
2350 */
2351static int es1968_suspend(struct pci_dev *pci, pm_message_t state)
2352{
2353        struct snd_card *card = pci_get_drvdata(pci);
2354        struct es1968 *chip = card->private_data;
2355
2356        if (! chip->do_pm)
2357                return 0;
2358
2359        chip->in_suspend = 1;
2360        snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2361        snd_pcm_suspend_all(chip->pcm);
2362        snd_ac97_suspend(chip->ac97);
2363        snd_es1968_bob_stop(chip);
2364
2365        pci_disable_device(pci);
2366        pci_save_state(pci);
2367        pci_set_power_state(pci, pci_choose_state(pci, state));
2368        return 0;
2369}
2370
2371static int es1968_resume(struct pci_dev *pci)
2372{
2373        struct snd_card *card = pci_get_drvdata(pci);
2374        struct es1968 *chip = card->private_data;
2375        struct esschan *es;
2376
2377        if (! chip->do_pm)
2378                return 0;
2379
2380        /* restore all our config */
2381        pci_set_power_state(pci, PCI_D0);
2382        pci_restore_state(pci);
2383        if (pci_enable_device(pci) < 0) {
2384                printk(KERN_ERR "es1968: pci_enable_device failed, "
2385                       "disabling device\n");
2386                snd_card_disconnect(card);
2387                return -EIO;
2388        }
2389        pci_set_master(pci);
2390
2391        snd_es1968_chip_init(chip);
2392
2393        /* need to restore the base pointers.. */ 
2394        if (chip->dma.addr) {
2395                /* set PCMBAR */
2396                wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);
2397        }
2398
2399        snd_es1968_start_irq(chip);
2400
2401        /* restore ac97 state */
2402        snd_ac97_resume(chip->ac97);
2403
2404        list_for_each_entry(es, &chip->substream_list, list) {
2405                switch (es->mode) {
2406                case ESM_MODE_PLAY:
2407                        snd_es1968_playback_setup(chip, es, es->substream->runtime);
2408                        break;
2409                case ESM_MODE_CAPTURE:
2410                        snd_es1968_capture_setup(chip, es, es->substream->runtime);
2411                        break;
2412                }
2413        }
2414
2415        /* start timer again */
2416        if (chip->bobclient)
2417                snd_es1968_bob_start(chip);
2418
2419        snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2420        chip->in_suspend = 0;
2421        return 0;
2422}
2423#endif /* CONFIG_PM */
2424
2425#ifdef SUPPORT_JOYSTICK
2426#define JOYSTICK_ADDR   0x200
2427static int __devinit snd_es1968_create_gameport(struct es1968 *chip, int dev)
2428{
2429        struct gameport *gp;
2430        struct resource *r;
2431        u16 val;
2432
2433        if (!joystick[dev])
2434                return -ENODEV;
2435
2436        r = request_region(JOYSTICK_ADDR, 8, "ES1968 gameport");
2437        if (!r)
2438                return -EBUSY;
2439
2440        chip->gameport = gp = gameport_allocate_port();
2441        if (!gp) {
2442                printk(KERN_ERR "es1968: cannot allocate memory for gameport\n");
2443                release_and_free_resource(r);
2444                return -ENOMEM;
2445        }
2446
2447        pci_read_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, &val);
2448        pci_write_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, val | 0x04);
2449
2450        gameport_set_name(gp, "ES1968 Gameport");
2451        gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
2452        gameport_set_dev_parent(gp, &chip->pci->dev);
2453        gp->io = JOYSTICK_ADDR;
2454        gameport_set_port_data(gp, r);
2455
2456        gameport_register_port(gp);
2457
2458        return 0;
2459}
2460
2461static void snd_es1968_free_gameport(struct es1968 *chip)
2462{
2463        if (chip->gameport) {
2464                struct resource *r = gameport_get_port_data(chip->gameport);
2465
2466                gameport_unregister_port(chip->gameport);
2467                chip->gameport = NULL;
2468
2469                release_and_free_resource(r);
2470        }
2471}
2472#else
2473static inline int snd_es1968_create_gameport(struct es1968 *chip, int dev) { return -ENOSYS; }
2474static inline void snd_es1968_free_gameport(struct es1968 *chip) { }
2475#endif
2476
2477static int snd_es1968_free(struct es1968 *chip)
2478{
2479        if (chip->io_port) {
2480                if (chip->irq >= 0)
2481                        synchronize_irq(chip->irq);
2482                outw(1, chip->io_port + 0x04); /* clear WP interrupts */
2483                outw(0, chip->io_port + ESM_PORT_HOST_IRQ); /* disable IRQ */
2484        }
2485
2486        if (chip->irq >= 0)
2487                free_irq(chip->irq, chip);
2488        snd_es1968_free_gameport(chip);
2489        chip->master_switch = NULL;
2490        chip->master_volume = NULL;
2491        pci_release_regions(chip->pci);
2492        pci_disable_device(chip->pci);
2493        kfree(chip);
2494        return 0;
2495}
2496
2497static int snd_es1968_dev_free(struct snd_device *device)
2498{
2499        struct es1968 *chip = device->device_data;
2500        return snd_es1968_free(chip);
2501}
2502
2503struct ess_device_list {
2504        unsigned short type;    /* chip type */
2505        unsigned short vendor;  /* subsystem vendor id */
2506};
2507
2508static struct ess_device_list pm_whitelist[] __devinitdata = {
2509        { TYPE_MAESTRO2E, 0x0e11 },     /* Compaq Armada */
2510        { TYPE_MAESTRO2E, 0x1028 },
2511        { TYPE_MAESTRO2E, 0x103c },
2512        { TYPE_MAESTRO2E, 0x1179 },
2513        { TYPE_MAESTRO2E, 0x14c0 },     /* HP omnibook 4150 */
2514        { TYPE_MAESTRO2E, 0x1558 },
2515};
2516
2517static struct ess_device_list mpu_blacklist[] __devinitdata = {
2518        { TYPE_MAESTRO2, 0x125d },
2519};
2520
2521static int __devinit snd_es1968_create(struct snd_card *card,
2522                                       struct pci_dev *pci,
2523                                       int total_bufsize,
2524                                       int play_streams,
2525                                       int capt_streams,
2526                                       int chip_type,
2527                                       int do_pm,
2528                                       struct es1968 **chip_ret)
2529{
2530        static struct snd_device_ops ops = {
2531                .dev_free =     snd_es1968_dev_free,
2532        };
2533        struct es1968 *chip;
2534        int i, err;
2535
2536        *chip_ret = NULL;
2537
2538        /* enable PCI device */
2539        if ((err = pci_enable_device(pci)) < 0)
2540                return err;
2541        /* check, if we can restrict PCI DMA transfers to 28 bits */
2542        if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
2543            pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
2544                snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
2545                pci_disable_device(pci);
2546                return -ENXIO;
2547        }
2548
2549        chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2550        if (! chip) {
2551                pci_disable_device(pci);
2552                return -ENOMEM;
2553        }
2554
2555        /* Set Vars */
2556        chip->type = chip_type;
2557        spin_lock_init(&chip->reg_lock);
2558        spin_lock_init(&chip->substream_lock);
2559        INIT_LIST_HEAD(&chip->buf_list);
2560        INIT_LIST_HEAD(&chip->substream_list);
2561        spin_lock_init(&chip->ac97_lock);
2562        mutex_init(&chip->memory_mutex);
2563        tasklet_init(&chip->hwvol_tq, es1968_update_hw_volume, (unsigned long)chip);
2564        chip->card = card;
2565        chip->pci = pci;
2566        chip->irq = -1;
2567        chip->total_bufsize = total_bufsize;    /* in bytes */
2568        chip->playback_streams = play_streams;
2569        chip->capture_streams = capt_streams;
2570
2571        if ((err = pci_request_regions(pci, "ESS Maestro")) < 0) {
2572                kfree(chip);
2573                pci_disable_device(pci);
2574                return err;
2575        }
2576        chip->io_port = pci_resource_start(pci, 0);
2577        if (request_irq(pci->irq, snd_es1968_interrupt, IRQF_SHARED,
2578                        "ESS Maestro", chip)) {
2579                snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2580                snd_es1968_free(chip);
2581                return -EBUSY;
2582        }
2583        chip->irq = pci->irq;
2584                
2585        /* Clear Maestro_map */
2586        for (i = 0; i < 32; i++)
2587                chip->maestro_map[i] = 0;
2588
2589        /* Clear Apu Map */
2590        for (i = 0; i < NR_APUS; i++)
2591                chip->apu[i] = ESM_APU_FREE;
2592
2593        /* just to be sure */
2594        pci_set_master(pci);
2595
2596        if (do_pm > 1) {
2597                /* disable power-management if not on the whitelist */
2598                unsigned short vend;
2599                pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2600                for (i = 0; i < (int)ARRAY_SIZE(pm_whitelist); i++) {
2601                        if (chip->type == pm_whitelist[i].type &&
2602                            vend == pm_whitelist[i].vendor) {
2603                                do_pm = 1;
2604                                break;
2605                        }
2606                }
2607                if (do_pm > 1) {
2608                        /* not matched; disabling pm */
2609                        printk(KERN_INFO "es1968: not attempting power management.\n");
2610                        do_pm = 0;
2611                }
2612        }
2613        chip->do_pm = do_pm;
2614
2615        snd_es1968_chip_init(chip);
2616
2617        if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2618                snd_es1968_free(chip);
2619                return err;
2620        }
2621
2622        snd_card_set_dev(card, &pci->dev);
2623
2624        *chip_ret = chip;
2625
2626        return 0;
2627}
2628
2629
2630/*
2631 */
2632static int __devinit snd_es1968_probe(struct pci_dev *pci,
2633                                      const struct pci_device_id *pci_id)
2634{
2635        static int dev;
2636        struct snd_card *card;
2637        struct es1968 *chip;
2638        unsigned int i;
2639        int err;
2640
2641        if (dev >= SNDRV_CARDS)
2642                return -ENODEV;
2643        if (!enable[dev]) {
2644                dev++;
2645                return -ENOENT;
2646        }
2647
2648        card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2649        if (!card)
2650                return -ENOMEM;
2651                
2652        if (total_bufsize[dev] < 128)
2653                total_bufsize[dev] = 128;
2654        if (total_bufsize[dev] > 4096)
2655                total_bufsize[dev] = 4096;
2656        if ((err = snd_es1968_create(card, pci,
2657                                     total_bufsize[dev] * 1024, /* in bytes */
2658                                     pcm_substreams_p[dev], 
2659                                     pcm_substreams_c[dev],
2660                                     pci_id->driver_data,
2661                                     use_pm[dev],
2662                                     &chip)) < 0) {
2663                snd_card_free(card);
2664                return err;
2665        }
2666        card->private_data = chip;
2667
2668        switch (chip->type) {
2669        case TYPE_MAESTRO2E:
2670                strcpy(card->driver, "ES1978");
2671                strcpy(card->shortname, "ESS ES1978 (Maestro 2E)");
2672                break;
2673        case TYPE_MAESTRO2:
2674                strcpy(card->driver, "ES1968");
2675                strcpy(card->shortname, "ESS ES1968 (Maestro 2)");
2676                break;
2677        case TYPE_MAESTRO:
2678                strcpy(card->driver, "ESM1");
2679                strcpy(card->shortname, "ESS Maestro 1");
2680                break;
2681        }
2682
2683        if ((err = snd_es1968_pcm(chip, 0)) < 0) {
2684                snd_card_free(card);
2685                return err;
2686        }
2687
2688        if ((err = snd_es1968_mixer(chip)) < 0) {
2689                snd_card_free(card);
2690                return err;
2691        }
2692
2693        if (enable_mpu[dev] == 2) {
2694                /* check the black list */
2695                unsigned short vend;
2696                pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2697                for (i = 0; i < ARRAY_SIZE(mpu_blacklist); i++) {
2698                        if (chip->type == mpu_blacklist[i].type &&
2699                            vend == mpu_blacklist[i].vendor) {
2700                                enable_mpu[dev] = 0;
2701                                break;
2702                        }
2703                }
2704        }
2705        if (enable_mpu[dev]) {
2706                if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
2707                                               chip->io_port + ESM_MPU401_PORT,
2708                                               MPU401_INFO_INTEGRATED,
2709                                               chip->irq, 0, &chip->rmidi)) < 0) {
2710                        printk(KERN_WARNING "es1968: skipping MPU-401 MIDI support..\n");
2711                }
2712        }
2713
2714        snd_es1968_create_gameport(chip, dev);
2715
2716        snd_es1968_start_irq(chip);
2717
2718        chip->clock = clock[dev];
2719        if (! chip->clock)
2720                es1968_measure_clock(chip);
2721
2722        sprintf(card->longname, "%s at 0x%lx, irq %i",
2723                card->shortname, chip->io_port, chip->irq);
2724
2725        if ((err = snd_card_register(card)) < 0) {
2726                snd_card_free(card);
2727                return err;
2728        }
2729        pci_set_drvdata(pci, card);
2730        dev++;
2731        return 0;
2732}
2733
2734static void __devexit snd_es1968_remove(struct pci_dev *pci)
2735{
2736        snd_card_free(pci_get_drvdata(pci));
2737        pci_set_drvdata(pci, NULL);
2738}
2739
2740static struct pci_driver driver = {
2741        .name = "ES1968 (ESS Maestro)",
2742        .id_table = snd_es1968_ids,
2743        .probe = snd_es1968_probe,
2744        .remove = __devexit_p(snd_es1968_remove),
2745#ifdef CONFIG_PM
2746        .suspend = es1968_suspend,
2747        .resume = es1968_resume,
2748#endif
2749};
2750
2751static int __init alsa_card_es1968_init(void)
2752{
2753        return pci_register_driver(&driver);
2754}
2755
2756static void __exit alsa_card_es1968_exit(void)
2757{
2758        pci_unregister_driver(&driver);
2759}
2760
2761module_init(alsa_card_es1968_init)
2762module_exit(alsa_card_es1968_exit)
2763