linux/sound/oss/au1550_ac97.c
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   1/*
   2 * au1550_ac97.c  --  Sound driver for Alchemy Au1550 MIPS Internet Edge
   3 *                    Processor.
   4 *
   5 * Copyright 2004 Embedded Edge, LLC
   6 *      dan@embeddededge.com
   7 *
   8 * Mostly copied from the au1000.c driver and some from the
   9 * PowerMac dbdma driver.
  10 * We assume the processor can do memory coherent DMA.
  11 *
  12 * Ported to 2.6 by Matt Porter <mporter@kernel.crashing.org>
  13 *
  14 *  This program is free software; you can redistribute  it and/or modify it
  15 *  under  the terms of  the GNU General  Public License as published by the
  16 *  Free Software Foundation;  either version 2 of the  License, or (at your
  17 *  option) any later version.
  18 *
  19 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  20 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  21 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  22 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  23 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  24 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  25 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  27 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  28 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29 *
  30 *  You should have received a copy of the  GNU General Public License along
  31 *  with this program; if not, write  to the Free Software Foundation, Inc.,
  32 *  675 Mass Ave, Cambridge, MA 02139, USA.
  33 *
  34 */
  35
  36#undef DEBUG
  37
  38#include <linux/module.h>
  39#include <linux/string.h>
  40#include <linux/ioport.h>
  41#include <linux/sched.h>
  42#include <linux/delay.h>
  43#include <linux/sound.h>
  44#include <linux/slab.h>
  45#include <linux/soundcard.h>
  46#include <linux/init.h>
  47#include <linux/interrupt.h>
  48#include <linux/kernel.h>
  49#include <linux/poll.h>
  50#include <linux/bitops.h>
  51#include <linux/spinlock.h>
  52#include <linux/smp_lock.h>
  53#include <linux/ac97_codec.h>
  54#include <linux/mutex.h>
  55
  56#include <asm/io.h>
  57#include <asm/uaccess.h>
  58#include <asm/hardirq.h>
  59#include <asm/mach-au1x00/au1xxx_psc.h>
  60#include <asm/mach-au1x00/au1xxx_dbdma.h>
  61#include <asm/mach-au1x00/au1xxx.h>
  62
  63#undef OSS_DOCUMENTED_MIXER_SEMANTICS
  64
  65/* misc stuff */
  66#define POLL_COUNT   0x50000
  67#define AC97_EXT_DACS (AC97_EXTID_SDAC | AC97_EXTID_CDAC | AC97_EXTID_LDAC)
  68
  69/* The number of DBDMA ring descriptors to allocate.  No sense making
  70 * this too large....if you can't keep up with a few you aren't likely
  71 * to be able to with lots of them, either.
  72 */
  73#define NUM_DBDMA_DESCRIPTORS 4
  74
  75#define err(format, arg...) printk(KERN_ERR format "\n" , ## arg)
  76
  77/* Boot options
  78 * 0 = no VRA, 1 = use VRA if codec supports it
  79 */
  80static int      vra = 1;
  81module_param(vra, bool, 0);
  82MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
  83
  84static struct au1550_state {
  85        /* soundcore stuff */
  86        int             dev_audio;
  87
  88        struct ac97_codec *codec;
  89        unsigned        codec_base_caps; /* AC'97 reg 00h, "Reset Register" */
  90        unsigned        codec_ext_caps;  /* AC'97 reg 28h, "Extended Audio ID" */
  91        int             no_vra;         /* do not use VRA */
  92
  93        spinlock_t      lock;
  94        struct mutex open_mutex;
  95        struct mutex sem;
  96        fmode_t          open_mode;
  97        wait_queue_head_t open_wait;
  98
  99        struct dmabuf {
 100                u32             dmanr;
 101                unsigned        sample_rate;
 102                unsigned        src_factor;
 103                unsigned        sample_size;
 104                int             num_channels;
 105                int             dma_bytes_per_sample;
 106                int             user_bytes_per_sample;
 107                int             cnt_factor;
 108
 109                void            *rawbuf;
 110                unsigned        buforder;
 111                unsigned        numfrag;
 112                unsigned        fragshift;
 113                void            *nextIn;
 114                void            *nextOut;
 115                int             count;
 116                unsigned        total_bytes;
 117                unsigned        error;
 118                wait_queue_head_t wait;
 119
 120                /* redundant, but makes calculations easier */
 121                unsigned        fragsize;
 122                unsigned        dma_fragsize;
 123                unsigned        dmasize;
 124                unsigned        dma_qcount;
 125
 126                /* OSS stuff */
 127                unsigned        mapped:1;
 128                unsigned        ready:1;
 129                unsigned        stopped:1;
 130                unsigned        ossfragshift;
 131                int             ossmaxfrags;
 132                unsigned        subdivision;
 133        } dma_dac, dma_adc;
 134} au1550_state;
 135
 136static unsigned
 137ld2(unsigned int x)
 138{
 139        unsigned        r = 0;
 140
 141        if (x >= 0x10000) {
 142                x >>= 16;
 143                r += 16;
 144        }
 145        if (x >= 0x100) {
 146                x >>= 8;
 147                r += 8;
 148        }
 149        if (x >= 0x10) {
 150                x >>= 4;
 151                r += 4;
 152        }
 153        if (x >= 4) {
 154                x >>= 2;
 155                r += 2;
 156        }
 157        if (x >= 2)
 158                r++;
 159        return r;
 160}
 161
 162static void
 163au1550_delay(int msec)
 164{
 165        unsigned long   tmo;
 166        signed long     tmo2;
 167
 168        if (in_interrupt())
 169                return;
 170
 171        tmo = jiffies + (msec * HZ) / 1000;
 172        for (;;) {
 173                tmo2 = tmo - jiffies;
 174                if (tmo2 <= 0)
 175                        break;
 176                schedule_timeout(tmo2);
 177        }
 178}
 179
 180static u16
 181rdcodec(struct ac97_codec *codec, u8 addr)
 182{
 183        struct au1550_state *s = (struct au1550_state *)codec->private_data;
 184        unsigned long   flags;
 185        u32             cmd, val;
 186        u16             data;
 187        int             i;
 188
 189        spin_lock_irqsave(&s->lock, flags);
 190
 191        for (i = 0; i < POLL_COUNT; i++) {
 192                val = au_readl(PSC_AC97STAT);
 193                au_sync();
 194                if (!(val & PSC_AC97STAT_CP))
 195                        break;
 196        }
 197        if (i == POLL_COUNT)
 198                err("rdcodec: codec cmd pending expired!");
 199
 200        cmd = (u32)PSC_AC97CDC_INDX(addr);
 201        cmd |= PSC_AC97CDC_RD;  /* read command */
 202        au_writel(cmd, PSC_AC97CDC);
 203        au_sync();
 204
 205        /* now wait for the data
 206        */
 207        for (i = 0; i < POLL_COUNT; i++) {
 208                val = au_readl(PSC_AC97STAT);
 209                au_sync();
 210                if (!(val & PSC_AC97STAT_CP))
 211                        break;
 212        }
 213        if (i == POLL_COUNT) {
 214                err("rdcodec: read poll expired!");
 215                data = 0;
 216                goto out;
 217        }
 218
 219        /* wait for command done?
 220        */
 221        for (i = 0; i < POLL_COUNT; i++) {
 222                val = au_readl(PSC_AC97EVNT);
 223                au_sync();
 224                if (val & PSC_AC97EVNT_CD)
 225                        break;
 226        }
 227        if (i == POLL_COUNT) {
 228                err("rdcodec: read cmdwait expired!");
 229                data = 0;
 230                goto out;
 231        }
 232
 233        data = au_readl(PSC_AC97CDC) & 0xffff;
 234        au_sync();
 235
 236        /* Clear command done event.
 237        */
 238        au_writel(PSC_AC97EVNT_CD, PSC_AC97EVNT);
 239        au_sync();
 240
 241 out:
 242        spin_unlock_irqrestore(&s->lock, flags);
 243
 244        return data;
 245}
 246
 247
 248static void
 249wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
 250{
 251        struct au1550_state *s = (struct au1550_state *)codec->private_data;
 252        unsigned long   flags;
 253        u32             cmd, val;
 254        int             i;
 255
 256        spin_lock_irqsave(&s->lock, flags);
 257
 258        for (i = 0; i < POLL_COUNT; i++) {
 259                val = au_readl(PSC_AC97STAT);
 260                au_sync();
 261                if (!(val & PSC_AC97STAT_CP))
 262                        break;
 263        }
 264        if (i == POLL_COUNT)
 265                err("wrcodec: codec cmd pending expired!");
 266
 267        cmd = (u32)PSC_AC97CDC_INDX(addr);
 268        cmd |= (u32)data;
 269        au_writel(cmd, PSC_AC97CDC);
 270        au_sync();
 271
 272        for (i = 0; i < POLL_COUNT; i++) {
 273                val = au_readl(PSC_AC97STAT);
 274                au_sync();
 275                if (!(val & PSC_AC97STAT_CP))
 276                        break;
 277        }
 278        if (i == POLL_COUNT)
 279                err("wrcodec: codec cmd pending expired!");
 280
 281        for (i = 0; i < POLL_COUNT; i++) {
 282                val = au_readl(PSC_AC97EVNT);
 283                au_sync();
 284                if (val & PSC_AC97EVNT_CD)
 285                        break;
 286        }
 287        if (i == POLL_COUNT)
 288                err("wrcodec: read cmdwait expired!");
 289
 290        /* Clear command done event.
 291        */
 292        au_writel(PSC_AC97EVNT_CD, PSC_AC97EVNT);
 293        au_sync();
 294
 295        spin_unlock_irqrestore(&s->lock, flags);
 296}
 297
 298static void
 299waitcodec(struct ac97_codec *codec)
 300{
 301        u16     temp;
 302        u32     val;
 303        int     i;
 304
 305        /* codec_wait is used to wait for a ready state after
 306         * an AC97C_RESET.
 307         */
 308        au1550_delay(10);
 309
 310        /* first poll the CODEC_READY tag bit
 311        */
 312        for (i = 0; i < POLL_COUNT; i++) {
 313                val = au_readl(PSC_AC97STAT);
 314                au_sync();
 315                if (val & PSC_AC97STAT_CR)
 316                        break;
 317        }
 318        if (i == POLL_COUNT) {
 319                err("waitcodec: CODEC_READY poll expired!");
 320                return;
 321        }
 322
 323        /* get AC'97 powerdown control/status register
 324        */
 325        temp = rdcodec(codec, AC97_POWER_CONTROL);
 326
 327        /* If anything is powered down, power'em up
 328        */
 329        if (temp & 0x7f00) {
 330                /* Power on
 331                */
 332                wrcodec(codec, AC97_POWER_CONTROL, 0);
 333                au1550_delay(100);
 334
 335                /* Reread
 336                */
 337                temp = rdcodec(codec, AC97_POWER_CONTROL);
 338        }
 339
 340        /* Check if Codec REF,ANL,DAC,ADC ready
 341        */
 342        if ((temp & 0x7f0f) != 0x000f)
 343                err("codec reg 26 status (0x%x) not ready!!", temp);
 344}
 345
 346/* stop the ADC before calling */
 347static void
 348set_adc_rate(struct au1550_state *s, unsigned rate)
 349{
 350        struct dmabuf  *adc = &s->dma_adc;
 351        struct dmabuf  *dac = &s->dma_dac;
 352        unsigned        adc_rate, dac_rate;
 353        u16             ac97_extstat;
 354
 355        if (s->no_vra) {
 356                /* calc SRC factor
 357                */
 358                adc->src_factor = ((96000 / rate) + 1) >> 1;
 359                adc->sample_rate = 48000 / adc->src_factor;
 360                return;
 361        }
 362
 363        adc->src_factor = 1;
 364
 365        ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
 366
 367        rate = rate > 48000 ? 48000 : rate;
 368
 369        /* enable VRA
 370        */
 371        wrcodec(s->codec, AC97_EXTENDED_STATUS,
 372                ac97_extstat | AC97_EXTSTAT_VRA);
 373
 374        /* now write the sample rate
 375        */
 376        wrcodec(s->codec, AC97_PCM_LR_ADC_RATE, (u16) rate);
 377
 378        /* read it back for actual supported rate
 379        */
 380        adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE);
 381
 382        pr_debug("set_adc_rate: set to %d Hz\n", adc_rate);
 383
 384        /* some codec's don't allow unequal DAC and ADC rates, in which case
 385         * writing one rate reg actually changes both.
 386         */
 387        dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
 388        if (dac->num_channels > 2)
 389                wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, dac_rate);
 390        if (dac->num_channels > 4)
 391                wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, dac_rate);
 392
 393        adc->sample_rate = adc_rate;
 394        dac->sample_rate = dac_rate;
 395}
 396
 397/* stop the DAC before calling */
 398static void
 399set_dac_rate(struct au1550_state *s, unsigned rate)
 400{
 401        struct dmabuf  *dac = &s->dma_dac;
 402        struct dmabuf  *adc = &s->dma_adc;
 403        unsigned        adc_rate, dac_rate;
 404        u16             ac97_extstat;
 405
 406        if (s->no_vra) {
 407                /* calc SRC factor
 408                */
 409                dac->src_factor = ((96000 / rate) + 1) >> 1;
 410                dac->sample_rate = 48000 / dac->src_factor;
 411                return;
 412        }
 413
 414        dac->src_factor = 1;
 415
 416        ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
 417
 418        rate = rate > 48000 ? 48000 : rate;
 419
 420        /* enable VRA
 421        */
 422        wrcodec(s->codec, AC97_EXTENDED_STATUS,
 423                ac97_extstat | AC97_EXTSTAT_VRA);
 424
 425        /* now write the sample rate
 426        */
 427        wrcodec(s->codec, AC97_PCM_FRONT_DAC_RATE, (u16) rate);
 428
 429        /* I don't support different sample rates for multichannel,
 430         * so make these channels the same.
 431         */
 432        if (dac->num_channels > 2)
 433                wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, (u16) rate);
 434        if (dac->num_channels > 4)
 435                wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, (u16) rate);
 436        /* read it back for actual supported rate
 437        */
 438        dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
 439
 440        pr_debug("set_dac_rate: set to %d Hz\n", dac_rate);
 441
 442        /* some codec's don't allow unequal DAC and ADC rates, in which case
 443         * writing one rate reg actually changes both.
 444         */
 445        adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE);
 446
 447        dac->sample_rate = dac_rate;
 448        adc->sample_rate = adc_rate;
 449}
 450
 451static void
 452stop_dac(struct au1550_state *s)
 453{
 454        struct dmabuf  *db = &s->dma_dac;
 455        u32             stat;
 456        unsigned long   flags;
 457
 458        if (db->stopped)
 459                return;
 460
 461        spin_lock_irqsave(&s->lock, flags);
 462
 463        au_writel(PSC_AC97PCR_TP, PSC_AC97PCR);
 464        au_sync();
 465
 466        /* Wait for Transmit Busy to show disabled.
 467        */
 468        do {
 469                stat = au_readl(PSC_AC97STAT);
 470                au_sync();
 471        } while ((stat & PSC_AC97STAT_TB) != 0);
 472
 473        au1xxx_dbdma_reset(db->dmanr);
 474
 475        db->stopped = 1;
 476
 477        spin_unlock_irqrestore(&s->lock, flags);
 478}
 479
 480static void
 481stop_adc(struct au1550_state *s)
 482{
 483        struct dmabuf  *db = &s->dma_adc;
 484        unsigned long   flags;
 485        u32             stat;
 486
 487        if (db->stopped)
 488                return;
 489
 490        spin_lock_irqsave(&s->lock, flags);
 491
 492        au_writel(PSC_AC97PCR_RP, PSC_AC97PCR);
 493        au_sync();
 494
 495        /* Wait for Receive Busy to show disabled.
 496        */
 497        do {
 498                stat = au_readl(PSC_AC97STAT);
 499                au_sync();
 500        } while ((stat & PSC_AC97STAT_RB) != 0);
 501
 502        au1xxx_dbdma_reset(db->dmanr);
 503
 504        db->stopped = 1;
 505
 506        spin_unlock_irqrestore(&s->lock, flags);
 507}
 508
 509
 510static void
 511set_xmit_slots(int num_channels)
 512{
 513        u32     ac97_config, stat;
 514
 515        ac97_config = au_readl(PSC_AC97CFG);
 516        au_sync();
 517        ac97_config &= ~(PSC_AC97CFG_TXSLOT_MASK | PSC_AC97CFG_DE_ENABLE);
 518        au_writel(ac97_config, PSC_AC97CFG);
 519        au_sync();
 520
 521        switch (num_channels) {
 522        case 6:         /* stereo with surround and center/LFE,
 523                         * slots 3,4,6,7,8,9
 524                         */
 525                ac97_config |= PSC_AC97CFG_TXSLOT_ENA(6);
 526                ac97_config |= PSC_AC97CFG_TXSLOT_ENA(9);
 527
 528        case 4:         /* stereo with surround, slots 3,4,7,8 */
 529                ac97_config |= PSC_AC97CFG_TXSLOT_ENA(7);
 530                ac97_config |= PSC_AC97CFG_TXSLOT_ENA(8);
 531
 532        case 2:         /* stereo, slots 3,4 */
 533        case 1:         /* mono */
 534                ac97_config |= PSC_AC97CFG_TXSLOT_ENA(3);
 535                ac97_config |= PSC_AC97CFG_TXSLOT_ENA(4);
 536        }
 537
 538        au_writel(ac97_config, PSC_AC97CFG);
 539        au_sync();
 540
 541        ac97_config |= PSC_AC97CFG_DE_ENABLE;
 542        au_writel(ac97_config, PSC_AC97CFG);
 543        au_sync();
 544
 545        /* Wait for Device ready.
 546        */
 547        do {
 548                stat = au_readl(PSC_AC97STAT);
 549                au_sync();
 550        } while ((stat & PSC_AC97STAT_DR) == 0);
 551}
 552
 553static void
 554set_recv_slots(int num_channels)
 555{
 556        u32     ac97_config, stat;
 557
 558        ac97_config = au_readl(PSC_AC97CFG);
 559        au_sync();
 560        ac97_config &= ~(PSC_AC97CFG_RXSLOT_MASK | PSC_AC97CFG_DE_ENABLE);
 561        au_writel(ac97_config, PSC_AC97CFG);
 562        au_sync();
 563
 564        /* Always enable slots 3 and 4 (stereo). Slot 6 is
 565         * optional Mic ADC, which we don't support yet.
 566         */
 567        ac97_config |= PSC_AC97CFG_RXSLOT_ENA(3);
 568        ac97_config |= PSC_AC97CFG_RXSLOT_ENA(4);
 569
 570        au_writel(ac97_config, PSC_AC97CFG);
 571        au_sync();
 572
 573        ac97_config |= PSC_AC97CFG_DE_ENABLE;
 574        au_writel(ac97_config, PSC_AC97CFG);
 575        au_sync();
 576
 577        /* Wait for Device ready.
 578        */
 579        do {
 580                stat = au_readl(PSC_AC97STAT);
 581                au_sync();
 582        } while ((stat & PSC_AC97STAT_DR) == 0);
 583}
 584
 585/* Hold spinlock for both start_dac() and start_adc() calls */
 586static void
 587start_dac(struct au1550_state *s)
 588{
 589        struct dmabuf  *db = &s->dma_dac;
 590
 591        if (!db->stopped)
 592                return;
 593
 594        set_xmit_slots(db->num_channels);
 595        au_writel(PSC_AC97PCR_TC, PSC_AC97PCR);
 596        au_sync();
 597        au_writel(PSC_AC97PCR_TS, PSC_AC97PCR);
 598        au_sync();
 599
 600        au1xxx_dbdma_start(db->dmanr);
 601
 602        db->stopped = 0;
 603}
 604
 605static void
 606start_adc(struct au1550_state *s)
 607{
 608        struct dmabuf  *db = &s->dma_adc;
 609        int     i;
 610
 611        if (!db->stopped)
 612                return;
 613
 614        /* Put two buffers on the ring to get things started.
 615        */
 616        for (i=0; i<2; i++) {
 617                au1xxx_dbdma_put_dest(db->dmanr, db->nextIn, db->dma_fragsize);
 618
 619                db->nextIn += db->dma_fragsize;
 620                if (db->nextIn >= db->rawbuf + db->dmasize)
 621                        db->nextIn -= db->dmasize;
 622        }
 623
 624        set_recv_slots(db->num_channels);
 625        au1xxx_dbdma_start(db->dmanr);
 626        au_writel(PSC_AC97PCR_RC, PSC_AC97PCR);
 627        au_sync();
 628        au_writel(PSC_AC97PCR_RS, PSC_AC97PCR);
 629        au_sync();
 630
 631        db->stopped = 0;
 632}
 633
 634static int
 635prog_dmabuf(struct au1550_state *s, struct dmabuf *db)
 636{
 637        unsigned user_bytes_per_sec;
 638        unsigned        bufs;
 639        unsigned        rate = db->sample_rate;
 640
 641        if (!db->rawbuf) {
 642                db->ready = db->mapped = 0;
 643                db->buforder = 5;       /* 32 * PAGE_SIZE */
 644                db->rawbuf = kmalloc((PAGE_SIZE << db->buforder), GFP_KERNEL);
 645                if (!db->rawbuf)
 646                        return -ENOMEM;
 647        }
 648
 649        db->cnt_factor = 1;
 650        if (db->sample_size == 8)
 651                db->cnt_factor *= 2;
 652        if (db->num_channels == 1)
 653                db->cnt_factor *= 2;
 654        db->cnt_factor *= db->src_factor;
 655
 656        db->count = 0;
 657        db->dma_qcount = 0;
 658        db->nextIn = db->nextOut = db->rawbuf;
 659
 660        db->user_bytes_per_sample = (db->sample_size>>3) * db->num_channels;
 661        db->dma_bytes_per_sample = 2 * ((db->num_channels == 1) ?
 662                                        2 : db->num_channels);
 663
 664        user_bytes_per_sec = rate * db->user_bytes_per_sample;
 665        bufs = PAGE_SIZE << db->buforder;
 666        if (db->ossfragshift) {
 667                if ((1000 << db->ossfragshift) < user_bytes_per_sec)
 668                        db->fragshift = ld2(user_bytes_per_sec/1000);
 669                else
 670                        db->fragshift = db->ossfragshift;
 671        } else {
 672                db->fragshift = ld2(user_bytes_per_sec / 100 /
 673                                    (db->subdivision ? db->subdivision : 1));
 674                if (db->fragshift < 3)
 675                        db->fragshift = 3;
 676        }
 677
 678        db->fragsize = 1 << db->fragshift;
 679        db->dma_fragsize = db->fragsize * db->cnt_factor;
 680        db->numfrag = bufs / db->dma_fragsize;
 681
 682        while (db->numfrag < 4 && db->fragshift > 3) {
 683                db->fragshift--;
 684                db->fragsize = 1 << db->fragshift;
 685                db->dma_fragsize = db->fragsize * db->cnt_factor;
 686                db->numfrag = bufs / db->dma_fragsize;
 687        }
 688
 689        if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 690                db->numfrag = db->ossmaxfrags;
 691
 692        db->dmasize = db->dma_fragsize * db->numfrag;
 693        memset(db->rawbuf, 0, bufs);
 694
 695        pr_debug("prog_dmabuf: rate=%d, samplesize=%d, channels=%d\n",
 696            rate, db->sample_size, db->num_channels);
 697        pr_debug("prog_dmabuf: fragsize=%d, cnt_factor=%d, dma_fragsize=%d\n",
 698            db->fragsize, db->cnt_factor, db->dma_fragsize);
 699        pr_debug("prog_dmabuf: numfrag=%d, dmasize=%d\n", db->numfrag, db->dmasize);
 700
 701        db->ready = 1;
 702        return 0;
 703}
 704
 705static int
 706prog_dmabuf_adc(struct au1550_state *s)
 707{
 708        stop_adc(s);
 709        return prog_dmabuf(s, &s->dma_adc);
 710
 711}
 712
 713static int
 714prog_dmabuf_dac(struct au1550_state *s)
 715{
 716        stop_dac(s);
 717        return prog_dmabuf(s, &s->dma_dac);
 718}
 719
 720
 721static void dac_dma_interrupt(int irq, void *dev_id)
 722{
 723        struct au1550_state *s = (struct au1550_state *) dev_id;
 724        struct dmabuf  *db = &s->dma_dac;
 725        u32     ac97c_stat;
 726
 727        spin_lock(&s->lock);
 728
 729        ac97c_stat = au_readl(PSC_AC97STAT);
 730        if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE))
 731                pr_debug("AC97C status = 0x%08x\n", ac97c_stat);
 732        db->dma_qcount--;
 733
 734        if (db->count >= db->fragsize) {
 735                if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
 736                                                        db->fragsize) == 0) {
 737                        err("qcount < 2 and no ring room!");
 738                }
 739                db->nextOut += db->fragsize;
 740                if (db->nextOut >= db->rawbuf + db->dmasize)
 741                        db->nextOut -= db->dmasize;
 742                db->count -= db->fragsize;
 743                db->total_bytes += db->dma_fragsize;
 744                db->dma_qcount++;
 745        }
 746
 747        /* wake up anybody listening */
 748        if (waitqueue_active(&db->wait))
 749                wake_up(&db->wait);
 750
 751        spin_unlock(&s->lock);
 752}
 753
 754
 755static void adc_dma_interrupt(int irq, void *dev_id)
 756{
 757        struct  au1550_state *s = (struct au1550_state *)dev_id;
 758        struct  dmabuf  *dp = &s->dma_adc;
 759        u32     obytes;
 760        char    *obuf;
 761
 762        spin_lock(&s->lock);
 763
 764        /* Pull the buffer from the dma queue.
 765        */
 766        au1xxx_dbdma_get_dest(dp->dmanr, (void *)(&obuf), &obytes);
 767
 768        if ((dp->count + obytes) > dp->dmasize) {
 769                /* Overrun. Stop ADC and log the error
 770                */
 771                spin_unlock(&s->lock);
 772                stop_adc(s);
 773                dp->error++;
 774                err("adc overrun");
 775                return;
 776        }
 777
 778        /* Put a new empty buffer on the destination DMA.
 779        */
 780        au1xxx_dbdma_put_dest(dp->dmanr, dp->nextIn, dp->dma_fragsize);
 781
 782        dp->nextIn += dp->dma_fragsize;
 783        if (dp->nextIn >= dp->rawbuf + dp->dmasize)
 784                dp->nextIn -= dp->dmasize;
 785
 786        dp->count += obytes;
 787        dp->total_bytes += obytes;
 788
 789        /* wake up anybody listening
 790        */
 791        if (waitqueue_active(&dp->wait))
 792                wake_up(&dp->wait);
 793
 794        spin_unlock(&s->lock);
 795}
 796
 797static loff_t
 798au1550_llseek(struct file *file, loff_t offset, int origin)
 799{
 800        return -ESPIPE;
 801}
 802
 803
 804static int
 805au1550_open_mixdev(struct inode *inode, struct file *file)
 806{
 807        file->private_data = &au1550_state;
 808        return 0;
 809}
 810
 811static int
 812au1550_release_mixdev(struct inode *inode, struct file *file)
 813{
 814        return 0;
 815}
 816
 817static int
 818mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
 819                        unsigned long arg)
 820{
 821        return codec->mixer_ioctl(codec, cmd, arg);
 822}
 823
 824static int
 825au1550_ioctl_mixdev(struct inode *inode, struct file *file,
 826                               unsigned int cmd, unsigned long arg)
 827{
 828        struct au1550_state *s = (struct au1550_state *)file->private_data;
 829        struct ac97_codec *codec = s->codec;
 830
 831        return mixdev_ioctl(codec, cmd, arg);
 832}
 833
 834static /*const */ struct file_operations au1550_mixer_fops = {
 835        owner:THIS_MODULE,
 836        llseek:au1550_llseek,
 837        ioctl:au1550_ioctl_mixdev,
 838        open:au1550_open_mixdev,
 839        release:au1550_release_mixdev,
 840};
 841
 842static int
 843drain_dac(struct au1550_state *s, int nonblock)
 844{
 845        unsigned long   flags;
 846        int             count, tmo;
 847
 848        if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped)
 849                return 0;
 850
 851        for (;;) {
 852                spin_lock_irqsave(&s->lock, flags);
 853                count = s->dma_dac.count;
 854                spin_unlock_irqrestore(&s->lock, flags);
 855                if (count <= s->dma_dac.fragsize)
 856                        break;
 857                if (signal_pending(current))
 858                        break;
 859                if (nonblock)
 860                        return -EBUSY;
 861                tmo = 1000 * count / (s->no_vra ?
 862                                      48000 : s->dma_dac.sample_rate);
 863                tmo /= s->dma_dac.dma_bytes_per_sample;
 864                au1550_delay(tmo);
 865        }
 866        if (signal_pending(current))
 867                return -ERESTARTSYS;
 868        return 0;
 869}
 870
 871static inline u8 S16_TO_U8(s16 ch)
 872{
 873        return (u8) (ch >> 8) + 0x80;
 874}
 875static inline s16 U8_TO_S16(u8 ch)
 876{
 877        return (s16) (ch - 0x80) << 8;
 878}
 879
 880/*
 881 * Translates user samples to dma buffer suitable for AC'97 DAC data:
 882 *     If mono, copy left channel to right channel in dma buffer.
 883 *     If 8 bit samples, cvt to 16-bit before writing to dma buffer.
 884 *     If interpolating (no VRA), duplicate every audio frame src_factor times.
 885 */
 886static int
 887translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf,
 888                                                               int dmacount)
 889{
 890        int             sample, i;
 891        int             interp_bytes_per_sample;
 892        int             num_samples;
 893        int             mono = (db->num_channels == 1);
 894        char            usersample[12];
 895        s16             ch, dmasample[6];
 896
 897        if (db->sample_size == 16 && !mono && db->src_factor == 1) {
 898                /* no translation necessary, just copy
 899                */
 900                if (copy_from_user(dmabuf, userbuf, dmacount))
 901                        return -EFAULT;
 902                return dmacount;
 903        }
 904
 905        interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
 906        num_samples = dmacount / interp_bytes_per_sample;
 907
 908        for (sample = 0; sample < num_samples; sample++) {
 909                if (copy_from_user(usersample, userbuf,
 910                                   db->user_bytes_per_sample)) {
 911                        return -EFAULT;
 912                }
 913
 914                for (i = 0; i < db->num_channels; i++) {
 915                        if (db->sample_size == 8)
 916                                ch = U8_TO_S16(usersample[i]);
 917                        else
 918                                ch = *((s16 *) (&usersample[i * 2]));
 919                        dmasample[i] = ch;
 920                        if (mono)
 921                                dmasample[i + 1] = ch;  /* right channel */
 922                }
 923
 924                /* duplicate every audio frame src_factor times
 925                */
 926                for (i = 0; i < db->src_factor; i++)
 927                        memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
 928
 929                userbuf += db->user_bytes_per_sample;
 930                dmabuf += interp_bytes_per_sample;
 931        }
 932
 933        return num_samples * interp_bytes_per_sample;
 934}
 935
 936/*
 937 * Translates AC'97 ADC samples to user buffer:
 938 *     If mono, send only left channel to user buffer.
 939 *     If 8 bit samples, cvt from 16 to 8 bit before writing to user buffer.
 940 *     If decimating (no VRA), skip over src_factor audio frames.
 941 */
 942static int
 943translate_to_user(struct dmabuf *db, char* userbuf, char* dmabuf,
 944                                                             int dmacount)
 945{
 946        int             sample, i;
 947        int             interp_bytes_per_sample;
 948        int             num_samples;
 949        int             mono = (db->num_channels == 1);
 950        char            usersample[12];
 951
 952        if (db->sample_size == 16 && !mono && db->src_factor == 1) {
 953                /* no translation necessary, just copy
 954                */
 955                if (copy_to_user(userbuf, dmabuf, dmacount))
 956                        return -EFAULT;
 957                return dmacount;
 958        }
 959
 960        interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
 961        num_samples = dmacount / interp_bytes_per_sample;
 962
 963        for (sample = 0; sample < num_samples; sample++) {
 964                for (i = 0; i < db->num_channels; i++) {
 965                        if (db->sample_size == 8)
 966                                usersample[i] =
 967                                        S16_TO_U8(*((s16 *) (&dmabuf[i * 2])));
 968                        else
 969                                *((s16 *) (&usersample[i * 2])) =
 970                                        *((s16 *) (&dmabuf[i * 2]));
 971                }
 972
 973                if (copy_to_user(userbuf, usersample,
 974                                 db->user_bytes_per_sample)) {
 975                        return -EFAULT;
 976                }
 977
 978                userbuf += db->user_bytes_per_sample;
 979                dmabuf += interp_bytes_per_sample;
 980        }
 981
 982        return num_samples * interp_bytes_per_sample;
 983}
 984
 985/*
 986 * Copy audio data to/from user buffer from/to dma buffer, taking care
 987 * that we wrap when reading/writing the dma buffer. Returns actual byte
 988 * count written to or read from the dma buffer.
 989 */
 990static int
 991copy_dmabuf_user(struct dmabuf *db, char* userbuf, int count, int to_user)
 992{
 993        char           *bufptr = to_user ? db->nextOut : db->nextIn;
 994        char           *bufend = db->rawbuf + db->dmasize;
 995        int             cnt, ret;
 996
 997        if (bufptr + count > bufend) {
 998                int             partial = (int) (bufend - bufptr);
 999                if (to_user) {
1000                        if ((cnt = translate_to_user(db, userbuf,
1001                                                     bufptr, partial)) < 0)
1002                                return cnt;
1003                        ret = cnt;
1004                        if ((cnt = translate_to_user(db, userbuf + partial,
1005                                                     db->rawbuf,
1006                                                     count - partial)) < 0)
1007                                return cnt;
1008                        ret += cnt;
1009                } else {
1010                        if ((cnt = translate_from_user(db, bufptr, userbuf,
1011                                                       partial)) < 0)
1012                                return cnt;
1013                        ret = cnt;
1014                        if ((cnt = translate_from_user(db, db->rawbuf,
1015                                                       userbuf + partial,
1016                                                       count - partial)) < 0)
1017                                return cnt;
1018                        ret += cnt;
1019                }
1020        } else {
1021                if (to_user)
1022                        ret = translate_to_user(db, userbuf, bufptr, count);
1023                else
1024                        ret = translate_from_user(db, bufptr, userbuf, count);
1025        }
1026
1027        return ret;
1028}
1029
1030
1031static ssize_t
1032au1550_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1033{
1034        struct au1550_state *s = (struct au1550_state *)file->private_data;
1035        struct dmabuf  *db = &s->dma_adc;
1036        DECLARE_WAITQUEUE(wait, current);
1037        ssize_t         ret;
1038        unsigned long   flags;
1039        int             cnt, usercnt, avail;
1040
1041        if (db->mapped)
1042                return -ENXIO;
1043        if (!access_ok(VERIFY_WRITE, buffer, count))
1044                return -EFAULT;
1045        ret = 0;
1046
1047        count *= db->cnt_factor;
1048
1049        mutex_lock(&s->sem);
1050        add_wait_queue(&db->wait, &wait);
1051
1052        while (count > 0) {
1053                /* wait for samples in ADC dma buffer
1054                */
1055                do {
1056                        spin_lock_irqsave(&s->lock, flags);
1057                        if (db->stopped)
1058                                start_adc(s);
1059                        avail = db->count;
1060                        if (avail <= 0)
1061                                __set_current_state(TASK_INTERRUPTIBLE);
1062                        spin_unlock_irqrestore(&s->lock, flags);
1063                        if (avail <= 0) {
1064                                if (file->f_flags & O_NONBLOCK) {
1065                                        if (!ret)
1066                                                ret = -EAGAIN;
1067                                        goto out;
1068                                }
1069                                mutex_unlock(&s->sem);
1070                                schedule();
1071                                if (signal_pending(current)) {
1072                                        if (!ret)
1073                                                ret = -ERESTARTSYS;
1074                                        goto out2;
1075                                }
1076                                mutex_lock(&s->sem);
1077                        }
1078                } while (avail <= 0);
1079
1080                /* copy from nextOut to user
1081                */
1082                if ((cnt = copy_dmabuf_user(db, buffer,
1083                                            count > avail ?
1084                                            avail : count, 1)) < 0) {
1085                        if (!ret)
1086                                ret = -EFAULT;
1087                        goto out;
1088                }
1089
1090                spin_lock_irqsave(&s->lock, flags);
1091                db->count -= cnt;
1092                db->nextOut += cnt;
1093                if (db->nextOut >= db->rawbuf + db->dmasize)
1094                        db->nextOut -= db->dmasize;
1095                spin_unlock_irqrestore(&s->lock, flags);
1096
1097                count -= cnt;
1098                usercnt = cnt / db->cnt_factor;
1099                buffer += usercnt;
1100                ret += usercnt;
1101        }                       /* while (count > 0) */
1102
1103out:
1104        mutex_unlock(&s->sem);
1105out2:
1106        remove_wait_queue(&db->wait, &wait);
1107        set_current_state(TASK_RUNNING);
1108        return ret;
1109}
1110
1111static ssize_t
1112au1550_write(struct file *file, const char *buffer, size_t count, loff_t * ppos)
1113{
1114        struct au1550_state *s = (struct au1550_state *)file->private_data;
1115        struct dmabuf  *db = &s->dma_dac;
1116        DECLARE_WAITQUEUE(wait, current);
1117        ssize_t         ret = 0;
1118        unsigned long   flags;
1119        int             cnt, usercnt, avail;
1120
1121        pr_debug("write: count=%d\n", count);
1122
1123        if (db->mapped)
1124                return -ENXIO;
1125        if (!access_ok(VERIFY_READ, buffer, count))
1126                return -EFAULT;
1127
1128        count *= db->cnt_factor;
1129
1130        mutex_lock(&s->sem);
1131        add_wait_queue(&db->wait, &wait);
1132
1133        while (count > 0) {
1134                /* wait for space in playback buffer
1135                */
1136                do {
1137                        spin_lock_irqsave(&s->lock, flags);
1138                        avail = (int) db->dmasize - db->count;
1139                        if (avail <= 0)
1140                                __set_current_state(TASK_INTERRUPTIBLE);
1141                        spin_unlock_irqrestore(&s->lock, flags);
1142                        if (avail <= 0) {
1143                                if (file->f_flags & O_NONBLOCK) {
1144                                        if (!ret)
1145                                                ret = -EAGAIN;
1146                                        goto out;
1147                                }
1148                                mutex_unlock(&s->sem);
1149                                schedule();
1150                                if (signal_pending(current)) {
1151                                        if (!ret)
1152                                                ret = -ERESTARTSYS;
1153                                        goto out2;
1154                                }
1155                                mutex_lock(&s->sem);
1156                        }
1157                } while (avail <= 0);
1158
1159                /* copy from user to nextIn
1160                */
1161                if ((cnt = copy_dmabuf_user(db, (char *) buffer,
1162                                            count > avail ?
1163                                            avail : count, 0)) < 0) {
1164                        if (!ret)
1165                                ret = -EFAULT;
1166                        goto out;
1167                }
1168
1169                spin_lock_irqsave(&s->lock, flags);
1170                db->count += cnt;
1171                db->nextIn += cnt;
1172                if (db->nextIn >= db->rawbuf + db->dmasize)
1173                        db->nextIn -= db->dmasize;
1174
1175                /* If the data is available, we want to keep two buffers
1176                 * on the dma queue.  If the queue count reaches zero,
1177                 * we know the dma has stopped.
1178                 */
1179                while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
1180                        if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
1181                                                        db->fragsize) == 0) {
1182                                err("qcount < 2 and no ring room!");
1183                        }
1184                        db->nextOut += db->fragsize;
1185                        if (db->nextOut >= db->rawbuf + db->dmasize)
1186                                db->nextOut -= db->dmasize;
1187                        db->total_bytes += db->dma_fragsize;
1188                        if (db->dma_qcount == 0)
1189                                start_dac(s);
1190                        db->dma_qcount++;
1191                }
1192                spin_unlock_irqrestore(&s->lock, flags);
1193
1194                count -= cnt;
1195                usercnt = cnt / db->cnt_factor;
1196                buffer += usercnt;
1197                ret += usercnt;
1198        }                       /* while (count > 0) */
1199
1200out:
1201        mutex_unlock(&s->sem);
1202out2:
1203        remove_wait_queue(&db->wait, &wait);
1204        set_current_state(TASK_RUNNING);
1205        return ret;
1206}
1207
1208
1209/* No kernel lock - we have our own spinlock */
1210static unsigned int
1211au1550_poll(struct file *file, struct poll_table_struct *wait)
1212{
1213        struct au1550_state *s = (struct au1550_state *)file->private_data;
1214        unsigned long   flags;
1215        unsigned int    mask = 0;
1216
1217        if (file->f_mode & FMODE_WRITE) {
1218                if (!s->dma_dac.ready)
1219                        return 0;
1220                poll_wait(file, &s->dma_dac.wait, wait);
1221        }
1222        if (file->f_mode & FMODE_READ) {
1223                if (!s->dma_adc.ready)
1224                        return 0;
1225                poll_wait(file, &s->dma_adc.wait, wait);
1226        }
1227
1228        spin_lock_irqsave(&s->lock, flags);
1229
1230        if (file->f_mode & FMODE_READ) {
1231                if (s->dma_adc.count >= (signed)s->dma_adc.dma_fragsize)
1232                        mask |= POLLIN | POLLRDNORM;
1233        }
1234        if (file->f_mode & FMODE_WRITE) {
1235                if (s->dma_dac.mapped) {
1236                        if (s->dma_dac.count >=
1237                            (signed)s->dma_dac.dma_fragsize)
1238                                mask |= POLLOUT | POLLWRNORM;
1239                } else {
1240                        if ((signed) s->dma_dac.dmasize >=
1241                            s->dma_dac.count + (signed)s->dma_dac.dma_fragsize)
1242                                mask |= POLLOUT | POLLWRNORM;
1243                }
1244        }
1245        spin_unlock_irqrestore(&s->lock, flags);
1246        return mask;
1247}
1248
1249static int
1250au1550_mmap(struct file *file, struct vm_area_struct *vma)
1251{
1252        struct au1550_state *s = (struct au1550_state *)file->private_data;
1253        struct dmabuf  *db;
1254        unsigned long   size;
1255        int ret = 0;
1256
1257        lock_kernel();
1258        mutex_lock(&s->sem);
1259        if (vma->vm_flags & VM_WRITE)
1260                db = &s->dma_dac;
1261        else if (vma->vm_flags & VM_READ)
1262                db = &s->dma_adc;
1263        else {
1264                ret = -EINVAL;
1265                goto out;
1266        }
1267        if (vma->vm_pgoff != 0) {
1268                ret = -EINVAL;
1269                goto out;
1270        }
1271        size = vma->vm_end - vma->vm_start;
1272        if (size > (PAGE_SIZE << db->buforder)) {
1273                ret = -EINVAL;
1274                goto out;
1275        }
1276        if (remap_pfn_range(vma, vma->vm_start, page_to_pfn(virt_to_page(db->rawbuf)),
1277                             size, vma->vm_page_prot)) {
1278                ret = -EAGAIN;
1279                goto out;
1280        }
1281        vma->vm_flags &= ~VM_IO;
1282        db->mapped = 1;
1283out:
1284        mutex_unlock(&s->sem);
1285        unlock_kernel();
1286        return ret;
1287}
1288
1289#ifdef DEBUG
1290static struct ioctl_str_t {
1291        unsigned int    cmd;
1292        const char     *str;
1293} ioctl_str[] = {
1294        {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"},
1295        {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"},
1296        {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"},
1297        {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"},
1298        {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"},
1299        {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"},
1300        {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"},
1301        {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"},
1302        {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"},
1303        {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"},
1304        {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"},
1305        {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"},
1306        {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"},
1307        {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"},
1308        {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"},
1309        {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"},
1310        {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"},
1311        {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"},
1312        {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"},
1313        {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"},
1314        {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"},
1315        {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"},
1316        {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"},
1317        {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"},
1318        {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"},
1319        {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"},
1320        {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"},
1321        {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"},
1322        {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"},
1323        {OSS_GETVERSION, "OSS_GETVERSION"},
1324        {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"},
1325        {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"},
1326        {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"},
1327        {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"}
1328};
1329#endif
1330
1331static int
1332dma_count_done(struct dmabuf *db)
1333{
1334        if (db->stopped)
1335                return 0;
1336
1337        return db->dma_fragsize - au1xxx_get_dma_residue(db->dmanr);
1338}
1339
1340
1341static int
1342au1550_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
1343                                                        unsigned long arg)
1344{
1345        struct au1550_state *s = (struct au1550_state *)file->private_data;
1346        unsigned long   flags;
1347        audio_buf_info  abinfo;
1348        count_info      cinfo;
1349        int             count;
1350        int             val, mapped, ret, diff;
1351
1352        mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1353                ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1354
1355#ifdef DEBUG
1356        for (count = 0; count < ARRAY_SIZE(ioctl_str); count++) {
1357                if (ioctl_str[count].cmd == cmd)
1358                        break;
1359        }
1360        if (count < ARRAY_SIZE(ioctl_str))
1361                pr_debug("ioctl %s, arg=0x%lxn", ioctl_str[count].str, arg);
1362        else
1363                pr_debug("ioctl 0x%x unknown, arg=0x%lx\n", cmd, arg);
1364#endif
1365
1366        switch (cmd) {
1367        case OSS_GETVERSION:
1368                return put_user(SOUND_VERSION, (int *) arg);
1369
1370        case SNDCTL_DSP_SYNC:
1371                if (file->f_mode & FMODE_WRITE)
1372                        return drain_dac(s, file->f_flags & O_NONBLOCK);
1373                return 0;
1374
1375        case SNDCTL_DSP_SETDUPLEX:
1376                return 0;
1377
1378        case SNDCTL_DSP_GETCAPS:
1379                return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME |
1380                                DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1381
1382        case SNDCTL_DSP_RESET:
1383                if (file->f_mode & FMODE_WRITE) {
1384                        stop_dac(s);
1385                        synchronize_irq();
1386                        s->dma_dac.count = s->dma_dac.total_bytes = 0;
1387                        s->dma_dac.nextIn = s->dma_dac.nextOut =
1388                                s->dma_dac.rawbuf;
1389                }
1390                if (file->f_mode & FMODE_READ) {
1391                        stop_adc(s);
1392                        synchronize_irq();
1393                        s->dma_adc.count = s->dma_adc.total_bytes = 0;
1394                        s->dma_adc.nextIn = s->dma_adc.nextOut =
1395                                s->dma_adc.rawbuf;
1396                }
1397                return 0;
1398
1399        case SNDCTL_DSP_SPEED:
1400                if (get_user(val, (int *) arg))
1401                        return -EFAULT;
1402                if (val >= 0) {
1403                        if (file->f_mode & FMODE_READ) {
1404                                stop_adc(s);
1405                                set_adc_rate(s, val);
1406                        }
1407                        if (file->f_mode & FMODE_WRITE) {
1408                                stop_dac(s);
1409                                set_dac_rate(s, val);
1410                        }
1411                        if (s->open_mode & FMODE_READ)
1412                                if ((ret = prog_dmabuf_adc(s)))
1413                                        return ret;
1414                        if (s->open_mode & FMODE_WRITE)
1415                                if ((ret = prog_dmabuf_dac(s)))
1416                                        return ret;
1417                }
1418                return put_user((file->f_mode & FMODE_READ) ?
1419                                s->dma_adc.sample_rate :
1420                                s->dma_dac.sample_rate,
1421                                (int *)arg);
1422
1423        case SNDCTL_DSP_STEREO:
1424                if (get_user(val, (int *) arg))
1425                        return -EFAULT;
1426                if (file->f_mode & FMODE_READ) {
1427                        stop_adc(s);
1428                        s->dma_adc.num_channels = val ? 2 : 1;
1429                        if ((ret = prog_dmabuf_adc(s)))
1430                                return ret;
1431                }
1432                if (file->f_mode & FMODE_WRITE) {
1433                        stop_dac(s);
1434                        s->dma_dac.num_channels = val ? 2 : 1;
1435                        if (s->codec_ext_caps & AC97_EXT_DACS) {
1436                                /* disable surround and center/lfe in AC'97
1437                                */
1438                                u16 ext_stat = rdcodec(s->codec,
1439                                                       AC97_EXTENDED_STATUS);
1440                                wrcodec(s->codec, AC97_EXTENDED_STATUS,
1441                                        ext_stat | (AC97_EXTSTAT_PRI |
1442                                                    AC97_EXTSTAT_PRJ |
1443                                                    AC97_EXTSTAT_PRK));
1444                        }
1445                        if ((ret = prog_dmabuf_dac(s)))
1446                                return ret;
1447                }
1448                return 0;
1449
1450        case SNDCTL_DSP_CHANNELS:
1451                if (get_user(val, (int *) arg))
1452                        return -EFAULT;
1453                if (val != 0) {
1454                        if (file->f_mode & FMODE_READ) {
1455                                if (val < 0 || val > 2)
1456                                        return -EINVAL;
1457                                stop_adc(s);
1458                                s->dma_adc.num_channels = val;
1459                                if ((ret = prog_dmabuf_adc(s)))
1460                                        return ret;
1461                        }
1462                        if (file->f_mode & FMODE_WRITE) {
1463                                switch (val) {
1464                                case 1:
1465                                case 2:
1466                                        break;
1467                                case 3:
1468                                case 5:
1469                                        return -EINVAL;
1470                                case 4:
1471                                        if (!(s->codec_ext_caps &
1472                                              AC97_EXTID_SDAC))
1473                                                return -EINVAL;
1474                                        break;
1475                                case 6:
1476                                        if ((s->codec_ext_caps &
1477                                             AC97_EXT_DACS) != AC97_EXT_DACS)
1478                                                return -EINVAL;
1479                                        break;
1480                                default:
1481                                        return -EINVAL;
1482                                }
1483
1484                                stop_dac(s);
1485                                if (val <= 2 &&
1486                                    (s->codec_ext_caps & AC97_EXT_DACS)) {
1487                                        /* disable surround and center/lfe
1488                                         * channels in AC'97
1489                                         */
1490                                        u16             ext_stat =
1491                                                rdcodec(s->codec,
1492                                                        AC97_EXTENDED_STATUS);
1493                                        wrcodec(s->codec,
1494                                                AC97_EXTENDED_STATUS,
1495                                                ext_stat | (AC97_EXTSTAT_PRI |
1496                                                            AC97_EXTSTAT_PRJ |
1497                                                            AC97_EXTSTAT_PRK));
1498                                } else if (val >= 4) {
1499                                        /* enable surround, center/lfe
1500                                         * channels in AC'97
1501                                         */
1502                                        u16             ext_stat =
1503                                                rdcodec(s->codec,
1504                                                        AC97_EXTENDED_STATUS);
1505                                        ext_stat &= ~AC97_EXTSTAT_PRJ;
1506                                        if (val == 6)
1507                                                ext_stat &=
1508                                                        ~(AC97_EXTSTAT_PRI |
1509                                                          AC97_EXTSTAT_PRK);
1510                                        wrcodec(s->codec,
1511                                                AC97_EXTENDED_STATUS,
1512                                                ext_stat);
1513                                }
1514
1515                                s->dma_dac.num_channels = val;
1516                                if ((ret = prog_dmabuf_dac(s)))
1517                                        return ret;
1518                        }
1519                }
1520                return put_user(val, (int *) arg);
1521
1522        case SNDCTL_DSP_GETFMTS:        /* Returns a mask */
1523                return put_user(AFMT_S16_LE | AFMT_U8, (int *) arg);
1524
1525        case SNDCTL_DSP_SETFMT: /* Selects ONE fmt */
1526                if (get_user(val, (int *) arg))
1527                        return -EFAULT;
1528                if (val != AFMT_QUERY) {
1529                        if (file->f_mode & FMODE_READ) {
1530                                stop_adc(s);
1531                                if (val == AFMT_S16_LE)
1532                                        s->dma_adc.sample_size = 16;
1533                                else {
1534                                        val = AFMT_U8;
1535                                        s->dma_adc.sample_size = 8;
1536                                }
1537                                if ((ret = prog_dmabuf_adc(s)))
1538                                        return ret;
1539                        }
1540                        if (file->f_mode & FMODE_WRITE) {
1541                                stop_dac(s);
1542                                if (val == AFMT_S16_LE)
1543                                        s->dma_dac.sample_size = 16;
1544                                else {
1545                                        val = AFMT_U8;
1546                                        s->dma_dac.sample_size = 8;
1547                                }
1548                                if ((ret = prog_dmabuf_dac(s)))
1549                                        return ret;
1550                        }
1551                } else {
1552                        if (file->f_mode & FMODE_READ)
1553                                val = (s->dma_adc.sample_size == 16) ?
1554                                        AFMT_S16_LE : AFMT_U8;
1555                        else
1556                                val = (s->dma_dac.sample_size == 16) ?
1557                                        AFMT_S16_LE : AFMT_U8;
1558                }
1559                return put_user(val, (int *) arg);
1560
1561        case SNDCTL_DSP_POST:
1562                return 0;
1563
1564        case SNDCTL_DSP_GETTRIGGER:
1565                val = 0;
1566                spin_lock_irqsave(&s->lock, flags);
1567                if (file->f_mode & FMODE_READ && !s->dma_adc.stopped)
1568                        val |= PCM_ENABLE_INPUT;
1569                if (file->f_mode & FMODE_WRITE && !s->dma_dac.stopped)
1570                        val |= PCM_ENABLE_OUTPUT;
1571                spin_unlock_irqrestore(&s->lock, flags);
1572                return put_user(val, (int *) arg);
1573
1574        case SNDCTL_DSP_SETTRIGGER:
1575                if (get_user(val, (int *) arg))
1576                        return -EFAULT;
1577                if (file->f_mode & FMODE_READ) {
1578                        if (val & PCM_ENABLE_INPUT) {
1579                                spin_lock_irqsave(&s->lock, flags);
1580                                start_adc(s);
1581                                spin_unlock_irqrestore(&s->lock, flags);
1582                        } else
1583                                stop_adc(s);
1584                }
1585                if (file->f_mode & FMODE_WRITE) {
1586                        if (val & PCM_ENABLE_OUTPUT) {
1587                                spin_lock_irqsave(&s->lock, flags);
1588                                start_dac(s);
1589                                spin_unlock_irqrestore(&s->lock, flags);
1590                        } else
1591                                stop_dac(s);
1592                }
1593                return 0;
1594
1595        case SNDCTL_DSP_GETOSPACE:
1596                if (!(file->f_mode & FMODE_WRITE))
1597                        return -EINVAL;
1598                abinfo.fragsize = s->dma_dac.fragsize;
1599                spin_lock_irqsave(&s->lock, flags);
1600                count = s->dma_dac.count;
1601                count -= dma_count_done(&s->dma_dac);
1602                spin_unlock_irqrestore(&s->lock, flags);
1603                if (count < 0)
1604                        count = 0;
1605                abinfo.bytes = (s->dma_dac.dmasize - count) /
1606                        s->dma_dac.cnt_factor;
1607                abinfo.fragstotal = s->dma_dac.numfrag;
1608                abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1609                pr_debug("ioctl SNDCTL_DSP_GETOSPACE: bytes=%d, fragments=%d\n", abinfo.bytes, abinfo.fragments);
1610                return copy_to_user((void *) arg, &abinfo,
1611                                    sizeof(abinfo)) ? -EFAULT : 0;
1612
1613        case SNDCTL_DSP_GETISPACE:
1614                if (!(file->f_mode & FMODE_READ))
1615                        return -EINVAL;
1616                abinfo.fragsize = s->dma_adc.fragsize;
1617                spin_lock_irqsave(&s->lock, flags);
1618                count = s->dma_adc.count;
1619                count += dma_count_done(&s->dma_adc);
1620                spin_unlock_irqrestore(&s->lock, flags);
1621                if (count < 0)
1622                        count = 0;
1623                abinfo.bytes = count / s->dma_adc.cnt_factor;
1624                abinfo.fragstotal = s->dma_adc.numfrag;
1625                abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1626                return copy_to_user((void *) arg, &abinfo,
1627                                    sizeof(abinfo)) ? -EFAULT : 0;
1628
1629        case SNDCTL_DSP_NONBLOCK:
1630                file->f_flags |= O_NONBLOCK;
1631                return 0;
1632
1633        case SNDCTL_DSP_GETODELAY:
1634                if (!(file->f_mode & FMODE_WRITE))
1635                        return -EINVAL;
1636                spin_lock_irqsave(&s->lock, flags);
1637                count = s->dma_dac.count;
1638                count -= dma_count_done(&s->dma_dac);
1639                spin_unlock_irqrestore(&s->lock, flags);
1640                if (count < 0)
1641                        count = 0;
1642                count /= s->dma_dac.cnt_factor;
1643                return put_user(count, (int *) arg);
1644
1645        case SNDCTL_DSP_GETIPTR:
1646                if (!(file->f_mode & FMODE_READ))
1647                        return -EINVAL;
1648                spin_lock_irqsave(&s->lock, flags);
1649                cinfo.bytes = s->dma_adc.total_bytes;
1650                count = s->dma_adc.count;
1651                if (!s->dma_adc.stopped) {
1652                        diff = dma_count_done(&s->dma_adc);
1653                        count += diff;
1654                        cinfo.bytes += diff;
1655                        cinfo.ptr =  virt_to_phys(s->dma_adc.nextIn) + diff -
1656                                virt_to_phys(s->dma_adc.rawbuf);
1657                } else
1658                        cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) -
1659                                virt_to_phys(s->dma_adc.rawbuf);
1660                if (s->dma_adc.mapped)
1661                        s->dma_adc.count &= (s->dma_adc.dma_fragsize-1);
1662                spin_unlock_irqrestore(&s->lock, flags);
1663                if (count < 0)
1664                        count = 0;
1665                cinfo.blocks = count >> s->dma_adc.fragshift;
1666                return copy_to_user((void *) arg, &cinfo, sizeof(cinfo));
1667
1668        case SNDCTL_DSP_GETOPTR:
1669                if (!(file->f_mode & FMODE_READ))
1670                        return -EINVAL;
1671                spin_lock_irqsave(&s->lock, flags);
1672                cinfo.bytes = s->dma_dac.total_bytes;
1673                count = s->dma_dac.count;
1674                if (!s->dma_dac.stopped) {
1675                        diff = dma_count_done(&s->dma_dac);
1676                        count -= diff;
1677                        cinfo.bytes += diff;
1678                        cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) + diff -
1679                                virt_to_phys(s->dma_dac.rawbuf);
1680                } else
1681                        cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) -
1682                                virt_to_phys(s->dma_dac.rawbuf);
1683                if (s->dma_dac.mapped)
1684                        s->dma_dac.count &= (s->dma_dac.dma_fragsize-1);
1685                spin_unlock_irqrestore(&s->lock, flags);
1686                if (count < 0)
1687                        count = 0;
1688                cinfo.blocks = count >> s->dma_dac.fragshift;
1689                return copy_to_user((void *) arg, &cinfo, sizeof(cinfo));
1690
1691        case SNDCTL_DSP_GETBLKSIZE:
1692                if (file->f_mode & FMODE_WRITE)
1693                        return put_user(s->dma_dac.fragsize, (int *) arg);
1694                else
1695                        return put_user(s->dma_adc.fragsize, (int *) arg);
1696
1697        case SNDCTL_DSP_SETFRAGMENT:
1698                if (get_user(val, (int *) arg))
1699                        return -EFAULT;
1700                if (file->f_mode & FMODE_READ) {
1701                        stop_adc(s);
1702                        s->dma_adc.ossfragshift = val & 0xffff;
1703                        s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1704                        if (s->dma_adc.ossfragshift < 4)
1705                                s->dma_adc.ossfragshift = 4;
1706                        if (s->dma_adc.ossfragshift > 15)
1707                                s->dma_adc.ossfragshift = 15;
1708                        if (s->dma_adc.ossmaxfrags < 4)
1709                                s->dma_adc.ossmaxfrags = 4;
1710                        if ((ret = prog_dmabuf_adc(s)))
1711                                return ret;
1712                }
1713                if (file->f_mode & FMODE_WRITE) {
1714                        stop_dac(s);
1715                        s->dma_dac.ossfragshift = val & 0xffff;
1716                        s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1717                        if (s->dma_dac.ossfragshift < 4)
1718                                s->dma_dac.ossfragshift = 4;
1719                        if (s->dma_dac.ossfragshift > 15)
1720                                s->dma_dac.ossfragshift = 15;
1721                        if (s->dma_dac.ossmaxfrags < 4)
1722                                s->dma_dac.ossmaxfrags = 4;
1723                        if ((ret = prog_dmabuf_dac(s)))
1724                                return ret;
1725                }
1726                return 0;
1727
1728        case SNDCTL_DSP_SUBDIVIDE:
1729                if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1730                    (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1731                        return -EINVAL;
1732                if (get_user(val, (int *) arg))
1733                        return -EFAULT;
1734                if (val != 1 && val != 2 && val != 4)
1735                        return -EINVAL;
1736                if (file->f_mode & FMODE_READ) {
1737                        stop_adc(s);
1738                        s->dma_adc.subdivision = val;
1739                        if ((ret = prog_dmabuf_adc(s)))
1740                                return ret;
1741                }
1742                if (file->f_mode & FMODE_WRITE) {
1743                        stop_dac(s);
1744                        s->dma_dac.subdivision = val;
1745                        if ((ret = prog_dmabuf_dac(s)))
1746                                return ret;
1747                }
1748                return 0;
1749
1750        case SOUND_PCM_READ_RATE:
1751                return put_user((file->f_mode & FMODE_READ) ?
1752                                s->dma_adc.sample_rate :
1753                                s->dma_dac.sample_rate,
1754                                (int *)arg);
1755
1756        case SOUND_PCM_READ_CHANNELS:
1757                if (file->f_mode & FMODE_READ)
1758                        return put_user(s->dma_adc.num_channels, (int *)arg);
1759                else
1760                        return put_user(s->dma_dac.num_channels, (int *)arg);
1761
1762        case SOUND_PCM_READ_BITS:
1763                if (file->f_mode & FMODE_READ)
1764                        return put_user(s->dma_adc.sample_size, (int *)arg);
1765                else
1766                        return put_user(s->dma_dac.sample_size, (int *)arg);
1767
1768        case SOUND_PCM_WRITE_FILTER:
1769        case SNDCTL_DSP_SETSYNCRO:
1770        case SOUND_PCM_READ_FILTER:
1771                return -EINVAL;
1772        }
1773
1774        return mixdev_ioctl(s->codec, cmd, arg);
1775}
1776
1777
1778static int
1779au1550_open(struct inode *inode, struct file *file)
1780{
1781        int             minor = MINOR(inode->i_rdev);
1782        DECLARE_WAITQUEUE(wait, current);
1783        struct au1550_state *s = &au1550_state;
1784        int             ret;
1785
1786#ifdef DEBUG
1787        if (file->f_flags & O_NONBLOCK)
1788                pr_debug("open: non-blocking\n");
1789        else
1790                pr_debug("open: blocking\n");
1791#endif
1792
1793        file->private_data = s;
1794        /* wait for device to become free */
1795        mutex_lock(&s->open_mutex);
1796        while (s->open_mode & file->f_mode) {
1797                if (file->f_flags & O_NONBLOCK) {
1798                        mutex_unlock(&s->open_mutex);
1799                        return -EBUSY;
1800                }
1801                add_wait_queue(&s->open_wait, &wait);
1802                __set_current_state(TASK_INTERRUPTIBLE);
1803                mutex_unlock(&s->open_mutex);
1804                schedule();
1805                remove_wait_queue(&s->open_wait, &wait);
1806                set_current_state(TASK_RUNNING);
1807                if (signal_pending(current))
1808                        return -ERESTARTSYS;
1809                mutex_lock(&s->open_mutex);
1810        }
1811
1812        stop_dac(s);
1813        stop_adc(s);
1814
1815        if (file->f_mode & FMODE_READ) {
1816                s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
1817                        s->dma_adc.subdivision = s->dma_adc.total_bytes = 0;
1818                s->dma_adc.num_channels = 1;
1819                s->dma_adc.sample_size = 8;
1820                set_adc_rate(s, 8000);
1821                if ((minor & 0xf) == SND_DEV_DSP16)
1822                        s->dma_adc.sample_size = 16;
1823        }
1824
1825        if (file->f_mode & FMODE_WRITE) {
1826                s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
1827                        s->dma_dac.subdivision = s->dma_dac.total_bytes = 0;
1828                s->dma_dac.num_channels = 1;
1829                s->dma_dac.sample_size = 8;
1830                set_dac_rate(s, 8000);
1831                if ((minor & 0xf) == SND_DEV_DSP16)
1832                        s->dma_dac.sample_size = 16;
1833        }
1834
1835        if (file->f_mode & FMODE_READ) {
1836                if ((ret = prog_dmabuf_adc(s)))
1837                        return ret;
1838        }
1839        if (file->f_mode & FMODE_WRITE) {
1840                if ((ret = prog_dmabuf_dac(s)))
1841                        return ret;
1842        }
1843
1844        s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1845        mutex_unlock(&s->open_mutex);
1846        mutex_init(&s->sem);
1847        return 0;
1848}
1849
1850static int
1851au1550_release(struct inode *inode, struct file *file)
1852{
1853        struct au1550_state *s = (struct au1550_state *)file->private_data;
1854
1855        lock_kernel();
1856
1857        if (file->f_mode & FMODE_WRITE) {
1858                unlock_kernel();
1859                drain_dac(s, file->f_flags & O_NONBLOCK);
1860                lock_kernel();
1861        }
1862
1863        mutex_lock(&s->open_mutex);
1864        if (file->f_mode & FMODE_WRITE) {
1865                stop_dac(s);
1866                kfree(s->dma_dac.rawbuf);
1867                s->dma_dac.rawbuf = NULL;
1868        }
1869        if (file->f_mode & FMODE_READ) {
1870                stop_adc(s);
1871                kfree(s->dma_adc.rawbuf);
1872                s->dma_adc.rawbuf = NULL;
1873        }
1874        s->open_mode &= ((~file->f_mode) & (FMODE_READ|FMODE_WRITE));
1875        mutex_unlock(&s->open_mutex);
1876        wake_up(&s->open_wait);
1877        unlock_kernel();
1878        return 0;
1879}
1880
1881static /*const */ struct file_operations au1550_audio_fops = {
1882        owner:          THIS_MODULE,
1883        llseek:         au1550_llseek,
1884        read:           au1550_read,
1885        write:          au1550_write,
1886        poll:           au1550_poll,
1887        ioctl:          au1550_ioctl,
1888        mmap:           au1550_mmap,
1889        open:           au1550_open,
1890        release:        au1550_release,
1891};
1892
1893MODULE_AUTHOR("Advanced Micro Devices (AMD), dan@embeddededge.com");
1894MODULE_DESCRIPTION("Au1550 AC97 Audio Driver");
1895MODULE_LICENSE("GPL");
1896
1897
1898static int __devinit
1899au1550_probe(void)
1900{
1901        struct au1550_state *s = &au1550_state;
1902        int             val;
1903
1904        memset(s, 0, sizeof(struct au1550_state));
1905
1906        init_waitqueue_head(&s->dma_adc.wait);
1907        init_waitqueue_head(&s->dma_dac.wait);
1908        init_waitqueue_head(&s->open_wait);
1909        mutex_init(&s->open_mutex);
1910        spin_lock_init(&s->lock);
1911
1912        s->codec = ac97_alloc_codec();
1913        if(s->codec == NULL) {
1914                err("Out of memory");
1915                return -1;
1916        }
1917        s->codec->private_data = s;
1918        s->codec->id = 0;
1919        s->codec->codec_read = rdcodec;
1920        s->codec->codec_write = wrcodec;
1921        s->codec->codec_wait = waitcodec;
1922
1923        if (!request_mem_region(CPHYSADDR(AC97_PSC_SEL),
1924                            0x30, "Au1550 AC97")) {
1925                err("AC'97 ports in use");
1926        }
1927
1928        /* Allocate the DMA Channels
1929        */
1930        if ((s->dma_dac.dmanr = au1xxx_dbdma_chan_alloc(DBDMA_MEM_CHAN,
1931            DBDMA_AC97_TX_CHAN, dac_dma_interrupt, (void *)s)) == 0) {
1932                err("Can't get DAC DMA");
1933                goto err_dma1;
1934        }
1935        au1xxx_dbdma_set_devwidth(s->dma_dac.dmanr, 16);
1936        if (au1xxx_dbdma_ring_alloc(s->dma_dac.dmanr,
1937                                        NUM_DBDMA_DESCRIPTORS) == 0) {
1938                err("Can't get DAC DMA descriptors");
1939                goto err_dma1;
1940        }
1941
1942        if ((s->dma_adc.dmanr = au1xxx_dbdma_chan_alloc(DBDMA_AC97_RX_CHAN,
1943            DBDMA_MEM_CHAN, adc_dma_interrupt, (void *)s)) == 0) {
1944                err("Can't get ADC DMA");
1945                goto err_dma2;
1946        }
1947        au1xxx_dbdma_set_devwidth(s->dma_adc.dmanr, 16);
1948        if (au1xxx_dbdma_ring_alloc(s->dma_adc.dmanr,
1949                                        NUM_DBDMA_DESCRIPTORS) == 0) {
1950                err("Can't get ADC DMA descriptors");
1951                goto err_dma2;
1952        }
1953
1954        pr_info("DAC: DMA%d, ADC: DMA%d", DBDMA_AC97_TX_CHAN, DBDMA_AC97_RX_CHAN);
1955
1956        /* register devices */
1957
1958        if ((s->dev_audio = register_sound_dsp(&au1550_audio_fops, -1)) < 0)
1959                goto err_dev1;
1960        if ((s->codec->dev_mixer =
1961             register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
1962                goto err_dev2;
1963
1964        /* The GPIO for the appropriate PSC was configured by the
1965         * board specific start up.
1966         *
1967         * configure PSC for AC'97
1968         */
1969        au_writel(0, AC97_PSC_CTRL);    /* Disable PSC */
1970        au_sync();
1971        au_writel((PSC_SEL_CLK_SERCLK | PSC_SEL_PS_AC97MODE), AC97_PSC_SEL);
1972        au_sync();
1973
1974        /* cold reset the AC'97
1975        */
1976        au_writel(PSC_AC97RST_RST, PSC_AC97RST);
1977        au_sync();
1978        au1550_delay(10);
1979        au_writel(0, PSC_AC97RST);
1980        au_sync();
1981
1982        /* need to delay around 500msec(bleech) to give
1983           some CODECs enough time to wakeup */
1984        au1550_delay(500);
1985
1986        /* warm reset the AC'97 to start the bitclk
1987        */
1988        au_writel(PSC_AC97RST_SNC, PSC_AC97RST);
1989        au_sync();
1990        udelay(100);
1991        au_writel(0, PSC_AC97RST);
1992        au_sync();
1993
1994        /* Enable PSC
1995        */
1996        au_writel(PSC_CTRL_ENABLE, AC97_PSC_CTRL);
1997        au_sync();
1998
1999        /* Wait for PSC ready.
2000        */
2001        do {
2002                val = au_readl(PSC_AC97STAT);
2003                au_sync();
2004        } while ((val & PSC_AC97STAT_SR) == 0);
2005
2006        /* Configure AC97 controller.
2007         * Deep FIFO, 16-bit sample, DMA, make sure DMA matches fifo size.
2008         */
2009        val = PSC_AC97CFG_SET_LEN(16);
2010        val |= PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8;
2011
2012        /* Enable device so we can at least
2013         * talk over the AC-link.
2014         */
2015        au_writel(val, PSC_AC97CFG);
2016        au_writel(PSC_AC97MSK_ALLMASK, PSC_AC97MSK);
2017        au_sync();
2018        val |= PSC_AC97CFG_DE_ENABLE;
2019        au_writel(val, PSC_AC97CFG);
2020        au_sync();
2021
2022        /* Wait for Device ready.
2023        */
2024        do {
2025                val = au_readl(PSC_AC97STAT);
2026                au_sync();
2027        } while ((val & PSC_AC97STAT_DR) == 0);
2028
2029        /* codec init */
2030        if (!ac97_probe_codec(s->codec))
2031                goto err_dev3;
2032
2033        s->codec_base_caps = rdcodec(s->codec, AC97_RESET);
2034        s->codec_ext_caps = rdcodec(s->codec, AC97_EXTENDED_ID);
2035        pr_info("AC'97 Base/Extended ID = %04x/%04x",
2036             s->codec_base_caps, s->codec_ext_caps);
2037
2038        if (!(s->codec_ext_caps & AC97_EXTID_VRA)) {
2039                /* codec does not support VRA
2040                */
2041                s->no_vra = 1;
2042        } else if (!vra) {
2043                /* Boot option says disable VRA
2044                */
2045                u16 ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
2046                wrcodec(s->codec, AC97_EXTENDED_STATUS,
2047                        ac97_extstat & ~AC97_EXTSTAT_VRA);
2048                s->no_vra = 1;
2049        }
2050        if (s->no_vra)
2051                pr_info("no VRA, interpolating and decimating");
2052
2053        /* set mic to be the recording source */
2054        val = SOUND_MASK_MIC;
2055        mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC,
2056                     (unsigned long) &val);
2057
2058        return 0;
2059
2060 err_dev3:
2061        unregister_sound_mixer(s->codec->dev_mixer);
2062 err_dev2:
2063        unregister_sound_dsp(s->dev_audio);
2064 err_dev1:
2065        au1xxx_dbdma_chan_free(s->dma_adc.dmanr);
2066 err_dma2:
2067        au1xxx_dbdma_chan_free(s->dma_dac.dmanr);
2068 err_dma1:
2069        release_mem_region(CPHYSADDR(AC97_PSC_SEL), 0x30);
2070
2071        ac97_release_codec(s->codec);
2072        return -1;
2073}
2074
2075static void __devinit
2076au1550_remove(void)
2077{
2078        struct au1550_state *s = &au1550_state;
2079
2080        if (!s)
2081                return;
2082        synchronize_irq();
2083        au1xxx_dbdma_chan_free(s->dma_adc.dmanr);
2084        au1xxx_dbdma_chan_free(s->dma_dac.dmanr);
2085        release_mem_region(CPHYSADDR(AC97_PSC_SEL), 0x30);
2086        unregister_sound_dsp(s->dev_audio);
2087        unregister_sound_mixer(s->codec->dev_mixer);
2088        ac97_release_codec(s->codec);
2089}
2090
2091static int __init
2092init_au1550(void)
2093{
2094        return au1550_probe();
2095}
2096
2097static void __exit
2098cleanup_au1550(void)
2099{
2100        au1550_remove();
2101}
2102
2103module_init(init_au1550);
2104module_exit(cleanup_au1550);
2105
2106#ifndef MODULE
2107
2108static int __init
2109au1550_setup(char *options)
2110{
2111        char           *this_opt;
2112
2113        if (!options || !*options)
2114                return 0;
2115
2116        while ((this_opt = strsep(&options, ","))) {
2117                if (!*this_opt)
2118                        continue;
2119                if (!strncmp(this_opt, "vra", 3)) {
2120                        vra = 1;
2121                }
2122        }
2123
2124        return 1;
2125}
2126
2127__setup("au1550_audio=", au1550_setup);
2128
2129#endif /* MODULE */
2130