linux/drivers/serial/cpm_uart/cpm_uart_core.c
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   1/*
   2 *  linux/drivers/serial/cpm_uart.c
   3 *
   4 *  Driver for CPM (SCC/SMC) serial ports; core driver
   5 *
   6 *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
   7 *  Based on ppc8xx.c by Thomas Gleixner
   8 *  Based on drivers/serial/amba.c by Russell King
   9 *
  10 *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
  11 *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
  12 *
  13 *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
  14 *            (C) 2004 Intracom, S.A.
  15 *            (C) 2005-2006 MontaVista Software, Inc.
  16 *              Vitaly Bordug <vbordug@ru.mvista.com>
  17 *
  18 * This program is free software; you can redistribute it and/or modify
  19 * it under the terms of the GNU General Public License as published by
  20 * the Free Software Foundation; either version 2 of the License, or
  21 * (at your option) any later version.
  22 *
  23 * This program is distributed in the hope that it will be useful,
  24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26 * GNU General Public License for more details.
  27 *
  28 * You should have received a copy of the GNU General Public License
  29 * along with this program; if not, write to the Free Software
  30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  31 *
  32 */
  33
  34#include <linux/module.h>
  35#include <linux/tty.h>
  36#include <linux/ioport.h>
  37#include <linux/init.h>
  38#include <linux/serial.h>
  39#include <linux/console.h>
  40#include <linux/sysrq.h>
  41#include <linux/device.h>
  42#include <linux/bootmem.h>
  43#include <linux/dma-mapping.h>
  44#include <linux/fs_uart_pd.h>
  45#include <linux/of_platform.h>
  46#include <linux/gpio.h>
  47#include <linux/of_gpio.h>
  48#include <linux/clk.h>
  49
  50#include <asm/io.h>
  51#include <asm/irq.h>
  52#include <asm/delay.h>
  53#include <asm/fs_pd.h>
  54#include <asm/udbg.h>
  55
  56#if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  57#define SUPPORT_SYSRQ
  58#endif
  59
  60#include <linux/serial_core.h>
  61#include <linux/kernel.h>
  62
  63#include "cpm_uart.h"
  64
  65
  66/**************************************************************/
  67
  68static int  cpm_uart_tx_pump(struct uart_port *port);
  69static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
  70static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
  71static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
  72
  73/**************************************************************/
  74
  75/*
  76 * Check, if transmit buffers are processed
  77*/
  78static unsigned int cpm_uart_tx_empty(struct uart_port *port)
  79{
  80        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
  81        cbd_t __iomem *bdp = pinfo->tx_bd_base;
  82        int ret = 0;
  83
  84        while (1) {
  85                if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
  86                        break;
  87
  88                if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
  89                        ret = TIOCSER_TEMT;
  90                        break;
  91                }
  92                bdp++;
  93        }
  94
  95        pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
  96
  97        return ret;
  98}
  99
 100static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 101{
 102        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 103
 104        if (pinfo->gpios[GPIO_RTS] >= 0)
 105                gpio_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
 106
 107        if (pinfo->gpios[GPIO_DTR] >= 0)
 108                gpio_set_value(pinfo->gpios[GPIO_DTR], !(mctrl & TIOCM_DTR));
 109}
 110
 111static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
 112{
 113        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 114        unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 115
 116        if (pinfo->gpios[GPIO_CTS] >= 0) {
 117                if (gpio_get_value(pinfo->gpios[GPIO_CTS]))
 118                        mctrl &= ~TIOCM_CTS;
 119        }
 120
 121        if (pinfo->gpios[GPIO_DSR] >= 0) {
 122                if (gpio_get_value(pinfo->gpios[GPIO_DSR]))
 123                        mctrl &= ~TIOCM_DSR;
 124        }
 125
 126        if (pinfo->gpios[GPIO_DCD] >= 0) {
 127                if (gpio_get_value(pinfo->gpios[GPIO_DCD]))
 128                        mctrl &= ~TIOCM_CAR;
 129        }
 130
 131        if (pinfo->gpios[GPIO_RI] >= 0) {
 132                if (!gpio_get_value(pinfo->gpios[GPIO_RI]))
 133                        mctrl |= TIOCM_RNG;
 134        }
 135
 136        return mctrl;
 137}
 138
 139/*
 140 * Stop transmitter
 141 */
 142static void cpm_uart_stop_tx(struct uart_port *port)
 143{
 144        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 145        smc_t __iomem *smcp = pinfo->smcp;
 146        scc_t __iomem *sccp = pinfo->sccp;
 147
 148        pr_debug("CPM uart[%d]:stop tx\n", port->line);
 149
 150        if (IS_SMC(pinfo))
 151                clrbits8(&smcp->smc_smcm, SMCM_TX);
 152        else
 153                clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
 154}
 155
 156/*
 157 * Start transmitter
 158 */
 159static void cpm_uart_start_tx(struct uart_port *port)
 160{
 161        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 162        smc_t __iomem *smcp = pinfo->smcp;
 163        scc_t __iomem *sccp = pinfo->sccp;
 164
 165        pr_debug("CPM uart[%d]:start tx\n", port->line);
 166
 167        if (IS_SMC(pinfo)) {
 168                if (in_8(&smcp->smc_smcm) & SMCM_TX)
 169                        return;
 170        } else {
 171                if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
 172                        return;
 173        }
 174
 175        if (cpm_uart_tx_pump(port) != 0) {
 176                if (IS_SMC(pinfo)) {
 177                        setbits8(&smcp->smc_smcm, SMCM_TX);
 178                } else {
 179                        setbits16(&sccp->scc_sccm, UART_SCCM_TX);
 180                }
 181        }
 182}
 183
 184/*
 185 * Stop receiver
 186 */
 187static void cpm_uart_stop_rx(struct uart_port *port)
 188{
 189        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 190        smc_t __iomem *smcp = pinfo->smcp;
 191        scc_t __iomem *sccp = pinfo->sccp;
 192
 193        pr_debug("CPM uart[%d]:stop rx\n", port->line);
 194
 195        if (IS_SMC(pinfo))
 196                clrbits8(&smcp->smc_smcm, SMCM_RX);
 197        else
 198                clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
 199}
 200
 201/*
 202 * Enable Modem status interrupts
 203 */
 204static void cpm_uart_enable_ms(struct uart_port *port)
 205{
 206        pr_debug("CPM uart[%d]:enable ms\n", port->line);
 207}
 208
 209/*
 210 * Generate a break.
 211 */
 212static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
 213{
 214        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 215
 216        pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
 217                break_state);
 218
 219        if (break_state)
 220                cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 221        else
 222                cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
 223}
 224
 225/*
 226 * Transmit characters, refill buffer descriptor, if possible
 227 */
 228static void cpm_uart_int_tx(struct uart_port *port)
 229{
 230        pr_debug("CPM uart[%d]:TX INT\n", port->line);
 231
 232        cpm_uart_tx_pump(port);
 233}
 234
 235#ifdef CONFIG_CONSOLE_POLL
 236static int serial_polled;
 237#endif
 238
 239/*
 240 * Receive characters
 241 */
 242static void cpm_uart_int_rx(struct uart_port *port)
 243{
 244        int i;
 245        unsigned char ch;
 246        u8 *cp;
 247        struct tty_struct *tty = port->info->port.tty;
 248        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 249        cbd_t __iomem *bdp;
 250        u16 status;
 251        unsigned int flg;
 252
 253        pr_debug("CPM uart[%d]:RX INT\n", port->line);
 254
 255        /* Just loop through the closed BDs and copy the characters into
 256         * the buffer.
 257         */
 258        bdp = pinfo->rx_cur;
 259        for (;;) {
 260#ifdef CONFIG_CONSOLE_POLL
 261                if (unlikely(serial_polled)) {
 262                        serial_polled = 0;
 263                        return;
 264                }
 265#endif
 266                /* get status */
 267                status = in_be16(&bdp->cbd_sc);
 268                /* If this one is empty, return happy */
 269                if (status & BD_SC_EMPTY)
 270                        break;
 271
 272                /* get number of characters, and check spce in flip-buffer */
 273                i = in_be16(&bdp->cbd_datlen);
 274
 275                /* If we have not enough room in tty flip buffer, then we try
 276                 * later, which will be the next rx-interrupt or a timeout
 277                 */
 278                if(tty_buffer_request_room(tty, i) < i) {
 279                        printk(KERN_WARNING "No room in flip buffer\n");
 280                        return;
 281                }
 282
 283                /* get pointer */
 284                cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 285
 286                /* loop through the buffer */
 287                while (i-- > 0) {
 288                        ch = *cp++;
 289                        port->icount.rx++;
 290                        flg = TTY_NORMAL;
 291
 292                        if (status &
 293                            (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
 294                                goto handle_error;
 295                        if (uart_handle_sysrq_char(port, ch))
 296                                continue;
 297#ifdef CONFIG_CONSOLE_POLL
 298                        if (unlikely(serial_polled)) {
 299                                serial_polled = 0;
 300                                return;
 301                        }
 302#endif
 303                      error_return:
 304                        tty_insert_flip_char(tty, ch, flg);
 305
 306                }               /* End while (i--) */
 307
 308                /* This BD is ready to be used again. Clear status. get next */
 309                clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
 310                                        BD_SC_OV | BD_SC_ID);
 311                setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
 312
 313                if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 314                        bdp = pinfo->rx_bd_base;
 315                else
 316                        bdp++;
 317
 318        } /* End for (;;) */
 319
 320        /* Write back buffer pointer */
 321        pinfo->rx_cur = bdp;
 322
 323        /* activate BH processing */
 324        tty_flip_buffer_push(tty);
 325
 326        return;
 327
 328        /* Error processing */
 329
 330      handle_error:
 331        /* Statistics */
 332        if (status & BD_SC_BR)
 333                port->icount.brk++;
 334        if (status & BD_SC_PR)
 335                port->icount.parity++;
 336        if (status & BD_SC_FR)
 337                port->icount.frame++;
 338        if (status & BD_SC_OV)
 339                port->icount.overrun++;
 340
 341        /* Mask out ignored conditions */
 342        status &= port->read_status_mask;
 343
 344        /* Handle the remaining ones */
 345        if (status & BD_SC_BR)
 346                flg = TTY_BREAK;
 347        else if (status & BD_SC_PR)
 348                flg = TTY_PARITY;
 349        else if (status & BD_SC_FR)
 350                flg = TTY_FRAME;
 351
 352        /* overrun does not affect the current character ! */
 353        if (status & BD_SC_OV) {
 354                ch = 0;
 355                flg = TTY_OVERRUN;
 356                /* We skip this buffer */
 357                /* CHECK: Is really nothing senseful there */
 358                /* ASSUMPTION: it contains nothing valid */
 359                i = 0;
 360        }
 361#ifdef SUPPORT_SYSRQ
 362        port->sysrq = 0;
 363#endif
 364        goto error_return;
 365}
 366
 367/*
 368 * Asynchron mode interrupt handler
 369 */
 370static irqreturn_t cpm_uart_int(int irq, void *data)
 371{
 372        u8 events;
 373        struct uart_port *port = data;
 374        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 375        smc_t __iomem *smcp = pinfo->smcp;
 376        scc_t __iomem *sccp = pinfo->sccp;
 377
 378        pr_debug("CPM uart[%d]:IRQ\n", port->line);
 379
 380        if (IS_SMC(pinfo)) {
 381                events = in_8(&smcp->smc_smce);
 382                out_8(&smcp->smc_smce, events);
 383                if (events & SMCM_BRKE)
 384                        uart_handle_break(port);
 385                if (events & SMCM_RX)
 386                        cpm_uart_int_rx(port);
 387                if (events & SMCM_TX)
 388                        cpm_uart_int_tx(port);
 389        } else {
 390                events = in_be16(&sccp->scc_scce);
 391                out_be16(&sccp->scc_scce, events);
 392                if (events & UART_SCCM_BRKE)
 393                        uart_handle_break(port);
 394                if (events & UART_SCCM_RX)
 395                        cpm_uart_int_rx(port);
 396                if (events & UART_SCCM_TX)
 397                        cpm_uart_int_tx(port);
 398        }
 399        return (events) ? IRQ_HANDLED : IRQ_NONE;
 400}
 401
 402static int cpm_uart_startup(struct uart_port *port)
 403{
 404        int retval;
 405        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 406
 407        pr_debug("CPM uart[%d]:startup\n", port->line);
 408
 409        /* Install interrupt handler. */
 410        retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
 411        if (retval)
 412                return retval;
 413
 414        /* Startup rx-int */
 415        if (IS_SMC(pinfo)) {
 416                setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 417                setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
 418        } else {
 419                setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 420                setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
 421        }
 422
 423        if (!(pinfo->flags & FLAG_CONSOLE))
 424                cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 425        return 0;
 426}
 427
 428inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
 429{
 430        set_current_state(TASK_UNINTERRUPTIBLE);
 431        schedule_timeout(pinfo->wait_closing);
 432}
 433
 434/*
 435 * Shutdown the uart
 436 */
 437static void cpm_uart_shutdown(struct uart_port *port)
 438{
 439        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 440
 441        pr_debug("CPM uart[%d]:shutdown\n", port->line);
 442
 443        /* free interrupt handler */
 444        free_irq(port->irq, port);
 445
 446        /* If the port is not the console, disable Rx and Tx. */
 447        if (!(pinfo->flags & FLAG_CONSOLE)) {
 448                /* Wait for all the BDs marked sent */
 449                while(!cpm_uart_tx_empty(port)) {
 450                        set_current_state(TASK_UNINTERRUPTIBLE);
 451                        schedule_timeout(2);
 452                }
 453
 454                if (pinfo->wait_closing)
 455                        cpm_uart_wait_until_send(pinfo);
 456
 457                /* Stop uarts */
 458                if (IS_SMC(pinfo)) {
 459                        smc_t __iomem *smcp = pinfo->smcp;
 460                        clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 461                        clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
 462                } else {
 463                        scc_t __iomem *sccp = pinfo->sccp;
 464                        clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 465                        clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 466                }
 467
 468                /* Shut them really down and reinit buffer descriptors */
 469                if (IS_SMC(pinfo)) {
 470                        out_be16(&pinfo->smcup->smc_brkcr, 0);
 471                        cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 472                } else {
 473                        out_be16(&pinfo->sccup->scc_brkcr, 0);
 474                        cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
 475                }
 476
 477                cpm_uart_initbd(pinfo);
 478        }
 479}
 480
 481static void cpm_uart_set_termios(struct uart_port *port,
 482                                 struct ktermios *termios,
 483                                 struct ktermios *old)
 484{
 485        int baud;
 486        unsigned long flags;
 487        u16 cval, scval, prev_mode;
 488        int bits, sbits;
 489        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 490        smc_t __iomem *smcp = pinfo->smcp;
 491        scc_t __iomem *sccp = pinfo->sccp;
 492
 493        pr_debug("CPM uart[%d]:set_termios\n", port->line);
 494
 495        baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 496
 497        /* Character length programmed into the mode register is the
 498         * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
 499         * 1 or 2 stop bits, minus 1.
 500         * The value 'bits' counts this for us.
 501         */
 502        cval = 0;
 503        scval = 0;
 504
 505        /* byte size */
 506        switch (termios->c_cflag & CSIZE) {
 507        case CS5:
 508                bits = 5;
 509                break;
 510        case CS6:
 511                bits = 6;
 512                break;
 513        case CS7:
 514                bits = 7;
 515                break;
 516        case CS8:
 517                bits = 8;
 518                break;
 519                /* Never happens, but GCC is too dumb to figure it out */
 520        default:
 521                bits = 8;
 522                break;
 523        }
 524        sbits = bits - 5;
 525
 526        if (termios->c_cflag & CSTOPB) {
 527                cval |= SMCMR_SL;       /* Two stops */
 528                scval |= SCU_PSMR_SL;
 529                bits++;
 530        }
 531
 532        if (termios->c_cflag & PARENB) {
 533                cval |= SMCMR_PEN;
 534                scval |= SCU_PSMR_PEN;
 535                bits++;
 536                if (!(termios->c_cflag & PARODD)) {
 537                        cval |= SMCMR_PM_EVEN;
 538                        scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
 539                }
 540        }
 541
 542        /*
 543         * Update the timeout
 544         */
 545        uart_update_timeout(port, termios->c_cflag, baud);
 546
 547        /*
 548         * Set up parity check flag
 549         */
 550#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 551
 552        port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
 553        if (termios->c_iflag & INPCK)
 554                port->read_status_mask |= BD_SC_FR | BD_SC_PR;
 555        if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
 556                port->read_status_mask |= BD_SC_BR;
 557
 558        /*
 559         * Characters to ignore
 560         */
 561        port->ignore_status_mask = 0;
 562        if (termios->c_iflag & IGNPAR)
 563                port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
 564        if (termios->c_iflag & IGNBRK) {
 565                port->ignore_status_mask |= BD_SC_BR;
 566                /*
 567                 * If we're ignore parity and break indicators, ignore
 568                 * overruns too.  (For real raw support).
 569                 */
 570                if (termios->c_iflag & IGNPAR)
 571                        port->ignore_status_mask |= BD_SC_OV;
 572        }
 573        /*
 574         * !!! ignore all characters if CREAD is not set
 575         */
 576        if ((termios->c_cflag & CREAD) == 0)
 577                port->read_status_mask &= ~BD_SC_EMPTY;
 578
 579        spin_lock_irqsave(&port->lock, flags);
 580
 581        /* Start bit has not been added (so don't, because we would just
 582         * subtract it later), and we need to add one for the number of
 583         * stops bits (there is always at least one).
 584         */
 585        bits++;
 586        if (IS_SMC(pinfo)) {
 587                /* Set the mode register.  We want to keep a copy of the
 588                 * enables, because we want to put them back if they were
 589                 * present.
 590                 */
 591                prev_mode = in_be16(&smcp->smc_smcmr) & (SMCMR_REN | SMCMR_TEN);
 592                /* Output in *one* operation, so we don't interrupt RX/TX if they
 593                 * were already enabled. */
 594                out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval |
 595                    SMCMR_SM_UART | prev_mode);
 596        } else {
 597                out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
 598        }
 599
 600        if (pinfo->clk)
 601                clk_set_rate(pinfo->clk, baud);
 602        else
 603                cpm_set_brg(pinfo->brg - 1, baud);
 604        spin_unlock_irqrestore(&port->lock, flags);
 605}
 606
 607static const char *cpm_uart_type(struct uart_port *port)
 608{
 609        pr_debug("CPM uart[%d]:uart_type\n", port->line);
 610
 611        return port->type == PORT_CPM ? "CPM UART" : NULL;
 612}
 613
 614/*
 615 * verify the new serial_struct (for TIOCSSERIAL).
 616 */
 617static int cpm_uart_verify_port(struct uart_port *port,
 618                                struct serial_struct *ser)
 619{
 620        int ret = 0;
 621
 622        pr_debug("CPM uart[%d]:verify_port\n", port->line);
 623
 624        if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
 625                ret = -EINVAL;
 626        if (ser->irq < 0 || ser->irq >= nr_irqs)
 627                ret = -EINVAL;
 628        if (ser->baud_base < 9600)
 629                ret = -EINVAL;
 630        return ret;
 631}
 632
 633/*
 634 * Transmit characters, refill buffer descriptor, if possible
 635 */
 636static int cpm_uart_tx_pump(struct uart_port *port)
 637{
 638        cbd_t __iomem *bdp;
 639        u8 *p;
 640        int count;
 641        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 642        struct circ_buf *xmit = &port->info->xmit;
 643
 644        /* Handle xon/xoff */
 645        if (port->x_char) {
 646                /* Pick next descriptor and fill from buffer */
 647                bdp = pinfo->tx_cur;
 648
 649                p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 650
 651                *p++ = port->x_char;
 652
 653                out_be16(&bdp->cbd_datlen, 1);
 654                setbits16(&bdp->cbd_sc, BD_SC_READY);
 655                /* Get next BD. */
 656                if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 657                        bdp = pinfo->tx_bd_base;
 658                else
 659                        bdp++;
 660                pinfo->tx_cur = bdp;
 661
 662                port->icount.tx++;
 663                port->x_char = 0;
 664                return 1;
 665        }
 666
 667        if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 668                cpm_uart_stop_tx(port);
 669                return 0;
 670        }
 671
 672        /* Pick next descriptor and fill from buffer */
 673        bdp = pinfo->tx_cur;
 674
 675        while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
 676               xmit->tail != xmit->head) {
 677                count = 0;
 678                p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 679                while (count < pinfo->tx_fifosize) {
 680                        *p++ = xmit->buf[xmit->tail];
 681                        xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 682                        port->icount.tx++;
 683                        count++;
 684                        if (xmit->head == xmit->tail)
 685                                break;
 686                }
 687                out_be16(&bdp->cbd_datlen, count);
 688                setbits16(&bdp->cbd_sc, BD_SC_READY);
 689                /* Get next BD. */
 690                if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 691                        bdp = pinfo->tx_bd_base;
 692                else
 693                        bdp++;
 694        }
 695        pinfo->tx_cur = bdp;
 696
 697        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 698                uart_write_wakeup(port);
 699
 700        if (uart_circ_empty(xmit)) {
 701                cpm_uart_stop_tx(port);
 702                return 0;
 703        }
 704
 705        return 1;
 706}
 707
 708/*
 709 * init buffer descriptors
 710 */
 711static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
 712{
 713        int i;
 714        u8 *mem_addr;
 715        cbd_t __iomem *bdp;
 716
 717        pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
 718
 719        /* Set the physical address of the host memory
 720         * buffers in the buffer descriptors, and the
 721         * virtual address for us to work with.
 722         */
 723        mem_addr = pinfo->mem_addr;
 724        bdp = pinfo->rx_cur = pinfo->rx_bd_base;
 725        for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
 726                out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 727                out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
 728                mem_addr += pinfo->rx_fifosize;
 729        }
 730
 731        out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 732        out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
 733
 734        /* Set the physical address of the host memory
 735         * buffers in the buffer descriptors, and the
 736         * virtual address for us to work with.
 737         */
 738        mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
 739        bdp = pinfo->tx_cur = pinfo->tx_bd_base;
 740        for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
 741                out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 742                out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
 743                mem_addr += pinfo->tx_fifosize;
 744        }
 745
 746        out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 747        out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
 748}
 749
 750static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 751{
 752        scc_t __iomem *scp;
 753        scc_uart_t __iomem *sup;
 754
 755        pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
 756
 757        scp = pinfo->sccp;
 758        sup = pinfo->sccup;
 759
 760        /* Store address */
 761        out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
 762                 (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 763        out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
 764                 (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 765
 766        /* Set up the uart parameters in the
 767         * parameter ram.
 768         */
 769
 770        cpm_set_scc_fcr(sup);
 771
 772        out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 773        out_be16(&sup->scc_maxidl, pinfo->rx_fifosize);
 774        out_be16(&sup->scc_brkcr, 1);
 775        out_be16(&sup->scc_parec, 0);
 776        out_be16(&sup->scc_frmec, 0);
 777        out_be16(&sup->scc_nosec, 0);
 778        out_be16(&sup->scc_brkec, 0);
 779        out_be16(&sup->scc_uaddr1, 0);
 780        out_be16(&sup->scc_uaddr2, 0);
 781        out_be16(&sup->scc_toseq, 0);
 782        out_be16(&sup->scc_char1, 0x8000);
 783        out_be16(&sup->scc_char2, 0x8000);
 784        out_be16(&sup->scc_char3, 0x8000);
 785        out_be16(&sup->scc_char4, 0x8000);
 786        out_be16(&sup->scc_char5, 0x8000);
 787        out_be16(&sup->scc_char6, 0x8000);
 788        out_be16(&sup->scc_char7, 0x8000);
 789        out_be16(&sup->scc_char8, 0x8000);
 790        out_be16(&sup->scc_rccm, 0xc0ff);
 791
 792        /* Send the CPM an initialize command.
 793         */
 794        cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 795
 796        /* Set UART mode, 8 bit, no parity, one stop.
 797         * Enable receive and transmit.
 798         */
 799        out_be32(&scp->scc_gsmrh, 0);
 800        out_be32(&scp->scc_gsmrl,
 801                 SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
 802
 803        /* Enable rx interrupts  and clear all pending events.  */
 804        out_be16(&scp->scc_sccm, 0);
 805        out_be16(&scp->scc_scce, 0xffff);
 806        out_be16(&scp->scc_dsr, 0x7e7e);
 807        out_be16(&scp->scc_psmr, 0x3000);
 808
 809        setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 810}
 811
 812static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
 813{
 814        smc_t __iomem *sp;
 815        smc_uart_t __iomem *up;
 816
 817        pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
 818
 819        sp = pinfo->smcp;
 820        up = pinfo->smcup;
 821
 822        /* Store address */
 823        out_be16(&pinfo->smcup->smc_rbase,
 824                 (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 825        out_be16(&pinfo->smcup->smc_tbase,
 826                 (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 827
 828/*
 829 *  In case SMC1 is being relocated...
 830 */
 831#if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
 832        out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
 833        out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
 834        out_be32(&up->smc_rstate, 0);
 835        out_be32(&up->smc_tstate, 0);
 836        out_be16(&up->smc_brkcr, 1);              /* number of break chars */
 837        out_be16(&up->smc_brkec, 0);
 838#endif
 839
 840        /* Set up the uart parameters in the
 841         * parameter ram.
 842         */
 843        cpm_set_smc_fcr(up);
 844
 845        /* Using idle charater time requires some additional tuning.  */
 846        out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
 847        out_be16(&up->smc_maxidl, pinfo->rx_fifosize);
 848        out_be16(&up->smc_brklen, 0);
 849        out_be16(&up->smc_brkec, 0);
 850        out_be16(&up->smc_brkcr, 1);
 851
 852        cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 853
 854        /* Set UART mode, 8 bit, no parity, one stop.
 855         * Enable receive and transmit.
 856         */
 857        out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
 858
 859        /* Enable only rx interrupts clear all pending events. */
 860        out_8(&sp->smc_smcm, 0);
 861        out_8(&sp->smc_smce, 0xff);
 862
 863        setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 864}
 865
 866/*
 867 * Initialize port. This is called from early_console stuff
 868 * so we have to be careful here !
 869 */
 870static int cpm_uart_request_port(struct uart_port *port)
 871{
 872        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 873        int ret;
 874
 875        pr_debug("CPM uart[%d]:request port\n", port->line);
 876
 877        if (pinfo->flags & FLAG_CONSOLE)
 878                return 0;
 879
 880        if (IS_SMC(pinfo)) {
 881                clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
 882                clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 883        } else {
 884                clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 885                clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 886        }
 887
 888        ret = cpm_uart_allocbuf(pinfo, 0);
 889
 890        if (ret)
 891                return ret;
 892
 893        cpm_uart_initbd(pinfo);
 894        if (IS_SMC(pinfo))
 895                cpm_uart_init_smc(pinfo);
 896        else
 897                cpm_uart_init_scc(pinfo);
 898
 899        return 0;
 900}
 901
 902static void cpm_uart_release_port(struct uart_port *port)
 903{
 904        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 905
 906        if (!(pinfo->flags & FLAG_CONSOLE))
 907                cpm_uart_freebuf(pinfo);
 908}
 909
 910/*
 911 * Configure/autoconfigure the port.
 912 */
 913static void cpm_uart_config_port(struct uart_port *port, int flags)
 914{
 915        pr_debug("CPM uart[%d]:config_port\n", port->line);
 916
 917        if (flags & UART_CONFIG_TYPE) {
 918                port->type = PORT_CPM;
 919                cpm_uart_request_port(port);
 920        }
 921}
 922
 923#ifdef CONFIG_CONSOLE_POLL
 924/* Serial polling routines for writing and reading from the uart while
 925 * in an interrupt or debug context.
 926 */
 927
 928#define GDB_BUF_SIZE    512     /* power of 2, please */
 929
 930static char poll_buf[GDB_BUF_SIZE];
 931static char *pollp;
 932static int poll_chars;
 933
 934static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
 935{
 936        u_char          c, *cp;
 937        volatile cbd_t  *bdp;
 938        int             i;
 939
 940        /* Get the address of the host memory buffer.
 941         */
 942        bdp = pinfo->rx_cur;
 943        while (bdp->cbd_sc & BD_SC_EMPTY)
 944                ;
 945
 946        /* If the buffer address is in the CPM DPRAM, don't
 947         * convert it.
 948         */
 949        cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
 950
 951        if (obuf) {
 952                i = c = bdp->cbd_datlen;
 953                while (i-- > 0)
 954                        *obuf++ = *cp++;
 955        } else
 956                c = *cp;
 957        bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
 958        bdp->cbd_sc |= BD_SC_EMPTY;
 959
 960        if (bdp->cbd_sc & BD_SC_WRAP)
 961                bdp = pinfo->rx_bd_base;
 962        else
 963                bdp++;
 964        pinfo->rx_cur = (cbd_t *)bdp;
 965
 966        return (int)c;
 967}
 968
 969static int cpm_get_poll_char(struct uart_port *port)
 970{
 971        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 972
 973        if (!serial_polled) {
 974                serial_polled = 1;
 975                poll_chars = 0;
 976        }
 977        if (poll_chars <= 0) {
 978                poll_chars = poll_wait_key(poll_buf, pinfo);
 979                pollp = poll_buf;
 980        }
 981        poll_chars--;
 982        return *pollp++;
 983}
 984
 985static void cpm_put_poll_char(struct uart_port *port,
 986                         unsigned char c)
 987{
 988        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 989        static char ch[2];
 990
 991        ch[0] = (char)c;
 992        cpm_uart_early_write(pinfo->port.line, ch, 1);
 993}
 994#endif /* CONFIG_CONSOLE_POLL */
 995
 996static struct uart_ops cpm_uart_pops = {
 997        .tx_empty       = cpm_uart_tx_empty,
 998        .set_mctrl      = cpm_uart_set_mctrl,
 999        .get_mctrl      = cpm_uart_get_mctrl,
1000        .stop_tx        = cpm_uart_stop_tx,
1001        .start_tx       = cpm_uart_start_tx,
1002        .stop_rx        = cpm_uart_stop_rx,
1003        .enable_ms      = cpm_uart_enable_ms,
1004        .break_ctl      = cpm_uart_break_ctl,
1005        .startup        = cpm_uart_startup,
1006        .shutdown       = cpm_uart_shutdown,
1007        .set_termios    = cpm_uart_set_termios,
1008        .type           = cpm_uart_type,
1009        .release_port   = cpm_uart_release_port,
1010        .request_port   = cpm_uart_request_port,
1011        .config_port    = cpm_uart_config_port,
1012        .verify_port    = cpm_uart_verify_port,
1013#ifdef CONFIG_CONSOLE_POLL
1014        .poll_get_char = cpm_get_poll_char,
1015        .poll_put_char = cpm_put_poll_char,
1016#endif
1017};
1018
1019struct uart_cpm_port cpm_uart_ports[UART_NR];
1020
1021static int cpm_uart_init_port(struct device_node *np,
1022                              struct uart_cpm_port *pinfo)
1023{
1024        const u32 *data;
1025        void __iomem *mem, *pram;
1026        int len;
1027        int ret;
1028        int i;
1029
1030        data = of_get_property(np, "clock", NULL);
1031        if (data) {
1032                struct clk *clk = clk_get(NULL, (const char*)data);
1033                if (!IS_ERR(clk))
1034                        pinfo->clk = clk;
1035        }
1036        if (!pinfo->clk) {
1037                data = of_get_property(np, "fsl,cpm-brg", &len);
1038                if (!data || len != 4) {
1039                        printk(KERN_ERR "CPM UART %s has no/invalid "
1040                                        "fsl,cpm-brg property.\n", np->name);
1041                        return -EINVAL;
1042                }
1043                pinfo->brg = *data;
1044        }
1045
1046        data = of_get_property(np, "fsl,cpm-command", &len);
1047        if (!data || len != 4) {
1048                printk(KERN_ERR "CPM UART %s has no/invalid "
1049                                "fsl,cpm-command property.\n", np->name);
1050                return -EINVAL;
1051        }
1052        pinfo->command = *data;
1053
1054        mem = of_iomap(np, 0);
1055        if (!mem)
1056                return -ENOMEM;
1057
1058        if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
1059            of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
1060                pinfo->sccp = mem;
1061                pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1062        } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
1063                   of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
1064                pinfo->flags |= FLAG_SMC;
1065                pinfo->smcp = mem;
1066                pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1067        } else {
1068                ret = -ENODEV;
1069                goto out_mem;
1070        }
1071
1072        if (!pram) {
1073                ret = -ENOMEM;
1074                goto out_mem;
1075        }
1076
1077        pinfo->tx_nrfifos = TX_NUM_FIFO;
1078        pinfo->tx_fifosize = TX_BUF_SIZE;
1079        pinfo->rx_nrfifos = RX_NUM_FIFO;
1080        pinfo->rx_fifosize = RX_BUF_SIZE;
1081
1082        pinfo->port.uartclk = ppc_proc_freq;
1083        pinfo->port.mapbase = (unsigned long)mem;
1084        pinfo->port.type = PORT_CPM;
1085        pinfo->port.ops = &cpm_uart_pops,
1086        pinfo->port.iotype = UPIO_MEM;
1087        pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1088        spin_lock_init(&pinfo->port.lock);
1089
1090        pinfo->port.irq = of_irq_to_resource(np, 0, NULL);
1091        if (pinfo->port.irq == NO_IRQ) {
1092                ret = -EINVAL;
1093                goto out_pram;
1094        }
1095
1096        for (i = 0; i < NUM_GPIOS; i++)
1097                pinfo->gpios[i] = of_get_gpio(np, i);
1098
1099        return cpm_uart_request_port(&pinfo->port);
1100
1101out_pram:
1102        cpm_uart_unmap_pram(pinfo, pram);
1103out_mem:
1104        iounmap(mem);
1105        return ret;
1106}
1107
1108#ifdef CONFIG_SERIAL_CPM_CONSOLE
1109/*
1110 *      Print a string to the serial port trying not to disturb
1111 *      any possible real use of the port...
1112 *
1113 *      Note that this is called with interrupts already disabled
1114 */
1115static void cpm_uart_console_write(struct console *co, const char *s,
1116                                   u_int count)
1117{
1118        struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1119        unsigned int i;
1120        cbd_t __iomem *bdp, *bdbase;
1121        unsigned char *cp;
1122        unsigned long flags;
1123        int nolock = oops_in_progress;
1124
1125        if (unlikely(nolock)) {
1126                local_irq_save(flags);
1127        } else {
1128                spin_lock_irqsave(&pinfo->port.lock, flags);
1129        }
1130
1131        /* Get the address of the host memory buffer.
1132         */
1133        bdp = pinfo->tx_cur;
1134        bdbase = pinfo->tx_bd_base;
1135
1136        /*
1137         * Now, do each character.  This is not as bad as it looks
1138         * since this is a holding FIFO and not a transmitting FIFO.
1139         * We could add the complexity of filling the entire transmit
1140         * buffer, but we would just wait longer between accesses......
1141         */
1142        for (i = 0; i < count; i++, s++) {
1143                /* Wait for transmitter fifo to empty.
1144                 * Ready indicates output is ready, and xmt is doing
1145                 * that, not that it is ready for us to send.
1146                 */
1147                while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1148                        ;
1149
1150                /* Send the character out.
1151                 * If the buffer address is in the CPM DPRAM, don't
1152                 * convert it.
1153                 */
1154                cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
1155                *cp = *s;
1156
1157                out_be16(&bdp->cbd_datlen, 1);
1158                setbits16(&bdp->cbd_sc, BD_SC_READY);
1159
1160                if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1161                        bdp = bdbase;
1162                else
1163                        bdp++;
1164
1165                /* if a LF, also do CR... */
1166                if (*s == 10) {
1167                        while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1168                                ;
1169
1170                        cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
1171                        *cp = 13;
1172
1173                        out_be16(&bdp->cbd_datlen, 1);
1174                        setbits16(&bdp->cbd_sc, BD_SC_READY);
1175
1176                        if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1177                                bdp = bdbase;
1178                        else
1179                                bdp++;
1180                }
1181        }
1182
1183        /*
1184         * Finally, Wait for transmitter & holding register to empty
1185         *  and restore the IER
1186         */
1187        while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1188                ;
1189
1190        pinfo->tx_cur = bdp;
1191
1192        if (unlikely(nolock)) {
1193                local_irq_restore(flags);
1194        } else {
1195                spin_unlock_irqrestore(&pinfo->port.lock, flags);
1196        }
1197}
1198
1199
1200static int __init cpm_uart_console_setup(struct console *co, char *options)
1201{
1202        int baud = 38400;
1203        int bits = 8;
1204        int parity = 'n';
1205        int flow = 'n';
1206        int ret;
1207        struct uart_cpm_port *pinfo;
1208        struct uart_port *port;
1209
1210        struct device_node *np = NULL;
1211        int i = 0;
1212
1213        if (co->index >= UART_NR) {
1214                printk(KERN_ERR "cpm_uart: console index %d too high\n",
1215                       co->index);
1216                return -ENODEV;
1217        }
1218
1219        do {
1220                np = of_find_node_by_type(np, "serial");
1221                if (!np)
1222                        return -ENODEV;
1223
1224                if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1225                    !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1226                    !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1227                    !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1228                        i--;
1229        } while (i++ != co->index);
1230
1231        pinfo = &cpm_uart_ports[co->index];
1232
1233        pinfo->flags |= FLAG_CONSOLE;
1234        port = &pinfo->port;
1235
1236        ret = cpm_uart_init_port(np, pinfo);
1237        of_node_put(np);
1238        if (ret)
1239                return ret;
1240
1241        if (options) {
1242                uart_parse_options(options, &baud, &parity, &bits, &flow);
1243        } else {
1244                if ((baud = uart_baudrate()) == -1)
1245                        baud = 9600;
1246        }
1247
1248#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1249        udbg_putc = NULL;
1250#endif
1251
1252        if (IS_SMC(pinfo)) {
1253                out_be16(&pinfo->smcup->smc_brkcr, 0);
1254                cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1255                clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1256                clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1257        } else {
1258                out_be16(&pinfo->sccup->scc_brkcr, 0);
1259                cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
1260                clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1261                clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1262        }
1263
1264        ret = cpm_uart_allocbuf(pinfo, 1);
1265
1266        if (ret)
1267                return ret;
1268
1269        cpm_uart_initbd(pinfo);
1270
1271        if (IS_SMC(pinfo))
1272                cpm_uart_init_smc(pinfo);
1273        else
1274                cpm_uart_init_scc(pinfo);
1275
1276        uart_set_options(port, co, baud, parity, bits, flow);
1277        cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1278
1279        return 0;
1280}
1281
1282static struct uart_driver cpm_reg;
1283static struct console cpm_scc_uart_console = {
1284        .name           = "ttyCPM",
1285        .write          = cpm_uart_console_write,
1286        .device         = uart_console_device,
1287        .setup          = cpm_uart_console_setup,
1288        .flags          = CON_PRINTBUFFER,
1289        .index          = -1,
1290        .data           = &cpm_reg,
1291};
1292
1293static int __init cpm_uart_console_init(void)
1294{
1295        register_console(&cpm_scc_uart_console);
1296        return 0;
1297}
1298
1299console_initcall(cpm_uart_console_init);
1300
1301#define CPM_UART_CONSOLE        &cpm_scc_uart_console
1302#else
1303#define CPM_UART_CONSOLE        NULL
1304#endif
1305
1306static struct uart_driver cpm_reg = {
1307        .owner          = THIS_MODULE,
1308        .driver_name    = "ttyCPM",
1309        .dev_name       = "ttyCPM",
1310        .major          = SERIAL_CPM_MAJOR,
1311        .minor          = SERIAL_CPM_MINOR,
1312        .cons           = CPM_UART_CONSOLE,
1313        .nr             = UART_NR,
1314};
1315
1316static int probe_index;
1317
1318static int __devinit cpm_uart_probe(struct of_device *ofdev,
1319                                    const struct of_device_id *match)
1320{
1321        int index = probe_index++;
1322        struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1323        int ret;
1324
1325        pinfo->port.line = index;
1326
1327        if (index >= UART_NR)
1328                return -ENODEV;
1329
1330        dev_set_drvdata(&ofdev->dev, pinfo);
1331
1332        ret = cpm_uart_init_port(ofdev->node, pinfo);
1333        if (ret)
1334                return ret;
1335
1336        /* initialize the device pointer for the port */
1337        pinfo->port.dev = &ofdev->dev;
1338
1339        return uart_add_one_port(&cpm_reg, &pinfo->port);
1340}
1341
1342static int __devexit cpm_uart_remove(struct of_device *ofdev)
1343{
1344        struct uart_cpm_port *pinfo = dev_get_drvdata(&ofdev->dev);
1345        return uart_remove_one_port(&cpm_reg, &pinfo->port);
1346}
1347
1348static struct of_device_id cpm_uart_match[] = {
1349        {
1350                .compatible = "fsl,cpm1-smc-uart",
1351        },
1352        {
1353                .compatible = "fsl,cpm1-scc-uart",
1354        },
1355        {
1356                .compatible = "fsl,cpm2-smc-uart",
1357        },
1358        {
1359                .compatible = "fsl,cpm2-scc-uart",
1360        },
1361        {}
1362};
1363
1364static struct of_platform_driver cpm_uart_driver = {
1365        .name = "cpm_uart",
1366        .match_table = cpm_uart_match,
1367        .probe = cpm_uart_probe,
1368        .remove = cpm_uart_remove,
1369 };
1370
1371static int __init cpm_uart_init(void)
1372{
1373        int ret = uart_register_driver(&cpm_reg);
1374        if (ret)
1375                return ret;
1376
1377        ret = of_register_platform_driver(&cpm_uart_driver);
1378        if (ret)
1379                uart_unregister_driver(&cpm_reg);
1380
1381        return ret;
1382}
1383
1384static void __exit cpm_uart_exit(void)
1385{
1386        of_unregister_platform_driver(&cpm_uart_driver);
1387        uart_unregister_driver(&cpm_reg);
1388}
1389
1390module_init(cpm_uart_init);
1391module_exit(cpm_uart_exit);
1392
1393MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1394MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1395MODULE_LICENSE("GPL");
1396MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);
1397