linux/drivers/watchdog/i6300esb.c
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   1/*
   2 *      i6300esb:       Watchdog timer driver for Intel 6300ESB chipset
   3 *
   4 *      (c) Copyright 2004 Google Inc.
   5 *      (c) Copyright 2005 David H\xC3\xA4rdeman <david@2gen.com>
   6 *
   7 *      This program is free software; you can redistribute it and/or
   8 *      modify it under the terms of the GNU General Public License
   9 *      as published by the Free Software Foundation; either version
  10 *      2 of the License, or (at your option) any later version.
  11 *
  12 *      based on i810-tco.c which is in turn based on softdog.c
  13 *
  14 *      The timer is implemented in the following I/O controller hubs:
  15 *      (See the intel documentation on http://developer.intel.com.)
  16 *      6300ESB chip : document number 300641-003
  17 *
  18 *  2004YYZZ Ross Biro
  19 *      Initial version 0.01
  20 *  2004YYZZ Ross Biro
  21 *      Version 0.02
  22 *  20050210 David H\xC3\xA4rdeman <david@2gen.com>
  23 *      Ported driver to kernel 2.6
  24 */
  25
  26/*
  27 *      Includes, defines, variables, module parameters, ...
  28 */
  29
  30#include <linux/module.h>
  31#include <linux/types.h>
  32#include <linux/kernel.h>
  33#include <linux/fs.h>
  34#include <linux/mm.h>
  35#include <linux/miscdevice.h>
  36#include <linux/watchdog.h>
  37#include <linux/reboot.h>
  38#include <linux/init.h>
  39#include <linux/pci.h>
  40#include <linux/ioport.h>
  41#include <linux/uaccess.h>
  42#include <linux/io.h>
  43
  44/* Module and version information */
  45#define ESB_VERSION "0.03"
  46#define ESB_MODULE_NAME "i6300ESB timer"
  47#define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
  48#define PFX ESB_MODULE_NAME ": "
  49
  50/* PCI configuration registers */
  51#define ESB_CONFIG_REG  0x60            /* Config register                   */
  52#define ESB_LOCK_REG    0x68            /* WDT lock register                 */
  53
  54/* Memory mapped registers */
  55#define ESB_TIMER1_REG  BASEADDR + 0x00 /* Timer1 value after each reset     */
  56#define ESB_TIMER2_REG  BASEADDR + 0x04 /* Timer2 value after each reset     */
  57#define ESB_GINTSR_REG  BASEADDR + 0x08 /* General Interrupt Status Register */
  58#define ESB_RELOAD_REG  BASEADDR + 0x0c /* Reload register                   */
  59
  60/* Lock register bits */
  61#define ESB_WDT_FUNC    (0x01 << 2)   /* Watchdog functionality            */
  62#define ESB_WDT_ENABLE  (0x01 << 1)   /* Enable WDT                        */
  63#define ESB_WDT_LOCK    (0x01 << 0)   /* Lock (nowayout)                   */
  64
  65/* Config register bits */
  66#define ESB_WDT_REBOOT  (0x01 << 5)   /* Enable reboot on timeout          */
  67#define ESB_WDT_FREQ    (0x01 << 2)   /* Decrement frequency               */
  68#define ESB_WDT_INTTYPE (0x11 << 0)   /* Interrupt type on timer1 timeout  */
  69
  70/* Reload register bits */
  71#define ESB_WDT_RELOAD  (0x01 << 8)    /* prevent timeout                   */
  72
  73/* Magic constants */
  74#define ESB_UNLOCK1     0x80            /* Step 1 to unlock reset registers  */
  75#define ESB_UNLOCK2     0x86            /* Step 2 to unlock reset registers  */
  76
  77/* internal variables */
  78static void __iomem *BASEADDR;
  79static DEFINE_SPINLOCK(esb_lock); /* Guards the hardware */
  80static unsigned long timer_alive;
  81static struct pci_dev *esb_pci;
  82static unsigned short triggered; /* The status of the watchdog upon boot */
  83static char esb_expect_close;
  84
  85/* module parameters */
  86/* 30 sec default heartbeat (1 < heartbeat < 2*1023) */
  87#define WATCHDOG_HEARTBEAT 30
  88static int heartbeat = WATCHDOG_HEARTBEAT;  /* in seconds */
  89
  90module_param(heartbeat, int, 0);
  91MODULE_PARM_DESC(heartbeat,
  92                "Watchdog heartbeat in seconds. (1<heartbeat<2046, default="
  93                                __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
  94
  95static int nowayout = WATCHDOG_NOWAYOUT;
  96module_param(nowayout, int, 0);
  97MODULE_PARM_DESC(nowayout,
  98                "Watchdog cannot be stopped once started (default="
  99                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 100
 101/*
 102 * Some i6300ESB specific functions
 103 */
 104
 105/*
 106 * Prepare for reloading the timer by unlocking the proper registers.
 107 * This is performed by first writing 0x80 followed by 0x86 to the
 108 * reload register. After this the appropriate registers can be written
 109 * to once before they need to be unlocked again.
 110 */
 111static inline void esb_unlock_registers(void)
 112{
 113        writeb(ESB_UNLOCK1, ESB_RELOAD_REG);
 114        writeb(ESB_UNLOCK2, ESB_RELOAD_REG);
 115}
 116
 117static void esb_timer_start(void)
 118{
 119        u8 val;
 120
 121        /* Enable or Enable + Lock? */
 122        val = 0x02 | (nowayout ? 0x01 : 0x00);
 123        pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
 124}
 125
 126static int esb_timer_stop(void)
 127{
 128        u8 val;
 129
 130        spin_lock(&esb_lock);
 131        /* First, reset timers as suggested by the docs */
 132        esb_unlock_registers();
 133        writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
 134        /* Then disable the WDT */
 135        pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0);
 136        pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val);
 137        spin_unlock(&esb_lock);
 138
 139        /* Returns 0 if the timer was disabled, non-zero otherwise */
 140        return (val & 0x01);
 141}
 142
 143static void esb_timer_keepalive(void)
 144{
 145        spin_lock(&esb_lock);
 146        esb_unlock_registers();
 147        writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
 148        /* FIXME: Do we need to flush anything here? */
 149        spin_unlock(&esb_lock);
 150}
 151
 152static int esb_timer_set_heartbeat(int time)
 153{
 154        u32 val;
 155
 156        if (time < 0x1 || time > (2 * 0x03ff))
 157                return -EINVAL;
 158
 159        spin_lock(&esb_lock);
 160
 161        /* We shift by 9, so if we are passed a value of 1 sec,
 162         * val will be 1 << 9 = 512, then write that to two
 163         * timers => 2 * 512 = 1024 (which is decremented at 1KHz)
 164         */
 165        val = time << 9;
 166
 167        /* Write timer 1 */
 168        esb_unlock_registers();
 169        writel(val, ESB_TIMER1_REG);
 170
 171        /* Write timer 2 */
 172        esb_unlock_registers();
 173        writel(val, ESB_TIMER2_REG);
 174
 175        /* Reload */
 176        esb_unlock_registers();
 177        writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
 178
 179        /* FIXME: Do we need to flush everything out? */
 180
 181        /* Done */
 182        heartbeat = time;
 183        spin_unlock(&esb_lock);
 184        return 0;
 185}
 186
 187static int esb_timer_read(void)
 188{
 189        u32 count;
 190
 191        /* This isn't documented, and doesn't take into
 192         * acount which stage is running, but it looks
 193         * like a 20 bit count down, so we might as well report it.
 194         */
 195        pci_read_config_dword(esb_pci, 0x64, &count);
 196        return (int)count;
 197}
 198
 199/*
 200 *      /dev/watchdog handling
 201 */
 202
 203static int esb_open(struct inode *inode, struct file *file)
 204{
 205        /* /dev/watchdog can only be opened once */
 206        if (test_and_set_bit(0, &timer_alive))
 207                return -EBUSY;
 208
 209        /* Reload and activate timer */
 210        esb_timer_keepalive();
 211        esb_timer_start();
 212
 213        return nonseekable_open(inode, file);
 214}
 215
 216static int esb_release(struct inode *inode, struct file *file)
 217{
 218        /* Shut off the timer. */
 219        if (esb_expect_close == 42)
 220                esb_timer_stop();
 221        else {
 222                printk(KERN_CRIT PFX
 223                                "Unexpected close, not stopping watchdog!\n");
 224                esb_timer_keepalive();
 225        }
 226        clear_bit(0, &timer_alive);
 227        esb_expect_close = 0;
 228        return 0;
 229}
 230
 231static ssize_t esb_write(struct file *file, const char __user *data,
 232                          size_t len, loff_t *ppos)
 233{
 234        /* See if we got the magic character 'V' and reload the timer */
 235        if (len) {
 236                if (!nowayout) {
 237                        size_t i;
 238
 239                        /* note: just in case someone wrote the magic character
 240                         * five months ago... */
 241                        esb_expect_close = 0;
 242
 243                        /* scan to see whether or not we got the magic character */
 244                        for (i = 0; i != len; i++) {
 245                                char c;
 246                                if (get_user(c, data + i))
 247                                        return -EFAULT;
 248                                if (c == 'V')
 249                                        esb_expect_close = 42;
 250                        }
 251                }
 252
 253                /* someone wrote to us, we should reload the timer */
 254                esb_timer_keepalive();
 255        }
 256        return len;
 257}
 258
 259static long esb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 260{
 261        int new_options, retval = -EINVAL;
 262        int new_heartbeat;
 263        void __user *argp = (void __user *)arg;
 264        int __user *p = argp;
 265        static struct watchdog_info ident = {
 266                .options =              WDIOF_SETTIMEOUT |
 267                                        WDIOF_KEEPALIVEPING |
 268                                        WDIOF_MAGICCLOSE,
 269                .firmware_version =     0,
 270                .identity =             ESB_MODULE_NAME,
 271        };
 272
 273        switch (cmd) {
 274        case WDIOC_GETSUPPORT:
 275                return copy_to_user(argp, &ident,
 276                                        sizeof(ident)) ? -EFAULT : 0;
 277
 278        case WDIOC_GETSTATUS:
 279                return put_user(esb_timer_read(), p);
 280
 281        case WDIOC_GETBOOTSTATUS:
 282                return put_user(triggered, p);
 283
 284        case WDIOC_SETOPTIONS:
 285        {
 286                if (get_user(new_options, p))
 287                        return -EFAULT;
 288
 289                if (new_options & WDIOS_DISABLECARD) {
 290                        esb_timer_stop();
 291                        retval = 0;
 292                }
 293
 294                if (new_options & WDIOS_ENABLECARD) {
 295                        esb_timer_keepalive();
 296                        esb_timer_start();
 297                        retval = 0;
 298                }
 299                return retval;
 300        }
 301        case WDIOC_KEEPALIVE:
 302                esb_timer_keepalive();
 303                return 0;
 304
 305        case WDIOC_SETTIMEOUT:
 306        {
 307                if (get_user(new_heartbeat, p))
 308                        return -EFAULT;
 309                if (esb_timer_set_heartbeat(new_heartbeat))
 310                        return -EINVAL;
 311                esb_timer_keepalive();
 312                /* Fall */
 313        }
 314        case WDIOC_GETTIMEOUT:
 315                return put_user(heartbeat, p);
 316        default:
 317                return -ENOTTY;
 318        }
 319}
 320
 321/*
 322 *      Notify system
 323 */
 324
 325static int esb_notify_sys(struct notifier_block *this,
 326                                        unsigned long code, void *unused)
 327{
 328        if (code == SYS_DOWN || code == SYS_HALT)
 329                esb_timer_stop();       /* Turn the WDT off */
 330
 331        return NOTIFY_DONE;
 332}
 333
 334/*
 335 *      Kernel Interfaces
 336 */
 337
 338static const struct file_operations esb_fops = {
 339        .owner = THIS_MODULE,
 340        .llseek = no_llseek,
 341        .write = esb_write,
 342        .unlocked_ioctl = esb_ioctl,
 343        .open = esb_open,
 344        .release = esb_release,
 345};
 346
 347static struct miscdevice esb_miscdev = {
 348        .minor = WATCHDOG_MINOR,
 349        .name = "watchdog",
 350        .fops = &esb_fops,
 351};
 352
 353static struct notifier_block esb_notifier = {
 354        .notifier_call = esb_notify_sys,
 355};
 356
 357/*
 358 * Data for PCI driver interface
 359 *
 360 * This data only exists for exporting the supported
 361 * PCI ids via MODULE_DEVICE_TABLE.  We do not actually
 362 * register a pci_driver, because someone else might one day
 363 * want to register another driver on the same PCI id.
 364 */
 365static struct pci_device_id esb_pci_tbl[] = {
 366        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
 367        { 0, },                 /* End of list */
 368};
 369MODULE_DEVICE_TABLE(pci, esb_pci_tbl);
 370
 371/*
 372 *      Init & exit routines
 373 */
 374
 375static unsigned char __init esb_getdevice(void)
 376{
 377        u8 val1;
 378        unsigned short val2;
 379        /*
 380         *      Find the PCI device
 381         */
 382
 383        esb_pci = pci_get_device(PCI_VENDOR_ID_INTEL,
 384                                        PCI_DEVICE_ID_INTEL_ESB_9, NULL);
 385
 386        if (esb_pci) {
 387                if (pci_enable_device(esb_pci)) {
 388                        printk(KERN_ERR PFX "failed to enable device\n");
 389                        goto err_devput;
 390                }
 391
 392                if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) {
 393                        printk(KERN_ERR PFX "failed to request region\n");
 394                        goto err_disable;
 395                }
 396
 397                BASEADDR = pci_ioremap_bar(esb_pci, 0);
 398                if (BASEADDR == NULL) {
 399                        /* Something's wrong here, BASEADDR has to be set */
 400                        printk(KERN_ERR PFX "failed to get BASEADDR\n");
 401                        goto err_release;
 402                }
 403
 404                /*
 405                 * The watchdog has two timers, it can be setup so that the
 406                 * expiry of timer1 results in an interrupt and the expiry of
 407                 * timer2 results in a reboot. We set it to not generate
 408                 * any interrupts as there is not much we can do with it
 409                 * right now.
 410                 *
 411                 * We also enable reboots and set the timer frequency to
 412                 * the PCI clock divided by 2^15 (approx 1KHz).
 413                 */
 414                pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003);
 415
 416                /* Check that the WDT isn't already locked */
 417                pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1);
 418                if (val1 & ESB_WDT_LOCK)
 419                        printk(KERN_WARNING PFX "nowayout already set\n");
 420
 421                /* Set the timer to watchdog mode and disable it for now */
 422                pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00);
 423
 424                /* Check if the watchdog was previously triggered */
 425                esb_unlock_registers();
 426                val2 = readw(ESB_RELOAD_REG);
 427                triggered = (val2 & (0x01 << 9) >> 9);
 428
 429                /* Reset trigger flag and timers */
 430                esb_unlock_registers();
 431                writew((0x11 << 8), ESB_RELOAD_REG);
 432
 433                /* Done */
 434                return 1;
 435
 436err_release:
 437                pci_release_region(esb_pci, 0);
 438err_disable:
 439                pci_disable_device(esb_pci);
 440err_devput:
 441                pci_dev_put(esb_pci);
 442        }
 443        return 0;
 444}
 445
 446static int __init watchdog_init(void)
 447{
 448        int ret;
 449
 450        /* Check whether or not the hardware watchdog is there */
 451        if (!esb_getdevice() || esb_pci == NULL)
 452                return -ENODEV;
 453
 454        /* Check that the heartbeat value is within it's range;
 455           if not reset to the default */
 456        if (esb_timer_set_heartbeat(heartbeat)) {
 457                esb_timer_set_heartbeat(WATCHDOG_HEARTBEAT);
 458                printk(KERN_INFO PFX
 459                        "heartbeat value must be 1<heartbeat<2046, using %d\n",
 460                                                                heartbeat);
 461        }
 462        ret = register_reboot_notifier(&esb_notifier);
 463        if (ret != 0) {
 464                printk(KERN_ERR PFX
 465                        "cannot register reboot notifier (err=%d)\n", ret);
 466                goto err_unmap;
 467        }
 468
 469        ret = misc_register(&esb_miscdev);
 470        if (ret != 0) {
 471                printk(KERN_ERR PFX
 472                        "cannot register miscdev on minor=%d (err=%d)\n",
 473                                                        WATCHDOG_MINOR, ret);
 474                goto err_notifier;
 475        }
 476        esb_timer_stop();
 477        printk(KERN_INFO PFX
 478                "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
 479                                                BASEADDR, heartbeat, nowayout);
 480        return 0;
 481
 482err_notifier:
 483        unregister_reboot_notifier(&esb_notifier);
 484err_unmap:
 485        iounmap(BASEADDR);
 486/* err_release: */
 487        pci_release_region(esb_pci, 0);
 488/* err_disable: */
 489        pci_disable_device(esb_pci);
 490/* err_devput: */
 491        pci_dev_put(esb_pci);
 492        return ret;
 493}
 494
 495static void __exit watchdog_cleanup(void)
 496{
 497        /* Stop the timer before we leave */
 498        if (!nowayout)
 499                esb_timer_stop();
 500
 501        /* Deregister */
 502        misc_deregister(&esb_miscdev);
 503        unregister_reboot_notifier(&esb_notifier);
 504        iounmap(BASEADDR);
 505        pci_release_region(esb_pci, 0);
 506        pci_disable_device(esb_pci);
 507        pci_dev_put(esb_pci);
 508}
 509
 510module_init(watchdog_init);
 511module_exit(watchdog_cleanup);
 512
 513MODULE_AUTHOR("Ross Biro and David H\xC3\xA4rdeman");
 514MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
 515MODULE_LICENSE("GPL");
 516MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 517