linux/drivers/ide/cmd640.c
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   1/*
   2 *  Copyright (C) 1995-1996  Linus Torvalds & authors (see below)
   3 */
   4
   5/*
   6 *  Original authors:   abramov@cecmow.enet.dec.com (Igor Abramov)
   7 *                      mlord@pobox.com (Mark Lord)
   8 *
   9 *  See linux/MAINTAINERS for address of current maintainer.
  10 *
  11 *  This file provides support for the advanced features and bugs
  12 *  of IDE interfaces using the CMD Technologies 0640 IDE interface chip.
  13 *
  14 *  These chips are basically fucked by design, and getting this driver
  15 *  to work on every motherboard design that uses this screwed chip seems
  16 *  bloody well impossible.  However, we're still trying.
  17 *
  18 *  Version 0.97 worked for everybody.
  19 *
  20 *  User feedback is essential.  Many thanks to the beta test team:
  21 *
  22 *  A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
  23 *  bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
  24 *  chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de,
  25 *  derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
  26 *  flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
  27 *  j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
  28 *  kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu,
  29 *  peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com,
  30 *  s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net,
  31 *  steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com
  32 *  liug@mama.indstate.edu, and others.
  33 *
  34 *  Version 0.01        Initial version, hacked out of ide.c,
  35 *                      and #include'd rather than compiled separately.
  36 *                      This will get cleaned up in a subsequent release.
  37 *
  38 *  Version 0.02        Fixes for vlb initialization code, enable prefetch
  39 *                      for versions 'B' and 'C' of chip by default,
  40 *                      some code cleanup.
  41 *
  42 *  Version 0.03        Added reset of secondary interface,
  43 *                      and black list for devices which are not compatible
  44 *                      with prefetch mode. Separate function for setting
  45 *                      prefetch is added, possibly it will be called some
  46 *                      day from ioctl processing code.
  47 *
  48 *  Version 0.04        Now configs/compiles separate from ide.c
  49 *
  50 *  Version 0.05        Major rewrite of interface timing code.
  51 *                      Added new function cmd640_set_mode to set PIO mode
  52 *                      from ioctl call. New drives added to black list.
  53 *
  54 *  Version 0.06        More code cleanup. Prefetch is enabled only for
  55 *                      detected hard drives, not included in prefetch
  56 *                      black list.
  57 *
  58 *  Version 0.07        Changed to more conservative drive tuning policy.
  59 *                      Unknown drives, which report PIO < 4 are set to
  60 *                      (reported_PIO - 1) if it is supported, or to PIO0.
  61 *                      List of known drives extended by info provided by
  62 *                      CMD at their ftp site.
  63 *
  64 *  Version 0.08        Added autotune/noautotune support.
  65 *
  66 *  Version 0.09        Try to be smarter about 2nd port enabling.
  67 *  Version 0.10        Be nice and don't reset 2nd port.
  68 *  Version 0.11        Try to handle more weird situations.
  69 *
  70 *  Version 0.12        Lots of bug fixes from Laszlo Peter
  71 *                      irq unmasking disabled for reliability.
  72 *                      try to be even smarter about the second port.
  73 *                      tidy up source code formatting.
  74 *  Version 0.13        permit irq unmasking again.
  75 *  Version 0.90        massive code cleanup, some bugs fixed.
  76 *                      defaults all drives to PIO mode0, prefetch off.
  77 *                      autotune is OFF by default, with compile time flag.
  78 *                      prefetch can be turned OFF/ON using "hdparm -p8/-p9"
  79 *                       (requires hdparm-3.1 or newer)
  80 *  Version 0.91        first release to linux-kernel list.
  81 *  Version 0.92        move initial reg dump to separate callable function
  82 *                      change "readahead" to "prefetch" to avoid confusion
  83 *  Version 0.95        respect original BIOS timings unless autotuning.
  84 *                      tons of code cleanup and rearrangement.
  85 *                      added CONFIG_BLK_DEV_CMD640_ENHANCED option
  86 *                      prevent use of unmask when prefetch is on
  87 *  Version 0.96        prevent use of io_32bit when prefetch is off
  88 *  Version 0.97        fix VLB secondary interface for sjd@slip.net
  89 *                      other minor tune-ups:  0.96 was very good.
  90 *  Version 0.98        ignore PCI version when disabled by BIOS
  91 *  Version 0.99        display setup/active/recovery clocks with PIO mode
  92 *  Version 1.00        Mmm.. cannot depend on PCMD_ENA in all systems
  93 *  Version 1.01        slow/fast devsel can be selected with "hdparm -p6/-p7"
  94 *                       ("fast" is necessary for 32bit I/O in some systems)
  95 *  Version 1.02        fix bug that resulted in slow "setup times"
  96 *                       (patch courtesy of Zoltan Hidvegi)
  97 */
  98
  99#define CMD640_PREFETCH_MASKS 1
 100
 101/*#define CMD640_DUMP_REGS */
 102
 103#include <linux/types.h>
 104#include <linux/kernel.h>
 105#include <linux/delay.h>
 106#include <linux/ide.h>
 107#include <linux/init.h>
 108
 109#include <asm/io.h>
 110
 111#define DRV_NAME "cmd640"
 112
 113static int cmd640_vlb;
 114
 115/*
 116 * CMD640 specific registers definition.
 117 */
 118
 119#define VID             0x00
 120#define DID             0x02
 121#define PCMD            0x04
 122#define   PCMD_ENA      0x01
 123#define PSTTS           0x06
 124#define REVID           0x08
 125#define PROGIF          0x09
 126#define SUBCL           0x0a
 127#define BASCL           0x0b
 128#define BaseA0          0x10
 129#define BaseA1          0x14
 130#define BaseA2          0x18
 131#define BaseA3          0x1c
 132#define INTLINE         0x3c
 133#define INPINE          0x3d
 134
 135#define CFR             0x50
 136#define   CFR_DEVREV            0x03
 137#define   CFR_IDE01INTR         0x04
 138#define   CFR_DEVID             0x18
 139#define   CFR_AT_VESA_078h      0x20
 140#define   CFR_DSA1              0x40
 141#define   CFR_DSA0              0x80
 142
 143#define CNTRL           0x51
 144#define   CNTRL_DIS_RA0         0x40
 145#define   CNTRL_DIS_RA1         0x80
 146#define   CNTRL_ENA_2ND         0x08
 147
 148#define CMDTIM          0x52
 149#define ARTTIM0         0x53
 150#define DRWTIM0         0x54
 151#define ARTTIM1         0x55
 152#define DRWTIM1         0x56
 153#define ARTTIM23        0x57
 154#define   ARTTIM23_DIS_RA2      0x04
 155#define   ARTTIM23_DIS_RA3      0x08
 156#define DRWTIM23        0x58
 157#define BRST            0x59
 158
 159/*
 160 * Registers and masks for easy access by drive index:
 161 */
 162static u8 prefetch_regs[4]  = {CNTRL, CNTRL, ARTTIM23, ARTTIM23};
 163static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3};
 164
 165#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 166
 167static u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
 168static u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23};
 169
 170/*
 171 * Current cmd640 timing values for each drive.
 172 * The defaults for each are the slowest possible timings.
 173 */
 174static u8 setup_counts[4]    = {4, 4, 4, 4};     /* Address setup count (in clocks) */
 175static u8 active_counts[4]   = {16, 16, 16, 16}; /* Active count   (encoded) */
 176static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
 177
 178#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 179
 180static DEFINE_SPINLOCK(cmd640_lock);
 181
 182/*
 183 * Interface to access cmd640x registers
 184 */
 185static unsigned int cmd640_key;
 186static void (*__put_cmd640_reg)(u16 reg, u8 val);
 187static u8 (*__get_cmd640_reg)(u16 reg);
 188
 189/*
 190 * This is read from the CFR reg, and is used in several places.
 191 */
 192static unsigned int cmd640_chip_version;
 193
 194/*
 195 * The CMD640x chip does not support DWORD config write cycles, but some
 196 * of the BIOSes use them to implement the config services.
 197 * Therefore, we must use direct IO instead.
 198 */
 199
 200/* PCI method 1 access */
 201
 202static void put_cmd640_reg_pci1(u16 reg, u8 val)
 203{
 204        outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
 205        outb_p(val, (reg & 3) | 0xcfc);
 206}
 207
 208static u8 get_cmd640_reg_pci1(u16 reg)
 209{
 210        outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
 211        return inb_p((reg & 3) | 0xcfc);
 212}
 213
 214/* PCI method 2 access (from CMD datasheet) */
 215
 216static void put_cmd640_reg_pci2(u16 reg, u8 val)
 217{
 218        outb_p(0x10, 0xcf8);
 219        outb_p(val, cmd640_key + reg);
 220        outb_p(0, 0xcf8);
 221}
 222
 223static u8 get_cmd640_reg_pci2(u16 reg)
 224{
 225        u8 b;
 226
 227        outb_p(0x10, 0xcf8);
 228        b = inb_p(cmd640_key + reg);
 229        outb_p(0, 0xcf8);
 230        return b;
 231}
 232
 233/* VLB access */
 234
 235static void put_cmd640_reg_vlb(u16 reg, u8 val)
 236{
 237        outb_p(reg, cmd640_key);
 238        outb_p(val, cmd640_key + 4);
 239}
 240
 241static u8 get_cmd640_reg_vlb(u16 reg)
 242{
 243        outb_p(reg, cmd640_key);
 244        return inb_p(cmd640_key + 4);
 245}
 246
 247static u8 get_cmd640_reg(u16 reg)
 248{
 249        unsigned long flags;
 250        u8 b;
 251
 252        spin_lock_irqsave(&cmd640_lock, flags);
 253        b = __get_cmd640_reg(reg);
 254        spin_unlock_irqrestore(&cmd640_lock, flags);
 255        return b;
 256}
 257
 258static void put_cmd640_reg(u16 reg, u8 val)
 259{
 260        unsigned long flags;
 261
 262        spin_lock_irqsave(&cmd640_lock, flags);
 263        __put_cmd640_reg(reg, val);
 264        spin_unlock_irqrestore(&cmd640_lock, flags);
 265}
 266
 267static int __init match_pci_cmd640_device(void)
 268{
 269        const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06};
 270        unsigned int i;
 271        for (i = 0; i < 4; i++) {
 272                if (get_cmd640_reg(i) != ven_dev[i])
 273                        return 0;
 274        }
 275#ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT
 276        if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) {
 277                printk("ide: cmd640 on PCI disabled by BIOS\n");
 278                return 0;
 279        }
 280#endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */
 281        return 1; /* success */
 282}
 283
 284/*
 285 * Probe for CMD640x -- pci method 1
 286 */
 287static int __init probe_for_cmd640_pci1(void)
 288{
 289        __get_cmd640_reg = get_cmd640_reg_pci1;
 290        __put_cmd640_reg = put_cmd640_reg_pci1;
 291        for (cmd640_key = 0x80000000;
 292             cmd640_key <= 0x8000f800;
 293             cmd640_key += 0x800) {
 294                if (match_pci_cmd640_device())
 295                        return 1; /* success */
 296        }
 297        return 0;
 298}
 299
 300/*
 301 * Probe for CMD640x -- pci method 2
 302 */
 303static int __init probe_for_cmd640_pci2(void)
 304{
 305        __get_cmd640_reg = get_cmd640_reg_pci2;
 306        __put_cmd640_reg = put_cmd640_reg_pci2;
 307        for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) {
 308                if (match_pci_cmd640_device())
 309                        return 1; /* success */
 310        }
 311        return 0;
 312}
 313
 314/*
 315 * Probe for CMD640x -- vlb
 316 */
 317static int __init probe_for_cmd640_vlb(void)
 318{
 319        u8 b;
 320
 321        __get_cmd640_reg = get_cmd640_reg_vlb;
 322        __put_cmd640_reg = put_cmd640_reg_vlb;
 323        cmd640_key = 0x178;
 324        b = get_cmd640_reg(CFR);
 325        if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) {
 326                cmd640_key = 0x78;
 327                b = get_cmd640_reg(CFR);
 328                if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h))
 329                        return 0;
 330        }
 331        return 1; /* success */
 332}
 333
 334/*
 335 *  Returns 1 if an IDE interface/drive exists at 0x170,
 336 *  Returns 0 otherwise.
 337 */
 338static int __init secondary_port_responding(void)
 339{
 340        unsigned long flags;
 341
 342        spin_lock_irqsave(&cmd640_lock, flags);
 343
 344        outb_p(0x0a, 0x176);    /* select drive0 */
 345        udelay(100);
 346        if ((inb_p(0x176) & 0x1f) != 0x0a) {
 347                outb_p(0x1a, 0x176); /* select drive1 */
 348                udelay(100);
 349                if ((inb_p(0x176) & 0x1f) != 0x1a) {
 350                        spin_unlock_irqrestore(&cmd640_lock, flags);
 351                        return 0; /* nothing responded */
 352                }
 353        }
 354        spin_unlock_irqrestore(&cmd640_lock, flags);
 355        return 1; /* success */
 356}
 357
 358#ifdef CMD640_DUMP_REGS
 359/*
 360 * Dump out all cmd640 registers.  May be called from ide.c
 361 */
 362static void cmd640_dump_regs(void)
 363{
 364        unsigned int reg = cmd640_vlb ? 0x50 : 0x00;
 365
 366        /* Dump current state of chip registers */
 367        printk("ide: cmd640 internal register dump:");
 368        for (; reg <= 0x59; reg++) {
 369                if (!(reg & 0x0f))
 370                        printk("\n%04x:", reg);
 371                printk(" %02x", get_cmd640_reg(reg));
 372        }
 373        printk("\n");
 374}
 375#endif
 376
 377static void __set_prefetch_mode(ide_drive_t *drive, int mode)
 378{
 379        if (mode) {     /* want prefetch on? */
 380#if CMD640_PREFETCH_MASKS
 381                drive->dev_flags |= IDE_DFLAG_NO_UNMASK;
 382                drive->dev_flags &= ~IDE_DFLAG_UNMASK;
 383#endif
 384                drive->dev_flags &= ~IDE_DFLAG_NO_IO_32BIT;
 385        } else {
 386                drive->dev_flags &= ~IDE_DFLAG_NO_UNMASK;
 387                drive->dev_flags |= IDE_DFLAG_NO_IO_32BIT;
 388                drive->io_32bit = 0;
 389        }
 390}
 391
 392#ifndef CONFIG_BLK_DEV_CMD640_ENHANCED
 393/*
 394 * Check whether prefetch is on for a drive,
 395 * and initialize the unmask flags for safe operation.
 396 */
 397static void __init check_prefetch(ide_drive_t *drive, unsigned int index)
 398{
 399        u8 b = get_cmd640_reg(prefetch_regs[index]);
 400
 401        __set_prefetch_mode(drive, (b & prefetch_masks[index]) ? 0 : 1);
 402}
 403#else
 404
 405/*
 406 * Sets prefetch mode for a drive.
 407 */
 408static void set_prefetch_mode(ide_drive_t *drive, unsigned int index, int mode)
 409{
 410        unsigned long flags;
 411        int reg = prefetch_regs[index];
 412        u8 b;
 413
 414        spin_lock_irqsave(&cmd640_lock, flags);
 415        b = __get_cmd640_reg(reg);
 416        __set_prefetch_mode(drive, mode);
 417        if (mode)
 418                b &= ~prefetch_masks[index];    /* enable prefetch */
 419        else
 420                b |= prefetch_masks[index];     /* disable prefetch */
 421        __put_cmd640_reg(reg, b);
 422        spin_unlock_irqrestore(&cmd640_lock, flags);
 423}
 424
 425/*
 426 * Dump out current drive clocks settings
 427 */
 428static void display_clocks(unsigned int index)
 429{
 430        u8 active_count, recovery_count;
 431
 432        active_count = active_counts[index];
 433        if (active_count == 1)
 434                ++active_count;
 435        recovery_count = recovery_counts[index];
 436        if (active_count > 3 && recovery_count == 1)
 437                ++recovery_count;
 438        if (cmd640_chip_version > 1)
 439                recovery_count += 1;  /* cmd640b uses (count + 1)*/
 440        printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count);
 441}
 442
 443/*
 444 * Pack active and recovery counts into single byte representation
 445 * used by controller
 446 */
 447static inline u8 pack_nibbles(u8 upper, u8 lower)
 448{
 449        return ((upper & 0x0f) << 4) | (lower & 0x0f);
 450}
 451
 452/*
 453 * This routine writes the prepared setup/active/recovery counts
 454 * for a drive into the cmd640 chipset registers to active them.
 455 */
 456static void program_drive_counts(ide_drive_t *drive, unsigned int index)
 457{
 458        unsigned long flags;
 459        u8 setup_count    = setup_counts[index];
 460        u8 active_count   = active_counts[index];
 461        u8 recovery_count = recovery_counts[index];
 462
 463        /*
 464         * Set up address setup count and drive read/write timing registers.
 465         * Primary interface has individual count/timing registers for
 466         * each drive.  Secondary interface has one common set of registers,
 467         * so we merge the timings, using the slowest value for each timing.
 468         */
 469        if (index > 1) {
 470                ide_hwif_t *hwif = drive->hwif;
 471                ide_drive_t *peer = &hwif->drives[!(drive->dn & 1)];
 472                unsigned int mate = index ^ 1;
 473
 474                if (peer->dev_flags & IDE_DFLAG_PRESENT) {
 475                        if (setup_count < setup_counts[mate])
 476                                setup_count = setup_counts[mate];
 477                        if (active_count < active_counts[mate])
 478                                active_count = active_counts[mate];
 479                        if (recovery_count < recovery_counts[mate])
 480                                recovery_count = recovery_counts[mate];
 481                }
 482        }
 483
 484        /*
 485         * Convert setup_count to internal chipset representation
 486         */
 487        switch (setup_count) {
 488        case 4:  setup_count = 0x00; break;
 489        case 3:  setup_count = 0x80; break;
 490        case 1:
 491        case 2:  setup_count = 0x40; break;
 492        default: setup_count = 0xc0; /* case 5 */
 493        }
 494
 495        /*
 496         * Now that everything is ready, program the new timings
 497         */
 498        spin_lock_irqsave(&cmd640_lock, flags);
 499        /*
 500         * Program the address_setup clocks into ARTTIM reg,
 501         * and then the active/recovery counts into the DRWTIM reg
 502         * (this converts counts of 16 into counts of zero -- okay).
 503         */
 504        setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f;
 505        __put_cmd640_reg(arttim_regs[index], setup_count);
 506        __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count));
 507        spin_unlock_irqrestore(&cmd640_lock, flags);
 508}
 509
 510/*
 511 * Set a specific pio_mode for a drive
 512 */
 513static void cmd640_set_mode(ide_drive_t *drive, unsigned int index,
 514                            u8 pio_mode, unsigned int cycle_time)
 515{
 516        struct ide_timing *t;
 517        int setup_time, active_time, recovery_time, clock_time;
 518        u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
 519        int bus_speed;
 520
 521        if (cmd640_vlb)
 522                bus_speed = ide_vlb_clk ? ide_vlb_clk : 50;
 523        else
 524                bus_speed = ide_pci_clk ? ide_pci_clk : 33;
 525
 526        if (pio_mode > 5)
 527                pio_mode = 5;
 528
 529        t = ide_timing_find_mode(XFER_PIO_0 + pio_mode);
 530        setup_time  = t->setup;
 531        active_time = t->active;
 532
 533        recovery_time = cycle_time - (setup_time + active_time);
 534        clock_time = 1000 / bus_speed;
 535        cycle_count = DIV_ROUND_UP(cycle_time, clock_time);
 536
 537        setup_count = DIV_ROUND_UP(setup_time, clock_time);
 538
 539        active_count = DIV_ROUND_UP(active_time, clock_time);
 540        if (active_count < 2)
 541                active_count = 2; /* minimum allowed by cmd640 */
 542
 543        recovery_count = DIV_ROUND_UP(recovery_time, clock_time);
 544        recovery_count2 = cycle_count - (setup_count + active_count);
 545        if (recovery_count2 > recovery_count)
 546                recovery_count = recovery_count2;
 547        if (recovery_count < 2)
 548                recovery_count = 2; /* minimum allowed by cmd640 */
 549        if (recovery_count > 17) {
 550                active_count += recovery_count - 17;
 551                recovery_count = 17;
 552        }
 553        if (active_count > 16)
 554                active_count = 16; /* maximum allowed by cmd640 */
 555        if (cmd640_chip_version > 1)
 556                recovery_count -= 1;  /* cmd640b uses (count + 1)*/
 557        if (recovery_count > 16)
 558                recovery_count = 16; /* maximum allowed by cmd640 */
 559
 560        setup_counts[index]    = setup_count;
 561        active_counts[index]   = active_count;
 562        recovery_counts[index] = recovery_count;
 563
 564        /*
 565         * In a perfect world, we might set the drive pio mode here
 566         * (using WIN_SETFEATURE) before continuing.
 567         *
 568         * But we do not, because:
 569         *      1) this is the wrong place to do it (proper is do_special() in ide.c)
 570         *      2) in practice this is rarely, if ever, necessary
 571         */
 572        program_drive_counts(drive, index);
 573}
 574
 575static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio)
 576{
 577        unsigned int index = 0, cycle_time;
 578        u8 b;
 579
 580        switch (pio) {
 581        case 6: /* set fast-devsel off */
 582        case 7: /* set fast-devsel on */
 583                b = get_cmd640_reg(CNTRL) & ~0x27;
 584                if (pio & 1)
 585                        b |= 0x27;
 586                put_cmd640_reg(CNTRL, b);
 587                printk("%s: %sabled cmd640 fast host timing (devsel)\n",
 588                        drive->name, (pio & 1) ? "en" : "dis");
 589                return;
 590        case 8: /* set prefetch off */
 591        case 9: /* set prefetch on */
 592                set_prefetch_mode(drive, index, pio & 1);
 593                printk("%s: %sabled cmd640 prefetch\n",
 594                        drive->name, (pio & 1) ? "en" : "dis");
 595                return;
 596        }
 597
 598        cycle_time = ide_pio_cycle_time(drive, pio);
 599        cmd640_set_mode(drive, index, pio, cycle_time);
 600
 601        printk("%s: selected cmd640 PIO mode%d (%dns)",
 602                drive->name, pio, cycle_time);
 603
 604        display_clocks(index);
 605}
 606#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 607
 608static void cmd640_init_dev(ide_drive_t *drive)
 609{
 610        unsigned int i = drive->hwif->channel * 2 + (drive->dn & 1);
 611
 612#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 613        /*
 614         * Reset timing to the slowest speed and turn off prefetch.
 615         * This way, the drive identify code has a better chance.
 616         */
 617        setup_counts[i]    =  4;        /* max possible */
 618        active_counts[i]   = 16;        /* max possible */
 619        recovery_counts[i] = 16;        /* max possible */
 620        program_drive_counts(drive, i);
 621        set_prefetch_mode(drive, i, 0);
 622        printk(KERN_INFO DRV_NAME ": drive%d timings/prefetch cleared\n", i);
 623#else
 624        /*
 625         * Set the drive unmask flags to match the prefetch setting.
 626         */
 627        check_prefetch(drive, i);
 628        printk(KERN_INFO DRV_NAME ": drive%d timings/prefetch(%s) preserved\n",
 629                i, (drive->dev_flags & IDE_DFLAG_NO_IO_32BIT) ? "off" : "on");
 630#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 631}
 632
 633
 634static const struct ide_port_ops cmd640_port_ops = {
 635        .init_dev               = cmd640_init_dev,
 636#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 637        .set_pio_mode           = cmd640_set_pio_mode,
 638#endif
 639};
 640
 641static int pci_conf1(void)
 642{
 643        unsigned long flags;
 644        u32 tmp;
 645
 646        spin_lock_irqsave(&cmd640_lock, flags);
 647        outb(0x01, 0xCFB);
 648        tmp = inl(0xCF8);
 649        outl(0x80000000, 0xCF8);
 650        if (inl(0xCF8) == 0x80000000) {
 651                outl(tmp, 0xCF8);
 652                spin_unlock_irqrestore(&cmd640_lock, flags);
 653                return 1;
 654        }
 655        outl(tmp, 0xCF8);
 656        spin_unlock_irqrestore(&cmd640_lock, flags);
 657        return 0;
 658}
 659
 660static int pci_conf2(void)
 661{
 662        unsigned long flags;
 663
 664        spin_lock_irqsave(&cmd640_lock, flags);
 665        outb(0x00, 0xCFB);
 666        outb(0x00, 0xCF8);
 667        outb(0x00, 0xCFA);
 668        if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {
 669                spin_unlock_irqrestore(&cmd640_lock, flags);
 670                return 1;
 671        }
 672        spin_unlock_irqrestore(&cmd640_lock, flags);
 673        return 0;
 674}
 675
 676static const struct ide_port_info cmd640_port_info __initdata = {
 677        .chipset                = ide_cmd640,
 678        .host_flags             = IDE_HFLAG_SERIALIZE |
 679                                  IDE_HFLAG_NO_DMA |
 680                                  IDE_HFLAG_ABUSE_PREFETCH |
 681                                  IDE_HFLAG_ABUSE_FAST_DEVSEL,
 682        .port_ops               = &cmd640_port_ops,
 683        .pio_mask               = ATA_PIO5,
 684};
 685
 686static int cmd640x_init_one(unsigned long base, unsigned long ctl)
 687{
 688        if (!request_region(base, 8, DRV_NAME)) {
 689                printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX not free.\n",
 690                                DRV_NAME, base, base + 7);
 691                return -EBUSY;
 692        }
 693
 694        if (!request_region(ctl, 1, DRV_NAME)) {
 695                printk(KERN_ERR "%s: I/O resource 0x%lX not free.\n",
 696                                DRV_NAME, ctl);
 697                release_region(base, 8);
 698                return -EBUSY;
 699        }
 700
 701        return 0;
 702}
 703
 704/*
 705 * Probe for a cmd640 chipset, and initialize it if found.
 706 */
 707static int __init cmd640x_init(void)
 708{
 709        int second_port_cmd640 = 0, rc;
 710        const char *bus_type, *port2;
 711        u8 b, cfr;
 712        hw_regs_t hw[2], *hws[] = { NULL, NULL, NULL, NULL };
 713
 714        if (cmd640_vlb && probe_for_cmd640_vlb()) {
 715                bus_type = "VLB";
 716        } else {
 717                cmd640_vlb = 0;
 718                /* Find out what kind of PCI probing is supported otherwise
 719                   Justin Gibbs will sulk.. */
 720                if (pci_conf1() && probe_for_cmd640_pci1())
 721                        bus_type = "PCI (type1)";
 722                else if (pci_conf2() && probe_for_cmd640_pci2())
 723                        bus_type = "PCI (type2)";
 724                else
 725                        return 0;
 726        }
 727        /*
 728         * Undocumented magic (there is no 0x5b reg in specs)
 729         */
 730        put_cmd640_reg(0x5b, 0xbd);
 731        if (get_cmd640_reg(0x5b) != 0xbd) {
 732                printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n");
 733                return 0;
 734        }
 735        put_cmd640_reg(0x5b, 0);
 736
 737#ifdef CMD640_DUMP_REGS
 738        cmd640_dump_regs();
 739#endif
 740
 741        /*
 742         * Documented magic begins here
 743         */
 744        cfr = get_cmd640_reg(CFR);
 745        cmd640_chip_version = cfr & CFR_DEVREV;
 746        if (cmd640_chip_version == 0) {
 747                printk("ide: bad cmd640 revision: %d\n", cmd640_chip_version);
 748                return 0;
 749        }
 750
 751        rc = cmd640x_init_one(0x1f0, 0x3f6);
 752        if (rc)
 753                return rc;
 754
 755        rc = cmd640x_init_one(0x170, 0x376);
 756        if (rc) {
 757                release_region(0x3f6, 1);
 758                release_region(0x1f0, 8);
 759                return rc;
 760        }
 761
 762        memset(&hw, 0, sizeof(hw));
 763
 764        ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
 765        hw[0].irq = 14;
 766        hw[0].chipset = ide_cmd640;
 767
 768        ide_std_init_ports(&hw[1], 0x170, 0x376);
 769        hw[1].irq = 15;
 770        hw[1].chipset = ide_cmd640;
 771
 772        printk(KERN_INFO "cmd640: buggy cmd640%c interface on %s, config=0x%02x"
 773                         "\n", 'a' + cmd640_chip_version - 1, bus_type, cfr);
 774
 775        /*
 776         * Initialize data for primary port
 777         */
 778        hws[0] = &hw[0];
 779
 780        /*
 781         * Ensure compatibility by always using the slowest timings
 782         * for access to the drive's command register block,
 783         * and reset the prefetch burstsize to default (512 bytes).
 784         *
 785         * Maybe we need a way to NOT do these on *some* systems?
 786         */
 787        put_cmd640_reg(CMDTIM, 0);
 788        put_cmd640_reg(BRST, 0x40);
 789
 790        b = get_cmd640_reg(CNTRL);
 791
 792        /*
 793         * Try to enable the secondary interface, if not already enabled
 794         */
 795        if (secondary_port_responding()) {
 796                if ((b & CNTRL_ENA_2ND)) {
 797                        second_port_cmd640 = 1;
 798                        port2 = "okay";
 799                } else if (cmd640_vlb) {
 800                        second_port_cmd640 = 1;
 801                        port2 = "alive";
 802                } else
 803                        port2 = "not cmd640";
 804        } else {
 805                put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */
 806                if (secondary_port_responding()) {
 807                        second_port_cmd640 = 1;
 808                        port2 = "enabled";
 809                } else {
 810                        put_cmd640_reg(CNTRL, b); /* restore original setting */
 811                        port2 = "not responding";
 812                }
 813        }
 814
 815        /*
 816         * Initialize data for secondary cmd640 port, if enabled
 817         */
 818        if (second_port_cmd640)
 819                hws[1] = &hw[1];
 820
 821        printk(KERN_INFO "cmd640: %sserialized, secondary interface %s\n",
 822                         second_port_cmd640 ? "" : "not ", port2);
 823
 824#ifdef CMD640_DUMP_REGS
 825        cmd640_dump_regs();
 826#endif
 827
 828        return ide_host_add(&cmd640_port_info, hws, NULL);
 829}
 830
 831module_param_named(probe_vlb, cmd640_vlb, bool, 0);
 832MODULE_PARM_DESC(probe_vlb, "probe for VLB version of CMD640 chipset");
 833
 834module_init(cmd640x_init);
 835
 836MODULE_LICENSE("GPL");
 837