linux/drivers/pcmcia/i82092.c
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   1/* 
   2 * Driver for Intel I82092AA PCI-PCMCIA bridge.
   3 *
   4 * (C) 2001 Red Hat, Inc.
   5 *
   6 * Author: Arjan Van De Ven <arjanv@redhat.com>
   7 * Loosly based on i82365.c from the pcmcia-cs package
   8 */
   9
  10#include <linux/kernel.h>
  11#include <linux/module.h>
  12#include <linux/pci.h>
  13#include <linux/init.h>
  14#include <linux/workqueue.h>
  15#include <linux/interrupt.h>
  16#include <linux/device.h>
  17
  18#include <pcmcia/cs_types.h>
  19#include <pcmcia/ss.h>
  20#include <pcmcia/cs.h>
  21
  22#include <asm/system.h>
  23#include <asm/io.h>
  24
  25#include "i82092aa.h"
  26#include "i82365.h"
  27
  28MODULE_LICENSE("GPL");
  29
  30/* PCI core routines */
  31static struct pci_device_id i82092aa_pci_ids[] = {
  32        {
  33              .vendor = PCI_VENDOR_ID_INTEL,
  34              .device = PCI_DEVICE_ID_INTEL_82092AA_0,
  35              .subvendor = PCI_ANY_ID,
  36              .subdevice = PCI_ANY_ID,
  37         },
  38         {} 
  39};
  40MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids);
  41
  42#ifdef CONFIG_PM
  43static int i82092aa_socket_suspend (struct pci_dev *dev, pm_message_t state)
  44{
  45        return pcmcia_socket_dev_suspend(&dev->dev, state);
  46}
  47
  48static int i82092aa_socket_resume (struct pci_dev *dev)
  49{
  50        return pcmcia_socket_dev_resume(&dev->dev);
  51}
  52#endif
  53
  54static struct pci_driver i82092aa_pci_driver = {
  55        .name           = "i82092aa",
  56        .id_table       = i82092aa_pci_ids,
  57        .probe          = i82092aa_pci_probe,
  58        .remove         = __devexit_p(i82092aa_pci_remove),
  59#ifdef CONFIG_PM
  60        .suspend        = i82092aa_socket_suspend,
  61        .resume         = i82092aa_socket_resume,
  62#endif
  63};
  64
  65
  66/* the pccard structure and its functions */
  67static struct pccard_operations i82092aa_operations = {
  68        .init                   = i82092aa_init,
  69        .get_status             = i82092aa_get_status,
  70        .set_socket             = i82092aa_set_socket,
  71        .set_io_map             = i82092aa_set_io_map,
  72        .set_mem_map            = i82092aa_set_mem_map,
  73};
  74
  75/* The card can do upto 4 sockets, allocate a structure for each of them */
  76
  77struct socket_info {
  78        int     number;
  79        int     card_state;     /*  0 = no socket,
  80                                    1 = empty socket, 
  81                                    2 = card but not initialized,
  82                                    3 = operational card */
  83        unsigned int io_base;   /* base io address of the socket */
  84        
  85        struct pcmcia_socket socket;
  86        struct pci_dev *dev;    /* The PCI device for the socket */
  87};
  88
  89#define MAX_SOCKETS 4
  90static struct socket_info sockets[MAX_SOCKETS];
  91static int socket_count;  /* shortcut */                                                                                
  92
  93
  94static int __devinit i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
  95{
  96        unsigned char configbyte;
  97        int i, ret;
  98        
  99        enter("i82092aa_pci_probe");
 100        
 101        if ((ret = pci_enable_device(dev)))
 102                return ret;
 103                
 104        pci_read_config_byte(dev, 0x40, &configbyte);  /* PCI Configuration Control */
 105        switch(configbyte&6) {
 106                case 0:
 107                        socket_count = 2;
 108                        break;
 109                case 2:
 110                        socket_count = 1;
 111                        break;
 112                case 4:
 113                case 6:
 114                        socket_count = 4;
 115                        break;
 116                        
 117                default:
 118                        printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n");
 119                        ret = -EIO;
 120                        goto err_out_disable;
 121        }
 122        printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count);
 123
 124        if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) {
 125                ret = -EBUSY;
 126                goto err_out_disable;
 127        }
 128        
 129        for (i = 0;i<socket_count;i++) {
 130                sockets[i].card_state = 1; /* 1 = present but empty */
 131                sockets[i].io_base = pci_resource_start(dev, 0);
 132                sockets[i].socket.features |= SS_CAP_PCCARD;
 133                sockets[i].socket.map_size = 0x1000;
 134                sockets[i].socket.irq_mask = 0;
 135                sockets[i].socket.pci_irq  = dev->irq;
 136                sockets[i].socket.owner = THIS_MODULE;
 137
 138                sockets[i].number = i;
 139                
 140                if (card_present(i)) {
 141                        sockets[i].card_state = 3;
 142                        dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i);
 143                } else {
 144                        dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i);
 145                }
 146        }
 147                
 148        /* Now, specifiy that all interrupts are to be done as PCI interrupts */
 149        configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */
 150        pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */
 151
 152        /* Register the interrupt handler */
 153        dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq);
 154        if ((ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED, "i82092aa", i82092aa_interrupt))) {
 155                printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq);
 156                goto err_out_free_res;
 157        }
 158
 159        pci_set_drvdata(dev, &sockets[i].socket);
 160
 161        for (i = 0; i<socket_count; i++) {
 162                sockets[i].socket.dev.parent = &dev->dev;
 163                sockets[i].socket.ops = &i82092aa_operations;
 164                sockets[i].socket.resource_ops = &pccard_nonstatic_ops;
 165                ret = pcmcia_register_socket(&sockets[i].socket);
 166                if (ret) {
 167                        goto err_out_free_sockets;
 168                }
 169        }
 170
 171        leave("i82092aa_pci_probe");
 172        return 0;
 173
 174err_out_free_sockets:
 175        if (i) {
 176                for (i--;i>=0;i--) {
 177                        pcmcia_unregister_socket(&sockets[i].socket);
 178                }
 179        }
 180        free_irq(dev->irq, i82092aa_interrupt);
 181err_out_free_res:
 182        release_region(pci_resource_start(dev, 0), 2);
 183err_out_disable:
 184        pci_disable_device(dev);
 185        return ret;                     
 186}
 187
 188static void __devexit i82092aa_pci_remove(struct pci_dev *dev)
 189{
 190        struct pcmcia_socket *socket = pci_get_drvdata(dev);
 191
 192        enter("i82092aa_pci_remove");
 193        
 194        free_irq(dev->irq, i82092aa_interrupt);
 195
 196        if (socket)
 197                pcmcia_unregister_socket(socket);
 198
 199        leave("i82092aa_pci_remove");
 200}
 201
 202static DEFINE_SPINLOCK(port_lock);
 203
 204/* basic value read/write functions */
 205
 206static unsigned char indirect_read(int socket, unsigned short reg)
 207{
 208        unsigned short int port;
 209        unsigned char val;
 210        unsigned long flags;
 211        spin_lock_irqsave(&port_lock,flags);
 212        reg += socket * 0x40;
 213        port = sockets[socket].io_base;
 214        outb(reg,port);
 215        val = inb(port+1);
 216        spin_unlock_irqrestore(&port_lock,flags);
 217        return val;
 218}
 219
 220#if 0
 221static unsigned short indirect_read16(int socket, unsigned short reg)
 222{
 223        unsigned short int port;
 224        unsigned short tmp;
 225        unsigned long flags;
 226        spin_lock_irqsave(&port_lock,flags);
 227        reg  = reg + socket * 0x40;
 228        port = sockets[socket].io_base;
 229        outb(reg,port);
 230        tmp = inb(port+1);
 231        reg++;
 232        outb(reg,port);
 233        tmp = tmp | (inb(port+1)<<8);
 234        spin_unlock_irqrestore(&port_lock,flags);
 235        return tmp;
 236}
 237#endif
 238
 239static void indirect_write(int socket, unsigned short reg, unsigned char value)
 240{
 241        unsigned short int port;
 242        unsigned long flags;
 243        spin_lock_irqsave(&port_lock,flags);
 244        reg = reg + socket * 0x40;
 245        port = sockets[socket].io_base; 
 246        outb(reg,port);
 247        outb(value,port+1);
 248        spin_unlock_irqrestore(&port_lock,flags);
 249}
 250
 251static void indirect_setbit(int socket, unsigned short reg, unsigned char mask)
 252{
 253        unsigned short int port;
 254        unsigned char val;
 255        unsigned long flags;
 256        spin_lock_irqsave(&port_lock,flags);
 257        reg = reg + socket * 0x40;
 258        port = sockets[socket].io_base; 
 259        outb(reg,port);
 260        val = inb(port+1);
 261        val |= mask;
 262        outb(reg,port);
 263        outb(val,port+1);
 264        spin_unlock_irqrestore(&port_lock,flags);
 265}
 266
 267
 268static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask)
 269{
 270        unsigned short int port;
 271        unsigned char val;
 272        unsigned long flags;
 273        spin_lock_irqsave(&port_lock,flags);
 274        reg = reg + socket * 0x40;
 275        port = sockets[socket].io_base; 
 276        outb(reg,port);
 277        val = inb(port+1);
 278        val &= ~mask;
 279        outb(reg,port);
 280        outb(val,port+1);
 281        spin_unlock_irqrestore(&port_lock,flags);
 282}
 283
 284static void indirect_write16(int socket, unsigned short reg, unsigned short value)
 285{
 286        unsigned short int port;
 287        unsigned char val;
 288        unsigned long flags;
 289        spin_lock_irqsave(&port_lock,flags);
 290        reg = reg + socket * 0x40;
 291        port = sockets[socket].io_base; 
 292        
 293        outb(reg,port);
 294        val = value & 255;
 295        outb(val,port+1);
 296        
 297        reg++;
 298        
 299        outb(reg,port);
 300        val = value>>8;
 301        outb(val,port+1);
 302        spin_unlock_irqrestore(&port_lock,flags);
 303}
 304
 305/* simple helper functions */
 306/* External clock time, in nanoseconds.  120 ns = 8.33 MHz */
 307static int cycle_time = 120;
 308
 309static int to_cycles(int ns)
 310{
 311        if (cycle_time!=0)
 312                return ns/cycle_time;
 313        else
 314                return 0;
 315}
 316    
 317
 318/* Interrupt handler functionality */
 319
 320static irqreturn_t i82092aa_interrupt(int irq, void *dev)
 321{
 322        int i;
 323        int loopcount = 0;
 324        int handled = 0;
 325
 326        unsigned int events, active=0;
 327        
 328/*      enter("i82092aa_interrupt");*/
 329        
 330        while (1) {
 331                loopcount++;
 332                if (loopcount>20) {
 333                        printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n");
 334                        break;
 335                }
 336                
 337                active = 0;
 338                
 339                for (i=0;i<socket_count;i++) {
 340                        int csc;
 341                        if (sockets[i].card_state==0) /* Inactive socket, should not happen */
 342                                continue;
 343                        
 344                        csc = indirect_read(i,I365_CSC); /* card status change register */
 345                        
 346                        if (csc==0)  /* no events on this socket */
 347                                continue;
 348                        handled = 1;
 349                        events = 0;
 350                         
 351                        if (csc & I365_CSC_DETECT) {
 352                                events |= SS_DETECT;
 353                                printk("Card detected in socket %i!\n",i);
 354                         }
 355                        
 356                        if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) { 
 357                                /* For IO/CARDS, bit 0 means "read the card" */
 358                                events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; 
 359                        } else {
 360                                /* Check for battery/ready events */
 361                                events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
 362                                events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
 363                                events |= (csc & I365_CSC_READY) ? SS_READY : 0;
 364                        }
 365                        
 366                        if (events) {
 367                                pcmcia_parse_events(&sockets[i].socket, events);
 368                        }
 369                        active |= events;
 370                }
 371                                
 372                if (active==0) /* no more events to handle */
 373                        break;                          
 374                
 375        }
 376        return IRQ_RETVAL(handled);
 377/*      leave("i82092aa_interrupt");*/
 378}
 379
 380
 381
 382/* socket functions */
 383
 384static int card_present(int socketno)
 385{       
 386        unsigned int val;
 387        enter("card_present");
 388        
 389        if ((socketno<0) || (socketno >= MAX_SOCKETS))
 390                return 0;
 391        if (sockets[socketno].io_base == 0)
 392                return 0;
 393
 394                
 395        val = indirect_read(socketno, 1); /* Interface status register */
 396        if ((val&12)==12) {
 397                leave("card_present 1");
 398                return 1;
 399        }
 400                
 401        leave("card_present 0");
 402        return 0;
 403}
 404
 405static void set_bridge_state(int sock)
 406{
 407        enter("set_bridge_state");
 408        indirect_write(sock, I365_GBLCTL,0x00);
 409        indirect_write(sock, I365_GENCTL,0x00);
 410        
 411        indirect_setbit(sock, I365_INTCTL,0x08);
 412        leave("set_bridge_state");
 413}
 414
 415
 416
 417
 418
 419      
 420static int i82092aa_init(struct pcmcia_socket *sock)
 421{
 422        int i;
 423        struct resource res = { .start = 0, .end = 0x0fff };
 424        pccard_io_map io = { 0, 0, 0, 0, 1 };
 425        pccard_mem_map mem = { .res = &res, };
 426        
 427        enter("i82092aa_init");
 428                        
 429        for (i = 0; i < 2; i++) {
 430                io.map = i;
 431                i82092aa_set_io_map(sock, &io);
 432        }
 433        for (i = 0; i < 5; i++) {
 434                mem.map = i;
 435                i82092aa_set_mem_map(sock, &mem);
 436        }
 437        
 438        leave("i82092aa_init");
 439        return 0;
 440}
 441                                                                                                                                                                                                                                              
 442static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value)
 443{
 444        unsigned int sock = container_of(socket, struct socket_info, socket)->number;
 445        unsigned int status;
 446        
 447        enter("i82092aa_get_status");
 448        
 449        status = indirect_read(sock,I365_STATUS); /* Interface Status Register */
 450        *value = 0;
 451        
 452        if ((status & I365_CS_DETECT) == I365_CS_DETECT) {
 453                *value |= SS_DETECT;
 454        }
 455                
 456        /* IO cards have a different meaning of bits 0,1 */
 457        /* Also notice the inverse-logic on the bits */
 458         if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) {
 459                /* IO card */
 460                if (!(status & I365_CS_STSCHG))
 461                        *value |= SS_STSCHG;
 462         } else { /* non I/O card */
 463                if (!(status & I365_CS_BVD1))
 464                        *value |= SS_BATDEAD;
 465                if (!(status & I365_CS_BVD2))
 466                        *value |= SS_BATWARN;
 467                        
 468         }
 469         
 470         if (status & I365_CS_WRPROT)
 471                (*value) |= SS_WRPROT;  /* card is write protected */
 472         
 473         if (status & I365_CS_READY)
 474                (*value) |= SS_READY;    /* card is not busy */
 475                
 476         if (status & I365_CS_POWERON)
 477                (*value) |= SS_POWERON;  /* power is applied to the card */
 478
 479
 480        leave("i82092aa_get_status");
 481        return 0;
 482}
 483
 484
 485static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state) 
 486{
 487        unsigned int sock = container_of(socket, struct socket_info, socket)->number;
 488        unsigned char reg;
 489        
 490        enter("i82092aa_set_socket");
 491        
 492        /* First, set the global controller options */
 493        
 494        set_bridge_state(sock);
 495        
 496        /* Values for the IGENC register */
 497        
 498        reg = 0;
 499        if (!(state->flags & SS_RESET))         /* The reset bit has "inverse" logic */
 500                reg = reg | I365_PC_RESET;  
 501        if (state->flags & SS_IOCARD) 
 502                reg = reg | I365_PC_IOCARD;
 503                
 504        indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */
 505        
 506        /* Power registers */
 507        
 508        reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
 509        
 510        if (state->flags & SS_PWR_AUTO) {
 511                printk("Auto power\n");
 512                reg |= I365_PWR_AUTO;   /* automatic power mngmnt */
 513        }
 514        if (state->flags & SS_OUTPUT_ENA) {
 515                printk("Power Enabled \n");
 516                reg |= I365_PWR_OUT;    /* enable power */
 517        }
 518        
 519        switch (state->Vcc) {
 520                case 0: 
 521                        break;
 522                case 50: 
 523                        printk("setting voltage to Vcc to 5V on socket %i\n",sock);
 524                        reg |= I365_VCC_5V;
 525                        break;
 526                default:
 527                        printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc);
 528                        leave("i82092aa_set_socket");
 529                        return -EINVAL;
 530        }
 531        
 532        
 533        switch (state->Vpp) {
 534                case 0: 
 535                        printk("not setting Vpp on socket %i\n",sock);
 536                        break;
 537                case 50: 
 538                        printk("setting Vpp to 5.0 for socket %i\n",sock);
 539                        reg |= I365_VPP1_5V | I365_VPP2_5V;
 540                        break;
 541                case 120: 
 542                        printk("setting Vpp to 12.0\n");
 543                        reg |= I365_VPP1_12V | I365_VPP2_12V;
 544                        break;
 545                default:
 546                        printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc);
 547                        leave("i82092aa_set_socket");
 548                        return -EINVAL;
 549        }
 550        
 551        if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */
 552                indirect_write(sock,I365_POWER,reg);
 553                
 554        /* Enable specific interrupt events */
 555        
 556        reg = 0x00;
 557        if (state->csc_mask & SS_DETECT) {
 558                reg |= I365_CSC_DETECT;
 559        }
 560        if (state->flags & SS_IOCARD) {
 561                if (state->csc_mask & SS_STSCHG)
 562                        reg |= I365_CSC_STSCHG;
 563        } else {
 564                if (state->csc_mask & SS_BATDEAD) 
 565                        reg |= I365_CSC_BVD1;
 566                if (state->csc_mask & SS_BATWARN) 
 567                        reg |= I365_CSC_BVD2;
 568                if (state->csc_mask & SS_READY) 
 569                        reg |= I365_CSC_READY; 
 570                                        
 571        }
 572        
 573        /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/
 574        
 575        indirect_write(sock,I365_CSCINT,reg);
 576        (void)indirect_read(sock,I365_CSC);
 577
 578        leave("i82092aa_set_socket");
 579        return 0;
 580}
 581
 582static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io)
 583{
 584        unsigned int sock = container_of(socket, struct socket_info, socket)->number;
 585        unsigned char map, ioctl;
 586        
 587        enter("i82092aa_set_io_map");
 588        
 589        map = io->map;
 590        
 591        /* Check error conditions */    
 592        if (map > 1) {
 593                leave("i82092aa_set_io_map with invalid map");
 594                return -EINVAL;
 595        }
 596        if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){
 597                leave("i82092aa_set_io_map with invalid io");
 598                return -EINVAL;
 599        }
 600
 601        /* Turn off the window before changing anything */ 
 602        if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map))
 603                indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map));
 604
 605/*      printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop);  */
 606        
 607        /* write the new values */
 608        indirect_write16(sock,I365_IO(map)+I365_W_START,io->start);             
 609        indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop);               
 610                        
 611        ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map);
 612        
 613        if (io->flags & (MAP_16BIT|MAP_AUTOSZ))
 614                ioctl |= I365_IOCTL_16BIT(map);
 615                
 616        indirect_write(sock,I365_IOCTL,ioctl);
 617        
 618        /* Turn the window back on if needed */
 619        if (io->flags & MAP_ACTIVE)
 620                indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map));
 621                        
 622        leave("i82092aa_set_io_map");   
 623        return 0;
 624}
 625
 626static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem)
 627{
 628        struct socket_info *sock_info = container_of(socket, struct socket_info, socket);
 629        unsigned int sock = sock_info->number;
 630        struct pci_bus_region region;
 631        unsigned short base, i;
 632        unsigned char map;
 633        
 634        enter("i82092aa_set_mem_map");
 635
 636        pcibios_resource_to_bus(sock_info->dev, &region, mem->res);
 637        
 638        map = mem->map;
 639        if (map > 4) {
 640                leave("i82092aa_set_mem_map: invalid map");
 641                return -EINVAL;
 642        }
 643        
 644        
 645        if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) ||
 646             (mem->speed > 1000) ) {
 647                leave("i82092aa_set_mem_map: invalid address / speed");
 648                printk("invalid mem map for socket %i: %llx to %llx with a "
 649                        "start of %x\n",
 650                        sock,
 651                        (unsigned long long)region.start,
 652                        (unsigned long long)region.end,
 653                        mem->card_start);
 654                return -EINVAL;
 655        }
 656        
 657        /* Turn off the window before changing anything */
 658        if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
 659                      indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
 660                         
 661                         
 662/*      printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE);  */
 663
 664        /* write the start address */
 665        base = I365_MEM(map);
 666        i = (region.start >> 12) & 0x0fff;
 667        if (mem->flags & MAP_16BIT) 
 668                i |= I365_MEM_16BIT;
 669        if (mem->flags & MAP_0WS)
 670                i |= I365_MEM_0WS;      
 671        indirect_write16(sock,base+I365_W_START,i);
 672                               
 673        /* write the stop address */
 674        
 675        i= (region.end >> 12) & 0x0fff;
 676        switch (to_cycles(mem->speed)) {
 677                case 0:
 678                        break;
 679                case 1:
 680                        i |= I365_MEM_WS0;
 681                        break;
 682                case 2:
 683                        i |= I365_MEM_WS1;
 684                        break;
 685                default:
 686                        i |= I365_MEM_WS1 | I365_MEM_WS0;
 687                        break;
 688        }
 689        
 690        indirect_write16(sock,base+I365_W_STOP,i);
 691        
 692        /* card start */
 693        
 694        i = ((mem->card_start - region.start) >> 12) & 0x3fff;
 695        if (mem->flags & MAP_WRPROT)
 696                i |= I365_MEM_WRPROT;
 697        if (mem->flags & MAP_ATTRIB) {
 698/*              printk("requesting attribute memory for socket %i\n",sock);*/
 699                i |= I365_MEM_REG;
 700        } else {
 701/*              printk("requesting normal memory for socket %i\n",sock);*/
 702        }
 703        indirect_write16(sock,base+I365_W_OFF,i);
 704        
 705        /* Enable the window if necessary */
 706        if (mem->flags & MAP_ACTIVE)
 707                indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
 708                    
 709        leave("i82092aa_set_mem_map");
 710        return 0;
 711}
 712
 713static int i82092aa_module_init(void)
 714{
 715        return pci_register_driver(&i82092aa_pci_driver);
 716}
 717
 718static void i82092aa_module_exit(void)
 719{
 720        enter("i82092aa_module_exit");
 721        pci_unregister_driver(&i82092aa_pci_driver);
 722        if (sockets[0].io_base>0)
 723                         release_region(sockets[0].io_base, 2);
 724        leave("i82092aa_module_exit");
 725}
 726
 727module_init(i82092aa_module_init);
 728module_exit(i82092aa_module_exit);
 729
 730