linux/arch/blackfin/mach-bf533/boards/cm_bf533.c
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   1/*
   2 * File:         arch/blackfin/mach-bf533/boards/cm_bf533.c
   3 * Based on:     arch/blackfin/mach-bf533/boards/ezkit.c
   4 * Author:       Aidan Williams <aidan@nicta.com.au> Copyright 2005
   5 *
   6 * Created:      2005
   7 * Description:  Board description file
   8 *
   9 * Modified:
  10 *               Copyright 2004-2006 Analog Devices Inc.
  11 *
  12 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  13 *
  14 * This program is free software; you can redistribute it and/or modify
  15 * it under the terms of the GNU General Public License as published by
  16 * the Free Software Foundation; either version 2 of the License, or
  17 * (at your option) any later version.
  18 *
  19 * This program is distributed in the hope that it will be useful,
  20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22 * GNU General Public License for more details.
  23 *
  24 * You should have received a copy of the GNU General Public License
  25 * along with this program; if not, see the file COPYING, or write
  26 * to the Free Software Foundation, Inc.,
  27 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  28 */
  29
  30#include <linux/device.h>
  31#include <linux/platform_device.h>
  32#include <linux/mtd/mtd.h>
  33#include <linux/mtd/partitions.h>
  34#include <linux/spi/spi.h>
  35#include <linux/spi/flash.h>
  36#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  37#include <linux/usb/isp1362.h>
  38#endif
  39#include <linux/irq.h>
  40#include <asm/dma.h>
  41#include <asm/bfin5xx_spi.h>
  42#include <asm/portmux.h>
  43#include <asm/dpmc.h>
  44
  45/*
  46 * Name the Board for the /proc/cpuinfo
  47 */
  48const char bfin_board_name[] = "Bluetechnix CM BF533";
  49
  50#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  51/* all SPI peripherals info goes here */
  52#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  53static struct mtd_partition bfin_spi_flash_partitions[] = {
  54        {
  55                .name = "bootloader(spi)",
  56                .size = 0x00020000,
  57                .offset = 0,
  58                .mask_flags = MTD_CAP_ROM
  59        }, {
  60                .name = "linux kernel(spi)",
  61                .size = 0xe0000,
  62                .offset = 0x20000
  63        }, {
  64                .name = "file system(spi)",
  65                .size = 0x700000,
  66                .offset = 0x00100000,
  67        }
  68};
  69
  70static struct flash_platform_data bfin_spi_flash_data = {
  71        .name = "m25p80",
  72        .parts = bfin_spi_flash_partitions,
  73        .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  74        .type = "m25p64",
  75};
  76
  77/* SPI flash chip (m25p64) */
  78static struct bfin5xx_spi_chip spi_flash_chip_info = {
  79        .enable_dma = 0,         /* use dma transfer with this chip*/
  80        .bits_per_word = 8,
  81};
  82#endif
  83
  84/* SPI ADC chip */
  85#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  86static struct bfin5xx_spi_chip spi_adc_chip_info = {
  87        .enable_dma = 1,         /* use dma transfer with this chip*/
  88        .bits_per_word = 16,
  89};
  90#endif
  91
  92#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  93static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  94        .enable_dma = 0,
  95        .bits_per_word = 16,
  96};
  97#endif
  98
  99#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 100static struct bfin5xx_spi_chip spi_mmc_chip_info = {
 101        .enable_dma = 1,
 102        .bits_per_word = 8,
 103};
 104#endif
 105
 106static struct spi_board_info bfin_spi_board_info[] __initdata = {
 107#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
 108        {
 109                /* the modalias must be the same as spi device driver name */
 110                .modalias = "m25p80",       /* Name of spi_driver for this device */
 111                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 112                .bus_num = 0,               /* Framework bus number */
 113                .chip_select = 1,           /* Framework chip select. On STAMP537 it is SPISSEL1*/
 114                .platform_data = &bfin_spi_flash_data,
 115                .controller_data = &spi_flash_chip_info,
 116                .mode = SPI_MODE_3,
 117        },
 118#endif
 119
 120#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
 121        {
 122                .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 123                .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 124                .bus_num = 0,               /* Framework bus number */
 125                .chip_select = 2,           /* Framework chip select. */
 126                .platform_data = NULL,      /* No spi_driver specific config */
 127                .controller_data = &spi_adc_chip_info,
 128        },
 129#endif
 130
 131#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 132        {
 133                .modalias = "ad1836-spi",
 134                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 135                .bus_num = 0,
 136                .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
 137                .controller_data = &ad1836_spi_chip_info,
 138        },
 139#endif
 140
 141#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 142        {
 143                .modalias = "spi_mmc_dummy",
 144                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 145                .bus_num = 0,
 146                .chip_select = 0,
 147                .platform_data = NULL,
 148                .controller_data = &spi_mmc_chip_info,
 149                .mode = SPI_MODE_3,
 150        },
 151        {
 152                .modalias = "spi_mmc",
 153                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 154                .bus_num = 0,
 155                .chip_select = CONFIG_SPI_MMC_CS_CHAN,
 156                .platform_data = NULL,
 157                .controller_data = &spi_mmc_chip_info,
 158                .mode = SPI_MODE_3,
 159        },
 160#endif
 161};
 162
 163/* SPI (0) */
 164static struct resource bfin_spi0_resource[] = {
 165        [0] = {
 166                .start = SPI0_REGBASE,
 167                .end   = SPI0_REGBASE + 0xFF,
 168                .flags = IORESOURCE_MEM,
 169        },
 170        [1] = {
 171                .start = CH_SPI,
 172                .end   = CH_SPI,
 173                .flags = IORESOURCE_IRQ,
 174        }
 175};
 176
 177/* SPI controller data */
 178static struct bfin5xx_spi_master bfin_spi0_info = {
 179        .num_chipselect = 8,
 180        .enable_dma = 1,  /* master has the ability to do dma transfer */
 181        .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 182};
 183
 184static struct platform_device bfin_spi0_device = {
 185        .name = "bfin-spi",
 186        .id = 0, /* Bus number */
 187        .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 188        .resource = bfin_spi0_resource,
 189        .dev = {
 190                .platform_data = &bfin_spi0_info, /* Passed to driver */
 191        },
 192};
 193#endif  /* spi master and devices */
 194
 195#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 196static struct platform_device rtc_device = {
 197        .name = "rtc-bfin",
 198        .id   = -1,
 199};
 200#endif
 201
 202#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 203static struct resource smc91x_resources[] = {
 204        {
 205                .start = 0x20200300,
 206                .end = 0x20200300 + 16,
 207                .flags = IORESOURCE_MEM,
 208        }, {
 209                .start = IRQ_PF0,
 210                .end = IRQ_PF0,
 211                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 212        },
 213};
 214static struct platform_device smc91x_device = {
 215        .name = "smc91x",
 216        .id = 0,
 217        .num_resources = ARRAY_SIZE(smc91x_resources),
 218        .resource = smc91x_resources,
 219};
 220#endif
 221
 222#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 223static struct resource bfin_uart_resources[] = {
 224        {
 225                .start = 0xFFC00400,
 226                .end = 0xFFC004FF,
 227                .flags = IORESOURCE_MEM,
 228        },
 229};
 230
 231static struct platform_device bfin_uart_device = {
 232        .name = "bfin-uart",
 233        .id = 1,
 234        .num_resources = ARRAY_SIZE(bfin_uart_resources),
 235        .resource = bfin_uart_resources,
 236};
 237#endif
 238
 239#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 240static struct resource bfin_sir_resources[] = {
 241#ifdef CONFIG_BFIN_SIR0
 242        {
 243                .start = 0xFFC00400,
 244                .end = 0xFFC004FF,
 245                .flags = IORESOURCE_MEM,
 246        },
 247#endif
 248};
 249
 250static struct platform_device bfin_sir_device = {
 251        .name = "bfin_sir",
 252        .id = 0,
 253        .num_resources = ARRAY_SIZE(bfin_sir_resources),
 254        .resource = bfin_sir_resources,
 255};
 256#endif
 257
 258#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 259static struct platform_device bfin_sport0_uart_device = {
 260        .name = "bfin-sport-uart",
 261        .id = 0,
 262};
 263
 264static struct platform_device bfin_sport1_uart_device = {
 265        .name = "bfin-sport-uart",
 266        .id = 1,
 267};
 268#endif
 269
 270#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 271static struct resource isp1362_hcd_resources[] = {
 272        {
 273                .start = 0x20308000,
 274                .end = 0x20308000,
 275                .flags = IORESOURCE_MEM,
 276        }, {
 277                .start = 0x20308004,
 278                .end = 0x20308004,
 279                .flags = IORESOURCE_MEM,
 280        }, {
 281                .start = IRQ_PF4,
 282                .end = IRQ_PF4,
 283                .flags = IORESOURCE_IRQ,
 284        },
 285};
 286
 287static struct isp1362_platform_data isp1362_priv = {
 288        .sel15Kres = 1,
 289        .clknotstop = 0,
 290        .oc_enable = 0,
 291        .int_act_high = 0,
 292        .int_edge_triggered = 0,
 293        .remote_wakeup_connected = 0,
 294        .no_power_switching = 1,
 295        .power_switching_mode = 0,
 296};
 297
 298static struct platform_device isp1362_hcd_device = {
 299        .name = "isp1362-hcd",
 300        .id = 0,
 301        .dev = {
 302                .platform_data = &isp1362_priv,
 303        },
 304        .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
 305        .resource = isp1362_hcd_resources,
 306};
 307#endif
 308
 309static const unsigned int cclk_vlev_datasheet[] =
 310{
 311        VRPAIR(VLEV_085, 250000000),
 312        VRPAIR(VLEV_090, 376000000),
 313        VRPAIR(VLEV_095, 426000000),
 314        VRPAIR(VLEV_100, 426000000),
 315        VRPAIR(VLEV_105, 476000000),
 316        VRPAIR(VLEV_110, 476000000),
 317        VRPAIR(VLEV_115, 476000000),
 318        VRPAIR(VLEV_120, 600000000),
 319        VRPAIR(VLEV_125, 600000000),
 320        VRPAIR(VLEV_130, 600000000),
 321};
 322
 323static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 324        .tuple_tab = cclk_vlev_datasheet,
 325        .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 326        .vr_settling_time = 25 /* us */,
 327};
 328
 329static struct platform_device bfin_dpmc = {
 330        .name = "bfin dpmc",
 331        .dev = {
 332                .platform_data = &bfin_dmpc_vreg_data,
 333        },
 334};
 335
 336static struct platform_device *cm_bf533_devices[] __initdata = {
 337
 338        &bfin_dpmc,
 339
 340#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 341        &bfin_uart_device,
 342#endif
 343
 344#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 345        &bfin_sir_device,
 346#endif
 347
 348#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 349        &bfin_sport0_uart_device,
 350        &bfin_sport1_uart_device,
 351#endif
 352
 353#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 354        &rtc_device,
 355#endif
 356
 357#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 358        &isp1362_hcd_device,
 359#endif
 360
 361#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 362        &smc91x_device,
 363#endif
 364
 365#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 366        &bfin_spi0_device,
 367#endif
 368};
 369
 370static int __init cm_bf533_init(void)
 371{
 372        printk(KERN_INFO "%s(): registering device resources\n", __func__);
 373        platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
 374#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 375        spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 376#endif
 377        return 0;
 378}
 379
 380arch_initcall(cm_bf533_init);
 381