LXR linux/arch/arm/mach-orion5x/wrt350n-v2-setup.c

   1/*
   2 * arch/arm/mach-orion5x/wrt350n-v2-setup.c
   3 *
   4 * This file is licensed under the terms of the GNU General Public
   5 * License version 2.  This program is licensed "as is" without any
   6 * warranty of any kind, whether express or implied.
   7 */
   8
   9#include <linux/kernel.h>
  10#include <linux/init.h>
  11#include <linux/platform_device.h>
  12#include <linux/pci.h>
  13#include <linux/irq.h>
  14#include <linux/delay.h>
  15#include <linux/mtd/physmap.h>
  16#include <linux/mv643xx_eth.h>
  17#include <linux/ethtool.h>
  18#include <asm/mach-types.h>
  19#include <asm/gpio.h>
  20#include <asm/mach/arch.h>
  21#include <asm/mach/pci.h>
  22#include <mach/orion5x.h>
  23#include "common.h"
  24#include "mpp.h"
  25
  26static struct orion5x_mpp_mode wrt350n_v2_mpp_modes[] __initdata = {
  27        {  0, MPP_GPIO },               /* Power LED green (0=on) */
  28        {  1, MPP_GPIO },               /* Security LED (0=on) */
  29        {  2, MPP_GPIO },               /* Internal Button (0=on) */
  30        {  3, MPP_GPIO },               /* Reset Button (0=on) */
  31        {  4, MPP_GPIO },               /* PCI int */
  32        {  5, MPP_GPIO },               /* Power LED orange (0=on) */
  33        {  6, MPP_GPIO },               /* USB LED (0=on) */
  34        {  7, MPP_GPIO },               /* Wireless LED (0=on) */
  35        {  8, MPP_UNUSED },             /* ??? */
  36        {  9, MPP_GIGE },               /* GE_RXERR */
  37        { 10, MPP_UNUSED },             /* ??? */
  38        { 11, MPP_UNUSED },             /* ??? */
  39        { 12, MPP_GIGE },               /* GE_TXD[4] */
  40        { 13, MPP_GIGE },               /* GE_TXD[5] */
  41        { 14, MPP_GIGE },               /* GE_TXD[6] */
  42        { 15, MPP_GIGE },               /* GE_TXD[7] */
  43        { 16, MPP_GIGE },               /* GE_RXD[4] */
  44        { 17, MPP_GIGE },               /* GE_RXD[5] */
  45        { 18, MPP_GIGE },               /* GE_RXD[6] */
  46        { 19, MPP_GIGE },               /* GE_RXD[7] */
  47        { -1 },
  48};
  49
  50/*
  51 * 8M NOR flash Device bus boot chip select
  52 */
  53#define WRT350N_V2_NOR_BOOT_BASE        0xf4000000
  54#define WRT350N_V2_NOR_BOOT_SIZE        SZ_8M
  55
  56static struct mtd_partition wrt350n_v2_nor_flash_partitions[] = {
  57        {
  58                .name           = "kernel",
  59                .offset         = 0x00000000,
  60                .size           = 0x00760000,
  61        }, {
  62                .name           = "rootfs",
  63                .offset         = 0x001a0000,
  64                .size           = 0x005c0000,
  65        }, {
  66                .name           = "lang",
  67                .offset         = 0x00760000,
  68                .size           = 0x00040000,
  69        }, {
  70                .name           = "nvram",
  71                .offset         = 0x007a0000,
  72                .size           = 0x00020000,
  73        }, {
  74                .name           = "u-boot",
  75                .offset         = 0x007c0000,
  76                .size           = 0x00040000,
  77        },
  78};
  79
  80static struct physmap_flash_data wrt350n_v2_nor_flash_data = {
  81        .width          = 1,
  82        .parts          = wrt350n_v2_nor_flash_partitions,
  83        .nr_parts       = ARRAY_SIZE(wrt350n_v2_nor_flash_partitions),
  84};
  85
  86static struct resource wrt350n_v2_nor_flash_resource = {
  87        .flags          = IORESOURCE_MEM,
  88        .start          = WRT350N_V2_NOR_BOOT_BASE,
  89        .end            = WRT350N_V2_NOR_BOOT_BASE + WRT350N_V2_NOR_BOOT_SIZE - 1,
  90};
  91
  92static struct platform_device wrt350n_v2_nor_flash = {
  93        .name                   = "physmap-flash",
  94        .id                     = 0,
  95        .dev            = {
  96                .platform_data  = &wrt350n_v2_nor_flash_data,
  97        },
  98        .num_resources          = 1,
  99        .resource               = &wrt350n_v2_nor_flash_resource,
 100};
 101
 102static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = {
 103        .phy_addr       = -1,
 104        .speed          = SPEED_1000,
 105        .duplex         = DUPLEX_FULL,
 106};
 107
 108static void __init wrt350n_v2_init(void)
 109{
 110        /*
 111         * Setup basic Orion functions. Need to be called early.
 112         */
 113        orion5x_init();
 114
 115        orion5x_mpp_conf(wrt350n_v2_mpp_modes);
 116
 117        /*
 118         * Configure peripherals.
 119         */
 120        orion5x_ehci0_init();
 121        orion5x_eth_init(&wrt350n_v2_eth_data);
 122        orion5x_uart0_init();
 123
 124        orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE,
 125                                   WRT350N_V2_NOR_BOOT_SIZE);
 126        platform_device_register(&wrt350n_v2_nor_flash);
 127}
 128
 129static int __init wrt350n_v2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 130{
 131        int irq;
 132
 133        /*
 134         * Check for devices with hard-wired IRQs.
 135         */
 136        irq = orion5x_pci_map_irq(dev, slot, pin);
 137        if (irq != -1)
 138                return irq;
 139
 140        /*
 141         * Mini-PCI slot.
 142         */
 143        if (slot == 7)
 144                return gpio_to_irq(4);
 145
 146        return -1;
 147}
 148
 149static struct hw_pci wrt350n_v2_pci __initdata = {
 150        .nr_controllers = 2,
 151        .swizzle        = pci_std_swizzle,
 152        .setup          = orion5x_pci_sys_setup,
 153        .scan           = orion5x_pci_sys_scan_bus,
 154        .map_irq        = wrt350n_v2_pci_map_irq,
 155};
 156
 157static int __init wrt350n_v2_pci_init(void)
 158{
 159        if (machine_is_wrt350n_v2())
 160                pci_common_init(&wrt350n_v2_pci);
 161
 162        return 0;
 163}
 164subsys_initcall(wrt350n_v2_pci_init);
 165
 166MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
 167        /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
 168        .phys_io        = ORION5X_REGS_PHYS_BASE,
 169        .io_pg_offst    = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
 170        .boot_params    = 0x00000100,
 171        .init_machine   = wrt350n_v2_init,
 172        .map_io         = orion5x_map_io,
 173        .init_irq       = orion5x_init_irq,
 174        .timer          = &orion5x_timer,
 175        .fixup          = tag_fixup_mem32,
 176MACHINE_END
 177