linux/drivers/usb/host/ehci-hcd.c History
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   1/*
   2 * Copyright (c) 2000-2004 by David Brownell
   3 *
   4 * This program is free software; you can redistribute it and/or modify it
   5 * under the terms of the GNU General Public License as published by the
   6 * Free Software Foundation; either version 2 of the License, or (at your
   7 * option) any later version.
   8 *
   9 * This program is distributed in the hope that it will be useful, but
  10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12 * for more details.
  13 *
  14 * You should have received a copy of the GNU General Public License
  15 * along with this program; if not, write to the Free Software Foundation,
  16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17 */
  18
  19#include <linux/module.h>
  20#include <linux/pci.h>
  21#include <linux/dmapool.h>
  22#include <linux/kernel.h>
  23#include <linux/delay.h>
  24#include <linux/ioport.h>
  25#include <linux/sched.h>
  26#include <linux/vmalloc.h>
  27#include <linux/errno.h>
  28#include <linux/init.h>
  29#include <linux/timer.h>
  30#include <linux/ktime.h>
  31#include <linux/list.h>
  32#include <linux/interrupt.h>
  33#include <linux/usb.h>
  34#include <linux/moduleparam.h>
  35#include <linux/dma-mapping.h>
  36#include <linux/debugfs.h>
  37#include <linux/slab.h>
  38
  39#include "../core/hcd.h"
  40
  41#include <asm/byteorder.h>
  42#include <asm/io.h>
  43#include <asm/irq.h>
  44#include <asm/system.h>
  45#include <asm/unaligned.h>
  46
  47/*-------------------------------------------------------------------------*/
  48
  49/*
  50 * EHCI hc_driver implementation ... experimental, incomplete.
  51 * Based on the final 1.0 register interface specification.
  52 *
  53 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  54 * First was PCMCIA, like ISA; then CardBus, which is PCI.
  55 * Next comes "CardBay", using USB 2.0 signals.
  56 *
  57 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  58 * Special thanks to Intel and VIA for providing host controllers to
  59 * test this driver on, and Cypress (including In-System Design) for
  60 * providing early devices for those host controllers to talk to!
  61 */
  62
  63#define DRIVER_AUTHOR "David Brownell"
  64#define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  65
  66static const char       hcd_name [] = "ehci_hcd";
  67
  68
  69#undef VERBOSE_DEBUG
  70#undef EHCI_URB_TRACE
  71
  72#ifdef DEBUG
  73#define EHCI_STATS
  74#endif
  75
  76/* magic numbers that can affect system performance */
  77#define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  78#define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  79#define EHCI_TUNE_RL_TT         0
  80#define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  81#define EHCI_TUNE_MULT_TT       1
  82#define EHCI_TUNE_FLS           2       /* (small) 256 frame schedule */
  83
  84#define EHCI_IAA_MSECS          10              /* arbitrary */
  85#define EHCI_IO_JIFFIES         (HZ/10)         /* io watchdog > irq_thresh */
  86#define EHCI_ASYNC_JIFFIES      (HZ/20)         /* async idle timeout */
  87#define EHCI_SHRINK_FRAMES      5               /* async qh unlink delay */
  88
  89/* Initial IRQ latency:  faster than hw default */
  90static int log2_irq_thresh = 0;         // 0 to 6
  91module_param (log2_irq_thresh, int, S_IRUGO);
  92MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  93
  94/* initial park setting:  slower than hw default */
  95static unsigned park = 0;
  96module_param (park, uint, S_IRUGO);
  97MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
  98
  99/* for flakey hardware, ignore overcurrent indicators */
 100static int ignore_oc = 0;
 101module_param (ignore_oc, bool, S_IRUGO);
 102MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 103
 104#define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 105
 106/*-------------------------------------------------------------------------*/
 107
 108#include "ehci.h"
 109#include "ehci-dbg.c"
 110
 111/*-------------------------------------------------------------------------*/
 112
 113static void
 114timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action)
 115{
 116        /* Don't override timeouts which shrink or (later) disable
 117         * the async ring; just the I/O watchdog.  Note that if a
 118         * SHRINK were pending, OFF would never be requested.
 119         */
 120        if (timer_pending(&ehci->watchdog)
 121                        && ((BIT(TIMER_ASYNC_SHRINK) | BIT(TIMER_ASYNC_OFF))
 122                                & ehci->actions))
 123                return;
 124
 125        if (!test_and_set_bit(action, &ehci->actions)) {
 126                unsigned long t;
 127
 128                switch (action) {
 129                case TIMER_IO_WATCHDOG:
 130                        if (!ehci->need_io_watchdog)
 131                                return;
 132                        t = EHCI_IO_JIFFIES;
 133                        break;
 134                case TIMER_ASYNC_OFF:
 135                        t = EHCI_ASYNC_JIFFIES;
 136                        break;
 137                /* case TIMER_ASYNC_SHRINK: */
 138                default:
 139                        /* add a jiffie since we synch against the
 140                         * 8 KHz uframe counter.
 141                         */
 142                        t = DIV_ROUND_UP(EHCI_SHRINK_FRAMES * HZ, 1000) + 1;
 143                        break;
 144                }
 145                mod_timer(&ehci->watchdog, t + jiffies);
 146        }
 147}
 148
 149/*-------------------------------------------------------------------------*/
 150
 151/*
 152 * handshake - spin reading hc until handshake completes or fails
 153 * @ptr: address of hc register to be read
 154 * @mask: bits to look at in result of read
 155 * @done: value of those bits when handshake succeeds
 156 * @usec: timeout in microseconds
 157 *
 158 * Returns negative errno, or zero on success
 159 *
 160 * Success happens when the "mask" bits have the specified value (hardware
 161 * handshake done).  There are two failure modes:  "usec" have passed (major
 162 * hardware flakeout), or the register reads as all-ones (hardware removed).
 163 *
 164 * That last failure should_only happen in cases like physical cardbus eject
 165 * before driver shutdown. But it also seems to be caused by bugs in cardbus
 166 * bridge shutdown:  shutting down the bridge before the devices using it.
 167 */
 168static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 169                      u32 mask, u32 done, int usec)
 170{
 171        u32     result;
 172
 173        do {
 174                result = ehci_readl(ehci, ptr);
 175                if (result == ~(u32)0)          /* card removed */
 176                        return -ENODEV;
 177                result &= mask;
 178                if (result == done)
 179                        return 0;
 180                udelay (1);
 181                usec--;
 182        } while (usec > 0);
 183        return -ETIMEDOUT;
 184}
 185
 186/* force HC to halt state from unknown (EHCI spec section 2.3) */
 187static int ehci_halt (struct ehci_hcd *ehci)
 188{
 189        u32     temp = ehci_readl(ehci, &ehci->regs->status);
 190
 191        /* disable any irqs left enabled by previous code */
 192        ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 193
 194        if ((temp & STS_HALT) != 0)
 195                return 0;
 196
 197        temp = ehci_readl(ehci, &ehci->regs->command);
 198        temp &= ~CMD_RUN;
 199        ehci_writel(ehci, temp, &ehci->regs->command);
 200        return handshake (ehci, &ehci->regs->status,
 201                          STS_HALT, STS_HALT, 16 * 125);
 202}
 203
 204static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
 205                                       u32 mask, u32 done, int usec)
 206{
 207        int error;
 208
 209        error = handshake(ehci, ptr, mask, done, usec);
 210        if (error) {
 211                ehci_halt(ehci);
 212                ehci_to_hcd(ehci)->state = HC_STATE_HALT;
 213                ehci_err(ehci, "force halt; handshake %p %08x %08x -> %d\n",
 214                        ptr, mask, done, error);
 215        }
 216
 217        return error;
 218}
 219
 220/* put TDI/ARC silicon into EHCI mode */
 221static void tdi_reset (struct ehci_hcd *ehci)
 222{
 223        u32 __iomem     *reg_ptr;
 224        u32             tmp;
 225
 226        reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
 227        tmp = ehci_readl(ehci, reg_ptr);
 228        tmp |= USBMODE_CM_HC;
 229        /* The default byte access to MMR space is LE after
 230         * controller reset. Set the required endian mode
 231         * for transfer buffers to match the host microprocessor
 232         */
 233        if (ehci_big_endian_mmio(ehci))
 234                tmp |= USBMODE_BE;
 235        ehci_writel(ehci, tmp, reg_ptr);
 236}
 237
 238/* reset a non-running (STS_HALT == 1) controller */
 239static int ehci_reset (struct ehci_hcd *ehci)
 240{
 241        int     retval;
 242        u32     command = ehci_readl(ehci, &ehci->regs->command);
 243
 244        /* If the EHCI debug controller is active, special care must be
 245         * taken before and after a host controller reset */
 246        if (ehci->debug && !dbgp_reset_prep())
 247                ehci->debug = NULL;
 248
 249        command |= CMD_RESET;
 250        dbg_cmd (ehci, "reset", command);
 251        ehci_writel(ehci, command, &ehci->regs->command);
 252        ehci_to_hcd(ehci)->state = HC_STATE_HALT;
 253        ehci->next_statechange = jiffies;
 254        retval = handshake (ehci, &ehci->regs->command,
 255                            CMD_RESET, 0, 250 * 1000);
 256
 257        if (ehci->has_hostpc) {
 258                ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 259                        (u32 __iomem *)(((u8 *)ehci->regs) + USBMODE_EX));
 260                ehci_writel(ehci, TXFIFO_DEFAULT,
 261                        (u32 __iomem *)(((u8 *)ehci->regs) + TXFILLTUNING));
 262        }
 263        if (retval)
 264                return retval;
 265
 266        if (ehci_is_TDI(ehci))
 267                tdi_reset (ehci);
 268
 269        if (ehci->debug)
 270                dbgp_external_startup();
 271
 272        return retval;
 273}
 274
 275/* idle the controller (from running) */
 276static void ehci_quiesce (struct ehci_hcd *ehci)
 277{
 278        u32     temp;
 279
 280#ifdef DEBUG
 281        if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
 282                BUG ();
 283#endif
 284
 285        /* wait for any schedule enables/disables to take effect */
 286        temp = ehci_readl(ehci, &ehci->regs->command) << 10;
 287        temp &= STS_ASS | STS_PSS;
 288        if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
 289                                        STS_ASS | STS_PSS, temp, 16 * 125))
 290                return;
 291
 292        /* then disable anything that's still active */
 293        temp = ehci_readl(ehci, &ehci->regs->command);
 294        temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
 295        ehci_writel(ehci, temp, &ehci->regs->command);
 296
 297        /* hardware can take 16 microframes to turn off ... */
 298        handshake_on_error_set_halt(ehci, &ehci->regs->status,
 299                                    STS_ASS | STS_PSS, 0, 16 * 125);
 300}
 301
 302/*-------------------------------------------------------------------------*/
 303
 304static void end_unlink_async(struct ehci_hcd *ehci);
 305static void ehci_work(struct ehci_hcd *ehci);
 306
 307#include "ehci-hub.c"
 308#include "ehci-mem.c"
 309#include "ehci-q.c"
 310#include "ehci-sched.c"
 311
 312/*-------------------------------------------------------------------------*/
 313
 314static void ehci_iaa_watchdog(unsigned long param)
 315{
 316        struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 317        unsigned long           flags;
 318
 319        spin_lock_irqsave (&ehci->lock, flags);
 320
 321        /* Lost IAA irqs wedge things badly; seen first with a vt8235.
 322         * So we need this watchdog, but must protect it against both
 323         * (a) SMP races against real IAA firing and retriggering, and
 324         * (b) clean HC shutdown, when IAA watchdog was pending.
 325         */
 326        if (ehci->reclaim
 327                        && !timer_pending(&ehci->iaa_watchdog)
 328                        && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
 329                u32 cmd, status;
 330
 331                /* If we get here, IAA is *REALLY* late.  It's barely
 332                 * conceivable that the system is so busy that CMD_IAAD
 333                 * is still legitimately set, so let's be sure it's
 334                 * clear before we read STS_IAA.  (The HC should clear
 335                 * CMD_IAAD when it sets STS_IAA.)
 336                 */
 337                cmd = ehci_readl(ehci, &ehci->regs->command);
 338                if (cmd & CMD_IAAD)
 339                        ehci_writel(ehci, cmd & ~CMD_IAAD,
 340                                        &ehci->regs->command);
 341
 342                /* If IAA is set here it either legitimately triggered
 343                 * before we cleared IAAD above (but _way_ late, so we'll
 344                 * still count it as lost) ... or a silicon erratum:
 345                 * - VIA seems to set IAA without triggering the IRQ;
 346                 * - IAAD potentially cleared without setting IAA.
 347                 */
 348                status = ehci_readl(ehci, &ehci->regs->status);
 349                if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
 350                        COUNT (ehci->stats.lost_iaa);
 351                        ehci_writel(ehci, STS_IAA, &ehci->regs->status);
 352                }
 353
 354                ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
 355                                status, cmd);
 356                end_unlink_async(ehci);
 357        }
 358
 359        spin_unlock_irqrestore(&ehci->lock, flags);
 360}
 361
 362static void ehci_watchdog(unsigned long param)
 363{
 364        struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 365        unsigned long           flags;
 366
 367        spin_lock_irqsave(&ehci->lock, flags);
 368
 369        /* stop async processing after it's idled a bit */
 370        if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
 371                start_unlink_async (ehci, ehci->async);
 372
 373        /* ehci could run by timer, without IRQs ... */
 374        ehci_work (ehci);
 375
 376        spin_unlock_irqrestore (&ehci->lock, flags);
 377}
 378
 379/* On some systems, leaving remote wakeup enabled prevents system shutdown.
 380 * The firmware seems to think that powering off is a wakeup event!
 381 * This routine turns off remote wakeup and everything else, on all ports.
 382 */
 383static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 384{
 385        int     port = HCS_N_PORTS(ehci->hcs_params);
 386
 387        while (port--)
 388                ehci_writel(ehci, PORT_RWC_BITS,
 389                                &ehci->regs->port_status[port]);
 390}
 391
 392/*
 393 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 394 * Should be called with ehci->lock held.
 395 */
 396static void ehci_silence_controller(struct ehci_hcd *ehci)
 397{
 398        ehci_halt(ehci);
 399        ehci_turn_off_all_ports(ehci);
 400
 401        /* make BIOS/etc use companion controller during reboot */
 402        ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 403
 404        /* unblock posted writes */
 405        ehci_readl(ehci, &ehci->regs->configured_flag);
 406}
 407
 408/* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 409 * This forcibly disables dma and IRQs, helping kexec and other cases
 410 * where the next system software may expect clean state.
 411 */
 412static void ehci_shutdown(struct usb_hcd *hcd)
 413{
 414        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 415
 416        del_timer_sync(&ehci->watchdog);
 417        del_timer_sync(&ehci->iaa_watchdog);
 418
 419        spin_lock_irq(&ehci->lock);
 420        ehci_silence_controller(ehci);
 421        spin_unlock_irq(&ehci->lock);
 422}
 423
 424static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
 425{
 426        unsigned port;
 427
 428        if (!HCS_PPC (ehci->hcs_params))
 429                return;
 430
 431        ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
 432        for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
 433                (void) ehci_hub_control(ehci_to_hcd(ehci),
 434                                is_on ? SetPortFeature : ClearPortFeature,
 435                                USB_PORT_FEAT_POWER,
 436                                port--, NULL, 0);
 437        /* Flush those writes */
 438        ehci_readl(ehci, &ehci->regs->command);
 439        msleep(20);
 440}
 441
 442/*-------------------------------------------------------------------------*/
 443
 444/*
 445 * ehci_work is called from some interrupts, timers, and so on.
 446 * it calls driver completion functions, after dropping ehci->lock.
 447 */
 448static void ehci_work (struct ehci_hcd *ehci)
 449{
 450        timer_action_done (ehci, TIMER_IO_WATCHDOG);
 451
 452        /* another CPU may drop ehci->lock during a schedule scan while
 453         * it reports urb completions.  this flag guards against bogus
 454         * attempts at re-entrant schedule scanning.
 455         */
 456        if (ehci->scanning)
 457                return;
 458        ehci->scanning = 1;
 459        scan_async (ehci);
 460        if (ehci->next_uframe != -1)
 461                scan_periodic (ehci);
 462        ehci->scanning = 0;
 463
 464        /* the IO watchdog guards against hardware or driver bugs that
 465         * misplace IRQs, and should let us run completely without IRQs.
 466         * such lossage has been observed on both VT6202 and VT8235.
 467         */
 468        if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
 469                        (ehci->async->qh_next.ptr != NULL ||
 470                         ehci->periodic_sched != 0))
 471                timer_action (ehci, TIMER_IO_WATCHDOG);
 472}
 473
 474/*
 475 * Called when the ehci_hcd module is removed.
 476 */
 477static void ehci_stop (struct usb_hcd *hcd)
 478{
 479        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 480
 481        ehci_dbg (ehci, "stop\n");
 482
 483        /* no more interrupts ... */
 484        del_timer_sync (&ehci->watchdog);
 485        del_timer_sync(&ehci->iaa_watchdog);
 486
 487        spin_lock_irq(&ehci->lock);
 488        if (HC_IS_RUNNING (hcd->state))
 489                ehci_quiesce (ehci);
 490
 491        ehci_silence_controller(ehci);
 492        ehci_reset (ehci);
 493        spin_unlock_irq(&ehci->lock);
 494
 495        remove_companion_file(ehci);
 496        remove_debug_files (ehci);
 497
 498        /* root hub is shut down separately (first, when possible) */
 499        spin_lock_irq (&ehci->lock);
 500        if (ehci->async)
 501                ehci_work (ehci);
 502        spin_unlock_irq (&ehci->lock);
 503        ehci_mem_cleanup (ehci);
 504
 505#ifdef  EHCI_STATS
 506        ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
 507                ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
 508                ehci->stats.lost_iaa);
 509        ehci_dbg (ehci, "complete %ld unlink %ld\n",
 510                ehci->stats.complete, ehci->stats.unlink);
 511#endif
 512
 513        dbg_status (ehci, "ehci_stop completed",
 514                    ehci_readl(ehci, &ehci->regs->status));
 515}
 516
 517/* one-time init, only for memory state */
 518static int ehci_init(struct usb_hcd *hcd)
 519{
 520        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 521        u32                     temp;
 522        int                     retval;
 523        u32                     hcc_params;
 524        struct ehci_qh_hw       *hw;
 525
 526        spin_lock_init(&ehci->lock);
 527
 528        /*
 529         * keep io watchdog by default, those good HCDs could turn off it later
 530         */
 531        ehci->need_io_watchdog = 1;
 532        init_timer(&ehci->watchdog);
 533        ehci->watchdog.function = ehci_watchdog;
 534        ehci->watchdog.data = (unsigned long) ehci;
 535
 536        init_timer(&ehci->iaa_watchdog);
 537        ehci->iaa_watchdog.function = ehci_iaa_watchdog;
 538        ehci->iaa_watchdog.data = (unsigned long) ehci;
 539
 540        /*
 541         * hw default: 1K periodic list heads, one per frame.
 542         * periodic_size can shrink by USBCMD update if hcc_params allows.
 543         */
 544        ehci->periodic_size = DEFAULT_I_TDPS;
 545        INIT_LIST_HEAD(&ehci->cached_itd_list);
 546        INIT_LIST_HEAD(&ehci->cached_sitd_list);
 547        if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 548                return retval;
 549
 550        /* controllers may cache some of the periodic schedule ... */
 551        hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 552        if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 553                ehci->i_thresh = 2 + 8;
 554        else                                    // N microframes cached
 555                ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 556
 557        ehci->reclaim = NULL;
 558        ehci->next_uframe = -1;
 559        ehci->clock_frame = -1;
 560
 561        /*
 562         * dedicate a qh for the async ring head, since we couldn't unlink
 563         * a 'real' qh without stopping the async schedule [4.8].  use it
 564         * as the 'reclamation list head' too.
 565         * its dummy is used in hw_alt_next of many tds, to prevent the qh
 566         * from automatically advancing to the next td after short reads.
 567         */
 568        ehci->async->qh_next.qh = NULL;
 569        hw = ehci->async->hw;
 570        hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 571        hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 572        hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 573        hw->hw_qtd_next = EHCI_LIST_END(ehci);
 574        ehci->async->qh_state = QH_STATE_LINKED;
 575        hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 576
 577        /* clear interrupt enables, set irq latency */
 578        if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 579                log2_irq_thresh = 0;
 580        temp = 1 << (16 + log2_irq_thresh);
 581        if (HCC_CANPARK(hcc_params)) {
 582                /* HW default park == 3, on hardware that supports it (like
 583                 * NVidia and ALI silicon), maximizes throughput on the async
 584                 * schedule by avoiding QH fetches between transfers.
 585                 *
 586                 * With fast usb storage devices and NForce2, "park" seems to
 587                 * make problems:  throughput reduction (!), data errors...
 588                 */
 589                if (park) {
 590                        park = min(park, (unsigned) 3);
 591                        temp |= CMD_PARK;
 592                        temp |= park << 8;
 593                }
 594                ehci_dbg(ehci, "park %d\n", park);
 595        }
 596        if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 597                /* periodic schedule size can be smaller than default */
 598                temp &= ~(3 << 2);
 599                temp |= (EHCI_TUNE_FLS << 2);
 600                switch (EHCI_TUNE_FLS) {
 601                case 0: ehci->periodic_size = 1024; break;
 602                case 1: ehci->periodic_size = 512; break;
 603                case 2: ehci->periodic_size = 256; break;
 604                default:        BUG();
 605                }
 606        }
 607        ehci->command = temp;
 608
 609        /* Accept arbitrarily long scatter-gather lists */
 610        hcd->self.sg_tablesize = ~0;
 611        return 0;
 612}
 613
 614/* start HC running; it's halted, ehci_init() has been run (once) */
 615static int ehci_run (struct usb_hcd *hcd)
 616{
 617        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 618        int                     retval;
 619        u32                     temp;
 620        u32                     hcc_params;
 621
 622        hcd->uses_new_polling = 1;
 623        hcd->poll_rh = 0;
 624
 625        /* EHCI spec section 4.1 */
 626        if ((retval = ehci_reset(ehci)) != 0) {
 627                ehci_mem_cleanup(ehci);
 628                return retval;
 629        }
 630        ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 631        ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 632
 633        /*
 634         * hcc_params controls whether ehci->regs->segment must (!!!)
 635         * be used; it constrains QH/ITD/SITD and QTD locations.
 636         * pci_pool consistent memory always uses segment zero.
 637         * streaming mappings for I/O buffers, like pci_map_single(),
 638         * can return segments above 4GB, if the device allows.
 639         *
 640         * NOTE:  the dma mask is visible through dma_supported(), so
 641         * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 642         * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 643         * host side drivers though.
 644         */
 645        hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 646        if (HCC_64BIT_ADDR(hcc_params)) {
 647                ehci_writel(ehci, 0, &ehci->regs->segment);
 648#if 0
 649// this is deeply broken on almost all architectures
 650                if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 651                        ehci_info(ehci, "enabled 64bit DMA\n");
 652#endif
 653        }
 654
 655
 656        // Philips, Intel, and maybe others need CMD_RUN before the
 657        // root hub will detect new devices (why?); NEC doesn't
 658        ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 659        ehci->command |= CMD_RUN;
 660        ehci_writel(ehci, ehci->command, &ehci->regs->command);
 661        dbg_cmd (ehci, "init", ehci->command);
 662
 663        /*
 664         * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 665         * are explicitly handed to companion controller(s), so no TT is
 666         * involved with the root hub.  (Except where one is integrated,
 667         * and there's no companion controller unless maybe for USB OTG.)
 668         *
 669         * Turning on the CF flag will transfer ownership of all ports
 670         * from the companions to the EHCI controller.  If any of the
 671         * companions are in the middle of a port reset at the time, it
 672         * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 673         * guarantees that no resets are in progress.  After we set CF,
 674         * a short delay lets the hardware catch up; new resets shouldn't
 675         * be started before the port switching actions could complete.
 676         */
 677        down_write(&ehci_cf_port_reset_rwsem);
 678        hcd->state = HC_STATE_RUNNING;
 679        ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 680        ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 681        msleep(5);
 682        up_write(&ehci_cf_port_reset_rwsem);
 683        ehci->last_periodic_enable = ktime_get_real();
 684
 685        temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
 686        ehci_info (ehci,
 687                "USB %x.%x started, EHCI %x.%02x%s\n",
 688                ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 689                temp >> 8, temp & 0xff,
 690                ignore_oc ? ", overcurrent ignored" : "");
 691
 692        ehci_writel(ehci, INTR_MASK,
 693                    &ehci->regs->intr_enable); /* Turn On Interrupts */
 694
 695        /* GRR this is run-once init(), being done every time the HC starts.
 696         * So long as they're part of class devices, we can't do it init()
 697         * since the class device isn't created that early.
 698         */
 699        create_debug_files(ehci);
 700        create_companion_file(ehci);
 701
 702        return 0;
 703}
 704
 705/*-------------------------------------------------------------------------*/
 706
 707static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 708{
 709        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 710        u32                     status, masked_status, pcd_status = 0, cmd;
 711        int                     bh;
 712
 713        spin_lock (&ehci->lock);
 714
 715        status = ehci_readl(ehci, &ehci->regs->status);
 716
 717        /* e.g. cardbus physical eject */
 718        if (status == ~(u32) 0) {
 719                ehci_dbg (ehci, "device removed\n");
 720                goto dead;
 721        }
 722
 723        masked_status = status & INTR_MASK;
 724        if (!masked_status) {           /* irq sharing? */
 725                spin_unlock(&ehci->lock);
 726                return IRQ_NONE;
 727        }
 728
 729        /* clear (just) interrupts */
 730        ehci_writel(ehci, masked_status, &ehci->regs->status);
 731        cmd = ehci_readl(ehci, &ehci->regs->command);
 732        bh = 0;
 733
 734#ifdef  VERBOSE_DEBUG
 735        /* unrequested/ignored: Frame List Rollover */
 736        dbg_status (ehci, "irq", status);
 737#endif
 738
 739        /* INT, ERR, and IAA interrupt rates can be throttled */
 740
 741        /* normal [4.15.1.2] or error [4.15.1.1] completion */
 742        if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 743                if (likely ((status & STS_ERR) == 0))
 744                        COUNT (ehci->stats.normal);
 745                else
 746                        COUNT (ehci->stats.error);
 747                bh = 1;
 748        }
 749
 750        /* complete the unlinking of some qh [4.15.2.3] */
 751        if (status & STS_IAA) {
 752                /* guard against (alleged) silicon errata */
 753                if (cmd & CMD_IAAD) {
 754                        ehci_writel(ehci, cmd & ~CMD_IAAD,
 755                                        &ehci->regs->command);
 756                        ehci_dbg(ehci, "IAA with IAAD still set?\n");
 757                }
 758                if (ehci->reclaim) {
 759                        COUNT(ehci->stats.reclaim);
 760                        end_unlink_async(ehci);
 761                } else
 762                        ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
 763        }
 764
 765        /* remote wakeup [4.3.1] */
 766        if (status & STS_PCD) {
 767                unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 768
 769                /* kick root hub later */
 770                pcd_status = status;
 771
 772                /* resume root hub? */
 773                if (!(cmd & CMD_RUN))
 774                        usb_hcd_resume_root_hub(hcd);
 775
 776                while (i--) {
 777                        int pstatus = ehci_readl(ehci,
 778                                                 &ehci->regs->port_status [i]);
 779
 780                        if (pstatus & PORT_OWNER)
 781                                continue;
 782                        if (!(test_bit(i, &ehci->suspended_ports) &&
 783                                        ((pstatus & PORT_RESUME) ||
 784                                                !(pstatus & PORT_SUSPEND)) &&
 785                                        (pstatus & PORT_PE) &&
 786                                        ehci->reset_done[i] == 0))
 787                                continue;
 788
 789                        /* start 20 msec resume signaling from this port,
 790                         * and make khubd collect PORT_STAT_C_SUSPEND to
 791                         * stop that signaling.  Use 5 ms extra for safety,
 792                         * like usb_port_resume() does.
 793                         */
 794                        ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 795                        ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 796                        mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 797                }
 798        }
 799
 800        /* PCI errors [4.15.2.4] */
 801        if (unlikely ((status & STS_FATAL) != 0)) {
 802                ehci_err(ehci, "fatal error\n");
 803                dbg_cmd(ehci, "fatal", cmd);
 804                dbg_status(ehci, "fatal", status);
 805                ehci_halt(ehci);
 806dead:
 807                ehci_reset(ehci);
 808                ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 809                /* generic layer kills/unlinks all urbs, then
 810                 * uses ehci_stop to clean up the rest
 811                 */
 812                bh = 1;
 813        }
 814
 815        if (bh)
 816                ehci_work (ehci);
 817        spin_unlock (&ehci->lock);
 818        if (pcd_status)
 819                usb_hcd_poll_rh_status(hcd);
 820        return IRQ_HANDLED;
 821}
 822
 823/*-------------------------------------------------------------------------*/
 824
 825/*
 826 * non-error returns are a promise to giveback() the urb later
 827 * we drop ownership so next owner (or urb unlink) can get it
 828 *
 829 * urb + dev is in hcd.self.controller.urb_list
 830 * we're queueing TDs onto software and hardware lists
 831 *
 832 * hcd-specific init for hcpriv hasn't been done yet
 833 *
 834 * NOTE:  control, bulk, and interrupt share the same code to append TDs
 835 * to a (possibly active) QH, and the same QH scanning code.
 836 */
 837static int ehci_urb_enqueue (
 838        struct usb_hcd  *hcd,
 839        struct urb      *urb,
 840        gfp_t           mem_flags
 841) {
 842        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 843        struct list_head        qtd_list;
 844
 845        INIT_LIST_HEAD (&qtd_list);
 846
 847        switch (usb_pipetype (urb->pipe)) {
 848        case PIPE_CONTROL:
 849                /* qh_completions() code doesn't handle all the fault cases
 850                 * in multi-TD control transfers.  Even 1KB is rare anyway.
 851                 */
 852                if (urb->transfer_buffer_length > (16 * 1024))
 853                        return -EMSGSIZE;
 854                /* FALLTHROUGH */
 855        /* case PIPE_BULK: */
 856        default:
 857                if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 858                        return -ENOMEM;
 859                return submit_async(ehci, urb, &qtd_list, mem_flags);
 860
 861        case PIPE_INTERRUPT:
 862                if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 863                        return -ENOMEM;
 864                return intr_submit(ehci, urb, &qtd_list, mem_flags);
 865
 866        case PIPE_ISOCHRONOUS:
 867                if (urb->dev->speed == USB_SPEED_HIGH)
 868                        return itd_submit (ehci, urb, mem_flags);
 869                else
 870                        return sitd_submit (ehci, urb, mem_flags);
 871        }
 872}
 873
 874static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 875{
 876        /* failfast */
 877        if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
 878                end_unlink_async(ehci);
 879
 880        /* If the QH isn't linked then there's nothing we can do
 881         * unless we were called during a giveback, in which case
 882         * qh_completions() has to deal with it.
 883         */
 884        if (qh->qh_state != QH_STATE_LINKED) {
 885                if (qh->qh_state == QH_STATE_COMPLETING)
 886                        qh->needs_rescan = 1;
 887                return;
 888        }
 889
 890        /* defer till later if busy */
 891        if (ehci->reclaim) {
 892                struct ehci_qh          *last;
 893
 894                for (last = ehci->reclaim;
 895                                last->reclaim;
 896                                last = last->reclaim)
 897                        continue;
 898                qh->qh_state = QH_STATE_UNLINK_WAIT;
 899                last->reclaim = qh;
 900
 901        /* start IAA cycle */
 902        } else
 903                start_unlink_async (ehci, qh);
 904}
 905
 906/* remove from hardware lists
 907 * completions normally happen asynchronously
 908 */
 909
 910static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 911{
 912        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 913        struct ehci_qh          *qh;
 914        unsigned long           flags;
 915        int                     rc;
 916
 917        spin_lock_irqsave (&ehci->lock, flags);
 918        rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 919        if (rc)
 920                goto done;
 921
 922        switch (usb_pipetype (urb->pipe)) {
 923        // case PIPE_CONTROL:
 924        // case PIPE_BULK:
 925        default:
 926                qh = (struct ehci_qh *) urb->hcpriv;
 927                if (!qh)
 928                        break;
 929                switch (qh->qh_state) {
 930                case QH_STATE_LINKED:
 931                case QH_STATE_COMPLETING:
 932                        unlink_async(ehci, qh);
 933                        break;
 934                case QH_STATE_UNLINK:
 935                case QH_STATE_UNLINK_WAIT:
 936                        /* already started */
 937                        break;
 938                case QH_STATE_IDLE:
 939                        /* QH might be waiting for a Clear-TT-Buffer */
 940                        qh_completions(ehci, qh);
 941                        break;
 942                }
 943                break;
 944
 945        case PIPE_INTERRUPT:
 946                qh = (struct ehci_qh *) urb->hcpriv;
 947                if (!qh)
 948                        break;
 949                switch (qh->qh_state) {
 950                case QH_STATE_LINKED:
 951                case QH_STATE_COMPLETING:
 952                        intr_deschedule (ehci, qh);
 953                        break;
 954                case QH_STATE_IDLE:
 955                        qh_completions (ehci, qh);
 956                        break;
 957                default:
 958                        ehci_dbg (ehci, "bogus qh %p state %d\n",
 959                                        qh, qh->qh_state);
 960                        goto done;
 961                }
 962                break;
 963
 964        case PIPE_ISOCHRONOUS:
 965                // itd or sitd ...
 966
 967                // wait till next completion, do it then.
 968                // completion irqs can wait up to 1024 msec,
 969                break;
 970        }
 971done:
 972        spin_unlock_irqrestore (&ehci->lock, flags);
 973        return rc;
 974}
 975
 976/*-------------------------------------------------------------------------*/
 977
 978// bulk qh holds the data toggle
 979
 980static void
 981ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 982{
 983        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 984        unsigned long           flags;
 985        struct ehci_qh          *qh, *tmp;
 986
 987        /* ASSERT:  any requests/urbs are being unlinked */
 988        /* ASSERT:  nobody can be submitting urbs for this any more */
 989
 990rescan:
 991        spin_lock_irqsave (&ehci->lock, flags);
 992        qh = ep->hcpriv;
 993        if (!qh)
 994                goto done;
 995
 996        /* endpoints can be iso streams.  for now, we don't
 997         * accelerate iso completions ... so spin a while.
 998         */
 999        if (qh->hw == NULL) {
1000                ehci_vdbg (ehci, "iso delay\n");
1001                goto idle_timeout;
1002        }
1003
1004        if (!HC_IS_RUNNING (hcd->state))
1005                qh->qh_state = QH_STATE_IDLE;
1006        switch (qh->qh_state) {
1007        case QH_STATE_LINKED:
1008        case QH_STATE_COMPLETING:
1009                for (tmp = ehci->async->qh_next.qh;
1010                                tmp && tmp != qh;
1011                                tmp = tmp->qh_next.qh)
1012                        continue;
1013                /* periodic qh self-unlinks on empty */
1014                if (!tmp)
1015                        goto nogood;
1016                unlink_async (ehci, qh);
1017                /* FALL THROUGH */
1018        case QH_STATE_UNLINK:           /* wait for hw to finish? */
1019        case QH_STATE_UNLINK_WAIT:
1020idle_timeout:
1021                spin_unlock_irqrestore (&ehci->lock, flags);
1022                schedule_timeout_uninterruptible(1);
1023                goto rescan;
1024        case QH_STATE_IDLE:             /* fully unlinked */
1025                if (qh->clearing_tt)
1026                        goto idle_timeout;
1027                if (list_empty (&qh->qtd_list)) {
1028                        qh_put (qh);
1029                        break;
1030                }
1031                /* else FALL THROUGH */
1032        default:
1033nogood:
1034                /* caller was supposed to have unlinked any requests;
1035                 * that's not our job.  just leak this memory.
1036                 */
1037                ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1038                        qh, ep->desc.bEndpointAddress, qh->qh_state,
1039                        list_empty (&qh->qtd_list) ? "" : "(has tds)");
1040                break;
1041        }
1042        ep->hcpriv = NULL;
1043done:
1044        spin_unlock_irqrestore (&ehci->lock, flags);
1045        return;
1046}
1047
1048static void
1049ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1050{
1051        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1052        struct ehci_qh          *qh;
1053        int                     eptype = usb_endpoint_type(&ep->desc);
1054        int                     epnum = usb_endpoint_num(&ep->desc);
1055        int                     is_out = usb_endpoint_dir_out(&ep->desc);
1056        unsigned long           flags;
1057
1058        if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1059                return;
1060
1061        spin_lock_irqsave(&ehci->lock, flags);
1062        qh = ep->hcpriv;
1063
1064        /* For Bulk and Interrupt endpoints we maintain the toggle state
1065         * in the hardware; the toggle bits in udev aren't used at all.
1066         * When an endpoint is reset by usb_clear_halt() we must reset
1067         * the toggle bit in the QH.
1068         */
1069        if (qh) {
1070                usb_settoggle(qh->dev, epnum, is_out, 0);
1071                if (!list_empty(&qh->qtd_list)) {
1072                        WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1073                } else if (qh->qh_state == QH_STATE_LINKED ||
1074                                qh->qh_state == QH_STATE_COMPLETING) {
1075
1076                        /* The toggle value in the QH can't be updated
1077                         * while the QH is active.  Unlink it now;
1078                         * re-linking will call qh_refresh().
1079                         */
1080                        if (eptype == USB_ENDPOINT_XFER_BULK)
1081                                unlink_async(ehci, qh);
1082                        else
1083                                intr_deschedule(ehci, qh);
1084                }
1085        }
1086        spin_unlock_irqrestore(&ehci->lock, flags);
1087}
1088
1089static int ehci_get_frame (struct usb_hcd *hcd)
1090{
1091        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1092        return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
1093                ehci->periodic_size;
1094}
1095
1096/*-------------------------------------------------------------------------*/
1097
1098MODULE_DESCRIPTION(DRIVER_DESC);
1099MODULE_AUTHOR (DRIVER_AUTHOR);
1100MODULE_LICENSE ("GPL");
1101
1102#ifdef CONFIG_PCI
1103#include "ehci-pci.c"
1104#define PCI_DRIVER              ehci_pci_driver
1105#endif
1106
1107#ifdef CONFIG_USB_EHCI_FSL
1108#include "ehci-fsl.c"
1109#define PLATFORM_DRIVER         ehci_fsl_driver
1110#endif
1111
1112#ifdef CONFIG_USB_EHCI_MXC
1113#include "ehci-mxc.c"
1114#define PLATFORM_DRIVER         ehci_mxc_driver
1115#endif
1116
1117#ifdef CONFIG_SOC_AU1200
1118#include "ehci-au1xxx.c"
1119#define PLATFORM_DRIVER         ehci_hcd_au1xxx_driver
1120#endif
1121
1122#ifdef CONFIG_ARCH_OMAP3
1123#include "ehci-omap.c"
1124#define        PLATFORM_DRIVER         ehci_hcd_omap_driver
1125#endif
1126
1127#ifdef CONFIG_PPC_PS3
1128#include "ehci-ps3.c"
1129#define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1130#endif
1131
1132#ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1133#include "ehci-ppc-of.c"
1134#define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1135#endif
1136
1137#ifdef CONFIG_XPS_USB_HCD_XILINX
1138#include "ehci-xilinx-of.c"
1139#define OF_PLATFORM_DRIVER      ehci_hcd_xilinx_of_driver
1140#endif
1141
1142#ifdef CONFIG_PLAT_ORION
1143#include "ehci-orion.c"
1144#define PLATFORM_DRIVER         ehci_orion_driver
1145#endif
1146
1147#ifdef CONFIG_ARCH_IXP4XX
1148#include "ehci-ixp4xx.c"
1149#define PLATFORM_DRIVER         ixp4xx_ehci_driver
1150#endif
1151
1152#ifdef CONFIG_USB_W90X900_EHCI
1153#include "ehci-w90x900.c"
1154#define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1155#endif
1156
1157#ifdef CONFIG_ARCH_AT91
1158#include "ehci-atmel.c"
1159#define PLATFORM_DRIVER         ehci_atmel_driver
1160#endif
1161
1162#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1163    !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
1164#error "missing bus glue for ehci-hcd"
1165#endif
1166
1167static int __init ehci_hcd_init(void)
1168{
1169        int retval = 0;
1170
1171        if (usb_disabled())
1172                return -ENODEV;
1173
1174        printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1175        set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1176        if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1177                        test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1178                printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1179                                " before uhci_hcd and ohci_hcd, not after\n");
1180
1181        pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1182                 hcd_name,
1183                 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1184                 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1185
1186#ifdef DEBUG
1187        ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1188        if (!ehci_debug_root) {
1189                retval = -ENOENT;
1190                goto err_debug;
1191        }
1192#endif
1193
1194#ifdef PLATFORM_DRIVER
1195        retval = platform_driver_register(&PLATFORM_DRIVER);
1196        if (retval < 0)
1197                goto clean0;
1198#endif
1199
1200#ifdef PCI_DRIVER
1201        retval = pci_register_driver(&PCI_DRIVER);
1202        if (retval < 0)
1203                goto clean1;
1204#endif
1205
1206#ifdef PS3_SYSTEM_BUS_DRIVER
1207        retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1208        if (retval < 0)
1209                goto clean2;
1210#endif
1211
1212#ifdef OF_PLATFORM_DRIVER
1213        retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1214        if (retval < 0)
1215                goto clean3;
1216#endif
1217        return retval;
1218
1219#ifdef OF_PLATFORM_DRIVER
1220        /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1221clean3:
1222#endif
1223#ifdef PS3_SYSTEM_BUS_DRIVER
1224        ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1225clean2:
1226#endif
1227#ifdef PCI_DRIVER
1228        pci_unregister_driver(&PCI_DRIVER);
1229clean1:
1230#endif
1231#ifdef PLATFORM_DRIVER
1232        platform_driver_unregister(&PLATFORM_DRIVER);
1233clean0:
1234#endif
1235#ifdef DEBUG
1236        debugfs_remove(ehci_debug_root);
1237        ehci_debug_root = NULL;
1238err_debug:
1239#endif
1240        clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1241        return retval;
1242}
1243module_init(ehci_hcd_init);
1244
1245static void __exit ehci_hcd_cleanup(void)
1246{
1247#ifdef OF_PLATFORM_DRIVER
1248        of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1249#endif
1250#ifdef PLATFORM_DRIVER
1251        platform_driver_unregister(&PLATFORM_DRIVER);
1252#endif
1253#ifdef PCI_DRIVER
1254        pci_unregister_driver(&PCI_DRIVER);
1255#endif
1256#ifdef PS3_SYSTEM_BUS_DRIVER
1257        ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1258#endif
1259#ifdef DEBUG
1260        debugfs_remove(ehci_debug_root);
1261#endif
1262        clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1263}
1264module_exit(ehci_hcd_cleanup);
1265
1266
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